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x86/intel: Aggregate big core graphics naming
[linux-block.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
a61127c2 1// SPDX-License-Identifier: GPL-2.0-only
103a8fea
LB		 2/*
3 * turbostat -- show CPU frequency and C-state residency
34041551 4 * on modern Intel and AMD processors.
103a8fea 5 *
144b44b1 6 * Copyright (c) 2013 Intel Corporation.
103a8fea 7 * Len Brown <len.brown@intel.com>
103a8fea
LB		 8 */
9
88c3281f 10#define _GNU_SOURCE
b731f311 11#include MSRHEADER
869ce69e 12#include INTEL_FAMILY_HEADER
95aebc44 13#include <stdarg.h>
103a8fea 14#include <stdio.h>
b2c95d90 15#include <err.h>
103a8fea
LB		 16#include <unistd.h>
17#include <sys/types.h>
18#include <sys/wait.h>
19#include <sys/stat.h>
b9ad8ee0 20#include <sys/select.h>
103a8fea
LB		 21#include <sys/resource.h>
22#include <fcntl.h>
23#include <signal.h>
24#include <sys/time.h>
25#include <stdlib.h>
d8af6f5f 26#include <getopt.h>
103a8fea
LB		 27#include <dirent.h>
28#include <string.h>
29#include <ctype.h>
88c3281f 30#include <sched.h>
2a0609c0 31#include <time.h>
2b92865e 32#include <cpuid.h>
98481e79
LB		 33#include <linux/capability.h>
34#include <errno.h>
9392bd98 35#include <math.h>
103a8fea 36
103a8fea 37char *proc_stat = "/proc/stat";
b7d8c148 38FILE *outf;
36229897 39int *fd_percpu;
b9ad8ee0 40struct timeval interval_tv = {5, 0};
47936f94 41struct timespec interval_ts = {5, 0};
b9ad8ee0 42struct timespec one_msec = {0, 1000000};
023fe0ac 43unsigned int num_iterations;
d8af6f5f 44unsigned int debug;
96e47158 45unsigned int quiet;
3f44a5c6 46unsigned int shown;
0de6c0df 47unsigned int sums_need_wide_columns;
d8af6f5f
LB		 48unsigned int rapl_joules;
49unsigned int summary_only;
c8ade361 50unsigned int list_header_only;
d8af6f5f 51unsigned int dump_only;
103a8fea 52unsigned int do_snb_cstates;
fb5d4327 53unsigned int do_knl_cstates;
144b44b1
LB		 54unsigned int do_slm_cstates;
55unsigned int use_c1_residency_msr;
103a8fea 56unsigned int has_aperf;
889facbe 57unsigned int has_epb;
5a63426e
LB		 58unsigned int do_irtl_snb;
59unsigned int do_irtl_hsw;
fc04cc67 60unsigned int units = 1000000; /* MHz etc */
103a8fea 61unsigned int genuine_intel;
34041551
LB		 62unsigned int authentic_amd;
63unsigned int max_level, max_extended_level;
103a8fea 64unsigned int has_invariant_tsc;
d7899447 65unsigned int do_nhm_platform_info;
cf4cbe53 66unsigned int no_MSR_MISC_PWR_MGMT;
b2b34dfe 67unsigned int aperf_mperf_multiplier = 1;
103a8fea 68double bclk;
a2b7b749 69double base_hz;
21ed5574 70unsigned int has_base_hz;
a2b7b749 71double tsc_tweak = 1.0;
c98d5d94
LB		 72unsigned int show_pkg_only;
73unsigned int show_core_only;
74char *output_buffer, *outp;
889facbe
LB		 75unsigned int do_rapl;
76unsigned int do_dts;
77unsigned int do_ptm;
fdf676e5 78unsigned long long gfx_cur_rc6_ms;
be0e54c4
LB		 79unsigned long long cpuidle_cur_cpu_lpi_us;
80unsigned long long cpuidle_cur_sys_lpi_us;
27d47356 81unsigned int gfx_cur_mhz;
889facbe
LB		 82unsigned int tcc_activation_temp;
83unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 84double rapl_power_units, rapl_time_units;
85double rapl_dram_energy_units, rapl_energy_units;
889facbe 86double rapl_joule_counter_range;
3a9a941d 87unsigned int do_core_perf_limit_reasons;
ac980e13 88unsigned int has_automatic_cstate_conversion;
3a9a941d
LB		 89unsigned int do_gfx_perf_limit_reasons;
90unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 91unsigned int crystal_hz;
92unsigned long long tsc_hz;
7ce7d5de 93int base_cpu;
21ed5574 94double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 95unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
96 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
97unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
98unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
99unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
100unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
33148d67 101unsigned int has_misc_feature_control;
4c2122d4 102unsigned int first_counter_read = 1;
889facbe 103
e6f9bb3c
LB		 104#define RAPL_PKG (1 << 0)
105 /* 0x610 MSR_PKG_POWER_LIMIT */
106 /* 0x611 MSR_PKG_ENERGY_STATUS */
107#define RAPL_PKG_PERF_STATUS (1 << 1)
108 /* 0x613 MSR_PKG_PERF_STATUS */
109#define RAPL_PKG_POWER_INFO (1 << 2)
110 /* 0x614 MSR_PKG_POWER_INFO */
111
112#define RAPL_DRAM (1 << 3)
113 /* 0x618 MSR_DRAM_POWER_LIMIT */
114 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 115#define RAPL_DRAM_PERF_STATUS (1 << 4)
116 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 117#define RAPL_DRAM_POWER_INFO (1 << 5)
118 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 119
9148494c 120#define RAPL_CORES_POWER_LIMIT (1 << 6)
e6f9bb3c 121 /* 0x638 MSR_PP0_POWER_LIMIT */
0b2bb692 122#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 123 /* 0x63a MSR_PP0_POLICY */
124
0b2bb692 125#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 126 /* 0x640 MSR_PP1_POWER_LIMIT */
127 /* 0x641 MSR_PP1_ENERGY_STATUS */
128 /* 0x642 MSR_PP1_POLICY */
9148494c
JP		 129
130#define RAPL_CORES_ENERGY_STATUS (1 << 9)
131 /* 0x639 MSR_PP0_ENERGY_STATUS */
9392bd98
CW		 132#define RAPL_PER_CORE_ENERGY (1 << 10)
133 /* Indicates cores energy collection is per-core,
134 * not per-package. */
135#define RAPL_AMD_F17H (1 << 11)
136 /* 0xc0010299 MSR_RAPL_PWR_UNIT */
137 /* 0xc001029a MSR_CORE_ENERGY_STAT */
138 /* 0xc001029b MSR_PKG_ENERGY_STAT */
9148494c 139#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
889facbe
LB		 140#define TJMAX_DEFAULT 100
141
9392bd98
CW		 142/* MSRs that are not yet in the kernel-provided header. */
143#define MSR_RAPL_PWR_UNIT 0xc0010299
144#define MSR_CORE_ENERGY_STAT 0xc001029a
145#define MSR_PKG_ENERGY_STAT 0xc001029b
146
889facbe 147#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea 148
388e9c81
LB		 149/*
150 * buffer size used by sscanf() for added column names
151 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
152 */
153#define NAME_BYTES 20
495c7654 154#define PATH_BYTES 128
388e9c81 155
103a8fea
LB		 156int backwards_count;
157char *progname;
103a8fea 158
1ef7d21a
LB		 159#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
160cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
161size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
0748eaf0
LB		 162#define MAX_ADDED_COUNTERS 8
163#define MAX_ADDED_THREAD_COUNTERS 24
0e2d8f05 164#define BITMASK_SIZE 32
c98d5d94
LB		 165
166struct thread_data {
f4fdf2b4
LB		 167 struct timeval tv_begin;
168 struct timeval tv_end;
c98d5d94
LB		 169 unsigned long long tsc;
170 unsigned long long aperf;
171 unsigned long long mperf;
144b44b1 172 unsigned long long c1;
0de6c0df 173 unsigned long long irq_count;
1ed51011 174 unsigned int smi_count;
c98d5d94 175 unsigned int cpu_id;
4c2122d4
LB		 176 unsigned int apic_id;
177 unsigned int x2apic_id;
c98d5d94
LB		 178 unsigned int flags;
179#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
180#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
0748eaf0 181 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
c98d5d94
LB		 182} *thread_even, *thread_odd;
183
184struct core_data {
185 unsigned long long c3;
186 unsigned long long c6;
187 unsigned long long c7;
0539ba11 188 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
889facbe 189 unsigned int core_temp_c;
9392bd98 190 unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */
c98d5d94 191 unsigned int core_id;
678a3bd1 192 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 193} *core_even, *core_odd;
194
195struct pkg_data {
196 unsigned long long pc2;
197 unsigned long long pc3;
198 unsigned long long pc6;
199 unsigned long long pc7;
ca58710f
KCA		 200 unsigned long long pc8;
201 unsigned long long pc9;
202 unsigned long long pc10;
be0e54c4
LB		 203 unsigned long long cpu_lpi;
204 unsigned long long sys_lpi;
0b2bb692
LB		 205 unsigned long long pkg_wtd_core_c0;
206 unsigned long long pkg_any_core_c0;
207 unsigned long long pkg_any_gfxe_c0;
208 unsigned long long pkg_both_core_gfxe_c0;
9185e988 209 long long gfx_rc6_ms;
27d47356 210 unsigned int gfx_mhz;
c98d5d94 211 unsigned int package_id;
889facbe
LB		 212 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
213 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
214 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
215 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
216 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
217 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
218 unsigned int pkg_temp_c;
678a3bd1 219 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 220} *package_even, *package_odd;
221
222#define ODD_COUNTERS thread_odd, core_odd, package_odd
223#define EVEN_COUNTERS thread_even, core_even, package_even
224
40f5cfe7
PB		 225#define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
226 ((thread_base) + \
227 ((pkg_no) * \
228 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
229 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
230 ((core_no) * topo.threads_per_core) + \
231 (thread_no))
232
233#define GET_CORE(core_base, core_no, node_no, pkg_no) \
234 ((core_base) + \
235 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
236 ((node_no) * topo.cores_per_node) + \
237 (core_no))
238
239
c98d5d94
LB		 240#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
241
388e9c81 242enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
41618e63 243enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
388e9c81
LB		 244enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
245
246struct msr_counter {
247 unsigned int msr_num;
248 char name[NAME_BYTES];
495c7654 249 char path[PATH_BYTES];
388e9c81
LB		 250 unsigned int width;
251 enum counter_type type;
252 enum counter_format format;
253 struct msr_counter *next;
812db3f7
LB		 254 unsigned int flags;
255#define FLAGS_HIDE (1 << 0)
256#define FLAGS_SHOW (1 << 1)
41618e63 257#define SYSFS_PERCPU (1 << 1)
388e9c81
LB		 258};
259
260struct sys_counters {
678a3bd1
LB		 261 unsigned int added_thread_counters;
262 unsigned int added_core_counters;
263 unsigned int added_package_counters;
388e9c81
LB		 264 struct msr_counter *tp;
265 struct msr_counter *cp;
266 struct msr_counter *pp;
267} sys;
268
c98d5d94
LB		 269struct system_summary {
270 struct thread_data threads;
271 struct core_data cores;
272 struct pkg_data packages;
388e9c81 273} average;
c98d5d94 274
0e2d8f05
LB		 275struct cpu_topology {
276 int physical_package_id;
6de68fe1 277 int die_id;
0e2d8f05 278 int logical_cpu_id;
ef605741
PB		 279 int physical_node_id;
280 int logical_node_id; /* 0-based count within the package */
0e2d8f05 281 int physical_core_id;
8cb48b32 282 int thread_id;
0e2d8f05
LB		 283 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
284} *cpus;
c98d5d94
LB		 285
286struct topo_params {
287 int num_packages;
6de68fe1 288 int num_die;
c98d5d94
LB		 289 int num_cpus;
290 int num_cores;
291 int max_cpu_num;
ef605741 292 int max_node_num;
70a9c6e8
PB		 293 int nodes_per_pkg;
294 int cores_per_node;
295 int threads_per_core;
c98d5d94
LB		 296} topo;
297
298struct timeval tv_even, tv_odd, tv_delta;
299
562a2d37
LB		 300int *irq_column_2_cpu; /* /proc/interrupts column numbers */
301int *irqs_per_cpu; /* indexed by cpu_num */
302
c98d5d94
LB		 303void setup_all_buffers(void);
304
305int cpu_is_not_present(int cpu)
d15cf7c1 306{
c98d5d94 307 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 308}
88c3281f 309/*
c98d5d94
LB		 310 * run func(thread, core, package) in topology order
311 * skip non-present cpus
88c3281f 312 */
c98d5d94
LB		 313
314int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
315 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 316{
40f5cfe7 317 int retval, pkg_no, core_no, thread_no, node_no;
d15cf7c1 318
c98d5d94 319 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
df2f677d
LB		 320 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
321 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
40f5cfe7
PB		 322 for (thread_no = 0; thread_no <
323 topo.threads_per_core; ++thread_no) {
324 struct thread_data *t;
325 struct core_data *c;
326 struct pkg_data *p;
327
328 t = GET_THREAD(thread_base, thread_no,
329 core_no, node_no,
330 pkg_no);
331
332 if (cpu_is_not_present(t->cpu_id))
333 continue;
334
335 c = GET_CORE(core_base, core_no,
336 node_no, pkg_no);
337 p = GET_PKG(pkg_base, pkg_no);
338
339 retval = func(t, c, p);
340 if (retval)
341 return retval;
342 }
c98d5d94
LB		 343 }
344 }
345 }
346 return 0;
88c3281f
LB		 347}
348
349int cpu_migrate(int cpu)
350{
c98d5d94
LB		 351 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
352 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
353 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 354 return -1;
355 else
356 return 0;
357}
36229897 358int get_msr_fd(int cpu)
103a8fea 359{
103a8fea
LB		 360 char pathname[32];
361 int fd;
362
36229897
LB		 363 fd = fd_percpu[cpu];
364
365 if (fd)
366 return fd;
367
103a8fea
LB		 368 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
369 fd = open(pathname, O_RDONLY);
15aaa346 370 if (fd < 0)
98481e79 371 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 372
36229897
LB		 373 fd_percpu[cpu] = fd;
374
375 return fd;
376}
377
378int get_msr(int cpu, off_t offset, unsigned long long *msr)
379{
380 ssize_t retval;
381
382 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
15aaa346 383
98481e79 384 if (retval != sizeof *msr)
cf4cbe53 385 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
15aaa346
LB		 386
387 return 0;
103a8fea
LB		 388}
389
fc04cc67 390/*
bdd5ae3a
LB		 391 * This list matches the column headers, except
392 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
393 * 2. Core and CPU are moved to the end, we can't have strings that contain them
394 * matching on them for --show and --hide.
fc04cc67 395 */
812db3f7 396struct msr_counter bic[] = {
3f44a5c6
LB		 397 { 0x0, "usec" },
398 { 0x0, "Time_Of_Day_Seconds" },
812db3f7 399 { 0x0, "Package" },
bdd5ae3a 400 { 0x0, "Node" },
812db3f7 401 { 0x0, "Avg_MHz" },
bdd5ae3a 402 { 0x0, "Busy%" },
812db3f7
LB		 403 { 0x0, "Bzy_MHz" },
404 { 0x0, "TSC_MHz" },
405 { 0x0, "IRQ" },
495c7654 406 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
bdd5ae3a 407 { 0x0, "sysfs" },
812db3f7
LB		 408 { 0x0, "CPU%c1" },
409 { 0x0, "CPU%c3" },
410 { 0x0, "CPU%c6" },
411 { 0x0, "CPU%c7" },
412 { 0x0, "ThreadC" },
413 { 0x0, "CoreTmp" },
414 { 0x0, "CoreCnt" },
415 { 0x0, "PkgTmp" },
416 { 0x0, "GFX%rc6" },
417 { 0x0, "GFXMHz" },
418 { 0x0, "Pkg%pc2" },
419 { 0x0, "Pkg%pc3" },
420 { 0x0, "Pkg%pc6" },
421 { 0x0, "Pkg%pc7" },
0f47c08d
LB		 422 { 0x0, "Pkg%pc8" },
423 { 0x0, "Pkg%pc9" },
4bd1f8f2 424 { 0x0, "Pk%pc10" },
be0e54c4
LB		 425 { 0x0, "CPU%LPI" },
426 { 0x0, "SYS%LPI" },
812db3f7
LB		 427 { 0x0, "PkgWatt" },
428 { 0x0, "CorWatt" },
429 { 0x0, "GFXWatt" },
430 { 0x0, "PkgCnt" },
431 { 0x0, "RAMWatt" },
432 { 0x0, "PKG_%" },
433 { 0x0, "RAM_%" },
434 { 0x0, "Pkg_J" },
435 { 0x0, "Cor_J" },
436 { 0x0, "GFX_J" },
437 { 0x0, "RAM_J" },
0539ba11 438 { 0x0, "Mod%c6" },
a99d8730
LB		 439 { 0x0, "Totl%C0" },
440 { 0x0, "Any%C0" },
441 { 0x0, "GFX%C0" },
442 { 0x0, "CPUGFX%" },
bdd5ae3a
LB		 443 { 0x0, "Core" },
444 { 0x0, "CPU" },
4c2122d4
LB		 445 { 0x0, "APIC" },
446 { 0x0, "X2APIC" },
6de68fe1 447 { 0x0, "Die" },
812db3f7
LB		 448};
449
450#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
3f44a5c6
LB		 451#define BIC_USEC (1ULL << 0)
452#define BIC_TOD (1ULL << 1)
453#define BIC_Package (1ULL << 2)
bdd5ae3a
LB		 454#define BIC_Node (1ULL << 3)
455#define BIC_Avg_MHz (1ULL << 4)
456#define BIC_Busy (1ULL << 5)
457#define BIC_Bzy_MHz (1ULL << 6)
458#define BIC_TSC_MHz (1ULL << 7)
459#define BIC_IRQ (1ULL << 8)
460#define BIC_SMI (1ULL << 9)
461#define BIC_sysfs (1ULL << 10)
462#define BIC_CPU_c1 (1ULL << 11)
463#define BIC_CPU_c3 (1ULL << 12)
464#define BIC_CPU_c6 (1ULL << 13)
465#define BIC_CPU_c7 (1ULL << 14)
466#define BIC_ThreadC (1ULL << 15)
467#define BIC_CoreTmp (1ULL << 16)
468#define BIC_CoreCnt (1ULL << 17)
469#define BIC_PkgTmp (1ULL << 18)
470#define BIC_GFX_rc6 (1ULL << 19)
471#define BIC_GFXMHz (1ULL << 20)
472#define BIC_Pkgpc2 (1ULL << 21)
473#define BIC_Pkgpc3 (1ULL << 22)
474#define BIC_Pkgpc6 (1ULL << 23)
475#define BIC_Pkgpc7 (1ULL << 24)
476#define BIC_Pkgpc8 (1ULL << 25)
477#define BIC_Pkgpc9 (1ULL << 26)
478#define BIC_Pkgpc10 (1ULL << 27)
479#define BIC_CPU_LPI (1ULL << 28)
480#define BIC_SYS_LPI (1ULL << 29)
481#define BIC_PkgWatt (1ULL << 30)
482#define BIC_CorWatt (1ULL << 31)
483#define BIC_GFXWatt (1ULL << 32)
484#define BIC_PkgCnt (1ULL << 33)
485#define BIC_RAMWatt (1ULL << 34)
486#define BIC_PKG__ (1ULL << 35)
487#define BIC_RAM__ (1ULL << 36)
488#define BIC_Pkg_J (1ULL << 37)
489#define BIC_Cor_J (1ULL << 38)
490#define BIC_GFX_J (1ULL << 39)
491#define BIC_RAM_J (1ULL << 40)
492#define BIC_Mod_c6 (1ULL << 41)
493#define BIC_Totl_c0 (1ULL << 42)
494#define BIC_Any_c0 (1ULL << 43)
495#define BIC_GFX_c0 (1ULL << 44)
496#define BIC_CPUGFX (1ULL << 45)
497#define BIC_Core (1ULL << 46)
498#define BIC_CPU (1ULL << 47)
4c2122d4
LB		 499#define BIC_APIC (1ULL << 48)
500#define BIC_X2APIC (1ULL << 49)
6de68fe1 501#define BIC_Die (1ULL << 50)
3f44a5c6 502
4c2122d4 503#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
3f44a5c6
LB		 504
505unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
4c2122d4 506unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
812db3f7
LB		 507
508#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
3f44a5c6 509#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
812db3f7 510#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
0f47c08d 511#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
812db3f7 512
3f44a5c6 513
dd778a5e
LB		 514#define MAX_DEFERRED 16
515char *deferred_skip_names[MAX_DEFERRED];
516int deferred_skip_index;
517
518/*
519 * HIDE_LIST - hide this list of counters, show the rest [default]
520 * SHOW_LIST - show this list of counters, hide the rest
521 */
522enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
523
524void help(void)
525{
526 fprintf(outf,
527 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
528 "\n"
529 "Turbostat forks the specified COMMAND and prints statistics\n"
530 "when COMMAND completes.\n"
531 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
532 "to print statistics, until interrupted.\n"
cc481650
NC		 533 " -a, --add add a counter\n"
534 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
535 " -c, --cpu cpu-set limit output to summary plus cpu-set:\n"
536 " {core | package | j,k,l..m,n-p }\n"
9ce80578
NC		 537 " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n"
538 " -D, --Dump displays the raw counter values\n"
539 " -e, --enable [all | column]\n"
540 " shows all or the specified disabled column\n"
541 " -H, --hide [column|column,column,...]\n"
542 " hide the specified column(s)\n"
cc481650
NC		 543 " -i, --interval sec.subsec\n"
544 " Override default 5-second measurement interval\n"
9ce80578 545 " -J, --Joules displays energy in Joules instead of Watts\n"
cc481650
NC		 546 " -l, --list list column headers only\n"
547 " -n, --num_iterations num\n"
548 " number of the measurement iterations\n"
549 " -o, --out file\n"
550 " create or truncate \"file\" for all output\n"
551 " -q, --quiet skip decoding system configuration header\n"
9ce80578
NC		 552 " -s, --show [column|column,column,...]\n"
553 " show only the specified column(s)\n"
554 " -S, --Summary\n"
555 " limits output to 1-line system summary per interval\n"
556 " -T, --TCC temperature\n"
557 " sets the Thermal Control Circuit temperature in\n"
558 " degrees Celsius\n"
cc481650
NC		 559 " -h, --help print this help message\n"
560 " -v, --version print version information\n"
dd778a5e
LB		 561 "\n"
562 "For more help, run \"man turbostat\"\n");
563}
564
812db3f7
LB		 565/*
566 * bic_lookup
567 * for all the strings in comma separate name_list,
568 * set the approprate bit in return value.
569 */
dd778a5e 570unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
812db3f7
LB		 571{
572 int i;
573 unsigned long long retval = 0;
574
575 while (name_list) {
576 char *comma;
577
578 comma = strchr(name_list, ',');
579
580 if (comma)
581 *comma = '\0';
582
3f44a5c6
LB		 583 if (!strcmp(name_list, "all"))
584 return ~0;
585
812db3f7
LB		 586 for (i = 0; i < MAX_BIC; ++i) {
587 if (!strcmp(name_list, bic[i].name)) {
588 retval |= (1ULL << i);
589 break;
590 }
591 }
592 if (i == MAX_BIC) {
dd778a5e
LB		 593 if (mode == SHOW_LIST) {
594 fprintf(stderr, "Invalid counter name: %s\n", name_list);
595 exit(-1);
596 }
597 deferred_skip_names[deferred_skip_index++] = name_list;
598 if (debug)
599 fprintf(stderr, "deferred \"%s\"\n", name_list);
600 if (deferred_skip_index >= MAX_DEFERRED) {
601 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
602 MAX_DEFERRED, name_list);
603 help();
604 exit(1);
605 }
812db3f7
LB		 606 }
607
608 name_list = comma;
609 if (name_list)
610 name_list++;
611
612 }
613 return retval;
614}
fc04cc67 615
dd778a5e 616
c8ade361 617void print_header(char *delim)
103a8fea 618{
388e9c81 619 struct msr_counter *mp;
6168c2e0 620 int printed = 0;
388e9c81 621
3f44a5c6
LB		 622 if (DO_BIC(BIC_USEC))
623 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
624 if (DO_BIC(BIC_TOD))
625 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
812db3f7 626 if (DO_BIC(BIC_Package))
6168c2e0 627 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
6de68fe1
LB		 628 if (DO_BIC(BIC_Die))
629 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
01235041
PB		 630 if (DO_BIC(BIC_Node))
631 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
812db3f7 632 if (DO_BIC(BIC_Core))
6168c2e0 633 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
812db3f7 634 if (DO_BIC(BIC_CPU))
6168c2e0 635 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
4c2122d4
LB		 636 if (DO_BIC(BIC_APIC))
637 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
638 if (DO_BIC(BIC_X2APIC))
639 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
812db3f7 640 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 641 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
812db3f7 642 if (DO_BIC(BIC_Busy))
6168c2e0 643 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
812db3f7 644 if (DO_BIC(BIC_Bzy_MHz))
6168c2e0 645 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
812db3f7 646 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 647 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
1cc21f7b 648
0de6c0df
LB		 649 if (DO_BIC(BIC_IRQ)) {
650 if (sums_need_wide_columns)
6168c2e0 651 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
0de6c0df 652 else
6168c2e0 653 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
0de6c0df
LB		 654 }
655
812db3f7 656 if (DO_BIC(BIC_SMI))
6168c2e0 657 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
1cc21f7b 658
388e9c81 659 for (mp = sys.tp; mp; mp = mp->next) {
dd778a5e 660
388e9c81
LB		 661 if (mp->format == FORMAT_RAW) {
662 if (mp->width == 64)
dd778a5e 663 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
388e9c81 664 else
dd778a5e 665 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
388e9c81 666 } else {
0de6c0df 667 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
dd778a5e 668 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
0de6c0df 669 else
dd778a5e 670 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
388e9c81
LB		 671 }
672 }
673
41618e63 674 if (DO_BIC(BIC_CPU_c1))
6168c2e0 675 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
562855ee 676 if (DO_BIC(BIC_CPU_c3))
6168c2e0 677 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
812db3f7 678 if (DO_BIC(BIC_CPU_c6))
6168c2e0 679 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
812db3f7 680 if (DO_BIC(BIC_CPU_c7))
6168c2e0 681 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
678a3bd1 682
0539ba11 683 if (DO_BIC(BIC_Mod_c6))
6168c2e0 684 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
678a3bd1 685
812db3f7 686 if (DO_BIC(BIC_CoreTmp))
6168c2e0 687 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
388e9c81 688
9392bd98
CW		 689 if (do_rapl && !rapl_joules) {
690 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
691 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
692 } else if (do_rapl && rapl_joules) {
693 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
694 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
695 }
696
388e9c81
LB		 697 for (mp = sys.cp; mp; mp = mp->next) {
698 if (mp->format == FORMAT_RAW) {
699 if (mp->width == 64)
c8ade361 700 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 701 else
c8ade361 702 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 703 } else {
0de6c0df
LB		 704 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
705 outp += sprintf(outp, "%s%8s", delim, mp->name);
706 else
707 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 708 }
709 }
710
812db3f7 711 if (DO_BIC(BIC_PkgTmp))
6168c2e0 712 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
889facbe 713
812db3f7 714 if (DO_BIC(BIC_GFX_rc6))
6168c2e0 715 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
fdf676e5 716
812db3f7 717 if (DO_BIC(BIC_GFXMHz))
6168c2e0 718 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
27d47356 719
a99d8730 720 if (DO_BIC(BIC_Totl_c0))
6168c2e0 721 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
a99d8730 722 if (DO_BIC(BIC_Any_c0))
6168c2e0 723 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
a99d8730 724 if (DO_BIC(BIC_GFX_c0))
6168c2e0 725 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
a99d8730 726 if (DO_BIC(BIC_CPUGFX))
6168c2e0 727 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
0b2bb692 728
0f47c08d 729 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 730 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
0f47c08d 731 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 732 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
0f47c08d 733 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 734 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
0f47c08d 735 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 736 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
0f47c08d 737 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 738 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
0f47c08d 739 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 740 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
0f47c08d 741 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 742 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
be0e54c4
LB		 743 if (DO_BIC(BIC_CPU_LPI))
744 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
745 if (DO_BIC(BIC_SYS_LPI))
746 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
103a8fea 747
5c56be9a 748 if (do_rapl && !rapl_joules) {
812db3f7 749 if (DO_BIC(BIC_PkgWatt))
6168c2e0 750 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
9392bd98 751 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 752 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
812db3f7 753 if (DO_BIC(BIC_GFXWatt))
6168c2e0 754 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
812db3f7 755 if (DO_BIC(BIC_RAMWatt))
6168c2e0 756 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
812db3f7 757 if (DO_BIC(BIC_PKG__))
6168c2e0 758 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 759 if (DO_BIC(BIC_RAM__))
6168c2e0 760 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
d7899447 761 } else if (do_rapl && rapl_joules) {
812db3f7 762 if (DO_BIC(BIC_Pkg_J))
6168c2e0 763 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
9392bd98 764 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 765 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
812db3f7 766 if (DO_BIC(BIC_GFX_J))
6168c2e0 767 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
812db3f7 768 if (DO_BIC(BIC_RAM_J))
6168c2e0 769 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
812db3f7 770 if (DO_BIC(BIC_PKG__))
6168c2e0 771 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 772 if (DO_BIC(BIC_RAM__))
6168c2e0 773 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
5c56be9a 774 }
388e9c81
LB		 775 for (mp = sys.pp; mp; mp = mp->next) {
776 if (mp->format == FORMAT_RAW) {
777 if (mp->width == 64)
c8ade361 778 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 779 else
c8ade361 780 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 781 } else {
0de6c0df
LB		 782 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
783 outp += sprintf(outp, "%s%8s", delim, mp->name);
784 else
785 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 786 }
787 }
788
c98d5d94 789 outp += sprintf(outp, "\n");
103a8fea
LB		 790}
791
c98d5d94
LB		 792int dump_counters(struct thread_data *t, struct core_data *c,
793 struct pkg_data *p)
103a8fea 794{
388e9c81
LB		 795 int i;
796 struct msr_counter *mp;
797
3b4d5c7f 798 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 799
800 if (t) {
3b4d5c7f
AS		 801 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
802 t->cpu_id, t->flags);
803 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
804 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
805 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
806 outp += sprintf(outp, "c1: %016llX\n", t->c1);
6886fee4 807
812db3f7 808 if (DO_BIC(BIC_IRQ))
0de6c0df 809 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
812db3f7 810 if (DO_BIC(BIC_SMI))
218f0e8d 811 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
388e9c81
LB		 812
813 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
814 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
815 i, mp->msr_num, t->counter[i]);
816 }
c98d5d94 817 }
103a8fea 818
c98d5d94 819 if (c) {
3b4d5c7f
AS		 820 outp += sprintf(outp, "core: %d\n", c->core_id);
821 outp += sprintf(outp, "c3: %016llX\n", c->c3);
822 outp += sprintf(outp, "c6: %016llX\n", c->c6);
823 outp += sprintf(outp, "c7: %016llX\n", c->c7);
824 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
9392bd98 825 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
388e9c81
LB		 826
827 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
828 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
829 i, mp->msr_num, c->counter[i]);
830 }
0539ba11 831 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
c98d5d94 832 }
103a8fea 833
c98d5d94 834 if (p) {
3b4d5c7f 835 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 836
837 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
838 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
839 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
840 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
841
3b4d5c7f 842 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
0f47c08d 843 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 844 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
0f47c08d 845 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 846 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
0f47c08d 847 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 848 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 849 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
850 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
851 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
be0e54c4
LB		 852 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
853 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
854 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
3b4d5c7f
AS		 855 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
856 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
857 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
858 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
859 outp += sprintf(outp, "Throttle PKG: %0X\n",
860 p->rapl_pkg_perf_status);
861 outp += sprintf(outp, "Throttle RAM: %0X\n",
862 p->rapl_dram_perf_status);
863 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
388e9c81
LB		 864
865 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
866 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
867 i, mp->msr_num, p->counter[i]);
868 }
c98d5d94 869 }
3b4d5c7f
AS		 870
871 outp += sprintf(outp, "\n");
872
c98d5d94 873 return 0;
103a8fea
LB		 874}
875
e23da037
LB		 876/*
877 * column formatting convention & formats
e23da037 878 */
c98d5d94
LB		 879int format_counters(struct thread_data *t, struct core_data *c,
880 struct pkg_data *p)
103a8fea 881{
008d396e 882 double interval_float, tsc;
fc04cc67 883 char *fmt8;
388e9c81
LB		 884 int i;
885 struct msr_counter *mp;
6168c2e0
LB		 886 char *delim = "\t";
887 int printed = 0;
103a8fea 888
c98d5d94
LB		 889 /* if showing only 1st thread in core and this isn't one, bail out */
890 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
891 return 0;
892
893 /* if showing only 1st thread in pkg and this isn't one, bail out */
894 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
895 return 0;
896
1ef7d21a
LB		 897 /*if not summary line and --cpu is used */
898 if ((t != &average.threads) &&
899 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
900 return 0;
901
3f44a5c6 902 if (DO_BIC(BIC_USEC)) {
f4fdf2b4
LB		 903 /* on each row, print how many usec each timestamp took to gather */
904 struct timeval tv;
905
906 timersub(&t->tv_end, &t->tv_begin, &tv);
907 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
908 }
909
3f44a5c6
LB		 910 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
911 if (DO_BIC(BIC_TOD))
912 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
913
103a8fea
LB		 914 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
915
008d396e
LB		 916 tsc = t->tsc * tsc_tweak;
917
c98d5d94
LB		 918 /* topo columns, print blanks on 1st (average) line */
919 if (t == &average.threads) {
812db3f7 920 if (DO_BIC(BIC_Package))
6168c2e0 921 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
6de68fe1
LB		 922 if (DO_BIC(BIC_Die))
923 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
01235041
PB		 924 if (DO_BIC(BIC_Node))
925 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 926 if (DO_BIC(BIC_Core))
6168c2e0 927 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 928 if (DO_BIC(BIC_CPU))
6168c2e0 929 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
4c2122d4
LB		 930 if (DO_BIC(BIC_APIC))
931 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
932 if (DO_BIC(BIC_X2APIC))
933 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
103a8fea 934 } else {
812db3f7 935 if (DO_BIC(BIC_Package)) {
c98d5d94 936 if (p)
6168c2e0 937 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
c98d5d94 938 else
6168c2e0 939 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 940 }
6de68fe1
LB		 941 if (DO_BIC(BIC_Die)) {
942 if (c)
943 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
944 else
945 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
946 }
01235041
PB		 947 if (DO_BIC(BIC_Node)) {
948 if (t)
949 outp += sprintf(outp, "%s%d",
950 (printed++ ? delim : ""),
951 cpus[t->cpu_id].physical_node_id);
952 else
953 outp += sprintf(outp, "%s-",
954 (printed++ ? delim : ""));
955 }
812db3f7 956 if (DO_BIC(BIC_Core)) {
c98d5d94 957 if (c)
6168c2e0 958 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
c98d5d94 959 else
6168c2e0 960 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 961 }
812db3f7 962 if (DO_BIC(BIC_CPU))
6168c2e0 963 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
4c2122d4
LB		 964 if (DO_BIC(BIC_APIC))
965 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
966 if (DO_BIC(BIC_X2APIC))
967 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
103a8fea 968 }
fc04cc67 969
812db3f7 970 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 971 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
fc04cc67
LB		 972 1.0 / units * t->aperf / interval_float);
973
812db3f7 974 if (DO_BIC(BIC_Busy))
6168c2e0 975 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
103a8fea 976
812db3f7 977 if (DO_BIC(BIC_Bzy_MHz)) {
21ed5574 978 if (has_base_hz)
6168c2e0 979 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
21ed5574 980 else
6168c2e0 981 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
008d396e 982 tsc / units * t->aperf / t->mperf / interval_float);
21ed5574 983 }
103a8fea 984
812db3f7 985 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 986 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
103a8fea 987
562a2d37 988 /* IRQ */
0de6c0df
LB		 989 if (DO_BIC(BIC_IRQ)) {
990 if (sums_need_wide_columns)
6168c2e0 991 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 992 else
6168c2e0 993 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 994 }
562a2d37 995
1cc21f7b 996 /* SMI */
812db3f7 997 if (DO_BIC(BIC_SMI))
6168c2e0 998 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1cc21f7b 999
678a3bd1 1000 /* Added counters */
388e9c81
LB		 1001 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1002 if (mp->format == FORMAT_RAW) {
1003 if (mp->width == 32)
5f3aea57 1004 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
388e9c81 1005 else
6168c2e0 1006 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1007 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1008 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1009 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
0de6c0df 1010 else
6168c2e0 1011 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1012 } else if (mp->format == FORMAT_PERCENT) {
41618e63 1013 if (mp->type == COUNTER_USEC)
6168c2e0 1014 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
41618e63 1015 else
6168c2e0 1016 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
388e9c81
LB		 1017 }
1018 }
1019
41618e63
LB		 1020 /* C1 */
1021 if (DO_BIC(BIC_CPU_c1))
6168c2e0 1022 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
41618e63
LB		 1023
1024
678a3bd1
LB		 1025 /* print per-core data only for 1st thread in core */
1026 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1027 goto done;
1028
562855ee 1029 if (DO_BIC(BIC_CPU_c3))
6168c2e0 1030 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
812db3f7 1031 if (DO_BIC(BIC_CPU_c6))
6168c2e0 1032 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
812db3f7 1033 if (DO_BIC(BIC_CPU_c7))
6168c2e0 1034 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
678a3bd1 1035
0539ba11
LB		 1036 /* Mod%c6 */
1037 if (DO_BIC(BIC_Mod_c6))
6168c2e0 1038 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
0539ba11 1039
812db3f7 1040 if (DO_BIC(BIC_CoreTmp))
6168c2e0 1041 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
889facbe 1042
388e9c81
LB		 1043 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1044 if (mp->format == FORMAT_RAW) {
1045 if (mp->width == 32)
5f3aea57 1046 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
388e9c81 1047 else
6168c2e0 1048 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1049 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1050 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1051 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
0de6c0df 1052 else
6168c2e0 1053 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1054 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1055 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
388e9c81
LB		 1056 }
1057 }
1058
9392bd98
CW		 1059 /*
1060 * If measurement interval exceeds minimum RAPL Joule Counter range,
1061 * indicate that results are suspect by printing "**" in fraction place.
1062 */
1063 if (interval_float < rapl_joule_counter_range)
1064 fmt8 = "%s%.2f";
1065 else
1066 fmt8 = "%6.0f**";
1067
1068 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1069 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1070 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1071 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1072
c98d5d94
LB		 1073 /* print per-package data only for 1st core in package */
1074 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1075 goto done;
1076
0b2bb692 1077 /* PkgTmp */
812db3f7 1078 if (DO_BIC(BIC_PkgTmp))
6168c2e0 1079 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
889facbe 1080
fdf676e5 1081 /* GFXrc6 */
812db3f7 1082 if (DO_BIC(BIC_GFX_rc6)) {
ba3dec99 1083 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
6168c2e0 1084 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
9185e988 1085 } else {
6168c2e0 1086 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
9185e988
LB		 1087 p->gfx_rc6_ms / 10.0 / interval_float);
1088 }
1089 }
fdf676e5 1090
27d47356 1091 /* GFXMHz */
812db3f7 1092 if (DO_BIC(BIC_GFXMHz))
6168c2e0 1093 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
27d47356 1094
0b2bb692 1095 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
a99d8730 1096 if (DO_BIC(BIC_Totl_c0))
6168c2e0 1097 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
a99d8730 1098 if (DO_BIC(BIC_Any_c0))
6168c2e0 1099 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
a99d8730 1100 if (DO_BIC(BIC_GFX_c0))
6168c2e0 1101 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
a99d8730 1102 if (DO_BIC(BIC_CPUGFX))
6168c2e0 1103 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
0b2bb692 1104
0f47c08d 1105 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 1106 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
0f47c08d 1107 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 1108 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
0f47c08d 1109 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 1110 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
0f47c08d 1111 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 1112 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
0f47c08d 1113 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 1114 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
0f47c08d 1115 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 1116 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
0f47c08d 1117 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 1118 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
889facbe 1119
be0e54c4
LB		 1120 if (DO_BIC(BIC_CPU_LPI))
1121 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1122 if (DO_BIC(BIC_SYS_LPI))
1123 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1124
812db3f7 1125 if (DO_BIC(BIC_PkgWatt))
6168c2e0 1126 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
9392bd98 1127 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1128 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
812db3f7 1129 if (DO_BIC(BIC_GFXWatt))
6168c2e0 1130 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
812db3f7 1131 if (DO_BIC(BIC_RAMWatt))
6168c2e0 1132 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
812db3f7 1133 if (DO_BIC(BIC_Pkg_J))
6168c2e0 1134 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
9392bd98 1135 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1136 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
812db3f7 1137 if (DO_BIC(BIC_GFX_J))
6168c2e0 1138 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
812db3f7 1139 if (DO_BIC(BIC_RAM_J))
6168c2e0 1140 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
812db3f7 1141 if (DO_BIC(BIC_PKG__))
6168c2e0 1142 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
812db3f7 1143 if (DO_BIC(BIC_RAM__))
6168c2e0 1144 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
812db3f7 1145
388e9c81
LB		 1146 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1147 if (mp->format == FORMAT_RAW) {
1148 if (mp->width == 32)
5f3aea57 1149 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
388e9c81 1150 else
6168c2e0 1151 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1152 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1153 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1154 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
0de6c0df 1155 else
6168c2e0 1156 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1157 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1158 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
388e9c81
LB		 1159 }
1160 }
1161
c98d5d94 1162done:
94d6ab4b
LB		 1163 if (*(outp - 1) != '\n')
1164 outp += sprintf(outp, "\n");
c98d5d94
LB		 1165
1166 return 0;
103a8fea
LB		 1167}
1168
b7d8c148 1169void flush_output_stdout(void)
c98d5d94 1170{
b7d8c148
LB		 1171 FILE *filep;
1172
1173 if (outf == stderr)
1174 filep = stdout;
1175 else
1176 filep = outf;
1177
1178 fputs(output_buffer, filep);
1179 fflush(filep);
1180
c98d5d94
LB		 1181 outp = output_buffer;
1182}
b7d8c148 1183void flush_output_stderr(void)
c98d5d94 1184{
b7d8c148
LB		 1185 fputs(output_buffer, outf);
1186 fflush(outf);
c98d5d94
LB		 1187 outp = output_buffer;
1188}
1189void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 1190{
e23da037 1191 static int printed;
103a8fea 1192
e23da037 1193 if (!printed || !summary_only)
c8ade361 1194 print_header("\t");
103a8fea 1195
9d83601a 1196 format_counters(&average.threads, &average.cores, &average.packages);
103a8fea 1197
e23da037
LB		 1198 printed = 1;
1199
1200 if (summary_only)
1201 return;
1202
c98d5d94 1203 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 1204}
1205
889facbe
LB		 1206#define DELTA_WRAP32(new, old) \
1207 if (new > old) { \
1208 old = new - old; \
1209 } else { \
1210 old = 0x100000000 + new - old; \
1211 }
1212
ba3dec99 1213int
c98d5d94
LB		 1214delta_package(struct pkg_data *new, struct pkg_data *old)
1215{
388e9c81
LB		 1216 int i;
1217 struct msr_counter *mp;
0b2bb692 1218
a99d8730
LB		 1219
1220 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1221 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
a99d8730 1222 if (DO_BIC(BIC_Any_c0))
0b2bb692 1223 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
a99d8730 1224 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1225 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
a99d8730 1226 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1227 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
a99d8730 1228
c98d5d94 1229 old->pc2 = new->pc2 - old->pc2;
0f47c08d 1230 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1231 old->pc3 = new->pc3 - old->pc3;
0f47c08d 1232 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1233 old->pc6 = new->pc6 - old->pc6;
0f47c08d 1234 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1235 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 1236 old->pc8 = new->pc8 - old->pc8;
1237 old->pc9 = new->pc9 - old->pc9;
1238 old->pc10 = new->pc10 - old->pc10;
be0e54c4
LB		 1239 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1240 old->sys_lpi = new->sys_lpi - old->sys_lpi;
889facbe
LB		 1241 old->pkg_temp_c = new->pkg_temp_c;
1242
9185e988
LB		 1243 /* flag an error when rc6 counter resets/wraps */
1244 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1245 old->gfx_rc6_ms = -1;
1246 else
1247 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1248
27d47356
LB		 1249 old->gfx_mhz = new->gfx_mhz;
1250
889facbe
LB		 1251 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1252 DELTA_WRAP32(new->energy_cores, old->energy_cores);
1253 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1254 DELTA_WRAP32(new->energy_dram, old->energy_dram);
1255 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1256 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
ba3dec99 1257
388e9c81
LB		 1258 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1259 if (mp->format == FORMAT_RAW)
1260 old->counter[i] = new->counter[i];
1261 else
1262 old->counter[i] = new->counter[i] - old->counter[i];
1263 }
1264
ba3dec99 1265 return 0;
c98d5d94 1266}
103a8fea 1267
c98d5d94
LB		 1268void
1269delta_core(struct core_data *new, struct core_data *old)
103a8fea 1270{
388e9c81
LB		 1271 int i;
1272 struct msr_counter *mp;
1273
c98d5d94
LB		 1274 old->c3 = new->c3 - old->c3;
1275 old->c6 = new->c6 - old->c6;
1276 old->c7 = new->c7 - old->c7;
889facbe 1277 old->core_temp_c = new->core_temp_c;
0539ba11 1278 old->mc6_us = new->mc6_us - old->mc6_us;
388e9c81 1279
9392bd98
CW		 1280 DELTA_WRAP32(new->core_energy, old->core_energy);
1281
388e9c81
LB		 1282 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1283 if (mp->format == FORMAT_RAW)
1284 old->counter[i] = new->counter[i];
1285 else
1286 old->counter[i] = new->counter[i] - old->counter[i];
1287 }
c98d5d94 1288}
103a8fea 1289
c3ae331d
LB		 1290/*
1291 * old = new - old
1292 */
ba3dec99 1293int
c98d5d94
LB		 1294delta_thread(struct thread_data *new, struct thread_data *old,
1295 struct core_data *core_delta)
1296{
388e9c81
LB		 1297 int i;
1298 struct msr_counter *mp;
1299
4c2122d4
LB		 1300 /* we run cpuid just the 1st time, copy the results */
1301 if (DO_BIC(BIC_APIC))
1302 new->apic_id = old->apic_id;
1303 if (DO_BIC(BIC_X2APIC))
1304 new->x2apic_id = old->x2apic_id;
1305
3f44a5c6
LB		 1306 /*
1307 * the timestamps from start of measurement interval are in "old"
1308 * the timestamp from end of measurement interval are in "new"
1309 * over-write old w/ new so we can print end of interval values
1310 */
1311
1312 old->tv_begin = new->tv_begin;
1313 old->tv_end = new->tv_end;
1314
c98d5d94
LB		 1315 old->tsc = new->tsc - old->tsc;
1316
1317 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 1318 if (old->tsc < (1000 * 1000))
1319 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1320 "You can disable all c-states by booting with \"idle=poll\"\n"
1321 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 1322
c98d5d94 1323 old->c1 = new->c1 - old->c1;
103a8fea 1324
812db3f7 1325 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
a729617c
LB		 1326 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1327 old->aperf = new->aperf - old->aperf;
1328 old->mperf = new->mperf - old->mperf;
1329 } else {
ba3dec99 1330 return -1;
103a8fea 1331 }
c98d5d94 1332 }
103a8fea 1333
103a8fea 1334
144b44b1
LB		 1335 if (use_c1_residency_msr) {
1336 /*
1337 * Some models have a dedicated C1 residency MSR,
1338 * which should be more accurate than the derivation below.
1339 */
1340 } else {
1341 /*
1342 * As counter collection is not atomic,
1343 * it is possible for mperf's non-halted cycles + idle states
1344 * to exceed TSC's all cycles: show c1 = 0% in that case.
1345 */
95149369 1346 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
144b44b1
LB		 1347 old->c1 = 0;
1348 else {
1349 /* normal case, derive c1 */
008d396e 1350 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
c98d5d94 1351 - core_delta->c6 - core_delta->c7;
144b44b1 1352 }
c98d5d94 1353 }
c3ae331d 1354
c98d5d94 1355 if (old->mperf == 0) {
b7d8c148
LB		 1356 if (debug > 1)
1357 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 1358 old->mperf = 1; /* divide by 0 protection */
103a8fea 1359 }
c98d5d94 1360
812db3f7 1361 if (DO_BIC(BIC_IRQ))
562a2d37
LB		 1362 old->irq_count = new->irq_count - old->irq_count;
1363
812db3f7 1364 if (DO_BIC(BIC_SMI))
1ed51011 1365 old->smi_count = new->smi_count - old->smi_count;
ba3dec99 1366
388e9c81
LB		 1367 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1368 if (mp->format == FORMAT_RAW)
1369 old->counter[i] = new->counter[i];
1370 else
1371 old->counter[i] = new->counter[i] - old->counter[i];
1372 }
ba3dec99 1373 return 0;
c98d5d94
LB		 1374}
1375
1376int delta_cpu(struct thread_data *t, struct core_data *c,
1377 struct pkg_data *p, struct thread_data *t2,
1378 struct core_data *c2, struct pkg_data *p2)
1379{
ba3dec99
LB		 1380 int retval = 0;
1381
c98d5d94
LB		 1382 /* calculate core delta only for 1st thread in core */
1383 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1384 delta_core(c, c2);
1385
1386 /* always calculate thread delta */
ba3dec99
LB		 1387 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1388 if (retval)
1389 return retval;
c98d5d94
LB		 1390
1391 /* calculate package delta only for 1st core in package */
1392 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
ba3dec99 1393 retval = delta_package(p, p2);
c98d5d94 1394
ba3dec99 1395 return retval;
103a8fea
LB		 1396}
1397
c98d5d94
LB		 1398void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1399{
388e9c81
LB		 1400 int i;
1401 struct msr_counter *mp;
1402
3f44a5c6
LB		 1403 t->tv_begin.tv_sec = 0;
1404 t->tv_begin.tv_usec = 0;
1405 t->tv_end.tv_sec = 0;
1406 t->tv_end.tv_usec = 0;
1407
c98d5d94
LB		 1408 t->tsc = 0;
1409 t->aperf = 0;
1410 t->mperf = 0;
1411 t->c1 = 0;
1412
562a2d37
LB		 1413 t->irq_count = 0;
1414 t->smi_count = 0;
1415
c98d5d94
LB		 1416 /* tells format_counters to dump all fields from this set */
1417 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1418
1419 c->c3 = 0;
1420 c->c6 = 0;
1421 c->c7 = 0;
0539ba11 1422 c->mc6_us = 0;
889facbe 1423 c->core_temp_c = 0;
9392bd98 1424 c->core_energy = 0;
c98d5d94 1425
0b2bb692
LB		 1426 p->pkg_wtd_core_c0 = 0;
1427 p->pkg_any_core_c0 = 0;
1428 p->pkg_any_gfxe_c0 = 0;
1429 p->pkg_both_core_gfxe_c0 = 0;
1430
c98d5d94 1431 p->pc2 = 0;
0f47c08d 1432 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1433 p->pc3 = 0;
0f47c08d 1434 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1435 p->pc6 = 0;
0f47c08d 1436 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1437 p->pc7 = 0;
ca58710f
KCA		 1438 p->pc8 = 0;
1439 p->pc9 = 0;
1440 p->pc10 = 0;
be0e54c4
LB		 1441 p->cpu_lpi = 0;
1442 p->sys_lpi = 0;
889facbe
LB		 1443
1444 p->energy_pkg = 0;
1445 p->energy_dram = 0;
1446 p->energy_cores = 0;
1447 p->energy_gfx = 0;
1448 p->rapl_pkg_perf_status = 0;
1449 p->rapl_dram_perf_status = 0;
1450 p->pkg_temp_c = 0;
27d47356 1451
fdf676e5 1452 p->gfx_rc6_ms = 0;
27d47356 1453 p->gfx_mhz = 0;
388e9c81
LB		 1454 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1455 t->counter[i] = 0;
1456
1457 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1458 c->counter[i] = 0;
1459
1460 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1461 p->counter[i] = 0;
c98d5d94
LB		 1462}
1463int sum_counters(struct thread_data *t, struct core_data *c,
1464 struct pkg_data *p)
103a8fea 1465{
388e9c81
LB		 1466 int i;
1467 struct msr_counter *mp;
1468
4c2122d4
LB		 1469 /* copy un-changing apic_id's */
1470 if (DO_BIC(BIC_APIC))
1471 average.threads.apic_id = t->apic_id;
1472 if (DO_BIC(BIC_X2APIC))
1473 average.threads.x2apic_id = t->x2apic_id;
1474
3f44a5c6
LB		 1475 /* remember first tv_begin */
1476 if (average.threads.tv_begin.tv_sec == 0)
1477 average.threads.tv_begin = t->tv_begin;
1478
1479 /* remember last tv_end */
1480 average.threads.tv_end = t->tv_end;
1481
c98d5d94
LB		 1482 average.threads.tsc += t->tsc;
1483 average.threads.aperf += t->aperf;
1484 average.threads.mperf += t->mperf;
1485 average.threads.c1 += t->c1;
103a8fea 1486
562a2d37
LB		 1487 average.threads.irq_count += t->irq_count;
1488 average.threads.smi_count += t->smi_count;
1489
388e9c81
LB		 1490 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1491 if (mp->format == FORMAT_RAW)
1492 continue;
1493 average.threads.counter[i] += t->counter[i];
1494 }
1495
c98d5d94
LB		 1496 /* sum per-core values only for 1st thread in core */
1497 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1498 return 0;
103a8fea 1499
c98d5d94
LB		 1500 average.cores.c3 += c->c3;
1501 average.cores.c6 += c->c6;
1502 average.cores.c7 += c->c7;
0539ba11 1503 average.cores.mc6_us += c->mc6_us;
c98d5d94 1504
889facbe
LB		 1505 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1506
9392bd98
CW		 1507 average.cores.core_energy += c->core_energy;
1508
388e9c81
LB		 1509 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1510 if (mp->format == FORMAT_RAW)
1511 continue;
1512 average.cores.counter[i] += c->counter[i];
1513 }
1514
c98d5d94
LB		 1515 /* sum per-pkg values only for 1st core in pkg */
1516 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1517 return 0;
1518
a99d8730 1519 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1520 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
a99d8730 1521 if (DO_BIC(BIC_Any_c0))
0b2bb692 1522 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
a99d8730 1523 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1524 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
a99d8730 1525 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1526 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
0b2bb692 1527
c98d5d94 1528 average.packages.pc2 += p->pc2;
0f47c08d 1529 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1530 average.packages.pc3 += p->pc3;
0f47c08d 1531 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1532 average.packages.pc6 += p->pc6;
0f47c08d 1533 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1534 average.packages.pc7 += p->pc7;
ca58710f
KCA		 1535 average.packages.pc8 += p->pc8;
1536 average.packages.pc9 += p->pc9;
1537 average.packages.pc10 += p->pc10;
c98d5d94 1538
be0e54c4
LB		 1539 average.packages.cpu_lpi = p->cpu_lpi;
1540 average.packages.sys_lpi = p->sys_lpi;
1541
889facbe
LB		 1542 average.packages.energy_pkg += p->energy_pkg;
1543 average.packages.energy_dram += p->energy_dram;
1544 average.packages.energy_cores += p->energy_cores;
1545 average.packages.energy_gfx += p->energy_gfx;
1546
fdf676e5 1547 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
27d47356
LB		 1548 average.packages.gfx_mhz = p->gfx_mhz;
1549
889facbe
LB		 1550 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1551
1552 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1553 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
388e9c81
LB		 1554
1555 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1556 if (mp->format == FORMAT_RAW)
1557 continue;
1558 average.packages.counter[i] += p->counter[i];
1559 }
c98d5d94
LB		 1560 return 0;
1561}
1562/*
1563 * sum the counters for all cpus in the system
1564 * compute the weighted average
1565 */
1566void compute_average(struct thread_data *t, struct core_data *c,
1567 struct pkg_data *p)
1568{
388e9c81
LB		 1569 int i;
1570 struct msr_counter *mp;
1571
c98d5d94
LB		 1572 clear_counters(&average.threads, &average.cores, &average.packages);
1573
1574 for_all_cpus(sum_counters, t, c, p);
1575
1576 average.threads.tsc /= topo.num_cpus;
1577 average.threads.aperf /= topo.num_cpus;
1578 average.threads.mperf /= topo.num_cpus;
1579 average.threads.c1 /= topo.num_cpus;
1580
0de6c0df
LB		 1581 if (average.threads.irq_count > 9999999)
1582 sums_need_wide_columns = 1;
1583
c98d5d94
LB		 1584 average.cores.c3 /= topo.num_cores;
1585 average.cores.c6 /= topo.num_cores;
1586 average.cores.c7 /= topo.num_cores;
0539ba11 1587 average.cores.mc6_us /= topo.num_cores;
c98d5d94 1588
a99d8730 1589 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1590 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
a99d8730 1591 if (DO_BIC(BIC_Any_c0))
0b2bb692 1592 average.packages.pkg_any_core_c0 /= topo.num_packages;
a99d8730 1593 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1594 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
a99d8730 1595 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1596 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
0b2bb692 1597
c98d5d94 1598 average.packages.pc2 /= topo.num_packages;
0f47c08d 1599 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1600 average.packages.pc3 /= topo.num_packages;
0f47c08d 1601 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1602 average.packages.pc6 /= topo.num_packages;
0f47c08d 1603 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1604 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 1605
1606 average.packages.pc8 /= topo.num_packages;
1607 average.packages.pc9 /= topo.num_packages;
1608 average.packages.pc10 /= topo.num_packages;
388e9c81
LB		 1609
1610 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1611 if (mp->format == FORMAT_RAW)
1612 continue;
0de6c0df
LB		 1613 if (mp->type == COUNTER_ITEMS) {
1614 if (average.threads.counter[i] > 9999999)
1615 sums_need_wide_columns = 1;
41618e63 1616 continue;
0de6c0df 1617 }
388e9c81
LB		 1618 average.threads.counter[i] /= topo.num_cpus;
1619 }
1620 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1621 if (mp->format == FORMAT_RAW)
1622 continue;
0de6c0df
LB		 1623 if (mp->type == COUNTER_ITEMS) {
1624 if (average.cores.counter[i] > 9999999)
1625 sums_need_wide_columns = 1;
1626 }
388e9c81
LB		 1627 average.cores.counter[i] /= topo.num_cores;
1628 }
1629 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1630 if (mp->format == FORMAT_RAW)
1631 continue;
0de6c0df
LB		 1632 if (mp->type == COUNTER_ITEMS) {
1633 if (average.packages.counter[i] > 9999999)
1634 sums_need_wide_columns = 1;
1635 }
388e9c81
LB		 1636 average.packages.counter[i] /= topo.num_packages;
1637 }
103a8fea
LB		 1638}
1639
c98d5d94 1640static unsigned long long rdtsc(void)
103a8fea 1641{
c98d5d94 1642 unsigned int low, high;
15aaa346 1643
c98d5d94 1644 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 1645
c98d5d94
LB		 1646 return low | ((unsigned long long)high) << 32;
1647}
15aaa346 1648
495c7654
LB		 1649/*
1650 * Open a file, and exit on failure
1651 */
1652FILE *fopen_or_die(const char *path, const char *mode)
1653{
1654 FILE *filep = fopen(path, mode);
1655
1656 if (!filep)
1657 err(1, "%s: open failed", path);
1658 return filep;
1659}
1660/*
1661 * snapshot_sysfs_counter()
1662 *
1663 * return snapshot of given counter
1664 */
1665unsigned long long snapshot_sysfs_counter(char *path)
1666{
1667 FILE *fp;
1668 int retval;
1669 unsigned long long counter;
1670
1671 fp = fopen_or_die(path, "r");
1672
1673 retval = fscanf(fp, "%lld", &counter);
1674 if (retval != 1)
1675 err(1, "snapshot_sysfs_counter(%s)", path);
1676
1677 fclose(fp);
1678
1679 return counter;
1680}
1681
1682int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1683{
1684 if (mp->msr_num != 0) {
1685 if (get_msr(cpu, mp->msr_num, counterp))
1686 return -1;
1687 } else {
46c27978 1688 char path[128 + PATH_BYTES];
41618e63
LB		 1689
1690 if (mp->flags & SYSFS_PERCPU) {
1691 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1692 cpu, mp->path);
1693
1694 *counterp = snapshot_sysfs_counter(path);
1695 } else {
1696 *counterp = snapshot_sysfs_counter(mp->path);
1697 }
495c7654
LB		 1698 }
1699
1700 return 0;
1701}
1702
4c2122d4
LB		 1703void get_apic_id(struct thread_data *t)
1704{
34041551 1705 unsigned int eax, ebx, ecx, edx;
4c2122d4 1706
34041551
LB		 1707 if (DO_BIC(BIC_APIC)) {
1708 eax = ebx = ecx = edx = 0;
1709 __cpuid(1, eax, ebx, ecx, edx);
4c2122d4 1710
34041551
LB		 1711 t->apic_id = (ebx >> 24) & 0xff;
1712 }
1713
1714 if (!DO_BIC(BIC_X2APIC))
4c2122d4
LB		 1715 return;
1716
34041551
LB		 1717 if (authentic_amd) {
1718 unsigned int topology_extensions;
4c2122d4 1719
34041551
LB		 1720 if (max_extended_level < 0x8000001e)
1721 return;
4c2122d4 1722
34041551
LB		 1723 eax = ebx = ecx = edx = 0;
1724 __cpuid(0x80000001, eax, ebx, ecx, edx);
1725 topology_extensions = ecx & (1 << 22);
1726
1727 if (topology_extensions == 0)
1728 return;
1729
1730 eax = ebx = ecx = edx = 0;
1731 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1732
1733 t->x2apic_id = eax;
4c2122d4 1734 return;
34041551 1735 }
4c2122d4 1736
34041551
LB		 1737 if (!genuine_intel)
1738 return;
1739
1740 if (max_level < 0xb)
4c2122d4
LB		 1741 return;
1742
1743 ecx = 0;
1744 __cpuid(0xb, eax, ebx, ecx, edx);
1745 t->x2apic_id = edx;
1746
34041551
LB		 1747 if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1748 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1749 t->cpu_id, t->apic_id, t->x2apic_id);
4c2122d4
LB		 1750}
1751
c98d5d94
LB		 1752/*
1753 * get_counters(...)
1754 * migrate to cpu
1755 * acquire and record local counters for that cpu
1756 */
1757int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1758{
1759 int cpu = t->cpu_id;
889facbe 1760 unsigned long long msr;
0102b067 1761 int aperf_mperf_retry_count = 0;
388e9c81
LB		 1762 struct msr_counter *mp;
1763 int i;
88c3281f 1764
f4fdf2b4
LB		 1765 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1766
e52966c0 1767 if (cpu_migrate(cpu)) {
b7d8c148 1768 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
c98d5d94 1769 return -1;
e52966c0 1770 }
15aaa346 1771
4c2122d4
LB		 1772 if (first_counter_read)
1773 get_apic_id(t);
0102b067 1774retry:
c98d5d94
LB		 1775 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1776
812db3f7 1777 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
0102b067
LB		 1778 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1779
1780 /*
1781 * The TSC, APERF and MPERF must be read together for
1782 * APERF/MPERF and MPERF/TSC to give accurate results.
1783 *
1784 * Unfortunately, APERF and MPERF are read by
1785 * individual system call, so delays may occur
1786 * between them. If the time to read them
1787 * varies by a large amount, we re-read them.
1788 */
1789
1790 /*
1791 * This initial dummy APERF read has been seen to
1792 * reduce jitter in the subsequent reads.
1793 */
1794
1795 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1796 return -3;
1797
1798 t->tsc = rdtsc(); /* re-read close to APERF */
1799
1800 tsc_before = t->tsc;
1801
9c63a650 1802 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 1803 return -3;
0102b067
LB		 1804
1805 tsc_between = rdtsc();
1806
9c63a650 1807 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 1808 return -4;
0102b067
LB		 1809
1810 tsc_after = rdtsc();
1811
1812 aperf_time = tsc_between - tsc_before;
1813 mperf_time = tsc_after - tsc_between;
1814
1815 /*
1816 * If the system call latency to read APERF and MPERF
1817 * differ by more than 2x, then try again.
1818 */
1819 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1820 aperf_mperf_retry_count++;
1821 if (aperf_mperf_retry_count < 5)
1822 goto retry;
1823 else
1824 warnx("cpu%d jitter %lld %lld",
1825 cpu, aperf_time, mperf_time);
1826 }
1827 aperf_mperf_retry_count = 0;
1828
b2b34dfe
HC		 1829 t->aperf = t->aperf * aperf_mperf_multiplier;
1830 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 1831 }
1832
812db3f7 1833 if (DO_BIC(BIC_IRQ))
562a2d37 1834 t->irq_count = irqs_per_cpu[cpu];
812db3f7 1835 if (DO_BIC(BIC_SMI)) {
1ed51011
LB		 1836 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1837 return -5;
1838 t->smi_count = msr & 0xFFFFFFFF;
1839 }
0539ba11 1840 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
144b44b1
LB		 1841 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1842 return -6;
1843 }
1844
388e9c81 1845 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
495c7654 1846 if (get_mp(cpu, mp, &t->counter[i]))
388e9c81
LB		 1847 return -10;
1848 }
1849
c98d5d94
LB		 1850 /* collect core counters only for 1st thread in core */
1851 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
f4fdf2b4 1852 goto done;
c98d5d94 1853
562855ee 1854 if (DO_BIC(BIC_CPU_c3)) {
c98d5d94
LB		 1855 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1856 return -6;
144b44b1
LB		 1857 }
1858
812db3f7 1859 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
c98d5d94
LB		 1860 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1861 return -7;
fb5d4327
DC		 1862 } else if (do_knl_cstates) {
1863 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1864 return -7;
c98d5d94
LB		 1865 }
1866
812db3f7 1867 if (DO_BIC(BIC_CPU_c7))
c98d5d94
LB		 1868 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1869 return -8;
1870
0539ba11
LB		 1871 if (DO_BIC(BIC_Mod_c6))
1872 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1873 return -8;
1874
812db3f7 1875 if (DO_BIC(BIC_CoreTmp)) {
889facbe
LB		 1876 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1877 return -9;
1878 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1879 }
1880
9392bd98
CW		 1881 if (do_rapl & RAPL_AMD_F17H) {
1882 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1883 return -14;
1884 c->core_energy = msr & 0xFFFFFFFF;
1885 }
1886
388e9c81 1887 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
495c7654 1888 if (get_mp(cpu, mp, &c->counter[i]))
388e9c81
LB		 1889 return -10;
1890 }
889facbe 1891
c98d5d94
LB		 1892 /* collect package counters only for 1st core in package */
1893 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
f4fdf2b4 1894 goto done;
c98d5d94 1895
a99d8730 1896 if (DO_BIC(BIC_Totl_c0)) {
0b2bb692
LB		 1897 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1898 return -10;
a99d8730
LB		 1899 }
1900 if (DO_BIC(BIC_Any_c0)) {
0b2bb692
LB		 1901 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1902 return -11;
a99d8730
LB		 1903 }
1904 if (DO_BIC(BIC_GFX_c0)) {
0b2bb692
LB		 1905 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1906 return -12;
a99d8730
LB		 1907 }
1908 if (DO_BIC(BIC_CPUGFX)) {
0b2bb692
LB		 1909 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1910 return -13;
1911 }
0f47c08d 1912 if (DO_BIC(BIC_Pkgpc3))
c98d5d94
LB		 1913 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1914 return -9;
0f47c08d 1915 if (DO_BIC(BIC_Pkgpc6)) {
0539ba11
LB		 1916 if (do_slm_cstates) {
1917 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1918 return -10;
1919 } else {
1920 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1921 return -10;
1922 }
1923 }
1924
0f47c08d 1925 if (DO_BIC(BIC_Pkgpc2))
c98d5d94
LB		 1926 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1927 return -11;
0f47c08d 1928 if (DO_BIC(BIC_Pkgpc7))
c98d5d94
LB		 1929 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1930 return -12;
0f47c08d 1931 if (DO_BIC(BIC_Pkgpc8))
ca58710f
KCA		 1932 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1933 return -13;
0f47c08d 1934 if (DO_BIC(BIC_Pkgpc9))
ca58710f
KCA		 1935 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1936 return -13;
0f47c08d 1937 if (DO_BIC(BIC_Pkgpc10))
ca58710f
KCA		 1938 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1939 return -13;
0f47c08d 1940
be0e54c4
LB		 1941 if (DO_BIC(BIC_CPU_LPI))
1942 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1943 if (DO_BIC(BIC_SYS_LPI))
1944 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1945
889facbe
LB		 1946 if (do_rapl & RAPL_PKG) {
1947 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1948 return -13;
1949 p->energy_pkg = msr & 0xFFFFFFFF;
1950 }
9148494c 1951 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
889facbe
LB		 1952 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1953 return -14;
1954 p->energy_cores = msr & 0xFFFFFFFF;
1955 }
1956 if (do_rapl & RAPL_DRAM) {
1957 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1958 return -15;
1959 p->energy_dram = msr & 0xFFFFFFFF;
1960 }
1961 if (do_rapl & RAPL_GFX) {
1962 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1963 return -16;
1964 p->energy_gfx = msr & 0xFFFFFFFF;
1965 }
1966 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1967 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1968 return -16;
1969 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1970 }
1971 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1972 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1973 return -16;
1974 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1975 }
3316f99a
CW		 1976 if (do_rapl & RAPL_AMD_F17H) {
1977 if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr))
1978 return -13;
1979 p->energy_pkg = msr & 0xFFFFFFFF;
1980 }
812db3f7 1981 if (DO_BIC(BIC_PkgTmp)) {
889facbe
LB		 1982 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1983 return -17;
1984 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1985 }
fdf676e5 1986
812db3f7 1987 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 1988 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1989
812db3f7 1990 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 1991 p->gfx_mhz = gfx_cur_mhz;
1992
388e9c81 1993 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
495c7654 1994 if (get_mp(cpu, mp, &p->counter[i]))
388e9c81
LB		 1995 return -10;
1996 }
f4fdf2b4
LB		 1997done:
1998 gettimeofday(&t->tv_end, (struct timezone *)NULL);
388e9c81 1999
15aaa346 2000 return 0;
103a8fea
LB		 2001}
2002
ee7e38e3
LB		 2003/*
2004 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2005 * If you change the values, note they are used both in comparisons
2006 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2007 */
2008
2009#define PCLUKN 0 /* Unknown */
2010#define PCLRSV 1 /* Reserved */
2011#define PCL__0 2 /* PC0 */
2012#define PCL__1 3 /* PC1 */
2013#define PCL__2 4 /* PC2 */
2014#define PCL__3 5 /* PC3 */
2015#define PCL__4 6 /* PC4 */
2016#define PCL__6 7 /* PC6 */
2017#define PCL_6N 8 /* PC6 No Retention */
2018#define PCL_6R 9 /* PC6 Retention */
2019#define PCL__7 10 /* PC7 */
2020#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 2021#define PCL__8 12 /* PC8 */
2022#define PCL__9 13 /* PC9 */
445640a5
LB		 2023#define PCL_10 14 /* PC10 */
2024#define PCLUNL 15 /* Unlimited */
ee7e38e3
LB		 2025
2026int pkg_cstate_limit = PCLUKN;
2027char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
445640a5 2028 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
ee7e38e3 2029
e9257f5f
LB		 2030int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2031int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2032int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
0539ba11 2033int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
f2642888 2034int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
e9257f5f 2035int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
445640a5 2036int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2085e124 2037int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 2038
a2b7b749
LB		 2039
2040static void
2041calculate_tsc_tweak()
2042{
a2b7b749
LB		 2043 tsc_tweak = base_hz / tsc_hz;
2044}
2045
fcd17211
LB		 2046static void
2047dump_nhm_platform_info(void)
103a8fea
LB		 2048{
2049 unsigned long long msr;
2050 unsigned int ratio;
2051
ec0adc53 2052 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 2053
b7d8c148 2054 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 2055
103a8fea 2056 ratio = (msr >> 40) & 0xFF;
710f273b 2057 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
103a8fea
LB		 2058 ratio, bclk, ratio * bclk);
2059
2060 ratio = (msr >> 8) & 0xFF;
710f273b 2061 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
103a8fea
LB		 2062 ratio, bclk, ratio * bclk);
2063
7ce7d5de 2064 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
b7d8c148 2065 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
bfae2052 2066 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 2067
fcd17211
LB		 2068 return;
2069}
2070
2071static void
2072dump_hsw_turbo_ratio_limits(void)
2073{
2074 unsigned long long msr;
2075 unsigned int ratio;
2076
7ce7d5de 2077 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 2078
b7d8c148 2079 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 2080
2081 ratio = (msr >> 8) & 0xFF;
2082 if (ratio)
710f273b 2083 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
fcd17211
LB		 2084 ratio, bclk, ratio * bclk);
2085
2086 ratio = (msr >> 0) & 0xFF;
2087 if (ratio)
710f273b 2088 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
fcd17211
LB		 2089 ratio, bclk, ratio * bclk);
2090 return;
2091}
2092
2093static void
2094dump_ivt_turbo_ratio_limits(void)
2095{
2096 unsigned long long msr;
2097 unsigned int ratio;
6574a5d5 2098
7ce7d5de 2099 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 2100
b7d8c148 2101 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 2102
2103 ratio = (msr >> 56) & 0xFF;
2104 if (ratio)
710f273b 2105 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
6574a5d5
LB		 2106 ratio, bclk, ratio * bclk);
2107
2108 ratio = (msr >> 48) & 0xFF;
2109 if (ratio)
710f273b 2110 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
6574a5d5
LB		 2111 ratio, bclk, ratio * bclk);
2112
2113 ratio = (msr >> 40) & 0xFF;
2114 if (ratio)
710f273b 2115 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
6574a5d5
LB		 2116 ratio, bclk, ratio * bclk);
2117
2118 ratio = (msr >> 32) & 0xFF;
2119 if (ratio)
710f273b 2120 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
6574a5d5
LB		 2121 ratio, bclk, ratio * bclk);
2122
2123 ratio = (msr >> 24) & 0xFF;
2124 if (ratio)
710f273b 2125 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
6574a5d5
LB		 2126 ratio, bclk, ratio * bclk);
2127
2128 ratio = (msr >> 16) & 0xFF;
2129 if (ratio)
710f273b 2130 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
6574a5d5
LB		 2131 ratio, bclk, ratio * bclk);
2132
2133 ratio = (msr >> 8) & 0xFF;
2134 if (ratio)
710f273b 2135 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
6574a5d5
LB		 2136 ratio, bclk, ratio * bclk);
2137
2138 ratio = (msr >> 0) & 0xFF;
2139 if (ratio)
710f273b 2140 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
6574a5d5 2141 ratio, bclk, ratio * bclk);
fcd17211
LB		 2142 return;
2143}
31e07522
LB		 2144int has_turbo_ratio_group_limits(int family, int model)
2145{
2146
2147 if (!genuine_intel)
2148 return 0;
2149
2150 switch (model) {
2151 case INTEL_FAM6_ATOM_GOLDMONT:
2152 case INTEL_FAM6_SKYLAKE_X:
f2c4db1b 2153 case INTEL_FAM6_ATOM_GOLDMONT_X:
31e07522
LB		 2154 return 1;
2155 }
2156 return 0;
2157}
6574a5d5 2158
fcd17211 2159static void
31e07522 2160dump_turbo_ratio_limits(int family, int model)
fcd17211 2161{
31e07522
LB		 2162 unsigned long long msr, core_counts;
2163 unsigned int ratio, group_size;
103a8fea 2164
7ce7d5de 2165 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
b7d8c148 2166 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5 2167
31e07522
LB		 2168 if (has_turbo_ratio_group_limits(family, model)) {
2169 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2170 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2171 } else {
2172 core_counts = 0x0807060504030201;
2173 }
2174
6574a5d5 2175 ratio = (msr >> 56) & 0xFF;
31e07522 2176 group_size = (core_counts >> 56) & 0xFF;
6574a5d5 2177 if (ratio)
31e07522
LB		 2178 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2179 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2180
2181 ratio = (msr >> 48) & 0xFF;
31e07522 2182 group_size = (core_counts >> 48) & 0xFF;
6574a5d5 2183 if (ratio)
31e07522
LB		 2184 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2185 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2186
2187 ratio = (msr >> 40) & 0xFF;
31e07522 2188 group_size = (core_counts >> 40) & 0xFF;
6574a5d5 2189 if (ratio)
31e07522
LB		 2190 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2191 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2192
2193 ratio = (msr >> 32) & 0xFF;
31e07522 2194 group_size = (core_counts >> 32) & 0xFF;
6574a5d5 2195 if (ratio)
31e07522
LB		 2196 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2197 ratio, bclk, ratio * bclk, group_size);
6574a5d5 2198
103a8fea 2199 ratio = (msr >> 24) & 0xFF;
31e07522 2200 group_size = (core_counts >> 24) & 0xFF;
103a8fea 2201 if (ratio)
31e07522
LB		 2202 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2203 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2204
2205 ratio = (msr >> 16) & 0xFF;
31e07522 2206 group_size = (core_counts >> 16) & 0xFF;
103a8fea 2207 if (ratio)
31e07522
LB		 2208 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2209 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2210
2211 ratio = (msr >> 8) & 0xFF;
31e07522 2212 group_size = (core_counts >> 8) & 0xFF;
103a8fea 2213 if (ratio)
31e07522
LB		 2214 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2215 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2216
2217 ratio = (msr >> 0) & 0xFF;
31e07522 2218 group_size = (core_counts >> 0) & 0xFF;
103a8fea 2219 if (ratio)
31e07522
LB		 2220 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2221 ratio, bclk, ratio * bclk, group_size);
fcd17211
LB		 2222 return;
2223}
3a9a941d 2224
0f7887c4
LB		 2225static void
2226dump_atom_turbo_ratio_limits(void)
2227{
2228 unsigned long long msr;
2229 unsigned int ratio;
2230
2231 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2232 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2233
2234 ratio = (msr >> 0) & 0x3F;
2235 if (ratio)
2236 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2237 ratio, bclk, ratio * bclk);
2238
2239 ratio = (msr >> 8) & 0x3F;
2240 if (ratio)
2241 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2242 ratio, bclk, ratio * bclk);
2243
2244 ratio = (msr >> 16) & 0x3F;
2245 if (ratio)
2246 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2247 ratio, bclk, ratio * bclk);
2248
2249 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2250 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2251
2252 ratio = (msr >> 24) & 0x3F;
2253 if (ratio)
2254 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2255 ratio, bclk, ratio * bclk);
2256
2257 ratio = (msr >> 16) & 0x3F;
2258 if (ratio)
2259 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2260 ratio, bclk, ratio * bclk);
2261
2262 ratio = (msr >> 8) & 0x3F;
2263 if (ratio)
2264 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2265 ratio, bclk, ratio * bclk);
2266
2267 ratio = (msr >> 0) & 0x3F;
2268 if (ratio)
2269 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2270 ratio, bclk, ratio * bclk);
2271}
2272
fb5d4327
DC		 2273static void
2274dump_knl_turbo_ratio_limits(void)
2275{
cbf97aba
HC		 2276 const unsigned int buckets_no = 7;
2277
fb5d4327 2278 unsigned long long msr;
cbf97aba
HC		 2279 int delta_cores, delta_ratio;
2280 int i, b_nr;
2281 unsigned int cores[buckets_no];
2282 unsigned int ratio[buckets_no];
fb5d4327 2283
ebf5926a 2284 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
fb5d4327 2285
b7d8c148 2286 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
bfae2052 2287 base_cpu, msr);
fb5d4327
DC		 2288
2289 /**
2290 * Turbo encoding in KNL is as follows:
cbf97aba
HC		 2291 * [0] -- Reserved
2292 * [7:1] -- Base value of number of active cores of bucket 1.
fb5d4327
DC		 2293 * [15:8] -- Base value of freq ratio of bucket 1.
2294 * [20:16] -- +ve delta of number of active cores of bucket 2.
2295 * i.e. active cores of bucket 2 =
2296 * active cores of bucket 1 + delta
2297 * [23:21] -- Negative delta of freq ratio of bucket 2.
2298 * i.e. freq ratio of bucket 2 =
2299 * freq ratio of bucket 1 - delta
2300 * [28:24]-- +ve delta of number of active cores of bucket 3.
2301 * [31:29]-- -ve delta of freq ratio of bucket 3.
2302 * [36:32]-- +ve delta of number of active cores of bucket 4.
2303 * [39:37]-- -ve delta of freq ratio of bucket 4.
2304 * [44:40]-- +ve delta of number of active cores of bucket 5.
2305 * [47:45]-- -ve delta of freq ratio of bucket 5.
2306 * [52:48]-- +ve delta of number of active cores of bucket 6.
2307 * [55:53]-- -ve delta of freq ratio of bucket 6.
2308 * [60:56]-- +ve delta of number of active cores of bucket 7.
2309 * [63:61]-- -ve delta of freq ratio of bucket 7.
2310 */
cbf97aba
HC		 2311
2312 b_nr = 0;
2313 cores[b_nr] = (msr & 0xFF) >> 1;
2314 ratio[b_nr] = (msr >> 8) & 0xFF;
2315
2316 for (i = 16; i < 64; i += 8) {
fb5d4327 2317 delta_cores = (msr >> i) & 0x1F;
cbf97aba
HC		 2318 delta_ratio = (msr >> (i + 5)) & 0x7;
2319
2320 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2321 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2322 b_nr++;
fb5d4327 2323 }
cbf97aba
HC		 2324
2325 for (i = buckets_no - 1; i >= 0; i--)
2326 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
b7d8c148 2327 fprintf(outf,
710f273b 2328 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
cbf97aba 2329 ratio[i], bclk, ratio[i] * bclk, cores[i]);
fb5d4327
DC		 2330}
2331
fcd17211
LB		 2332static void
2333dump_nhm_cst_cfg(void)
2334{
2335 unsigned long long msr;
2336
1df2e55a 2337 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
fcd17211 2338
1df2e55a 2339 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
fcd17211 2340
3e8b62bf 2341 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
fcd17211
LB		 2342 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2343 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2344 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2345 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2346 (msr & (1 << 15)) ? "" : "UN",
6c34f160 2347 (unsigned int)msr & 0xF,
fcd17211 2348 pkg_cstate_limit_strings[pkg_cstate_limit]);
ac980e13
AB		 2349
2350#define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2351 if (has_automatic_cstate_conversion) {
2352 fprintf(outf, ", automatic c-state conversion=%s",
2353 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2354 }
2355
2356 fprintf(outf, ")\n");
2357
fcd17211 2358 return;
103a8fea
LB		 2359}
2360
6fb3143b
LB		 2361static void
2362dump_config_tdp(void)
2363{
2364 unsigned long long msr;
2365
2366 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
b7d8c148 2367 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
685b535b 2368 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
6fb3143b
LB		 2369
2370 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
b7d8c148 2371 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
6fb3143b 2372 if (msr) {
685b535b
CY		 2373 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2374 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2375 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2376 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2377 }
b7d8c148 2378 fprintf(outf, ")\n");
6fb3143b
LB		 2379
2380 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
b7d8c148 2381 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
6fb3143b 2382 if (msr) {
685b535b
CY		 2383 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2384 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2385 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2386 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2387 }
b7d8c148 2388 fprintf(outf, ")\n");
6fb3143b
LB		 2389
2390 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
b7d8c148 2391 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
6fb3143b 2392 if ((msr) & 0x3)
b7d8c148
LB		 2393 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2394 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2395 fprintf(outf, ")\n");
36229897 2396
6fb3143b 2397 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
b7d8c148 2398 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
685b535b 2399 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
b7d8c148
LB		 2400 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2401 fprintf(outf, ")\n");
6fb3143b 2402}
5a63426e
LB		 2403
2404unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2405
2406void print_irtl(void)
2407{
2408 unsigned long long msr;
2409
2410 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2411 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2412 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2413 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2414
2415 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2416 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2417 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2418 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2419
2420 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2421 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2422 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2423 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2424
2425 if (!do_irtl_hsw)
2426 return;
2427
2428 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2429 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2430 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2431 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2432
2433 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2434 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2435 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2436 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2437
2438 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2439 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2440 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2441 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2442
2443}
36229897
LB		 2444void free_fd_percpu(void)
2445{
2446 int i;
2447
01a67adf 2448 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
36229897
LB		 2449 if (fd_percpu[i] != 0)
2450 close(fd_percpu[i]);
2451 }
2452
2453 free(fd_percpu);
6fb3143b
LB		 2454}
2455
c98d5d94 2456void free_all_buffers(void)
103a8fea 2457{
0e2d8f05
LB		 2458 int i;
2459
c98d5d94
LB		 2460 CPU_FREE(cpu_present_set);
2461 cpu_present_set = NULL;
36229897 2462 cpu_present_setsize = 0;
103a8fea 2463
c98d5d94
LB		 2464 CPU_FREE(cpu_affinity_set);
2465 cpu_affinity_set = NULL;
2466 cpu_affinity_setsize = 0;
103a8fea 2467
c98d5d94
LB		 2468 free(thread_even);
2469 free(core_even);
2470 free(package_even);
103a8fea 2471
c98d5d94
LB		 2472 thread_even = NULL;
2473 core_even = NULL;
2474 package_even = NULL;
103a8fea 2475
c98d5d94
LB		 2476 free(thread_odd);
2477 free(core_odd);
2478 free(package_odd);
103a8fea 2479
c98d5d94
LB		 2480 thread_odd = NULL;
2481 core_odd = NULL;
2482 package_odd = NULL;
103a8fea 2483
c98d5d94
LB		 2484 free(output_buffer);
2485 output_buffer = NULL;
2486 outp = NULL;
36229897
LB		 2487
2488 free_fd_percpu();
562a2d37
LB		 2489
2490 free(irq_column_2_cpu);
2491 free(irqs_per_cpu);
0e2d8f05
LB		 2492
2493 for (i = 0; i <= topo.max_cpu_num; ++i) {
2494 if (cpus[i].put_ids)
2495 CPU_FREE(cpus[i].put_ids);
2496 }
2497 free(cpus);
103a8fea
LB		 2498}
2499
57a42a34 2500
c98d5d94 2501/*
95aebc44 2502 * Parse a file containing a single int.
6de68fe1
LB		 2503 * Return 0 if file can not be opened
2504 * Exit if file can be opened, but can not be parsed
c98d5d94 2505 */
95aebc44 2506int parse_int_file(const char *fmt, ...)
103a8fea 2507{
95aebc44
JT		 2508 va_list args;
2509 char path[PATH_MAX];
c98d5d94 2510 FILE *filep;
95aebc44 2511 int value;
103a8fea 2512
95aebc44
JT		 2513 va_start(args, fmt);
2514 vsnprintf(path, sizeof(path), fmt, args);
2515 va_end(args);
6de68fe1
LB		 2516 filep = fopen(path, "r");
2517 if (!filep)
2518 return 0;
b2c95d90
JT		 2519 if (fscanf(filep, "%d", &value) != 1)
2520 err(1, "%s: failed to parse number from file", path);
c98d5d94 2521 fclose(filep);
95aebc44
JT		 2522 return value;
2523}
2524
c98d5d94
LB		 2525/*
2526 * cpu_is_first_core_in_package(cpu)
2527 * return 1 if given CPU is 1st core in package
2528 */
2529int cpu_is_first_core_in_package(int cpu)
103a8fea 2530{
95aebc44 2531 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 2532}
2533
2534int get_physical_package_id(int cpu)
2535{
95aebc44 2536 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 2537}
2538
6de68fe1
LB		 2539int get_die_id(int cpu)
2540{
2541 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2542}
2543
103a8fea
LB		 2544int get_core_id(int cpu)
2545{
95aebc44 2546 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 2547}
2548
ef605741
PB		 2549void set_node_data(void)
2550{
2ffbb224
PB		 2551 int pkg, node, lnode, cpu, cpux;
2552 int cpu_count;
2553
2554 /* initialize logical_node_id */
2555 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2556 cpus[cpu].logical_node_id = -1;
2557
2558 cpu_count = 0;
2559 for (pkg = 0; pkg < topo.num_packages; pkg++) {
2560 lnode = 0;
2561 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2562 if (cpus[cpu].physical_package_id != pkg)
2563 continue;
2564 /* find a cpu with an unset logical_node_id */
2565 if (cpus[cpu].logical_node_id != -1)
2566 continue;
2567 cpus[cpu].logical_node_id = lnode;
2568 node = cpus[cpu].physical_node_id;
2569 cpu_count++;
2570 /*
2571 * find all matching cpus on this pkg and set
2572 * the logical_node_id
2573 */
2574 for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2575 if ((cpus[cpux].physical_package_id == pkg) &&
2576 (cpus[cpux].physical_node_id == node)) {
2577 cpus[cpux].logical_node_id = lnode;
2578 cpu_count++;
2579 }
2580 }
2581 lnode++;
2582 if (lnode > topo.nodes_per_pkg)
2583 topo.nodes_per_pkg = lnode;
2584 }
2585 if (cpu_count >= topo.max_cpu_num)
2586 break;
ef605741 2587 }
ef605741
PB		 2588}
2589
2590int get_physical_node_id(struct cpu_topology *thiscpu)
c98d5d94
LB		 2591{
2592 char path[80];
2593 FILE *filep;
0e2d8f05
LB		 2594 int i;
2595 int cpu = thiscpu->logical_cpu_id;
e275b388 2596
0e2d8f05
LB		 2597 for (i = 0; i <= topo.max_cpu_num; i++) {
2598 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2599 cpu, i);
2600 filep = fopen(path, "r");
2601 if (!filep)
2602 continue;
2603 fclose(filep);
2604 return i;
e275b388 2605 }
0e2d8f05
LB		 2606 return -1;
2607}
c98d5d94 2608
0e2d8f05
LB		 2609int get_thread_siblings(struct cpu_topology *thiscpu)
2610{
2611 char path[80], character;
2612 FILE *filep;
2613 unsigned long map;
8cb48b32 2614 int so, shift, sib_core;
0e2d8f05
LB		 2615 int cpu = thiscpu->logical_cpu_id;
2616 int offset = topo.max_cpu_num + 1;
2617 size_t size;
8cb48b32 2618 int thread_id = 0;
0e2d8f05
LB		 2619
2620 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
8cb48b32
PB		 2621 if (thiscpu->thread_id < 0)
2622 thiscpu->thread_id = thread_id++;
0e2d8f05
LB		 2623 if (!thiscpu->put_ids)
2624 return -1;
2625
2626 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2627 CPU_ZERO_S(size, thiscpu->put_ids);
2628
2629 sprintf(path,
2630 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2631 filep = fopen_or_die(path, "r");
2632 do {
2633 offset -= BITMASK_SIZE;
8173c336
BH		 2634 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2635 err(1, "%s: failed to parse file", path);
0e2d8f05
LB		 2636 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2637 if ((map >> shift) & 0x1) {
8cb48b32
PB		 2638 so = shift + offset;
2639 sib_core = get_core_id(so);
2640 if (sib_core == thiscpu->physical_core_id) {
2641 CPU_SET_S(so, size, thiscpu->put_ids);
2642 if ((so != cpu) &&
2643 (cpus[so].thread_id < 0))
2644 cpus[so].thread_id =
2645 thread_id++;
2646 }
0e2d8f05
LB		 2647 }
2648 }
2649 } while (!strncmp(&character, ",", 1));
c98d5d94 2650 fclose(filep);
0e2d8f05
LB		 2651
2652 return CPU_COUNT_S(size, thiscpu->put_ids);
c98d5d94
LB		 2653}
2654
103a8fea 2655/*
c98d5d94
LB		 2656 * run func(thread, core, package) in topology order
2657 * skip non-present cpus
103a8fea
LB		 2658 */
2659
c98d5d94
LB		 2660int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2661 struct pkg_data *, struct thread_data *, struct core_data *,
2662 struct pkg_data *), struct thread_data *thread_base,
2663 struct core_data *core_base, struct pkg_data *pkg_base,
2664 struct thread_data *thread_base2, struct core_data *core_base2,
2665 struct pkg_data *pkg_base2)
2666{
40f5cfe7 2667 int retval, pkg_no, node_no, core_no, thread_no;
c98d5d94
LB		 2668
2669 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
40f5cfe7
PB		 2670 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2671 for (core_no = 0; core_no < topo.cores_per_node;
2672 ++core_no) {
2673 for (thread_no = 0; thread_no <
2674 topo.threads_per_core; ++thread_no) {
2675 struct thread_data *t, *t2;
2676 struct core_data *c, *c2;
2677 struct pkg_data *p, *p2;
2678
2679 t = GET_THREAD(thread_base, thread_no,
2680 core_no, node_no,
2681 pkg_no);
2682
2683 if (cpu_is_not_present(t->cpu_id))
2684 continue;
2685
2686 t2 = GET_THREAD(thread_base2, thread_no,
2687 core_no, node_no,
2688 pkg_no);
2689
2690 c = GET_CORE(core_base, core_no,
2691 node_no, pkg_no);
2692 c2 = GET_CORE(core_base2, core_no,
2693 node_no,
2694 pkg_no);
2695
2696 p = GET_PKG(pkg_base, pkg_no);
2697 p2 = GET_PKG(pkg_base2, pkg_no);
2698
2699 retval = func(t, c, p, t2, c2, p2);
2700 if (retval)
2701 return retval;
2702 }
c98d5d94
LB		 2703 }
2704 }
2705 }
2706 return 0;
2707}
2708
2709/*
2710 * run func(cpu) on every cpu in /proc/stat
2711 * return max_cpu number
2712 */
2713int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 2714{
2715 FILE *fp;
c98d5d94 2716 int cpu_num;
103a8fea
LB		 2717 int retval;
2718
57a42a34 2719 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 2720
2721 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 2722 if (retval != 0)
2723 err(1, "%s: failed to parse format", proc_stat);
103a8fea 2724
c98d5d94
LB		 2725 while (1) {
2726 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 2727 if (retval != 1)
2728 break;
2729
c98d5d94
LB		 2730 retval = func(cpu_num);
2731 if (retval) {
2732 fclose(fp);
2733 return(retval);
2734 }
103a8fea
LB		 2735 }
2736 fclose(fp);
c98d5d94 2737 return 0;
103a8fea
LB		 2738}
2739
2740void re_initialize(void)
2741{
c98d5d94
LB		 2742 free_all_buffers();
2743 setup_all_buffers();
2744 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 2745}
2746
843c5791
PB		 2747void set_max_cpu_num(void)
2748{
2749 FILE *filep;
2750 unsigned long dummy;
2751
2752 topo.max_cpu_num = 0;
2753 filep = fopen_or_die(
2754 "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2755 "r");
2756 while (fscanf(filep, "%lx,", &dummy) == 1)
0e2d8f05 2757 topo.max_cpu_num += BITMASK_SIZE;
843c5791
PB		 2758 fclose(filep);
2759 topo.max_cpu_num--; /* 0 based */
2760}
c98d5d94 2761
103a8fea 2762/*
c98d5d94
LB		 2763 * count_cpus()
2764 * remember the last one seen, it will be the max
103a8fea 2765 */
c98d5d94 2766int count_cpus(int cpu)
103a8fea 2767{
843c5791 2768 topo.num_cpus++;
c98d5d94
LB		 2769 return 0;
2770}
2771int mark_cpu_present(int cpu)
2772{
2773 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 2774 return 0;
103a8fea
LB		 2775}
2776
8cb48b32
PB		 2777int init_thread_id(int cpu)
2778{
2779 cpus[cpu].thread_id = -1;
2780 return 0;
2781}
2782
562a2d37
LB		 2783/*
2784 * snapshot_proc_interrupts()
2785 *
2786 * read and record summary of /proc/interrupts
2787 *
2788 * return 1 if config change requires a restart, else return 0
2789 */
2790int snapshot_proc_interrupts(void)
2791{
2792 static FILE *fp;
2793 int column, retval;
2794
2795 if (fp == NULL)
2796 fp = fopen_or_die("/proc/interrupts", "r");
2797 else
2798 rewind(fp);
2799
2800 /* read 1st line of /proc/interrupts to get cpu* name for each column */
2801 for (column = 0; column < topo.num_cpus; ++column) {
2802 int cpu_number;
2803
2804 retval = fscanf(fp, " CPU%d", &cpu_number);
2805 if (retval != 1)
2806 break;
2807
2808 if (cpu_number > topo.max_cpu_num) {
2809 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2810 return 1;
2811 }
2812
2813 irq_column_2_cpu[column] = cpu_number;
2814 irqs_per_cpu[cpu_number] = 0;
2815 }
2816
2817 /* read /proc/interrupt count lines and sum up irqs per cpu */
2818 while (1) {
2819 int column;
2820 char buf[64];
2821
2822 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
2823 if (retval != 1)
2824 break;
2825
2826 /* read the count per cpu */
2827 for (column = 0; column < topo.num_cpus; ++column) {
2828
2829 int cpu_number, irq_count;
2830
2831 retval = fscanf(fp, " %d", &irq_count);
2832 if (retval != 1)
2833 break;
2834
2835 cpu_number = irq_column_2_cpu[column];
2836 irqs_per_cpu[cpu_number] += irq_count;
2837
2838 }
2839
2840 while (getc(fp) != '\n')
2841 ; /* flush interrupt description */
2842
2843 }
2844 return 0;
2845}
fdf676e5
LB		 2846/*
2847 * snapshot_gfx_rc6_ms()
2848 *
2849 * record snapshot of
2850 * /sys/class/drm/card0/power/rc6_residency_ms
2851 *
2852 * return 1 if config change requires a restart, else return 0
2853 */
2854int snapshot_gfx_rc6_ms(void)
2855{
2856 FILE *fp;
2857 int retval;
2858
2859 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2860
2861 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2862 if (retval != 1)
2863 err(1, "GFX rc6");
2864
2865 fclose(fp);
2866
2867 return 0;
2868}
27d47356
LB		 2869/*
2870 * snapshot_gfx_mhz()
2871 *
2872 * record snapshot of
2873 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2874 *
2875 * return 1 if config change requires a restart, else return 0
2876 */
2877int snapshot_gfx_mhz(void)
2878{
2879 static FILE *fp;
2880 int retval;
2881
2882 if (fp == NULL)
2883 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
22048c54 2884 else {
27d47356 2885 rewind(fp);
22048c54
LB		 2886 fflush(fp);
2887 }
27d47356
LB		 2888
2889 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2890 if (retval != 1)
2891 err(1, "GFX MHz");
2892
2893 return 0;
2894}
562a2d37 2895
be0e54c4
LB		 2896/*
2897 * snapshot_cpu_lpi()
2898 *
2899 * record snapshot of
2900 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2901 *
2902 * return 1 if config change requires a restart, else return 0
2903 */
2904int snapshot_cpu_lpi_us(void)
2905{
2906 FILE *fp;
2907 int retval;
2908
2909 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2910
2911 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
5ea7647b
PB		 2912 if (retval != 1) {
2913 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
2914 BIC_NOT_PRESENT(BIC_CPU_LPI);
2915 return -1;
2916 }
be0e54c4
LB		 2917
2918 fclose(fp);
2919
2920 return 0;
2921}
2922/*
2923 * snapshot_sys_lpi()
2924 *
2925 * record snapshot of
2926 * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2927 *
2928 * return 1 if config change requires a restart, else return 0
2929 */
2930int snapshot_sys_lpi_us(void)
2931{
2932 FILE *fp;
2933 int retval;
2934
2935 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2936
2937 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
5ea7647b
PB		 2938 if (retval != 1) {
2939 fprintf(stderr, "Disabling Low Power Idle System output\n");
2940 BIC_NOT_PRESENT(BIC_SYS_LPI);
2941 return -1;
2942 }
be0e54c4
LB		 2943 fclose(fp);
2944
2945 return 0;
2946}
562a2d37
LB		 2947/*
2948 * snapshot /proc and /sys files
2949 *
2950 * return 1 if configuration restart needed, else return 0
2951 */
2952int snapshot_proc_sysfs_files(void)
2953{
218f0e8d
LB		 2954 if (DO_BIC(BIC_IRQ))
2955 if (snapshot_proc_interrupts())
2956 return 1;
562a2d37 2957
812db3f7 2958 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 2959 snapshot_gfx_rc6_ms();
2960
812db3f7 2961 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 2962 snapshot_gfx_mhz();
2963
be0e54c4
LB		 2964 if (DO_BIC(BIC_CPU_LPI))
2965 snapshot_cpu_lpi_us();
2966
2967 if (DO_BIC(BIC_SYS_LPI))
2968 snapshot_sys_lpi_us();
2969
562a2d37
LB		 2970 return 0;
2971}
2972
8aa2ed0b
LB		 2973int exit_requested;
2974
2975static void signal_handler (int signal)
2976{
2977 switch (signal) {
2978 case SIGINT:
2979 exit_requested = 1;
2980 if (debug)
2981 fprintf(stderr, " SIGINT\n");
2982 break;
07211960
LB		 2983 case SIGUSR1:
2984 if (debug > 1)
2985 fprintf(stderr, "SIGUSR1\n");
2986 break;
8aa2ed0b 2987 }
b9ad8ee0
LB		 2988 /* make sure this manually-invoked interval is at least 1ms long */
2989 nanosleep(&one_msec, NULL);
8aa2ed0b
LB		 2990}
2991
2992void setup_signal_handler(void)
2993{
2994 struct sigaction sa;
2995
2996 memset(&sa, 0, sizeof(sa));
2997
2998 sa.sa_handler = &signal_handler;
2999
3000 if (sigaction(SIGINT, &sa, NULL) < 0)
3001 err(1, "sigaction SIGINT");
07211960
LB		 3002 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3003 err(1, "sigaction SIGUSR1");
8aa2ed0b 3004}
b9ad8ee0 3005
47936f94 3006void do_sleep(void)
b9ad8ee0
LB		 3007{
3008 struct timeval select_timeout;
3009 fd_set readfds;
3010 int retval;
3011
3012 FD_ZERO(&readfds);
3013 FD_SET(0, &readfds);
3014
47936f94
AB		 3015 if (!isatty(fileno(stdin))) {
3016 nanosleep(&interval_ts, NULL);
3017 return;
3018 }
b9ad8ee0 3019
47936f94 3020 select_timeout = interval_tv;
b9ad8ee0
LB		 3021 retval = select(1, &readfds, NULL, NULL, &select_timeout);
3022
3023 if (retval == 1) {
b9ad8ee0
LB		 3024 switch (getc(stdin)) {
3025 case 'q':
3026 exit_requested = 1;
3027 break;
3028 }
3029 /* make sure this manually-invoked interval is at least 1ms long */
3030 nanosleep(&one_msec, NULL);
3031 }
b9ad8ee0 3032}
47936f94 3033
4c2122d4 3034
103a8fea
LB		 3035void turbostat_loop()
3036{
c98d5d94 3037 int retval;
e52966c0 3038 int restarted = 0;
023fe0ac 3039 int done_iters = 0;
c98d5d94 3040
8aa2ed0b
LB		 3041 setup_signal_handler();
3042
103a8fea 3043restart:
e52966c0
LB		 3044 restarted++;
3045
562a2d37 3046 snapshot_proc_sysfs_files();
c98d5d94 3047 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 3048 first_counter_read = 0;
d91bb17c
LB		 3049 if (retval < -1) {
3050 exit(retval);
3051 } else if (retval == -1) {
e52966c0
LB		 3052 if (restarted > 1) {
3053 exit(retval);
3054 }
c98d5d94
LB		 3055 re_initialize();
3056 goto restart;
3057 }
e52966c0 3058 restarted = 0;
023fe0ac 3059 done_iters = 0;
103a8fea
LB		 3060 gettimeofday(&tv_even, (struct timezone *)NULL);
3061
3062 while (1) {
c98d5d94 3063 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 3064 re_initialize();
3065 goto restart;
3066 }
b9ad8ee0 3067 do_sleep();
562a2d37
LB		 3068 if (snapshot_proc_sysfs_files())
3069 goto restart;
c98d5d94 3070 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 3071 if (retval < -1) {
3072 exit(retval);
3073 } else if (retval == -1) {
15aaa346
LB		 3074 re_initialize();
3075 goto restart;
3076 }
103a8fea 3077 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3078 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 3079 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3080 re_initialize();
3081 goto restart;
3082 }
c98d5d94
LB		 3083 compute_average(EVEN_COUNTERS);
3084 format_all_counters(EVEN_COUNTERS);
b7d8c148 3085 flush_output_stdout();
8aa2ed0b
LB		 3086 if (exit_requested)
3087 break;
023fe0ac
CY		 3088 if (num_iterations && ++done_iters >= num_iterations)
3089 break;
b9ad8ee0 3090 do_sleep();
562a2d37
LB		 3091 if (snapshot_proc_sysfs_files())
3092 goto restart;
c98d5d94 3093 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 3094 if (retval < -1) {
3095 exit(retval);
3096 } else if (retval == -1) {
103a8fea
LB		 3097 re_initialize();
3098 goto restart;
3099 }
103a8fea 3100 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 3101 timersub(&tv_even, &tv_odd, &tv_delta);
ba3dec99
LB		 3102 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3103 re_initialize();
3104 goto restart;
3105 }
c98d5d94
LB		 3106 compute_average(ODD_COUNTERS);
3107 format_all_counters(ODD_COUNTERS);
b7d8c148 3108 flush_output_stdout();
8aa2ed0b
LB		 3109 if (exit_requested)
3110 break;
023fe0ac
CY		 3111 if (num_iterations && ++done_iters >= num_iterations)
3112 break;
103a8fea
LB		 3113 }
3114}
3115
3116void check_dev_msr()
3117{
3118 struct stat sb;
7ce7d5de 3119 char pathname[32];
103a8fea 3120
7ce7d5de
PB		 3121 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3122 if (stat(pathname, &sb))
a21d38c8
LB		 3123 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3124 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 3125}
3126
98481e79 3127void check_permissions()
103a8fea 3128{
98481e79
LB		 3129 struct __user_cap_header_struct cap_header_data;
3130 cap_user_header_t cap_header = &cap_header_data;
3131 struct __user_cap_data_struct cap_data_data;
3132 cap_user_data_t cap_data = &cap_data_data;
3133 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
3134 int do_exit = 0;
7ce7d5de 3135 char pathname[32];
98481e79
LB		 3136
3137 /* check for CAP_SYS_RAWIO */
3138 cap_header->pid = getpid();
3139 cap_header->version = _LINUX_CAPABILITY_VERSION;
3140 if (capget(cap_header, cap_data) < 0)
3141 err(-6, "capget(2) failed");
3142
3143 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
3144 do_exit++;
3145 warnx("capget(CAP_SYS_RAWIO) failed,"
3146 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3147 }
3148
3149 /* test file permissions */
7ce7d5de
PB		 3150 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3151 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 3152 do_exit++;
3153 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3154 }
3155
3156 /* if all else fails, thell them to be root */
3157 if (do_exit)
3158 if (getuid() != 0)
d7899447 3159 warnx("... or simply run as root");
98481e79
LB		 3160
3161 if (do_exit)
3162 exit(-6);
103a8fea
LB		 3163}
3164
d7899447
LB		 3165/*
3166 * NHM adds support for additional MSRs:
3167 *
3168 * MSR_SMI_COUNT 0x00000034
3169 *
ec0adc53 3170 * MSR_PLATFORM_INFO 0x000000ce
1df2e55a 3171 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
d7899447 3172 *
cf4cbe53
LB		 3173 * MSR_MISC_PWR_MGMT 0x000001aa
3174 *
d7899447
LB		 3175 * MSR_PKG_C3_RESIDENCY 0x000003f8
3176 * MSR_PKG_C6_RESIDENCY 0x000003f9
3177 * MSR_CORE_C3_RESIDENCY 0x000003fc
3178 * MSR_CORE_C6_RESIDENCY 0x000003fd
3179 *
ee7e38e3 3180 * Side effect:
1df2e55a 3181 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
33148d67 3182 * sets has_misc_feature_control
d7899447 3183 */
ee7e38e3 3184int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 3185{
ee7e38e3 3186 unsigned long long msr;
21ed5574 3187 unsigned int base_ratio;
ee7e38e3
LB		 3188 int *pkg_cstate_limits;
3189
103a8fea
LB		 3190 if (!genuine_intel)
3191 return 0;
3192
3193 if (family != 6)
3194 return 0;
3195
21ed5574
LB		 3196 bclk = discover_bclk(family, model);
3197
103a8fea 3198 switch (model) {
869ce69e 3199 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
869ce69e 3200 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
ee7e38e3
LB		 3201 pkg_cstate_limits = nhm_pkg_cstate_limits;
3202 break;
869ce69e
LB		 3203 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3204 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3205 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3206 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
ee7e38e3 3207 pkg_cstate_limits = snb_pkg_cstate_limits;
33148d67 3208 has_misc_feature_control = 1;
ee7e38e3 3209 break;
c66f78a6 3210 case INTEL_FAM6_HASWELL: /* HSW */
869ce69e 3211 case INTEL_FAM6_HASWELL_X: /* HSX */
5e741407 3212 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 3213 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 3214 case INTEL_FAM6_BROADWELL_G: /* BDW */
869ce69e 3215 case INTEL_FAM6_BROADWELL_X: /* BDX */
af239c44
PZ		 3216 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3217 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
ee7e38e3 3218 pkg_cstate_limits = hsw_pkg_cstate_limits;
33148d67 3219 has_misc_feature_control = 1;
ee7e38e3 3220 break;
d8ebb442
LB		 3221 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3222 pkg_cstate_limits = skx_pkg_cstate_limits;
33148d67 3223 has_misc_feature_control = 1;
d8ebb442 3224 break;
f2c4db1b 3225 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
cf4cbe53 3226 no_MSR_MISC_PWR_MGMT = 1;
f2c4db1b 3227 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
ee7e38e3
LB		 3228 pkg_cstate_limits = slv_pkg_cstate_limits;
3229 break;
869ce69e 3230 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
ee7e38e3 3231 pkg_cstate_limits = amt_pkg_cstate_limits;
cf4cbe53 3232 no_MSR_MISC_PWR_MGMT = 1;
ee7e38e3 3233 break;
869ce69e 3234 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
ee7e38e3
LB		 3235 pkg_cstate_limits = phi_pkg_cstate_limits;
3236 break;
869ce69e 3237 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 3238 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3239 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
445640a5 3240 pkg_cstate_limits = glm_pkg_cstate_limits;
e4085d54 3241 break;
103a8fea
LB		 3242 default:
3243 return 0;
3244 }
1df2e55a 3245 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
e9257f5f 3246 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 3247
ec0adc53 3248 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 3249 base_ratio = (msr >> 8) & 0xFF;
3250
3251 base_hz = base_ratio * bclk * 1000000;
3252 has_base_hz = 1;
ee7e38e3 3253 return 1;
103a8fea 3254}
0f7887c4 3255/*
495c7654 3256 * SLV client has support for unique MSRs:
0f7887c4
LB		 3257 *
3258 * MSR_CC6_DEMOTION_POLICY_CONFIG
3259 * MSR_MC6_DEMOTION_POLICY_CONFIG
3260 */
3261
3262int has_slv_msrs(unsigned int family, unsigned int model)
3263{
3264 if (!genuine_intel)
3265 return 0;
3266
3267 switch (model) {
f2c4db1b
PZ		 3268 case INTEL_FAM6_ATOM_SILVERMONT:
3269 case INTEL_FAM6_ATOM_SILVERMONT_MID:
3270 case INTEL_FAM6_ATOM_AIRMONT_MID:
0f7887c4
LB		 3271 return 1;
3272 }
3273 return 0;
3274}
7170a374
LB		 3275int is_dnv(unsigned int family, unsigned int model)
3276{
3277
3278 if (!genuine_intel)
3279 return 0;
3280
3281 switch (model) {
f2c4db1b 3282 case INTEL_FAM6_ATOM_GOLDMONT_X:
7170a374
LB		 3283 return 1;
3284 }
3285 return 0;
3286}
ade0ebac
LB		 3287int is_bdx(unsigned int family, unsigned int model)
3288{
3289
3290 if (!genuine_intel)
3291 return 0;
3292
3293 switch (model) {
3294 case INTEL_FAM6_BROADWELL_X:
ade0ebac
LB		 3295 return 1;
3296 }
3297 return 0;
3298}
34c76197
LB		 3299int is_skx(unsigned int family, unsigned int model)
3300{
3301
3302 if (!genuine_intel)
3303 return 0;
3304
3305 switch (model) {
3306 case INTEL_FAM6_SKYLAKE_X:
3307 return 1;
3308 }
3309 return 0;
3310}
0f7887c4 3311
31e07522 3312int has_turbo_ratio_limit(unsigned int family, unsigned int model)
d7899447 3313{
0f7887c4
LB		 3314 if (has_slv_msrs(family, model))
3315 return 0;
3316
d7899447
LB		 3317 switch (model) {
3318 /* Nehalem compatible, but do not include turbo-ratio limit support */
869ce69e 3319 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
869ce69e 3320 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
d7899447
LB		 3321 return 0;
3322 default:
3323 return 1;
3324 }
3325}
0f7887c4
LB		 3326int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3327{
3328 if (has_slv_msrs(family, model))
3329 return 1;
3330
3331 return 0;
3332}
6574a5d5
LB		 3333int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3334{
3335 if (!genuine_intel)
3336 return 0;
3337
3338 if (family != 6)
3339 return 0;
3340
3341 switch (model) {
869ce69e
LB		 3342 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3343 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
fcd17211
LB		 3344 return 1;
3345 default:
3346 return 0;
3347 }
3348}
3349int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3350{
3351 if (!genuine_intel)
3352 return 0;
3353
3354 if (family != 6)
3355 return 0;
3356
3357 switch (model) {
869ce69e 3358 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
6574a5d5
LB		 3359 return 1;
3360 default:
3361 return 0;
3362 }
3363}
3364
fb5d4327
DC		 3365int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3366{
3367 if (!genuine_intel)
3368 return 0;
3369
3370 if (family != 6)
3371 return 0;
3372
3373 switch (model) {
869ce69e 3374 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
fb5d4327
DC		 3375 return 1;
3376 default:
3377 return 0;
3378 }
3379}
31e07522
LB		 3380int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3381{
3382 if (!genuine_intel)
3383 return 0;
3384
3385 if (family != 6)
3386 return 0;
3387
3388 switch (model) {
3389 case INTEL_FAM6_ATOM_GOLDMONT:
3390 case INTEL_FAM6_SKYLAKE_X:
3391 return 1;
3392 default:
3393 return 0;
3394 }
3395}
6fb3143b
LB		 3396int has_config_tdp(unsigned int family, unsigned int model)
3397{
3398 if (!genuine_intel)
3399 return 0;
3400
3401 if (family != 6)
3402 return 0;
3403
3404 switch (model) {
869ce69e 3405 case INTEL_FAM6_IVYBRIDGE: /* IVB */
c66f78a6 3406 case INTEL_FAM6_HASWELL: /* HSW */
869ce69e 3407 case INTEL_FAM6_HASWELL_X: /* HSX */
5e741407 3408 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 3409 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 3410 case INTEL_FAM6_BROADWELL_G: /* BDW */
869ce69e 3411 case INTEL_FAM6_BROADWELL_X: /* BDX */
af239c44
PZ		 3412 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3413 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
869ce69e
LB		 3414 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3415
3416 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
6fb3143b
LB		 3417 return 1;
3418 default:
3419 return 0;
3420 }
3421}
3422
fcd17211 3423static void
1b69317d 3424dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
fcd17211
LB		 3425{
3426 if (!do_nhm_platform_info)
3427 return;
3428
3429 dump_nhm_platform_info();
3430
3431 if (has_hsw_turbo_ratio_limit(family, model))
3432 dump_hsw_turbo_ratio_limits();
3433
3434 if (has_ivt_turbo_ratio_limit(family, model))
3435 dump_ivt_turbo_ratio_limits();
3436
31e07522
LB		 3437 if (has_turbo_ratio_limit(family, model))
3438 dump_turbo_ratio_limits(family, model);
fcd17211 3439
0f7887c4
LB		 3440 if (has_atom_turbo_ratio_limit(family, model))
3441 dump_atom_turbo_ratio_limits();
3442
fb5d4327
DC		 3443 if (has_knl_turbo_ratio_limit(family, model))
3444 dump_knl_turbo_ratio_limits();
3445
6fb3143b
LB		 3446 if (has_config_tdp(family, model))
3447 dump_config_tdp();
3448
fcd17211
LB		 3449 dump_nhm_cst_cfg();
3450}
3451
41618e63
LB		 3452static void
3453dump_sysfs_cstate_config(void)
3454{
3455 char path[64];
3456 char name_buf[16];
3457 char desc[64];
3458 FILE *input;
3459 int state;
3460 char *sp;
3461
3462 if (!DO_BIC(BIC_sysfs))
3463 return;
3464
3465 for (state = 0; state < 10; ++state) {
3466
3467 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3468 base_cpu, state);
3469 input = fopen(path, "r");
3470 if (input == NULL)
3471 continue;
8173c336
BH		 3472 if (!fgets(name_buf, sizeof(name_buf), input))
3473 err(1, "%s: failed to read file", path);
41618e63
LB		 3474
3475 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3476 sp = strchr(name_buf, '-');
3477 if (!sp)
3478 sp = strchrnul(name_buf, '\n');
3479 *sp = '\0';
41618e63
LB		 3480 fclose(input);
3481
3482 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3483 base_cpu, state);
3484 input = fopen(path, "r");
3485 if (input == NULL)
3486 continue;
8173c336
BH		 3487 if (!fgets(desc, sizeof(desc), input))
3488 err(1, "%s: failed to read file", path);
41618e63
LB		 3489
3490 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3491 fclose(input);
3492 }
3493}
7293fccd
LB		 3494static void
3495dump_sysfs_pstate_config(void)
3496{
3497 char path[64];
3498 char driver_buf[64];
3499 char governor_buf[64];
3500 FILE *input;
3501 int turbo;
3502
3503 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3504 base_cpu);
3505 input = fopen(path, "r");
3506 if (input == NULL) {
0a42d235 3507 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3508 return;
3509 }
8173c336
BH		 3510 if (!fgets(driver_buf, sizeof(driver_buf), input))
3511 err(1, "%s: failed to read file", path);
7293fccd
LB		 3512 fclose(input);
3513
3514 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3515 base_cpu);
3516 input = fopen(path, "r");
3517 if (input == NULL) {
0a42d235 3518 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3519 return;
3520 }
8173c336
BH		 3521 if (!fgets(governor_buf, sizeof(governor_buf), input))
3522 err(1, "%s: failed to read file", path);
7293fccd
LB		 3523 fclose(input);
3524
3525 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3526 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3527
3528 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3529 input = fopen(path, "r");
3530 if (input != NULL) {
8173c336
BH		 3531 if (fscanf(input, "%d", &turbo) != 1)
3532 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3533 fprintf(outf, "cpufreq boost: %d\n", turbo);
3534 fclose(input);
3535 }
3536
3537 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3538 input = fopen(path, "r");
3539 if (input != NULL) {
8173c336
BH		 3540 if (fscanf(input, "%d", &turbo) != 1)
3541 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3542 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3543 fclose(input);
3544 }
3545}
41618e63 3546
fcd17211 3547
889facbe
LB		 3548/*
3549 * print_epb()
3550 * Decode the ENERGY_PERF_BIAS MSR
3551 */
3552int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3553{
3554 unsigned long long msr;
3555 char *epb_string;
3556 int cpu;
3557
3558 if (!has_epb)
3559 return 0;
3560
3561 cpu = t->cpu_id;
3562
3563 /* EPB is per-package */
3564 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3565 return 0;
3566
3567 if (cpu_migrate(cpu)) {
b7d8c148 3568 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 3569 return -1;
3570 }
3571
3572 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3573 return 0;
3574
e9be7dd6 3575 switch (msr & 0xF) {
889facbe
LB		 3576 case ENERGY_PERF_BIAS_PERFORMANCE:
3577 epb_string = "performance";
3578 break;
3579 case ENERGY_PERF_BIAS_NORMAL:
3580 epb_string = "balanced";
3581 break;
3582 case ENERGY_PERF_BIAS_POWERSAVE:
3583 epb_string = "powersave";
3584 break;
3585 default:
3586 epb_string = "custom";
3587 break;
3588 }
b7d8c148 3589 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
889facbe
LB		 3590
3591 return 0;
3592}
7f5c258e
LB		 3593/*
3594 * print_hwp()
3595 * Decode the MSR_HWP_CAPABILITIES
3596 */
3597int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3598{
3599 unsigned long long msr;
3600 int cpu;
3601
3602 if (!has_hwp)
3603 return 0;
3604
3605 cpu = t->cpu_id;
3606
3607 /* MSR_HWP_CAPABILITIES is per-package */
3608 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3609 return 0;
3610
3611 if (cpu_migrate(cpu)) {
b7d8c148 3612 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
7f5c258e
LB		 3613 return -1;
3614 }
3615
3616 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3617 return 0;
3618
b7d8c148 3619 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
7f5c258e
LB		 3620 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3621
3622 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3623 if ((msr & (1 << 0)) == 0)
3624 return 0;
3625
3626 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3627 return 0;
3628
b7d8c148 3629 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
6dbd25a2 3630 "(high %d guar %d eff %d low %d)\n",
7f5c258e
LB		 3631 cpu, msr,
3632 (unsigned int)HWP_HIGHEST_PERF(msr),
3633 (unsigned int)HWP_GUARANTEED_PERF(msr),
3634 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3635 (unsigned int)HWP_LOWEST_PERF(msr));
3636
3637 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3638 return 0;
3639
b7d8c148 3640 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
6dbd25a2 3641 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
7f5c258e
LB		 3642 cpu, msr,
3643 (unsigned int)(((msr) >> 0) & 0xff),
3644 (unsigned int)(((msr) >> 8) & 0xff),
3645 (unsigned int)(((msr) >> 16) & 0xff),
3646 (unsigned int)(((msr) >> 24) & 0xff),
3647 (unsigned int)(((msr) >> 32) & 0xff3),
3648 (unsigned int)(((msr) >> 42) & 0x1));
3649
3650 if (has_hwp_pkg) {
3651 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3652 return 0;
3653
b7d8c148 3654 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
6dbd25a2 3655 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
7f5c258e
LB		 3656 cpu, msr,
3657 (unsigned int)(((msr) >> 0) & 0xff),
3658 (unsigned int)(((msr) >> 8) & 0xff),
3659 (unsigned int)(((msr) >> 16) & 0xff),
3660 (unsigned int)(((msr) >> 24) & 0xff),
3661 (unsigned int)(((msr) >> 32) & 0xff3));
3662 }
3663 if (has_hwp_notify) {
3664 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3665 return 0;
3666
b7d8c148 3667 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
7f5c258e
LB		 3668 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3669 cpu, msr,
3670 ((msr) & 0x1) ? "EN" : "Dis",
3671 ((msr) & 0x2) ? "EN" : "Dis");
3672 }
3673 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3674 return 0;
3675
b7d8c148 3676 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
7f5c258e
LB		 3677 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3678 cpu, msr,
3679 ((msr) & 0x1) ? "" : "No-",
3680 ((msr) & 0x2) ? "" : "No-");
889facbe
LB		 3681
3682 return 0;
3683}
3684
3a9a941d
LB		 3685/*
3686 * print_perf_limit()
3687 */
3688int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3689{
3690 unsigned long long msr;
3691 int cpu;
3692
3693 cpu = t->cpu_id;
3694
3695 /* per-package */
3696 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3697 return 0;
3698
3699 if (cpu_migrate(cpu)) {
b7d8c148 3700 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3a9a941d
LB		 3701 return -1;
3702 }
3703
3704 if (do_core_perf_limit_reasons) {
3705 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3706 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3707 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 3708 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 3709 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 3710 (msr & 1 << 13) ? "Transitions, " : "",
3711 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3712 (msr & 1 << 11) ? "PkgPwrL2, " : "",
3713 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3714 (msr & 1 << 9) ? "CorePwr, " : "",
3715 (msr & 1 << 8) ? "Amps, " : "",
3716 (msr & 1 << 6) ? "VR-Therm, " : "",
3717 (msr & 1 << 5) ? "Auto-HWP, " : "",
3718 (msr & 1 << 4) ? "Graphics, " : "",
3719 (msr & 1 << 2) ? "bit2, " : "",
3720 (msr & 1 << 1) ? "ThermStatus, " : "",
3721 (msr & 1 << 0) ? "PROCHOT, " : "");
b7d8c148 3722 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 3723 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 3724 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 3725 (msr & 1 << 29) ? "Transitions, " : "",
3726 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3727 (msr & 1 << 27) ? "PkgPwrL2, " : "",
3728 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3729 (msr & 1 << 25) ? "CorePwr, " : "",
3730 (msr & 1 << 24) ? "Amps, " : "",
3731 (msr & 1 << 22) ? "VR-Therm, " : "",
3732 (msr & 1 << 21) ? "Auto-HWP, " : "",
3733 (msr & 1 << 20) ? "Graphics, " : "",
3734 (msr & 1 << 18) ? "bit18, " : "",
3735 (msr & 1 << 17) ? "ThermStatus, " : "",
3736 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 3737
3738 }
3739 if (do_gfx_perf_limit_reasons) {
3740 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3741 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3742 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3a9a941d
LB		 3743 (msr & 1 << 0) ? "PROCHOT, " : "",
3744 (msr & 1 << 1) ? "ThermStatus, " : "",
3745 (msr & 1 << 4) ? "Graphics, " : "",
3746 (msr & 1 << 6) ? "VR-Therm, " : "",
3747 (msr & 1 << 8) ? "Amps, " : "",
3748 (msr & 1 << 9) ? "GFXPwr, " : "",
3749 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3750 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3751 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3a9a941d
LB		 3752 (msr & 1 << 16) ? "PROCHOT, " : "",
3753 (msr & 1 << 17) ? "ThermStatus, " : "",
3754 (msr & 1 << 20) ? "Graphics, " : "",
3755 (msr & 1 << 22) ? "VR-Therm, " : "",
3756 (msr & 1 << 24) ? "Amps, " : "",
3757 (msr & 1 << 25) ? "GFXPwr, " : "",
3758 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3759 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3760 }
3761 if (do_ring_perf_limit_reasons) {
3762 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3763 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3764 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3a9a941d
LB		 3765 (msr & 1 << 0) ? "PROCHOT, " : "",
3766 (msr & 1 << 1) ? "ThermStatus, " : "",
3767 (msr & 1 << 6) ? "VR-Therm, " : "",
3768 (msr & 1 << 8) ? "Amps, " : "",
3769 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3770 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3771 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3a9a941d
LB		 3772 (msr & 1 << 16) ? "PROCHOT, " : "",
3773 (msr & 1 << 17) ? "ThermStatus, " : "",
3774 (msr & 1 << 22) ? "VR-Therm, " : "",
3775 (msr & 1 << 24) ? "Amps, " : "",
3776 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3777 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3778 }
3779 return 0;
3780}
3781
889facbe
LB		 3782#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
3783#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
3784
9392bd98 3785double get_tdp_intel(unsigned int model)
144b44b1
LB		 3786{
3787 unsigned long long msr;
3788
3789 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 3790 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 3791 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3792
3793 switch (model) {
f2c4db1b
PZ		 3794 case INTEL_FAM6_ATOM_SILVERMONT:
3795 case INTEL_FAM6_ATOM_SILVERMONT_X:
144b44b1
LB		 3796 return 30.0;
3797 default:
3798 return 135.0;
3799 }
3800}
3801
9392bd98
CW		 3802double get_tdp_amd(unsigned int family)
3803{
3804 switch (family) {
3805 case 0x17:
3806 default:
3807 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3808 return 250.0;
3809 }
3810}
3811
40ee8e3b
AS		 3812/*
3813 * rapl_dram_energy_units_probe()
3814 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3815 */
3816static double
3817rapl_dram_energy_units_probe(int model, double rapl_energy_units)
3818{
3819 /* only called for genuine_intel, family 6 */
3820
3821 switch (model) {
869ce69e
LB		 3822 case INTEL_FAM6_HASWELL_X: /* HSX */
3823 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3824 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
40ee8e3b
AS		 3825 return (rapl_dram_energy_units = 15.3 / 1000000);
3826 default:
3827 return (rapl_energy_units);
3828 }
3829}
3830
9392bd98 3831void rapl_probe_intel(unsigned int family, unsigned int model)
889facbe
LB		 3832{
3833 unsigned long long msr;
144b44b1 3834 unsigned int time_unit;
889facbe
LB		 3835 double tdp;
3836
889facbe
LB		 3837 if (family != 6)
3838 return;
3839
3840 switch (model) {
869ce69e
LB		 3841 case INTEL_FAM6_SANDYBRIDGE:
3842 case INTEL_FAM6_IVYBRIDGE:
c66f78a6 3843 case INTEL_FAM6_HASWELL: /* HSW */
5e741407 3844 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 3845 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 3846 case INTEL_FAM6_BROADWELL_G: /* BDW */
144b44b1 3847 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3848 if (rapl_joules) {
3849 BIC_PRESENT(BIC_Pkg_J);
3850 BIC_PRESENT(BIC_Cor_J);
3851 BIC_PRESENT(BIC_GFX_J);
3852 } else {
3853 BIC_PRESENT(BIC_PkgWatt);
3854 BIC_PRESENT(BIC_CorWatt);
3855 BIC_PRESENT(BIC_GFXWatt);
3856 }
889facbe 3857 break;
869ce69e 3858 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 3859 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e4085d54 3860 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3861 if (rapl_joules)
3862 BIC_PRESENT(BIC_Pkg_J);
3863 else
3864 BIC_PRESENT(BIC_PkgWatt);
e4085d54 3865 break;
af239c44
PZ		 3866 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3867 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
81824921 3868 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3869 BIC_PRESENT(BIC_PKG__);
3870 BIC_PRESENT(BIC_RAM__);
3871 if (rapl_joules) {
3872 BIC_PRESENT(BIC_Pkg_J);
3873 BIC_PRESENT(BIC_Cor_J);
3874 BIC_PRESENT(BIC_RAM_J);
81824921 3875 BIC_PRESENT(BIC_GFX_J);
812db3f7
LB		 3876 } else {
3877 BIC_PRESENT(BIC_PkgWatt);
3878 BIC_PRESENT(BIC_CorWatt);
3879 BIC_PRESENT(BIC_RAMWatt);
81824921 3880 BIC_PRESENT(BIC_GFXWatt);
812db3f7 3881 }
0b2bb692 3882 break;
869ce69e
LB		 3883 case INTEL_FAM6_HASWELL_X: /* HSX */
3884 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e
LB		 3885 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3886 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
0b2bb692 3887 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3888 BIC_PRESENT(BIC_PKG__);
3889 BIC_PRESENT(BIC_RAM__);
3890 if (rapl_joules) {
3891 BIC_PRESENT(BIC_Pkg_J);
3892 BIC_PRESENT(BIC_RAM_J);
3893 } else {
3894 BIC_PRESENT(BIC_PkgWatt);
3895 BIC_PRESENT(BIC_RAMWatt);
3896 }
e6f9bb3c 3897 break;
869ce69e
LB		 3898 case INTEL_FAM6_SANDYBRIDGE_X:
3899 case INTEL_FAM6_IVYBRIDGE_X:
0b2bb692 3900 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3901 BIC_PRESENT(BIC_PKG__);
3902 BIC_PRESENT(BIC_RAM__);
3903 if (rapl_joules) {
3904 BIC_PRESENT(BIC_Pkg_J);
3905 BIC_PRESENT(BIC_Cor_J);
3906 BIC_PRESENT(BIC_RAM_J);
3907 } else {
3908 BIC_PRESENT(BIC_PkgWatt);
3909 BIC_PRESENT(BIC_CorWatt);
3910 BIC_PRESENT(BIC_RAMWatt);
3911 }
144b44b1 3912 break;
f2c4db1b
PZ		 3913 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
3914 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
9148494c 3915 do_rapl = RAPL_PKG | RAPL_CORES;
812db3f7
LB		 3916 if (rapl_joules) {
3917 BIC_PRESENT(BIC_Pkg_J);
3918 BIC_PRESENT(BIC_Cor_J);
3919 } else {
3920 BIC_PRESENT(BIC_PkgWatt);
3921 BIC_PRESENT(BIC_CorWatt);
3922 }
889facbe 3923 break;
f2c4db1b 3924 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
0f644909 3925 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
812db3f7
LB		 3926 BIC_PRESENT(BIC_PKG__);
3927 BIC_PRESENT(BIC_RAM__);
3928 if (rapl_joules) {
3929 BIC_PRESENT(BIC_Pkg_J);
3930 BIC_PRESENT(BIC_Cor_J);
3931 BIC_PRESENT(BIC_RAM_J);
3932 } else {
3933 BIC_PRESENT(BIC_PkgWatt);
3934 BIC_PRESENT(BIC_CorWatt);
3935 BIC_PRESENT(BIC_RAMWatt);
3936 }
0f644909 3937 break;
889facbe
LB		 3938 default:
3939 return;
3940 }
3941
3942 /* units on package 0, verify later other packages match */
7ce7d5de 3943 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 3944 return;
3945
3946 rapl_power_units = 1.0 / (1 << (msr & 0xF));
f2c4db1b 3947 if (model == INTEL_FAM6_ATOM_SILVERMONT)
144b44b1
LB		 3948 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3949 else
3950 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 3951
40ee8e3b
AS		 3952 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3953
144b44b1
LB		 3954 time_unit = msr >> 16 & 0xF;
3955 if (time_unit == 0)
3956 time_unit = 0xA;
889facbe 3957
144b44b1 3958 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 3959
9392bd98 3960 tdp = get_tdp_intel(model);
889facbe 3961
144b44b1 3962 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
96e47158 3963 if (!quiet)
b7d8c148 3964 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
9392bd98 3965}
889facbe 3966
9392bd98
CW		 3967void rapl_probe_amd(unsigned int family, unsigned int model)
3968{
3969 unsigned long long msr;
3970 unsigned int eax, ebx, ecx, edx;
3971 unsigned int has_rapl = 0;
3972 double tdp;
3973
3974 if (max_extended_level >= 0x80000007) {
3975 __cpuid(0x80000007, eax, ebx, ecx, edx);
3976 /* RAPL (Fam 17h) */
3977 has_rapl = edx & (1 << 14);
3978 }
3979
3980 if (!has_rapl)
3981 return;
3982
3983 switch (family) {
3984 case 0x17: /* Zen, Zen+ */
3985 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
3316f99a
CW		 3986 if (rapl_joules) {
3987 BIC_PRESENT(BIC_Pkg_J);
9392bd98 3988 BIC_PRESENT(BIC_Cor_J);
3316f99a
CW		 3989 } else {
3990 BIC_PRESENT(BIC_PkgWatt);
9392bd98 3991 BIC_PRESENT(BIC_CorWatt);
3316f99a 3992 }
9392bd98
CW		 3993 break;
3994 default:
3995 return;
3996 }
3997
3998 if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
3999 return;
4000
4001 rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4002 rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4003 rapl_power_units = ldexp(1.0, -(msr & 0xf));
4004
4005 tdp = get_tdp_amd(model);
4006
4007 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4008 if (!quiet)
4009 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4010}
4011
4012/*
4013 * rapl_probe()
4014 *
4015 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4016 */
4017void rapl_probe(unsigned int family, unsigned int model)
4018{
4019 if (genuine_intel)
4020 rapl_probe_intel(family, model);
4021 if (authentic_amd)
4022 rapl_probe_amd(family, model);
889facbe
LB		 4023}
4024
1b69317d 4025void perf_limit_reasons_probe(unsigned int family, unsigned int model)
3a9a941d
LB		 4026{
4027 if (!genuine_intel)
4028 return;
4029
4030 if (family != 6)
4031 return;
4032
4033 switch (model) {
c66f78a6 4034 case INTEL_FAM6_HASWELL: /* HSW */
5e741407 4035 case INTEL_FAM6_HASWELL_G: /* HSW */
3a9a941d 4036 do_gfx_perf_limit_reasons = 1;
869ce69e 4037 case INTEL_FAM6_HASWELL_X: /* HSX */
3a9a941d
LB		 4038 do_core_perf_limit_reasons = 1;
4039 do_ring_perf_limit_reasons = 1;
4040 default:
4041 return;
4042 }
4043}
4044
ac980e13
AB		 4045void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4046{
4047 if (is_skx(family, model) || is_bdx(family, model))
4048 has_automatic_cstate_conversion = 1;
4049}
4050
889facbe
LB		 4051int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4052{
4053 unsigned long long msr;
f4896fa5 4054 unsigned int dts, dts2;
889facbe
LB		 4055 int cpu;
4056
4057 if (!(do_dts || do_ptm))
4058 return 0;
4059
4060 cpu = t->cpu_id;
4061
4062 /* DTS is per-core, no need to print for each thread */
388e9c81 4063 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
889facbe
LB		 4064 return 0;
4065
4066 if (cpu_migrate(cpu)) {
b7d8c148 4067 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4068 return -1;
4069 }
4070
4071 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4072 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4073 return 0;
4074
4075 dts = (msr >> 16) & 0x7F;
b7d8c148 4076 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
889facbe
LB		 4077 cpu, msr, tcc_activation_temp - dts);
4078
889facbe
LB		 4079 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4080 return 0;
4081
4082 dts = (msr >> 16) & 0x7F;
4083 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4084 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4085 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4086 }
4087
4088
f4896fa5 4089 if (do_dts && debug) {
889facbe
LB		 4090 unsigned int resolution;
4091
4092 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4093 return 0;
4094
4095 dts = (msr >> 16) & 0x7F;
4096 resolution = (msr >> 27) & 0xF;
b7d8c148 4097 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
889facbe
LB		 4098 cpu, msr, tcc_activation_temp - dts, resolution);
4099
889facbe
LB		 4100 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4101 return 0;
4102
4103 dts = (msr >> 16) & 0x7F;
4104 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4105 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4106 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4107 }
4108
4109 return 0;
4110}
36229897 4111
889facbe
LB		 4112void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4113{
b7d8c148 4114 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
889facbe
LB		 4115 cpu, label,
4116 ((msr >> 15) & 1) ? "EN" : "DIS",
4117 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4118 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4119 (((msr >> 16) & 1) ? "EN" : "DIS"));
4120
4121 return;
4122}
4123
4124int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4125{
4126 unsigned long long msr;
9392bd98 4127 const char *msr_name;
889facbe 4128 int cpu;
889facbe
LB		 4129
4130 if (!do_rapl)
4131 return 0;
4132
4133 /* RAPL counters are per package, so print only for 1st thread/package */
4134 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4135 return 0;
4136
4137 cpu = t->cpu_id;
4138 if (cpu_migrate(cpu)) {
b7d8c148 4139 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4140 return -1;
4141 }
4142
9392bd98
CW		 4143 if (do_rapl & RAPL_AMD_F17H) {
4144 msr_name = "MSR_RAPL_PWR_UNIT";
4145 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4146 return -1;
4147 } else {
4148 msr_name = "MSR_RAPL_POWER_UNIT";
4149 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4150 return -1;
4151 }
889facbe 4152
9392bd98 4153 fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
96e47158
LB		 4154 rapl_power_units, rapl_energy_units, rapl_time_units);
4155
144b44b1
LB		 4156 if (do_rapl & RAPL_PKG_POWER_INFO) {
4157
889facbe
LB		 4158 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4159 return -5;
4160
4161
b7d8c148 4162 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4163 cpu, msr,
4164 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4165 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4166 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4167 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4168
144b44b1
LB		 4169 }
4170 if (do_rapl & RAPL_PKG) {
4171
889facbe
LB		 4172 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4173 return -9;
4174
b7d8c148 4175 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4176 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
889facbe
LB		 4177
4178 print_power_limit_msr(cpu, msr, "PKG Limit #1");
b7d8c148 4179 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
889facbe
LB		 4180 cpu,
4181 ((msr >> 47) & 1) ? "EN" : "DIS",
4182 ((msr >> 32) & 0x7FFF) * rapl_power_units,
4183 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4184 ((msr >> 48) & 1) ? "EN" : "DIS");
4185 }
4186
0b2bb692 4187 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 4188 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4189 return -6;
4190
b7d8c148 4191 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4192 cpu, msr,
4193 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4194 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4195 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4196 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 4197 }
4198 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 4199 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4200 return -9;
b7d8c148 4201 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4202 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
889facbe
LB		 4203
4204 print_power_limit_msr(cpu, msr, "DRAM Limit");
4205 }
144b44b1 4206 if (do_rapl & RAPL_CORE_POLICY) {
96e47158
LB		 4207 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4208 return -7;
889facbe 4209
96e47158 4210 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1 4211 }
9148494c 4212 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
96e47158
LB		 4213 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4214 return -9;
4215 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4216 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4217 print_power_limit_msr(cpu, msr, "Cores Limit");
889facbe
LB		 4218 }
4219 if (do_rapl & RAPL_GFX) {
96e47158
LB		 4220 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4221 return -8;
889facbe 4222
96e47158 4223 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
889facbe 4224
96e47158
LB		 4225 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4226 return -9;
4227 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4228 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4229 print_power_limit_msr(cpu, msr, "GFX Limit");
889facbe
LB		 4230 }
4231 return 0;
4232}
4233
d7899447
LB		 4234/*
4235 * SNB adds support for additional MSRs:
4236 *
4237 * MSR_PKG_C7_RESIDENCY 0x000003fa
4238 * MSR_CORE_C7_RESIDENCY 0x000003fe
4239 * MSR_PKG_C2_RESIDENCY 0x0000060d
4240 */
103a8fea 4241
d7899447 4242int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 4243{
4244 if (!genuine_intel)
4245 return 0;
4246
4247 switch (model) {
869ce69e
LB		 4248 case INTEL_FAM6_SANDYBRIDGE:
4249 case INTEL_FAM6_SANDYBRIDGE_X:
4250 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4251 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
c66f78a6 4252 case INTEL_FAM6_HASWELL: /* HSW */
869ce69e 4253 case INTEL_FAM6_HASWELL_X: /* HSW */
5e741407 4254 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 4255 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 4256 case INTEL_FAM6_BROADWELL_G: /* BDW */
869ce69e 4257 case INTEL_FAM6_BROADWELL_X: /* BDX */
af239c44
PZ		 4258 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4259 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
869ce69e
LB		 4260 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4261 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 4262 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4263 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
103a8fea
LB		 4264 return 1;
4265 }
4266 return 0;
4267}
4268
d7899447
LB		 4269/*
4270 * HSW adds support for additional MSRs:
4271 *
5a63426e
LB		 4272 * MSR_PKG_C8_RESIDENCY 0x00000630
4273 * MSR_PKG_C9_RESIDENCY 0x00000631
4274 * MSR_PKG_C10_RESIDENCY 0x00000632
4275 *
4276 * MSR_PKGC8_IRTL 0x00000633
4277 * MSR_PKGC9_IRTL 0x00000634
4278 * MSR_PKGC10_IRTL 0x00000635
4279 *
d7899447
LB		 4280 */
4281int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 4282{
4283 if (!genuine_intel)
4284 return 0;
4285
4286 switch (model) {
c66f78a6
PZ		 4287 case INTEL_FAM6_HASWELL:
4288 case INTEL_FAM6_BROADWELL: /* BDW */
af239c44
PZ		 4289 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4290 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
869ce69e 4291 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4292 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
0b2bb692
LB		 4293 return 1;
4294 }
4295 return 0;
4296}
4297
4298/*
4299 * SKL adds support for additional MSRS:
4300 *
4301 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4302 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4303 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4304 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4305 */
4306int has_skl_msrs(unsigned int family, unsigned int model)
4307{
4308 if (!genuine_intel)
4309 return 0;
4310
4311 switch (model) {
af239c44
PZ		 4312 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4313 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
ca58710f
KCA		 4314 return 1;
4315 }
4316 return 0;
4317}
4318
144b44b1
LB		 4319int is_slm(unsigned int family, unsigned int model)
4320{
4321 if (!genuine_intel)
4322 return 0;
4323 switch (model) {
f2c4db1b
PZ		 4324 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
4325 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
144b44b1
LB		 4326 return 1;
4327 }
4328 return 0;
4329}
4330
fb5d4327
DC		 4331int is_knl(unsigned int family, unsigned int model)
4332{
4333 if (!genuine_intel)
4334 return 0;
4335 switch (model) {
869ce69e 4336 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
fb5d4327
DC		 4337 return 1;
4338 }
4339 return 0;
4340}
4341
997e5395
SP		 4342int is_cnl(unsigned int family, unsigned int model)
4343{
4344 if (!genuine_intel)
4345 return 0;
4346
4347 switch (model) {
af239c44 4348 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
997e5395
SP		 4349 return 1;
4350 }
4351
4352 return 0;
4353}
4354
b2b34dfe
HC		 4355unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4356{
4357 if (is_knl(family, model))
4358 return 1024;
4359 return 1;
4360}
4361
144b44b1
LB		 4362#define SLM_BCLK_FREQS 5
4363double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4364
4365double slm_bclk(void)
4366{
4367 unsigned long long msr = 3;
4368 unsigned int i;
4369 double freq;
4370
7ce7d5de 4371 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
b7d8c148 4372 fprintf(outf, "SLM BCLK: unknown\n");
144b44b1
LB		 4373
4374 i = msr & 0xf;
4375 if (i >= SLM_BCLK_FREQS) {
b7d8c148 4376 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
0a91e551 4377 i = 3;
144b44b1
LB		 4378 }
4379 freq = slm_freq_table[i];
4380
96e47158 4381 if (!quiet)
8f6196c1 4382 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
144b44b1
LB		 4383
4384 return freq;
4385}
4386
103a8fea
LB		 4387double discover_bclk(unsigned int family, unsigned int model)
4388{
121b48bb 4389 if (has_snb_msrs(family, model) || is_knl(family, model))
103a8fea 4390 return 100.00;
144b44b1
LB		 4391 else if (is_slm(family, model))
4392 return slm_bclk();
103a8fea
LB		 4393 else
4394 return 133.33;
4395}
4396
889facbe
LB		 4397/*
4398 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4399 * the Thermal Control Circuit (TCC) activates.
4400 * This is usually equal to tjMax.
4401 *
4402 * Older processors do not have this MSR, so there we guess,
4403 * but also allow cmdline over-ride with -T.
4404 *
4405 * Several MSR temperature values are in units of degrees-C
4406 * below this value, including the Digital Thermal Sensor (DTS),
4407 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4408 */
4409int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4410{
4411 unsigned long long msr;
4412 unsigned int target_c_local;
4413 int cpu;
4414
4415 /* tcc_activation_temp is used only for dts or ptm */
4416 if (!(do_dts || do_ptm))
4417 return 0;
4418
4419 /* this is a per-package concept */
4420 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4421 return 0;
4422
4423 cpu = t->cpu_id;
4424 if (cpu_migrate(cpu)) {
b7d8c148 4425 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4426 return -1;
4427 }
4428
4429 if (tcc_activation_temp_override != 0) {
4430 tcc_activation_temp = tcc_activation_temp_override;
b7d8c148 4431 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
889facbe
LB		 4432 cpu, tcc_activation_temp);
4433 return 0;
4434 }
4435
4436 /* Temperature Target MSR is Nehalem and newer only */
d7899447 4437 if (!do_nhm_platform_info)
889facbe
LB		 4438 goto guess;
4439
7ce7d5de 4440 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 4441 goto guess;
4442
3482124a 4443 target_c_local = (msr >> 16) & 0xFF;
889facbe 4444
96e47158 4445 if (!quiet)
b7d8c148 4446 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
889facbe
LB		 4447 cpu, msr, target_c_local);
4448
3482124a 4449 if (!target_c_local)
889facbe
LB		 4450 goto guess;
4451
4452 tcc_activation_temp = target_c_local;
4453
4454 return 0;
4455
4456guess:
4457 tcc_activation_temp = TJMAX_DEFAULT;
b7d8c148 4458 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
889facbe
LB		 4459 cpu, tcc_activation_temp);
4460
4461 return 0;
4462}
69807a63 4463
aa8d8cc7
LB		 4464void decode_feature_control_msr(void)
4465{
4466 unsigned long long msr;
4467
4468 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4469 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4470 base_cpu, msr,
4471 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4472 msr & (1 << 18) ? "SGX" : "");
4473}
4474
69807a63
LB		 4475void decode_misc_enable_msr(void)
4476{
4477 unsigned long long msr;
4478
f26b1519
LB		 4479 if (!genuine_intel)
4480 return;
4481
69807a63 4482 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
e6512624 4483 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
69807a63 4484 base_cpu, msr,
e6512624
LB		 4485 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4486 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
fd3933ca 4487 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
e6512624
LB		 4488 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4489 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
69807a63
LB		 4490}
4491
33148d67
LB		 4492void decode_misc_feature_control(void)
4493{
4494 unsigned long long msr;
4495
4496 if (!has_misc_feature_control)
4497 return;
4498
4499 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4500 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4501 base_cpu, msr,
4502 msr & (0 << 0) ? "No-" : "",
4503 msr & (1 << 0) ? "No-" : "",
4504 msr & (2 << 0) ? "No-" : "",
4505 msr & (3 << 0) ? "No-" : "");
4506}
f0057310
LB		 4507/*
4508 * Decode MSR_MISC_PWR_MGMT
4509 *
4510 * Decode the bits according to the Nehalem documentation
4511 * bit[0] seems to continue to have same meaning going forward
4512 * bit[1] less so...
4513 */
4514void decode_misc_pwr_mgmt_msr(void)
4515{
4516 unsigned long long msr;
4517
4518 if (!do_nhm_platform_info)
4519 return;
4520
cf4cbe53
LB		 4521 if (no_MSR_MISC_PWR_MGMT)
4522 return;
4523
f0057310 4524 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
ddadb8ad 4525 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
f0057310
LB		 4526 base_cpu, msr,
4527 msr & (1 << 0) ? "DIS" : "EN",
ddadb8ad
SP		 4528 msr & (1 << 1) ? "EN" : "DIS",
4529 msr & (1 << 8) ? "EN" : "DIS");
f0057310 4530}
71616c8e
LB		 4531/*
4532 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4533 *
4534 * This MSRs are present on Silvermont processors,
4535 * Intel Atom processor E3000 series (Baytrail), and friends.
4536 */
4537void decode_c6_demotion_policy_msr(void)
4538{
4539 unsigned long long msr;
4540
4541 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4542 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4543 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4544
4545 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4546 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4547 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4548}
7f5c258e 4549
f5a4c76a
LB		 4550/*
4551 * When models are the same, for the purpose of turbostat, reuse
4552 */
4553unsigned int intel_model_duplicates(unsigned int model)
4554{
4555
4556 switch(model) {
4557 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4558 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4559 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
4560 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
4561 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
4562 return INTEL_FAM6_NEHALEM;
4563
4564 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
4565 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
4566 return INTEL_FAM6_NEHALEM_EX;
4567
4568 case INTEL_FAM6_XEON_PHI_KNM:
4569 return INTEL_FAM6_XEON_PHI_KNL;
4570
af239c44 4571 case INTEL_FAM6_HASWELL_L:
c66f78a6 4572 return INTEL_FAM6_HASWELL;
f5a4c76a
LB		 4573
4574 case INTEL_FAM6_BROADWELL_X:
4575 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
4576 return INTEL_FAM6_BROADWELL_X;
4577
af239c44 4578 case INTEL_FAM6_SKYLAKE_L:
c66f78a6 4579 case INTEL_FAM6_SKYLAKE:
af239c44 4580 case INTEL_FAM6_KABYLAKE_L:
c66f78a6 4581 case INTEL_FAM6_KABYLAKE:
af239c44 4582 return INTEL_FAM6_SKYLAKE_L;
937807d3 4583
af239c44
PZ		 4584 case INTEL_FAM6_ICELAKE_L:
4585 return INTEL_FAM6_CANNONLAKE_L;
f5a4c76a
LB		 4586 }
4587 return model;
4588}
fcd17211 4589void process_cpuid()
103a8fea 4590{
34041551
LB		 4591 unsigned int eax, ebx, ecx, edx;
4592 unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
b3a34e93 4593 unsigned int has_turbo;
103a8fea
LB		 4594
4595 eax = ebx = ecx = edx = 0;
4596
5aea2f7f 4597 __cpuid(0, max_level, ebx, ecx, edx);
103a8fea 4598
34041551 4599 if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
103a8fea 4600 genuine_intel = 1;
34041551
LB		 4601 else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4602 authentic_amd = 1;
103a8fea 4603
96e47158 4604 if (!quiet)
b7d8c148 4605 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 4606 (char *)&ebx, (char *)&edx, (char *)&ecx);
4607
5aea2f7f 4608 __cpuid(1, fms, ebx, ecx, edx);
103a8fea
LB		 4609 family = (fms >> 8) & 0xf;
4610 model = (fms >> 4) & 0xf;
4611 stepping = fms & 0xf;
5aa3d1a2
CW		 4612 if (family == 0xf)
4613 family += (fms >> 20) & 0xff;
4614 if (family >= 6)
103a8fea 4615 model += ((fms >> 16) & 0xf) << 4;
34041551
LB		 4616 ecx_flags = ecx;
4617 edx_flags = edx;
103a8fea
LB		 4618
4619 /*
4620 * check max extended function levels of CPUID.
4621 * This is needed to check for invariant TSC.
4622 * This check is valid for both Intel and AMD.
4623 */
4624 ebx = ecx = edx = 0;
5aea2f7f 4625 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
103a8fea 4626
34041551
LB		 4627 if (!quiet) {
4628 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4629 max_level, max_extended_level, family, model, stepping, family, model, stepping);
4630 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4631 ecx_flags & (1 << 0) ? "SSE3" : "-",
4632 ecx_flags & (1 << 3) ? "MONITOR" : "-",
4633 ecx_flags & (1 << 6) ? "SMX" : "-",
4634 ecx_flags & (1 << 7) ? "EIST" : "-",
4635 ecx_flags & (1 << 8) ? "TM2" : "-",
4636 edx_flags & (1 << 4) ? "TSC" : "-",
4637 edx_flags & (1 << 5) ? "MSR" : "-",
4638 edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4639 edx_flags & (1 << 28) ? "HT" : "-",
4640 edx_flags & (1 << 29) ? "TM" : "-");
4641 }
f5a4c76a
LB		 4642 if (genuine_intel)
4643 model = intel_model_duplicates(model);
34041551
LB		 4644
4645 if (!(edx_flags & (1 << 5)))
4646 errx(1, "CPUID: no MSR");
4647
61a87ba7 4648 if (max_extended_level >= 0x80000007) {
103a8fea 4649
d7899447
LB		 4650 /*
4651 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4652 * this check is valid for both Intel and AMD
4653 */
5aea2f7f 4654 __cpuid(0x80000007, eax, ebx, ecx, edx);
d7899447
LB		 4655 has_invariant_tsc = edx & (1 << 8);
4656 }
103a8fea
LB		 4657
4658 /*
4659 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4660 * this check is valid for both Intel and AMD
4661 */
4662
5aea2f7f 4663 __cpuid(0x6, eax, ebx, ecx, edx);
8209e054 4664 has_aperf = ecx & (1 << 0);
812db3f7
LB		 4665 if (has_aperf) {
4666 BIC_PRESENT(BIC_Avg_MHz);
4667 BIC_PRESENT(BIC_Busy);
4668 BIC_PRESENT(BIC_Bzy_MHz);
4669 }
889facbe 4670 do_dts = eax & (1 << 0);
812db3f7
LB		 4671 if (do_dts)
4672 BIC_PRESENT(BIC_CoreTmp);
b3a34e93 4673 has_turbo = eax & (1 << 1);
889facbe 4674 do_ptm = eax & (1 << 6);
812db3f7
LB		 4675 if (do_ptm)
4676 BIC_PRESENT(BIC_PkgTmp);
7f5c258e
LB		 4677 has_hwp = eax & (1 << 7);
4678 has_hwp_notify = eax & (1 << 8);
4679 has_hwp_activity_window = eax & (1 << 9);
4680 has_hwp_epp = eax & (1 << 10);
4681 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 4682 has_epb = ecx & (1 << 3);
4683
96e47158 4684 if (!quiet)
b3a34e93 4685 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
7f5c258e
LB		 4686 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4687 has_aperf ? "" : "No-",
b3a34e93 4688 has_turbo ? "" : "No-",
7f5c258e
LB		 4689 do_dts ? "" : "No-",
4690 do_ptm ? "" : "No-",
4691 has_hwp ? "" : "No-",
4692 has_hwp_notify ? "" : "No-",
4693 has_hwp_activity_window ? "" : "No-",
4694 has_hwp_epp ? "" : "No-",
4695 has_hwp_pkg ? "" : "No-",
4696 has_epb ? "" : "No-");
103a8fea 4697
96e47158 4698 if (!quiet)
69807a63
LB		 4699 decode_misc_enable_msr();
4700
33148d67 4701
96e47158 4702 if (max_level >= 0x7 && !quiet) {
aa8d8cc7 4703 int has_sgx;
103a8fea 4704
aa8d8cc7
LB		 4705 ecx = 0;
4706
4707 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4708
4709 has_sgx = ebx & (1 << 2);
4710 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4711
4712 if (has_sgx)
4713 decode_feature_control_msr();
4714 }
4715
61a87ba7 4716 if (max_level >= 0x15) {
8a5bdf41
LB		 4717 unsigned int eax_crystal;
4718 unsigned int ebx_tsc;
4719
4720 /*
4721 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4722 */
4723 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5aea2f7f 4724 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
8a5bdf41
LB		 4725
4726 if (ebx_tsc != 0) {
4727
96e47158 4728 if (!quiet && (ebx != 0))
b7d8c148 4729 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
8a5bdf41
LB		 4730 eax_crystal, ebx_tsc, crystal_hz);
4731
4732 if (crystal_hz == 0)
4733 switch(model) {
af239c44 4734 case INTEL_FAM6_SKYLAKE_L: /* SKL */
e8efbc80
LB		 4735 crystal_hz = 24000000; /* 24.0 MHz */
4736 break;
f2c4db1b 4737 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
ec53e594
LB		 4738 crystal_hz = 25000000; /* 25.0 MHz */
4739 break;
869ce69e 4740 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4741 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e8efbc80 4742 crystal_hz = 19200000; /* 19.2 MHz */
8a5bdf41
LB		 4743 break;
4744 default:
4745 crystal_hz = 0;
4746 }
4747
4748 if (crystal_hz) {
4749 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
96e47158 4750 if (!quiet)
b7d8c148 4751 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
8a5bdf41
LB		 4752 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
4753 }
4754 }
4755 }
61a87ba7
LB		 4756 if (max_level >= 0x16) {
4757 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4758
4759 /*
4760 * CPUID 16H Base MHz, Max MHz, Bus MHz
4761 */
4762 base_mhz = max_mhz = bus_mhz = edx = 0;
4763
5aea2f7f 4764 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
96e47158 4765 if (!quiet)
b7d8c148 4766 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
61a87ba7
LB		 4767 base_mhz, max_mhz, bus_mhz);
4768 }
8a5bdf41 4769
b2b34dfe
HC		 4770 if (has_aperf)
4771 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4772
812db3f7
LB		 4773 BIC_PRESENT(BIC_IRQ);
4774 BIC_PRESENT(BIC_TSC_MHz);
4775
4776 if (probe_nhm_msrs(family, model)) {
4777 do_nhm_platform_info = 1;
4778 BIC_PRESENT(BIC_CPU_c1);
4779 BIC_PRESENT(BIC_CPU_c3);
4780 BIC_PRESENT(BIC_CPU_c6);
4781 BIC_PRESENT(BIC_SMI);
4782 }
d7899447 4783 do_snb_cstates = has_snb_msrs(family, model);
812db3f7
LB		 4784
4785 if (do_snb_cstates)
4786 BIC_PRESENT(BIC_CPU_c7);
4787
5a63426e 4788 do_irtl_snb = has_snb_msrs(family, model);
0f47c08d
LB		 4789 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4790 BIC_PRESENT(BIC_Pkgpc2);
4791 if (pkg_cstate_limit >= PCL__3)
4792 BIC_PRESENT(BIC_Pkgpc3);
4793 if (pkg_cstate_limit >= PCL__6)
4794 BIC_PRESENT(BIC_Pkgpc6);
4795 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4796 BIC_PRESENT(BIC_Pkgpc7);
0539ba11 4797 if (has_slv_msrs(family, model)) {
0f47c08d
LB		 4798 BIC_NOT_PRESENT(BIC_Pkgpc2);
4799 BIC_NOT_PRESENT(BIC_Pkgpc3);
4800 BIC_PRESENT(BIC_Pkgpc6);
4801 BIC_NOT_PRESENT(BIC_Pkgpc7);
0539ba11
LB		 4802 BIC_PRESENT(BIC_Mod_c6);
4803 use_c1_residency_msr = 1;
4804 }
7170a374
LB		 4805 if (is_dnv(family, model)) {
4806 BIC_PRESENT(BIC_CPU_c1);
4807 BIC_NOT_PRESENT(BIC_CPU_c3);
4808 BIC_NOT_PRESENT(BIC_Pkgpc3);
4809 BIC_NOT_PRESENT(BIC_CPU_c7);
4810 BIC_NOT_PRESENT(BIC_Pkgpc7);
4811 use_c1_residency_msr = 1;
4812 }
34c76197
LB		 4813 if (is_skx(family, model)) {
4814 BIC_NOT_PRESENT(BIC_CPU_c3);
4815 BIC_NOT_PRESENT(BIC_Pkgpc3);
4816 BIC_NOT_PRESENT(BIC_CPU_c7);
4817 BIC_NOT_PRESENT(BIC_Pkgpc7);
4818 }
ade0ebac
LB		 4819 if (is_bdx(family, model)) {
4820 BIC_NOT_PRESENT(BIC_CPU_c7);
4821 BIC_NOT_PRESENT(BIC_Pkgpc7);
4822 }
0f47c08d
LB		 4823 if (has_hsw_msrs(family, model)) {
4824 BIC_PRESENT(BIC_Pkgpc8);
4825 BIC_PRESENT(BIC_Pkgpc9);
4826 BIC_PRESENT(BIC_Pkgpc10);
4827 }
5a63426e 4828 do_irtl_hsw = has_hsw_msrs(family, model);
a99d8730
LB		 4829 if (has_skl_msrs(family, model)) {
4830 BIC_PRESENT(BIC_Totl_c0);
4831 BIC_PRESENT(BIC_Any_c0);
4832 BIC_PRESENT(BIC_GFX_c0);
4833 BIC_PRESENT(BIC_CPUGFX);
4834 }
144b44b1 4835 do_slm_cstates = is_slm(family, model);
fb5d4327 4836 do_knl_cstates = is_knl(family, model);
103a8fea 4837
31a1f15c 4838 if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
562855ee 4839 BIC_NOT_PRESENT(BIC_CPU_c3);
103a8fea 4840
96e47158 4841 if (!quiet)
f0057310
LB		 4842 decode_misc_pwr_mgmt_msr();
4843
96e47158 4844 if (!quiet && has_slv_msrs(family, model))
71616c8e
LB		 4845 decode_c6_demotion_policy_msr();
4846
889facbe 4847 rapl_probe(family, model);
3a9a941d 4848 perf_limit_reasons_probe(family, model);
ac980e13 4849 automatic_cstate_conversion_probe(family, model);
889facbe 4850
96e47158 4851 if (!quiet)
1b69317d 4852 dump_cstate_pstate_config_info(family, model);
fcd17211 4853
41618e63
LB		 4854 if (!quiet)
4855 dump_sysfs_cstate_config();
7293fccd
LB		 4856 if (!quiet)
4857 dump_sysfs_pstate_config();
41618e63 4858
a2b7b749
LB		 4859 if (has_skl_msrs(family, model))
4860 calculate_tsc_tweak();
4861
812db3f7
LB		 4862 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4863 BIC_PRESENT(BIC_GFX_rc6);
fdf676e5 4864
812db3f7
LB		 4865 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4866 BIC_PRESENT(BIC_GFXMHz);
27d47356 4867
be0e54c4
LB		 4868 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4869 BIC_PRESENT(BIC_CPU_LPI);
4870 else
4871 BIC_NOT_PRESENT(BIC_CPU_LPI);
4872
4873 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4874 BIC_PRESENT(BIC_SYS_LPI);
4875 else
4876 BIC_NOT_PRESENT(BIC_SYS_LPI);
4877
96e47158 4878 if (!quiet)
33148d67
LB		 4879 decode_misc_feature_control();
4880
889facbe 4881 return;
103a8fea
LB		 4882}
4883
103a8fea
LB		 4884/*
4885 * in /dev/cpu/ return success for names that are numbers
4886 * ie. filter out ".", "..", "microcode".
4887 */
4888int dir_filter(const struct dirent *dirp)
4889{
4890 if (isdigit(dirp->d_name[0]))
4891 return 1;
4892 else
4893 return 0;
4894}
4895
4896int open_dev_cpu_msr(int dummy1)
4897{
4898 return 0;
4899}
4900
c98d5d94
LB		 4901void topology_probe()
4902{
4903 int i;
4904 int max_core_id = 0;
4905 int max_package_id = 0;
6de68fe1 4906 int max_die_id = 0;
c98d5d94 4907 int max_siblings = 0;
c98d5d94
LB		 4908
4909 /* Initialize num_cpus, max_cpu_num */
843c5791 4910 set_max_cpu_num();
c98d5d94 4911 topo.num_cpus = 0;
c98d5d94
LB		 4912 for_all_proc_cpus(count_cpus);
4913 if (!summary_only && topo.num_cpus > 1)
812db3f7 4914 BIC_PRESENT(BIC_CPU);
c98d5d94 4915
d8af6f5f 4916 if (debug > 1)
b7d8c148 4917 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
c98d5d94
LB		 4918
4919 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 4920 if (cpus == NULL)
4921 err(1, "calloc cpus");
c98d5d94
LB		 4922
4923 /*
4924 * Allocate and initialize cpu_present_set
4925 */
4926 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4927 if (cpu_present_set == NULL)
4928 err(3, "CPU_ALLOC");
c98d5d94
LB		 4929 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4930 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4931 for_all_proc_cpus(mark_cpu_present);
4932
1ef7d21a
LB		 4933 /*
4934 * Validate that all cpus in cpu_subset are also in cpu_present_set
4935 */
4936 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4937 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4938 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4939 err(1, "cpu%d not present", i);
4940 }
4941
c98d5d94
LB		 4942 /*
4943 * Allocate and initialize cpu_affinity_set
4944 */
4945 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4946 if (cpu_affinity_set == NULL)
4947 err(3, "CPU_ALLOC");
c98d5d94
LB		 4948 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4949 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4950
8cb48b32 4951 for_all_proc_cpus(init_thread_id);
c98d5d94
LB		 4952
4953 /*
4954 * For online cpus
4955 * find max_core_id, max_package_id
4956 */
4957 for (i = 0; i <= topo.max_cpu_num; ++i) {
4958 int siblings;
4959
4960 if (cpu_is_not_present(i)) {
d8af6f5f 4961 if (debug > 1)
b7d8c148 4962 fprintf(outf, "cpu%d NOT PRESENT\n", i);
c98d5d94
LB		 4963 continue;
4964 }
c98d5d94 4965
0e2d8f05
LB		 4966 cpus[i].logical_cpu_id = i;
4967
4968 /* get package information */
c98d5d94
LB		 4969 cpus[i].physical_package_id = get_physical_package_id(i);
4970 if (cpus[i].physical_package_id > max_package_id)
4971 max_package_id = cpus[i].physical_package_id;
4972
6de68fe1
LB		 4973 /* get die information */
4974 cpus[i].die_id = get_die_id(i);
4975 if (cpus[i].die_id > max_die_id)
4976 max_die_id = cpus[i].die_id;
4977
0e2d8f05 4978 /* get numa node information */
ef605741
PB		 4979 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4980 if (cpus[i].physical_node_id > topo.max_node_num)
4981 topo.max_node_num = cpus[i].physical_node_id;
0e2d8f05
LB		 4982
4983 /* get core information */
4984 cpus[i].physical_core_id = get_core_id(i);
4985 if (cpus[i].physical_core_id > max_core_id)
4986 max_core_id = cpus[i].physical_core_id;
4987
4988 /* get thread information */
4989 siblings = get_thread_siblings(&cpus[i]);
c98d5d94
LB		 4990 if (siblings > max_siblings)
4991 max_siblings = siblings;
4f206a0f 4992 if (cpus[i].thread_id == 0)
8cb48b32 4993 topo.num_cores++;
c98d5d94 4994 }
ef605741 4995
70a9c6e8 4996 topo.cores_per_node = max_core_id + 1;
d8af6f5f 4997 if (debug > 1)
b7d8c148 4998 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
70a9c6e8
PB		 4999 max_core_id, topo.cores_per_node);
5000 if (!summary_only && topo.cores_per_node > 1)
812db3f7 5001 BIC_PRESENT(BIC_Core);
c98d5d94 5002
6de68fe1
LB		 5003 topo.num_die = max_die_id + 1;
5004 if (debug > 1)
5005 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5006 max_die_id, topo.num_die);
5007 if (!summary_only && topo.num_die > 1)
5008 BIC_PRESENT(BIC_Die);
5009
c98d5d94 5010 topo.num_packages = max_package_id + 1;
d8af6f5f 5011 if (debug > 1)
b7d8c148 5012 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
c98d5d94 5013 max_package_id, topo.num_packages);
7da6e3e2 5014 if (!summary_only && topo.num_packages > 1)
812db3f7 5015 BIC_PRESENT(BIC_Package);
c98d5d94 5016
ef605741
PB		 5017 set_node_data();
5018 if (debug > 1)
70a9c6e8 5019 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
01235041
PB		 5020 if (!summary_only && topo.nodes_per_pkg > 1)
5021 BIC_PRESENT(BIC_Node);
ef605741 5022
70a9c6e8 5023 topo.threads_per_core = max_siblings;
d8af6f5f 5024 if (debug > 1)
b7d8c148 5025 fprintf(outf, "max_siblings %d\n", max_siblings);
2ffbb224
PB		 5026
5027 if (debug < 1)
5028 return;
5029
5030 for (i = 0; i <= topo.max_cpu_num; ++i) {
0ec712e3
LB		 5031 if (cpu_is_not_present(i))
5032 continue;
2ffbb224 5033 fprintf(outf,
6de68fe1
LB		 5034 "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5035 i, cpus[i].physical_package_id, cpus[i].die_id,
2ffbb224
PB		 5036 cpus[i].physical_node_id,
5037 cpus[i].logical_node_id,
5038 cpus[i].physical_core_id,
5039 cpus[i].thread_id);
5040 }
5041
c98d5d94
LB		 5042}
5043
5044void
40f5cfe7
PB		 5045allocate_counters(struct thread_data **t, struct core_data **c,
5046 struct pkg_data **p)
c98d5d94
LB		 5047{
5048 int i;
40f5cfe7
PB		 5049 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5050 topo.num_packages;
5051 int num_threads = topo.threads_per_core * num_cores;
c98d5d94 5052
40f5cfe7 5053 *t = calloc(num_threads, sizeof(struct thread_data));
c98d5d94
LB		 5054 if (*t == NULL)
5055 goto error;
5056
40f5cfe7 5057 for (i = 0; i < num_threads; i++)
c98d5d94
LB		 5058 (*t)[i].cpu_id = -1;
5059
40f5cfe7 5060 *c = calloc(num_cores, sizeof(struct core_data));
c98d5d94
LB		 5061 if (*c == NULL)
5062 goto error;
5063
40f5cfe7 5064 for (i = 0; i < num_cores; i++)
c98d5d94
LB		 5065 (*c)[i].core_id = -1;
5066
678a3bd1 5067 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
c98d5d94
LB		 5068 if (*p == NULL)
5069 goto error;
5070
5071 for (i = 0; i < topo.num_packages; i++)
5072 (*p)[i].package_id = i;
5073
5074 return;
5075error:
b2c95d90 5076 err(1, "calloc counters");
c98d5d94
LB		 5077}
5078/*
5079 * init_counter()
5080 *
c98d5d94 5081 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
c98d5d94
LB		 5082 */
5083void init_counter(struct thread_data *thread_base, struct core_data *core_base,
8cb48b32 5084 struct pkg_data *pkg_base, int cpu_id)
c98d5d94 5085{
8cb48b32 5086 int pkg_id = cpus[cpu_id].physical_package_id;
40f5cfe7 5087 int node_id = cpus[cpu_id].logical_node_id;
8cb48b32
PB		 5088 int core_id = cpus[cpu_id].physical_core_id;
5089 int thread_id = cpus[cpu_id].thread_id;
c98d5d94
LB		 5090 struct thread_data *t;
5091 struct core_data *c;
5092 struct pkg_data *p;
5093
42dd4520
NC		 5094
5095 /* Workaround for systems where physical_node_id==-1
5096 * and logical_node_id==(-1 - topo.num_cpus)
5097 */
5098 if (node_id < 0)
5099 node_id = 0;
5100
40f5cfe7
PB		 5101 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5102 c = GET_CORE(core_base, core_id, node_id, pkg_id);
8cb48b32 5103 p = GET_PKG(pkg_base, pkg_id);
c98d5d94
LB		 5104
5105 t->cpu_id = cpu_id;
8cb48b32 5106 if (thread_id == 0) {
c98d5d94
LB		 5107 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5108 if (cpu_is_first_core_in_package(cpu_id))
5109 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5110 }
5111
8cb48b32
PB		 5112 c->core_id = core_id;
5113 p->package_id = pkg_id;
c98d5d94
LB		 5114}
5115
5116
5117int initialize_counters(int cpu_id)
5118{
8cb48b32
PB		 5119 init_counter(EVEN_COUNTERS, cpu_id);
5120 init_counter(ODD_COUNTERS, cpu_id);
c98d5d94
LB		 5121 return 0;
5122}
5123
5124void allocate_output_buffer()
5125{
3b4d5c7f 5126 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 5127 outp = output_buffer;
b2c95d90
JT		 5128 if (outp == NULL)
5129 err(-1, "calloc output buffer");
c98d5d94 5130}
36229897
LB		 5131void allocate_fd_percpu(void)
5132{
01a67adf 5133 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
36229897
LB		 5134 if (fd_percpu == NULL)
5135 err(-1, "calloc fd_percpu");
5136}
562a2d37
LB		 5137void allocate_irq_buffers(void)
5138{
5139 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5140 if (irq_column_2_cpu == NULL)
5141 err(-1, "calloc %d", topo.num_cpus);
c98d5d94 5142
01a67adf 5143 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
562a2d37 5144 if (irqs_per_cpu == NULL)
01a67adf 5145 err(-1, "calloc %d", topo.max_cpu_num + 1);
562a2d37 5146}
c98d5d94
LB		 5147void setup_all_buffers(void)
5148{
5149 topology_probe();
562a2d37 5150 allocate_irq_buffers();
36229897 5151 allocate_fd_percpu();
c98d5d94
LB		 5152 allocate_counters(&thread_even, &core_even, &package_even);
5153 allocate_counters(&thread_odd, &core_odd, &package_odd);
5154 allocate_output_buffer();
5155 for_all_proc_cpus(initialize_counters);
5156}
3b4d5c7f 5157
7ce7d5de
PB		 5158void set_base_cpu(void)
5159{
5160 base_cpu = sched_getcpu();
5161 if (base_cpu < 0)
5162 err(-ENODEV, "No valid cpus found");
5163
5164 if (debug > 1)
b7d8c148 5165 fprintf(outf, "base_cpu = %d\n", base_cpu);
7ce7d5de
PB		 5166}
5167
103a8fea
LB		 5168void turbostat_init()
5169{
7ce7d5de
PB		 5170 setup_all_buffers();
5171 set_base_cpu();
103a8fea 5172 check_dev_msr();
98481e79 5173 check_permissions();
fcd17211 5174 process_cpuid();
103a8fea 5175
103a8fea 5176
96e47158 5177 if (!quiet)
7f5c258e
LB		 5178 for_all_cpus(print_hwp, ODD_COUNTERS);
5179
96e47158 5180 if (!quiet)
889facbe
LB		 5181 for_all_cpus(print_epb, ODD_COUNTERS);
5182
96e47158 5183 if (!quiet)
3a9a941d
LB		 5184 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5185
96e47158 5186 if (!quiet)
889facbe
LB		 5187 for_all_cpus(print_rapl, ODD_COUNTERS);
5188
5189 for_all_cpus(set_temperature_target, ODD_COUNTERS);
5190
96e47158 5191 if (!quiet)
889facbe 5192 for_all_cpus(print_thermal, ODD_COUNTERS);
5a63426e 5193
96e47158 5194 if (!quiet && do_irtl_snb)
5a63426e 5195 print_irtl();
103a8fea
LB		 5196}
5197
5198int fork_it(char **argv)
5199{
103a8fea 5200 pid_t child_pid;
d91bb17c 5201 int status;
d15cf7c1 5202
218f0e8d 5203 snapshot_proc_sysfs_files();
d91bb17c 5204 status = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 5205 first_counter_read = 0;
d91bb17c
LB		 5206 if (status)
5207 exit(status);
c98d5d94
LB		 5208 /* clear affinity side-effect of get_counters() */
5209 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 5210 gettimeofday(&tv_even, (struct timezone *)NULL);
5211
5212 child_pid = fork();
5213 if (!child_pid) {
5214 /* child */
5215 execvp(argv[0], argv);
0815a3d0 5216 err(errno, "exec %s", argv[0]);
103a8fea 5217 } else {
103a8fea
LB		 5218
5219 /* parent */
b2c95d90
JT		 5220 if (child_pid == -1)
5221 err(1, "fork");
103a8fea
LB		 5222
5223 signal(SIGINT, SIG_IGN);
5224 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 5225 if (waitpid(child_pid, &status, 0) == -1)
5226 err(status, "waitpid");
2a954966
DA		 5227
5228 if (WIFEXITED(status))
5229 status = WEXITSTATUS(status);
103a8fea 5230 }
c98d5d94
LB		 5231 /*
5232 * n.b. fork_it() does not check for errors from for_all_cpus()
5233 * because re-starting is problematic when forking
5234 */
218f0e8d 5235 snapshot_proc_sysfs_files();
c98d5d94 5236 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 5237 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 5238 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 5239 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5240 fprintf(outf, "%s: Counter reset detected\n", progname);
5241 else {
5242 compute_average(EVEN_COUNTERS);
5243 format_all_counters(EVEN_COUNTERS);
5244 }
103a8fea 5245
b7d8c148
LB		 5246 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5247
5248 flush_output_stderr();
103a8fea 5249
d91bb17c 5250 return status;
103a8fea
LB		 5251}
5252
3b4d5c7f
AS		 5253int get_and_dump_counters(void)
5254{
5255 int status;
5256
218f0e8d 5257 snapshot_proc_sysfs_files();
3b4d5c7f
AS		 5258 status = for_all_cpus(get_counters, ODD_COUNTERS);
5259 if (status)
5260 return status;
5261
5262 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5263 if (status)
5264 return status;
5265
b7d8c148 5266 flush_output_stdout();
3b4d5c7f
AS		 5267
5268 return status;
5269}
5270
d8af6f5f 5271void print_version() {
0f71d089 5272 fprintf(outf, "turbostat version 19.03.20"
d8af6f5f
LB		 5273 " - Len Brown <lenb@kernel.org>\n");
5274}
5275
495c7654
LB		 5276int add_counter(unsigned int msr_num, char *path, char *name,
5277 unsigned int width, enum counter_scope scope,
41618e63 5278 enum counter_type type, enum counter_format format, int flags)
388e9c81
LB		 5279{
5280 struct msr_counter *msrp;
5281
5282 msrp = calloc(1, sizeof(struct msr_counter));
5283 if (msrp == NULL) {
5284 perror("calloc");
5285 exit(1);
5286 }
5287
5288 msrp->msr_num = msr_num;
5289 strncpy(msrp->name, name, NAME_BYTES);
495c7654
LB		 5290 if (path)
5291 strncpy(msrp->path, path, PATH_BYTES);
388e9c81
LB		 5292 msrp->width = width;
5293 msrp->type = type;
5294 msrp->format = format;
41618e63 5295 msrp->flags = flags;
388e9c81
LB		 5296
5297 switch (scope) {
5298
5299 case SCOPE_CPU:
388e9c81
LB		 5300 msrp->next = sys.tp;
5301 sys.tp = msrp;
678a3bd1 5302 sys.added_thread_counters++;
0748eaf0 5303 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
678a3bd1
LB		 5304 fprintf(stderr, "exceeded max %d added thread counters\n",
5305 MAX_ADDED_COUNTERS);
5306 exit(-1);
5307 }
388e9c81
LB		 5308 break;
5309
5310 case SCOPE_CORE:
388e9c81
LB		 5311 msrp->next = sys.cp;
5312 sys.cp = msrp;
678a3bd1
LB		 5313 sys.added_core_counters++;
5314 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5315 fprintf(stderr, "exceeded max %d added core counters\n",
5316 MAX_ADDED_COUNTERS);
5317 exit(-1);
5318 }
388e9c81
LB		 5319 break;
5320
5321 case SCOPE_PACKAGE:
388e9c81
LB		 5322 msrp->next = sys.pp;
5323 sys.pp = msrp;
678a3bd1
LB		 5324 sys.added_package_counters++;
5325 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5326 fprintf(stderr, "exceeded max %d added package counters\n",
5327 MAX_ADDED_COUNTERS);
5328 exit(-1);
5329 }
388e9c81
LB		 5330 break;
5331 }
5332
5333 return 0;
5334}
5335
5336void parse_add_command(char *add_command)
5337{
5338 int msr_num = 0;
495c7654 5339 char *path = NULL;
0f47c08d 5340 char name_buffer[NAME_BYTES] = "";
388e9c81
LB		 5341 int width = 64;
5342 int fail = 0;
5343 enum counter_scope scope = SCOPE_CPU;
5344 enum counter_type type = COUNTER_CYCLES;
5345 enum counter_format format = FORMAT_DELTA;
5346
5347 while (add_command) {
5348
5349 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5350 goto next;
5351
5352 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5353 goto next;
5354
495c7654
LB		 5355 if (*add_command == '/') {
5356 path = add_command;
5357 goto next;
5358 }
5359
388e9c81
LB		 5360 if (sscanf(add_command, "u%d", &width) == 1) {
5361 if ((width == 32) || (width == 64))
5362 goto next;
5363 width = 64;
5364 }
5365 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5366 scope = SCOPE_CPU;
5367 goto next;
5368 }
5369 if (!strncmp(add_command, "core", strlen("core"))) {
5370 scope = SCOPE_CORE;
5371 goto next;
5372 }
5373 if (!strncmp(add_command, "package", strlen("package"))) {
5374 scope = SCOPE_PACKAGE;
5375 goto next;
5376 }
5377 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5378 type = COUNTER_CYCLES;
5379 goto next;
5380 }
5381 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5382 type = COUNTER_SECONDS;
5383 goto next;
5384 }
41618e63
LB		 5385 if (!strncmp(add_command, "usec", strlen("usec"))) {
5386 type = COUNTER_USEC;
5387 goto next;
5388 }
388e9c81
LB		 5389 if (!strncmp(add_command, "raw", strlen("raw"))) {
5390 format = FORMAT_RAW;
5391 goto next;
5392 }
5393 if (!strncmp(add_command, "delta", strlen("delta"))) {
5394 format = FORMAT_DELTA;
5395 goto next;
5396 }
5397 if (!strncmp(add_command, "percent", strlen("percent"))) {
5398 format = FORMAT_PERCENT;
5399 goto next;
5400 }
5401
5402 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5403 char *eos;
5404
5405 eos = strchr(name_buffer, ',');
5406 if (eos)
5407 *eos = '\0';
5408 goto next;
5409 }
5410
5411next:
5412 add_command = strchr(add_command, ',');
495c7654
LB		 5413 if (add_command) {
5414 *add_command = '\0';
388e9c81 5415 add_command++;
495c7654 5416 }
388e9c81
LB		 5417
5418 }
495c7654
LB		 5419 if ((msr_num == 0) && (path == NULL)) {
5420 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
388e9c81
LB		 5421 fail++;
5422 }
5423
5424 /* generate default column header */
5425 if (*name_buffer == '\0') {
5f3aea57
LB		 5426 if (width == 32)
5427 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5428 else
5429 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
388e9c81
LB		 5430 }
5431
41618e63 5432 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
388e9c81
LB		 5433 fail++;
5434
5435 if (fail) {
5436 help();
5437 exit(1);
5438 }
5439}
41618e63 5440
dd778a5e
LB		 5441int is_deferred_skip(char *name)
5442{
5443 int i;
5444
5445 for (i = 0; i < deferred_skip_index; ++i)
5446 if (!strcmp(name, deferred_skip_names[i]))
5447 return 1;
5448 return 0;
5449}
5450
41618e63
LB		 5451void probe_sysfs(void)
5452{
5453 char path[64];
5454 char name_buf[16];
5455 FILE *input;
5456 int state;
5457 char *sp;
5458
5459 if (!DO_BIC(BIC_sysfs))
5460 return;
5461
0748eaf0 5462 for (state = 10; state >= 0; --state) {
41618e63
LB		 5463
5464 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5465 base_cpu, state);
5466 input = fopen(path, "r");
5467 if (input == NULL)
5468 continue;
8173c336
BH		 5469 if (!fgets(name_buf, sizeof(name_buf), input))
5470 err(1, "%s: failed to read file", path);
41618e63
LB		 5471
5472 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5473 sp = strchr(name_buf, '-');
5474 if (!sp)
5475 sp = strchrnul(name_buf, '\n');
5476 *sp = '%';
5477 *(sp + 1) = '\0';
5478
5479 fclose(input);
5480
5481 sprintf(path, "cpuidle/state%d/time", state);
5482
dd778a5e
LB		 5483 if (is_deferred_skip(name_buf))
5484 continue;
5485
41618e63
LB		 5486 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5487 FORMAT_PERCENT, SYSFS_PERCPU);
5488 }
5489
0748eaf0 5490 for (state = 10; state >= 0; --state) {
41618e63
LB		 5491
5492 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5493 base_cpu, state);
5494 input = fopen(path, "r");
5495 if (input == NULL)
5496 continue;
8173c336
BH		 5497 if (!fgets(name_buf, sizeof(name_buf), input))
5498 err(1, "%s: failed to read file", path);
41618e63
LB		 5499 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5500 sp = strchr(name_buf, '-');
5501 if (!sp)
5502 sp = strchrnul(name_buf, '\n');
5503 *sp = '\0';
5504 fclose(input);
5505
5506 sprintf(path, "cpuidle/state%d/usage", state);
5507
dd778a5e
LB		 5508 if (is_deferred_skip(name_buf))
5509 continue;
5510
41618e63
LB		 5511 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5512 FORMAT_DELTA, SYSFS_PERCPU);
5513 }
5514
5515}
5516
1ef7d21a
LB		 5517
5518/*
5519 * parse cpuset with following syntax
5520 * 1,2,4..6,8-10 and set bits in cpu_subset
5521 */
5522void parse_cpu_command(char *optarg)
5523{
5524 unsigned int start, end;
5525 char *next;
5526
4e4e1e7c
LB		 5527 if (!strcmp(optarg, "core")) {
5528 if (cpu_subset)
5529 goto error;
5530 show_core_only++;
5531 return;
5532 }
5533 if (!strcmp(optarg, "package")) {
5534 if (cpu_subset)
5535 goto error;
5536 show_pkg_only++;
5537 return;
5538 }
5539 if (show_core_only || show_pkg_only)
5540 goto error;
5541
1ef7d21a
LB		 5542 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5543 if (cpu_subset == NULL)
5544 err(3, "CPU_ALLOC");
5545 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5546
5547 CPU_ZERO_S(cpu_subset_size, cpu_subset);
5548
5549 next = optarg;
5550
5551 while (next && *next) {
5552
5553 if (*next == '-') /* no negative cpu numbers */
5554 goto error;
5555
5556 start = strtoul(next, &next, 10);
5557
5558 if (start >= CPU_SUBSET_MAXCPUS)
5559 goto error;
5560 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5561
5562 if (*next == '\0')
5563 break;
5564
5565 if (*next == ',') {
5566 next += 1;
5567 continue;
5568 }
5569
5570 if (*next == '-') {
5571 next += 1; /* start range */
5572 } else if (*next == '.') {
5573 next += 1;
5574 if (*next == '.')
5575 next += 1; /* start range */
5576 else
5577 goto error;
5578 }
5579
5580 end = strtoul(next, &next, 10);
5581 if (end <= start)
5582 goto error;
5583
5584 while (++start <= end) {
5585 if (start >= CPU_SUBSET_MAXCPUS)
5586 goto error;
5587 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5588 }
5589
5590 if (*next == ',')
5591 next += 1;
5592 else if (*next != '\0')
5593 goto error;
5594 }
5595
5596 return;
5597
5598error:
4e4e1e7c
LB		 5599 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5600 help();
1ef7d21a
LB		 5601 exit(-1);
5602}
5603
812db3f7 5604
103a8fea
LB		 5605void cmdline(int argc, char **argv)
5606{
5607 int opt;
d8af6f5f
LB		 5608 int option_index = 0;
5609 static struct option long_options[] = {
388e9c81 5610 {"add", required_argument, 0, 'a'},
1ef7d21a 5611 {"cpu", required_argument, 0, 'c'},
d8af6f5f 5612 {"Dump", no_argument, 0, 'D'},
96e47158 5613 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
3f44a5c6 5614 {"enable", required_argument, 0, 'e'},
d8af6f5f 5615 {"interval", required_argument, 0, 'i'},
023fe0ac 5616 {"num_iterations", required_argument, 0, 'n'},
d8af6f5f 5617 {"help", no_argument, 0, 'h'},
812db3f7 5618 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
d8af6f5f 5619 {"Joules", no_argument, 0, 'J'},
c8ade361 5620 {"list", no_argument, 0, 'l'},
b7d8c148 5621 {"out", required_argument, 0, 'o'},
96e47158 5622 {"quiet", no_argument, 0, 'q'},
812db3f7 5623 {"show", required_argument, 0, 's'},
d8af6f5f
LB		 5624 {"Summary", no_argument, 0, 'S'},
5625 {"TCC", required_argument, 0, 'T'},
5626 {"version", no_argument, 0, 'v' },
5627 {0, 0, 0, 0 }
5628 };
103a8fea
LB		 5629
5630 progname = argv[0];
5631
023fe0ac 5632 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
d8af6f5f 5633 long_options, &option_index)) != -1) {
103a8fea 5634 switch (opt) {
388e9c81
LB		 5635 case 'a':
5636 parse_add_command(optarg);
5637 break;
1ef7d21a
LB		 5638 case 'c':
5639 parse_cpu_command(optarg);
5640 break;
d8af6f5f 5641 case 'D':
3b4d5c7f
AS		 5642 dump_only++;
5643 break;
3f44a5c6
LB		 5644 case 'e':
5645 /* --enable specified counter */
4c2122d4 5646 bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
3f44a5c6 5647 break;
d8af6f5f
LB		 5648 case 'd':
5649 debug++;
3f44a5c6 5650 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
103a8fea 5651 break;
812db3f7 5652 case 'H':
3f44a5c6
LB		 5653 /*
5654 * --hide: do not show those specified
5655 * multiple invocations simply clear more bits in enabled mask
5656 */
5657 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
812db3f7 5658 break;
d8af6f5f
LB		 5659 case 'h':
5660 default:
5661 help();
5662 exit(1);
103a8fea 5663 case 'i':
2a0609c0
LB		 5664 {
5665 double interval = strtod(optarg, NULL);
5666
5667 if (interval < 0.001) {
b7d8c148 5668 fprintf(outf, "interval %f seconds is too small\n",
2a0609c0
LB		 5669 interval);
5670 exit(2);
5671 }
5672
47936f94 5673 interval_tv.tv_sec = interval_ts.tv_sec = interval;
b9ad8ee0 5674 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
47936f94 5675 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
2a0609c0 5676 }
103a8fea 5677 break;
d8af6f5f
LB		 5678 case 'J':
5679 rapl_joules++;
8e180f3c 5680 break;
c8ade361 5681 case 'l':
3f44a5c6 5682 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
c8ade361
LB		 5683 list_header_only++;
5684 quiet++;
5685 break;
b7d8c148
LB		 5686 case 'o':
5687 outf = fopen_or_die(optarg, "w");
5688 break;
96e47158
LB		 5689 case 'q':
5690 quiet = 1;
5691 break;
023fe0ac
CY		 5692 case 'n':
5693 num_iterations = strtod(optarg, NULL);
5694
5695 if (num_iterations <= 0) {
5696 fprintf(outf, "iterations %d should be positive number\n",
5697 num_iterations);
5698 exit(2);
5699 }
5700 break;
812db3f7 5701 case 's':
3f44a5c6
LB		 5702 /*
5703 * --show: show only those specified
5704 * The 1st invocation will clear and replace the enabled mask
5705 * subsequent invocations can add to it.
5706 */
5707 if (shown == 0)
5708 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5709 else
5710 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5711 shown = 1;
812db3f7 5712 break;
d8af6f5f
LB		 5713 case 'S':
5714 summary_only++;
889facbe
LB		 5715 break;
5716 case 'T':
5717 tcc_activation_temp_override = atoi(optarg);
5718 break;
d8af6f5f
LB		 5719 case 'v':
5720 print_version();
5721 exit(0);
5c56be9a 5722 break;
103a8fea
LB		 5723 }
5724 }
5725}
5726
5727int main(int argc, char **argv)
5728{
b7d8c148 5729 outf = stderr;
103a8fea
LB		 5730 cmdline(argc, argv);
5731
96e47158 5732 if (!quiet)
d8af6f5f 5733 print_version();
103a8fea 5734
41618e63
LB		 5735 probe_sysfs();
5736
103a8fea
LB		 5737 turbostat_init();
5738
3b4d5c7f
AS		 5739 /* dump counters and exit */
5740 if (dump_only)
5741 return get_and_dump_counters();
5742
c8ade361
LB		 5743 /* list header and exit */
5744 if (list_header_only) {
5745 print_header(",");
5746 flush_output_stdout();
5747 return 0;
5748 }
5749
103a8fea
LB		 5750 /*
5751 * if any params left, it must be a command to fork
5752 */
5753 if (argc - optind)
5754 return fork_it(argv + optind);
5755 else
5756 turbostat_loop();
5757
5758 return 0;
5759}
Linux 6.x block layer and io_uring tree(s)