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tools/power turbostat: Support Alder Lake Mobile
[linux-block.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
a61127c2 1// SPDX-License-Identifier: GPL-2.0-only
103a8fea
LB		 2/*
3 * turbostat -- show CPU frequency and C-state residency
34041551 4 * on modern Intel and AMD processors.
103a8fea 5 *
144b44b1 6 * Copyright (c) 2013 Intel Corporation.
103a8fea 7 * Len Brown <len.brown@intel.com>
103a8fea
LB		 8 */
9
88c3281f 10#define _GNU_SOURCE
b731f311 11#include MSRHEADER
869ce69e 12#include INTEL_FAMILY_HEADER
95aebc44 13#include <stdarg.h>
103a8fea 14#include <stdio.h>
b2c95d90 15#include <err.h>
103a8fea
LB		 16#include <unistd.h>
17#include <sys/types.h>
18#include <sys/wait.h>
19#include <sys/stat.h>
b9ad8ee0 20#include <sys/select.h>
103a8fea
LB		 21#include <sys/resource.h>
22#include <fcntl.h>
23#include <signal.h>
24#include <sys/time.h>
25#include <stdlib.h>
d8af6f5f 26#include <getopt.h>
103a8fea
LB		 27#include <dirent.h>
28#include <string.h>
29#include <ctype.h>
88c3281f 30#include <sched.h>
2a0609c0 31#include <time.h>
2b92865e 32#include <cpuid.h>
fcaa681c 33#include <sys/capability.h>
98481e79 34#include <errno.h>
9392bd98 35#include <math.h>
2af4f9b8
LB		 36#include <linux/perf_event.h>
37#include <asm/unistd.h>
103a8fea 38
103a8fea 39char *proc_stat = "/proc/stat";
b7d8c148 40FILE *outf;
36229897 41int *fd_percpu;
2af4f9b8 42int *fd_instr_count_percpu;
b9ad8ee0 43struct timeval interval_tv = {5, 0};
47936f94 44struct timespec interval_ts = {5, 0};
023fe0ac 45unsigned int num_iterations;
d8af6f5f 46unsigned int debug;
96e47158 47unsigned int quiet;
3f44a5c6 48unsigned int shown;
0de6c0df 49unsigned int sums_need_wide_columns;
d8af6f5f
LB		 50unsigned int rapl_joules;
51unsigned int summary_only;
c8ade361 52unsigned int list_header_only;
d8af6f5f 53unsigned int dump_only;
103a8fea 54unsigned int do_snb_cstates;
fb5d4327 55unsigned int do_knl_cstates;
144b44b1
LB		 56unsigned int do_slm_cstates;
57unsigned int use_c1_residency_msr;
103a8fea 58unsigned int has_aperf;
889facbe 59unsigned int has_epb;
5a63426e
LB		 60unsigned int do_irtl_snb;
61unsigned int do_irtl_hsw;
fc04cc67 62unsigned int units = 1000000; /* MHz etc */
103a8fea 63unsigned int genuine_intel;
34041551 64unsigned int authentic_amd;
c1c10cc7 65unsigned int hygon_genuine;
34041551 66unsigned int max_level, max_extended_level;
103a8fea 67unsigned int has_invariant_tsc;
d7899447 68unsigned int do_nhm_platform_info;
cf4cbe53 69unsigned int no_MSR_MISC_PWR_MGMT;
b2b34dfe 70unsigned int aperf_mperf_multiplier = 1;
103a8fea 71double bclk;
a2b7b749 72double base_hz;
21ed5574 73unsigned int has_base_hz;
a2b7b749 74double tsc_tweak = 1.0;
c98d5d94
LB		 75unsigned int show_pkg_only;
76unsigned int show_core_only;
77char *output_buffer, *outp;
889facbe
LB		 78unsigned int do_rapl;
79unsigned int do_dts;
80unsigned int do_ptm;
2af4f9b8 81unsigned int do_ipc;
fdf676e5 82unsigned long long gfx_cur_rc6_ms;
be0e54c4
LB		 83unsigned long long cpuidle_cur_cpu_lpi_us;
84unsigned long long cpuidle_cur_sys_lpi_us;
27d47356 85unsigned int gfx_cur_mhz;
b4b91569 86unsigned int gfx_act_mhz;
889facbe
LB		 87unsigned int tcc_activation_temp;
88unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 89double rapl_power_units, rapl_time_units;
90double rapl_dram_energy_units, rapl_energy_units;
889facbe 91double rapl_joule_counter_range;
3a9a941d 92unsigned int do_core_perf_limit_reasons;
ac980e13 93unsigned int has_automatic_cstate_conversion;
3a9a941d
LB		 94unsigned int do_gfx_perf_limit_reasons;
95unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 96unsigned int crystal_hz;
97unsigned long long tsc_hz;
7ce7d5de 98int base_cpu;
21ed5574 99double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 100unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
101 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
102unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
103unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
104unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
105unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
33148d67 106unsigned int has_misc_feature_control;
4c2122d4 107unsigned int first_counter_read = 1;
c026c236 108int ignore_stdin;
889facbe 109
e6f9bb3c
LB		 110#define RAPL_PKG (1 << 0)
111 /* 0x610 MSR_PKG_POWER_LIMIT */
112 /* 0x611 MSR_PKG_ENERGY_STATUS */
113#define RAPL_PKG_PERF_STATUS (1 << 1)
114 /* 0x613 MSR_PKG_PERF_STATUS */
115#define RAPL_PKG_POWER_INFO (1 << 2)
116 /* 0x614 MSR_PKG_POWER_INFO */
117
118#define RAPL_DRAM (1 << 3)
119 /* 0x618 MSR_DRAM_POWER_LIMIT */
120 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 121#define RAPL_DRAM_PERF_STATUS (1 << 4)
122 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 123#define RAPL_DRAM_POWER_INFO (1 << 5)
124 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 125
9148494c 126#define RAPL_CORES_POWER_LIMIT (1 << 6)
e6f9bb3c 127 /* 0x638 MSR_PP0_POWER_LIMIT */
0b2bb692 128#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 129 /* 0x63a MSR_PP0_POLICY */
130
0b2bb692 131#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 132 /* 0x640 MSR_PP1_POWER_LIMIT */
133 /* 0x641 MSR_PP1_ENERGY_STATUS */
134 /* 0x642 MSR_PP1_POLICY */
9148494c
JP		 135
136#define RAPL_CORES_ENERGY_STATUS (1 << 9)
137 /* 0x639 MSR_PP0_ENERGY_STATUS */
9392bd98
CW		 138#define RAPL_PER_CORE_ENERGY (1 << 10)
139 /* Indicates cores energy collection is per-core,
140 * not per-package. */
141#define RAPL_AMD_F17H (1 << 11)
142 /* 0xc0010299 MSR_RAPL_PWR_UNIT */
143 /* 0xc001029a MSR_CORE_ENERGY_STAT */
144 /* 0xc001029b MSR_PKG_ENERGY_STAT */
9148494c 145#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
889facbe
LB		 146#define TJMAX_DEFAULT 100
147
9392bd98
CW		 148/* MSRs that are not yet in the kernel-provided header. */
149#define MSR_RAPL_PWR_UNIT 0xc0010299
150#define MSR_CORE_ENERGY_STAT 0xc001029a
151#define MSR_PKG_ENERGY_STAT 0xc001029b
152
889facbe 153#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea 154
388e9c81
LB		 155/*
156 * buffer size used by sscanf() for added column names
157 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
158 */
159#define NAME_BYTES 20
495c7654 160#define PATH_BYTES 128
388e9c81 161
103a8fea
LB		 162int backwards_count;
163char *progname;
103a8fea 164
1ef7d21a
LB		 165#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
166cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
167size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
0748eaf0
LB		 168#define MAX_ADDED_COUNTERS 8
169#define MAX_ADDED_THREAD_COUNTERS 24
0e2d8f05 170#define BITMASK_SIZE 32
c98d5d94
LB		 171
172struct thread_data {
f4fdf2b4
LB		 173 struct timeval tv_begin;
174 struct timeval tv_end;
d4794f25 175 struct timeval tv_delta;
c98d5d94
LB		 176 unsigned long long tsc;
177 unsigned long long aperf;
178 unsigned long long mperf;
144b44b1 179 unsigned long long c1;
2af4f9b8 180 unsigned long long instr_count;
0de6c0df 181 unsigned long long irq_count;
1ed51011 182 unsigned int smi_count;
c98d5d94 183 unsigned int cpu_id;
4c2122d4
LB		 184 unsigned int apic_id;
185 unsigned int x2apic_id;
c98d5d94
LB		 186 unsigned int flags;
187#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
188#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
0748eaf0 189 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
c98d5d94
LB		 190} *thread_even, *thread_odd;
191
192struct core_data {
193 unsigned long long c3;
194 unsigned long long c6;
195 unsigned long long c7;
0539ba11 196 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
889facbe 197 unsigned int core_temp_c;
9392bd98 198 unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */
c98d5d94 199 unsigned int core_id;
678a3bd1 200 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 201} *core_even, *core_odd;
202
203struct pkg_data {
204 unsigned long long pc2;
205 unsigned long long pc3;
206 unsigned long long pc6;
207 unsigned long long pc7;
ca58710f
KCA		 208 unsigned long long pc8;
209 unsigned long long pc9;
210 unsigned long long pc10;
be0e54c4
LB		 211 unsigned long long cpu_lpi;
212 unsigned long long sys_lpi;
0b2bb692
LB		 213 unsigned long long pkg_wtd_core_c0;
214 unsigned long long pkg_any_core_c0;
215 unsigned long long pkg_any_gfxe_c0;
216 unsigned long long pkg_both_core_gfxe_c0;
9185e988 217 long long gfx_rc6_ms;
27d47356 218 unsigned int gfx_mhz;
b4b91569 219 unsigned int gfx_act_mhz;
c98d5d94 220 unsigned int package_id;
7c2ccc50
CY		 221 unsigned long long energy_pkg; /* MSR_PKG_ENERGY_STATUS */
222 unsigned long long energy_dram; /* MSR_DRAM_ENERGY_STATUS */
223 unsigned long long energy_cores; /* MSR_PP0_ENERGY_STATUS */
224 unsigned long long energy_gfx; /* MSR_PP1_ENERGY_STATUS */
225 unsigned long long rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
226 unsigned long long rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
889facbe 227 unsigned int pkg_temp_c;
678a3bd1 228 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 229} *package_even, *package_odd;
230
231#define ODD_COUNTERS thread_odd, core_odd, package_odd
232#define EVEN_COUNTERS thread_even, core_even, package_even
233
40f5cfe7
PB		 234#define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
235 ((thread_base) + \
236 ((pkg_no) * \
237 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
238 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
239 ((core_no) * topo.threads_per_core) + \
240 (thread_no))
241
242#define GET_CORE(core_base, core_no, node_no, pkg_no) \
243 ((core_base) + \
244 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
245 ((node_no) * topo.cores_per_node) + \
246 (core_no))
247
248
c98d5d94
LB		 249#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
250
388e9c81 251enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
41618e63 252enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
388e9c81
LB		 253enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
254
255struct msr_counter {
256 unsigned int msr_num;
257 char name[NAME_BYTES];
495c7654 258 char path[PATH_BYTES];
388e9c81
LB		 259 unsigned int width;
260 enum counter_type type;
261 enum counter_format format;
262 struct msr_counter *next;
812db3f7
LB		 263 unsigned int flags;
264#define FLAGS_HIDE (1 << 0)
265#define FLAGS_SHOW (1 << 1)
41618e63 266#define SYSFS_PERCPU (1 << 1)
388e9c81
LB		 267};
268
87e15da9
CY		 269/*
270 * The accumulated sum of MSR is defined as a monotonic
271 * increasing MSR, it will be accumulated periodically,
272 * despite its register's bit width.
273 */
274enum {
275 IDX_PKG_ENERGY,
276 IDX_DRAM_ENERGY,
277 IDX_PP0_ENERGY,
278 IDX_PP1_ENERGY,
279 IDX_PKG_PERF,
280 IDX_DRAM_PERF,
281 IDX_COUNT,
282};
283
284int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);
285
286struct msr_sum_array {
287 /* get_msr_sum() = sum + (get_msr() - last) */
288 struct {
289 /*The accumulated MSR value is updated by the timer*/
290 unsigned long long sum;
291 /*The MSR footprint recorded in last timer*/
292 unsigned long long last;
293 } entries[IDX_COUNT];
294};
295
296/* The percpu MSR sum array.*/
297struct msr_sum_array *per_cpu_msr_sum;
298
299int idx_to_offset(int idx)
300{
301 int offset;
302
303 switch (idx) {
304 case IDX_PKG_ENERGY:
305 offset = MSR_PKG_ENERGY_STATUS;
306 break;
307 case IDX_DRAM_ENERGY:
308 offset = MSR_DRAM_ENERGY_STATUS;
309 break;
310 case IDX_PP0_ENERGY:
311 offset = MSR_PP0_ENERGY_STATUS;
312 break;
313 case IDX_PP1_ENERGY:
314 offset = MSR_PP1_ENERGY_STATUS;
315 break;
316 case IDX_PKG_PERF:
317 offset = MSR_PKG_PERF_STATUS;
318 break;
319 case IDX_DRAM_PERF:
320 offset = MSR_DRAM_PERF_STATUS;
321 break;
322 default:
323 offset = -1;
324 }
325 return offset;
326}
327
328int offset_to_idx(int offset)
329{
330 int idx;
331
332 switch (offset) {
333 case MSR_PKG_ENERGY_STATUS:
334 idx = IDX_PKG_ENERGY;
335 break;
336 case MSR_DRAM_ENERGY_STATUS:
337 idx = IDX_DRAM_ENERGY;
338 break;
339 case MSR_PP0_ENERGY_STATUS:
340 idx = IDX_PP0_ENERGY;
341 break;
342 case MSR_PP1_ENERGY_STATUS:
343 idx = IDX_PP1_ENERGY;
344 break;
345 case MSR_PKG_PERF_STATUS:
346 idx = IDX_PKG_PERF;
347 break;
348 case MSR_DRAM_PERF_STATUS:
349 idx = IDX_DRAM_PERF;
350 break;
351 default:
352 idx = -1;
353 }
354 return idx;
355}
356
357int idx_valid(int idx)
358{
359 switch (idx) {
360 case IDX_PKG_ENERGY:
361 return do_rapl & RAPL_PKG;
362 case IDX_DRAM_ENERGY:
363 return do_rapl & RAPL_DRAM;
364 case IDX_PP0_ENERGY:
365 return do_rapl & RAPL_CORES_ENERGY_STATUS;
366 case IDX_PP1_ENERGY:
367 return do_rapl & RAPL_GFX;
368 case IDX_PKG_PERF:
369 return do_rapl & RAPL_PKG_PERF_STATUS;
370 case IDX_DRAM_PERF:
371 return do_rapl & RAPL_DRAM_PERF_STATUS;
372 default:
373 return 0;
374 }
375}
388e9c81 376struct sys_counters {
678a3bd1
LB		 377 unsigned int added_thread_counters;
378 unsigned int added_core_counters;
379 unsigned int added_package_counters;
388e9c81
LB		 380 struct msr_counter *tp;
381 struct msr_counter *cp;
382 struct msr_counter *pp;
383} sys;
384
c98d5d94
LB		 385struct system_summary {
386 struct thread_data threads;
387 struct core_data cores;
388 struct pkg_data packages;
388e9c81 389} average;
c98d5d94 390
0e2d8f05
LB		 391struct cpu_topology {
392 int physical_package_id;
6de68fe1 393 int die_id;
0e2d8f05 394 int logical_cpu_id;
ef605741
PB		 395 int physical_node_id;
396 int logical_node_id; /* 0-based count within the package */
0e2d8f05 397 int physical_core_id;
8cb48b32 398 int thread_id;
0e2d8f05
LB		 399 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
400} *cpus;
c98d5d94
LB		 401
402struct topo_params {
403 int num_packages;
6de68fe1 404 int num_die;
c98d5d94
LB		 405 int num_cpus;
406 int num_cores;
407 int max_cpu_num;
ef605741 408 int max_node_num;
70a9c6e8
PB		 409 int nodes_per_pkg;
410 int cores_per_node;
411 int threads_per_core;
c98d5d94
LB		 412} topo;
413
414struct timeval tv_even, tv_odd, tv_delta;
415
562a2d37
LB		 416int *irq_column_2_cpu; /* /proc/interrupts column numbers */
417int *irqs_per_cpu; /* indexed by cpu_num */
418
c98d5d94
LB		 419void setup_all_buffers(void);
420
1f81c5ef
LB		 421char *sys_lpi_file;
422char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
423char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
424
c98d5d94 425int cpu_is_not_present(int cpu)
d15cf7c1 426{
c98d5d94 427 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 428}
88c3281f 429/*
c98d5d94
LB		 430 * run func(thread, core, package) in topology order
431 * skip non-present cpus
88c3281f 432 */
c98d5d94
LB		 433
434int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
435 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 436{
40f5cfe7 437 int retval, pkg_no, core_no, thread_no, node_no;
d15cf7c1 438
c98d5d94 439 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
df2f677d
LB		 440 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
441 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
40f5cfe7
PB		 442 for (thread_no = 0; thread_no <
443 topo.threads_per_core; ++thread_no) {
444 struct thread_data *t;
445 struct core_data *c;
446 struct pkg_data *p;
447
448 t = GET_THREAD(thread_base, thread_no,
449 core_no, node_no,
450 pkg_no);
451
452 if (cpu_is_not_present(t->cpu_id))
453 continue;
454
455 c = GET_CORE(core_base, core_no,
456 node_no, pkg_no);
457 p = GET_PKG(pkg_base, pkg_no);
458
459 retval = func(t, c, p);
460 if (retval)
461 return retval;
462 }
c98d5d94
LB		 463 }
464 }
465 }
466 return 0;
88c3281f
LB		 467}
468
469int cpu_migrate(int cpu)
470{
c98d5d94
LB		 471 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
472 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
473 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 474 return -1;
475 else
476 return 0;
477}
36229897 478int get_msr_fd(int cpu)
103a8fea 479{
103a8fea
LB		 480 char pathname[32];
481 int fd;
482
36229897
LB		 483 fd = fd_percpu[cpu];
484
485 if (fd)
486 return fd;
487
103a8fea
LB		 488 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
489 fd = open(pathname, O_RDONLY);
15aaa346 490 if (fd < 0)
98481e79 491 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 492
36229897
LB		 493 fd_percpu[cpu] = fd;
494
495 return fd;
496}
497
2af4f9b8
LB		 498static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu, int group_fd, unsigned long flags)
499{
500 return syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
501}
502
503static int perf_instr_count_open(int cpu_num)
504{
505 struct perf_event_attr pea;
506 int fd;
507
508 memset(&pea, 0, sizeof(struct perf_event_attr));
509 pea.type = PERF_TYPE_HARDWARE;
510 pea.size = sizeof(struct perf_event_attr);
511 pea.config = PERF_COUNT_HW_INSTRUCTIONS;
512
513 /* counter for cpu_num, including user + kernel and all processes */
514 fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
515 if (fd == -1)
516 err(-1, "cpu%d: perf instruction counter\n", cpu_num);
517
518 return fd;
519}
520
521int get_instr_count_fd(int cpu)
522{
523 if (fd_instr_count_percpu[cpu])
524 return fd_instr_count_percpu[cpu];
525
526 fd_instr_count_percpu[cpu] = perf_instr_count_open(cpu);
527
528 return fd_instr_count_percpu[cpu];
529}
530
36229897
LB		 531int get_msr(int cpu, off_t offset, unsigned long long *msr)
532{
533 ssize_t retval;
534
535 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
15aaa346 536
98481e79 537 if (retval != sizeof *msr)
cf4cbe53 538 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
15aaa346
LB		 539
540 return 0;
103a8fea
LB		 541}
542
fc04cc67 543/*
bdd5ae3a
LB		 544 * This list matches the column headers, except
545 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
546 * 2. Core and CPU are moved to the end, we can't have strings that contain them
547 * matching on them for --show and --hide.
fc04cc67 548 */
812db3f7 549struct msr_counter bic[] = {
3f44a5c6
LB		 550 { 0x0, "usec" },
551 { 0x0, "Time_Of_Day_Seconds" },
812db3f7 552 { 0x0, "Package" },
bdd5ae3a 553 { 0x0, "Node" },
812db3f7 554 { 0x0, "Avg_MHz" },
bdd5ae3a 555 { 0x0, "Busy%" },
812db3f7
LB		 556 { 0x0, "Bzy_MHz" },
557 { 0x0, "TSC_MHz" },
558 { 0x0, "IRQ" },
495c7654 559 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
bdd5ae3a 560 { 0x0, "sysfs" },
812db3f7
LB		 561 { 0x0, "CPU%c1" },
562 { 0x0, "CPU%c3" },
563 { 0x0, "CPU%c6" },
564 { 0x0, "CPU%c7" },
565 { 0x0, "ThreadC" },
566 { 0x0, "CoreTmp" },
567 { 0x0, "CoreCnt" },
568 { 0x0, "PkgTmp" },
569 { 0x0, "GFX%rc6" },
570 { 0x0, "GFXMHz" },
571 { 0x0, "Pkg%pc2" },
572 { 0x0, "Pkg%pc3" },
573 { 0x0, "Pkg%pc6" },
574 { 0x0, "Pkg%pc7" },
0f47c08d
LB		 575 { 0x0, "Pkg%pc8" },
576 { 0x0, "Pkg%pc9" },
4bd1f8f2 577 { 0x0, "Pk%pc10" },
be0e54c4
LB		 578 { 0x0, "CPU%LPI" },
579 { 0x0, "SYS%LPI" },
812db3f7
LB		 580 { 0x0, "PkgWatt" },
581 { 0x0, "CorWatt" },
582 { 0x0, "GFXWatt" },
583 { 0x0, "PkgCnt" },
584 { 0x0, "RAMWatt" },
585 { 0x0, "PKG_%" },
586 { 0x0, "RAM_%" },
587 { 0x0, "Pkg_J" },
588 { 0x0, "Cor_J" },
589 { 0x0, "GFX_J" },
590 { 0x0, "RAM_J" },
0539ba11 591 { 0x0, "Mod%c6" },
a99d8730
LB		 592 { 0x0, "Totl%C0" },
593 { 0x0, "Any%C0" },
594 { 0x0, "GFX%C0" },
595 { 0x0, "CPUGFX%" },
bdd5ae3a
LB		 596 { 0x0, "Core" },
597 { 0x0, "CPU" },
4c2122d4
LB		 598 { 0x0, "APIC" },
599 { 0x0, "X2APIC" },
6de68fe1 600 { 0x0, "Die" },
b4b91569 601 { 0x0, "GFXAMHz" },
2af4f9b8 602 { 0x0, "IPC" },
812db3f7
LB		 603};
604
605#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
3f44a5c6
LB		 606#define BIC_USEC (1ULL << 0)
607#define BIC_TOD (1ULL << 1)
608#define BIC_Package (1ULL << 2)
bdd5ae3a
LB		 609#define BIC_Node (1ULL << 3)
610#define BIC_Avg_MHz (1ULL << 4)
611#define BIC_Busy (1ULL << 5)
612#define BIC_Bzy_MHz (1ULL << 6)
613#define BIC_TSC_MHz (1ULL << 7)
614#define BIC_IRQ (1ULL << 8)
615#define BIC_SMI (1ULL << 9)
616#define BIC_sysfs (1ULL << 10)
617#define BIC_CPU_c1 (1ULL << 11)
618#define BIC_CPU_c3 (1ULL << 12)
619#define BIC_CPU_c6 (1ULL << 13)
620#define BIC_CPU_c7 (1ULL << 14)
621#define BIC_ThreadC (1ULL << 15)
622#define BIC_CoreTmp (1ULL << 16)
623#define BIC_CoreCnt (1ULL << 17)
624#define BIC_PkgTmp (1ULL << 18)
625#define BIC_GFX_rc6 (1ULL << 19)
626#define BIC_GFXMHz (1ULL << 20)
627#define BIC_Pkgpc2 (1ULL << 21)
628#define BIC_Pkgpc3 (1ULL << 22)
629#define BIC_Pkgpc6 (1ULL << 23)
630#define BIC_Pkgpc7 (1ULL << 24)
631#define BIC_Pkgpc8 (1ULL << 25)
632#define BIC_Pkgpc9 (1ULL << 26)
633#define BIC_Pkgpc10 (1ULL << 27)
634#define BIC_CPU_LPI (1ULL << 28)
635#define BIC_SYS_LPI (1ULL << 29)
636#define BIC_PkgWatt (1ULL << 30)
637#define BIC_CorWatt (1ULL << 31)
638#define BIC_GFXWatt (1ULL << 32)
639#define BIC_PkgCnt (1ULL << 33)
640#define BIC_RAMWatt (1ULL << 34)
641#define BIC_PKG__ (1ULL << 35)
642#define BIC_RAM__ (1ULL << 36)
643#define BIC_Pkg_J (1ULL << 37)
644#define BIC_Cor_J (1ULL << 38)
645#define BIC_GFX_J (1ULL << 39)
646#define BIC_RAM_J (1ULL << 40)
647#define BIC_Mod_c6 (1ULL << 41)
648#define BIC_Totl_c0 (1ULL << 42)
649#define BIC_Any_c0 (1ULL << 43)
650#define BIC_GFX_c0 (1ULL << 44)
651#define BIC_CPUGFX (1ULL << 45)
652#define BIC_Core (1ULL << 46)
653#define BIC_CPU (1ULL << 47)
4c2122d4
LB		 654#define BIC_APIC (1ULL << 48)
655#define BIC_X2APIC (1ULL << 49)
6de68fe1 656#define BIC_Die (1ULL << 50)
b4b91569 657#define BIC_GFXACTMHz (1ULL << 51)
2af4f9b8 658#define BIC_IPC (1ULL << 52)
3f44a5c6 659
4c2122d4 660#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
3f44a5c6
LB		 661
662unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
4c2122d4 663unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
812db3f7
LB		 664
665#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
1e9042b9 666#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
3f44a5c6 667#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
812db3f7 668#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
0f47c08d 669#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
2af4f9b8 670#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
812db3f7 671
3f44a5c6 672
dd778a5e
LB		 673#define MAX_DEFERRED 16
674char *deferred_skip_names[MAX_DEFERRED];
675int deferred_skip_index;
676
677/*
678 * HIDE_LIST - hide this list of counters, show the rest [default]
679 * SHOW_LIST - show this list of counters, hide the rest
680 */
681enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
682
683void help(void)
684{
685 fprintf(outf,
686 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
687 "\n"
688 "Turbostat forks the specified COMMAND and prints statistics\n"
689 "when COMMAND completes.\n"
690 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
691 "to print statistics, until interrupted.\n"
cc481650
NC		 692 " -a, --add add a counter\n"
693 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
694 " -c, --cpu cpu-set limit output to summary plus cpu-set:\n"
695 " {core | package | j,k,l..m,n-p }\n"
9ce80578
NC		 696 " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n"
697 " -D, --Dump displays the raw counter values\n"
698 " -e, --enable [all | column]\n"
699 " shows all or the specified disabled column\n"
700 " -H, --hide [column|column,column,...]\n"
701 " hide the specified column(s)\n"
cc481650
NC		 702 " -i, --interval sec.subsec\n"
703 " Override default 5-second measurement interval\n"
9ce80578 704 " -J, --Joules displays energy in Joules instead of Watts\n"
cc481650
NC		 705 " -l, --list list column headers only\n"
706 " -n, --num_iterations num\n"
707 " number of the measurement iterations\n"
708 " -o, --out file\n"
709 " create or truncate \"file\" for all output\n"
710 " -q, --quiet skip decoding system configuration header\n"
9ce80578
NC		 711 " -s, --show [column|column,column,...]\n"
712 " show only the specified column(s)\n"
713 " -S, --Summary\n"
714 " limits output to 1-line system summary per interval\n"
715 " -T, --TCC temperature\n"
716 " sets the Thermal Control Circuit temperature in\n"
717 " degrees Celsius\n"
cc481650
NC		 718 " -h, --help print this help message\n"
719 " -v, --version print version information\n"
dd778a5e
LB		 720 "\n"
721 "For more help, run \"man turbostat\"\n");
722}
723
812db3f7
LB		 724/*
725 * bic_lookup
726 * for all the strings in comma separate name_list,
727 * set the approprate bit in return value.
728 */
dd778a5e 729unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
812db3f7
LB		 730{
731 int i;
732 unsigned long long retval = 0;
733
734 while (name_list) {
735 char *comma;
736
737 comma = strchr(name_list, ',');
738
739 if (comma)
740 *comma = '\0';
741
3f44a5c6
LB		 742 if (!strcmp(name_list, "all"))
743 return ~0;
744
812db3f7
LB		 745 for (i = 0; i < MAX_BIC; ++i) {
746 if (!strcmp(name_list, bic[i].name)) {
747 retval |= (1ULL << i);
748 break;
749 }
750 }
751 if (i == MAX_BIC) {
dd778a5e
LB		 752 if (mode == SHOW_LIST) {
753 fprintf(stderr, "Invalid counter name: %s\n", name_list);
754 exit(-1);
755 }
756 deferred_skip_names[deferred_skip_index++] = name_list;
757 if (debug)
758 fprintf(stderr, "deferred \"%s\"\n", name_list);
759 if (deferred_skip_index >= MAX_DEFERRED) {
760 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
761 MAX_DEFERRED, name_list);
762 help();
763 exit(1);
764 }
812db3f7
LB		 765 }
766
767 name_list = comma;
768 if (name_list)
769 name_list++;
770
771 }
772 return retval;
773}
fc04cc67 774
dd778a5e 775
c8ade361 776void print_header(char *delim)
103a8fea 777{
388e9c81 778 struct msr_counter *mp;
6168c2e0 779 int printed = 0;
388e9c81 780
3f44a5c6
LB		 781 if (DO_BIC(BIC_USEC))
782 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
783 if (DO_BIC(BIC_TOD))
784 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
812db3f7 785 if (DO_BIC(BIC_Package))
6168c2e0 786 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
6de68fe1
LB		 787 if (DO_BIC(BIC_Die))
788 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
01235041
PB		 789 if (DO_BIC(BIC_Node))
790 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
812db3f7 791 if (DO_BIC(BIC_Core))
6168c2e0 792 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
812db3f7 793 if (DO_BIC(BIC_CPU))
6168c2e0 794 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
4c2122d4
LB		 795 if (DO_BIC(BIC_APIC))
796 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
797 if (DO_BIC(BIC_X2APIC))
798 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
812db3f7 799 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 800 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
812db3f7 801 if (DO_BIC(BIC_Busy))
6168c2e0 802 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
812db3f7 803 if (DO_BIC(BIC_Bzy_MHz))
6168c2e0 804 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
812db3f7 805 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 806 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
1cc21f7b 807
2af4f9b8
LB		 808 if (DO_BIC(BIC_IPC))
809 outp += sprintf(outp, "%sIPC", (printed++ ? delim : ""));
810
0de6c0df
LB		 811 if (DO_BIC(BIC_IRQ)) {
812 if (sums_need_wide_columns)
6168c2e0 813 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
0de6c0df 814 else
6168c2e0 815 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
0de6c0df
LB		 816 }
817
812db3f7 818 if (DO_BIC(BIC_SMI))
6168c2e0 819 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
1cc21f7b 820
388e9c81 821 for (mp = sys.tp; mp; mp = mp->next) {
dd778a5e 822
388e9c81
LB		 823 if (mp->format == FORMAT_RAW) {
824 if (mp->width == 64)
dd778a5e 825 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
388e9c81 826 else
dd778a5e 827 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
388e9c81 828 } else {
0de6c0df 829 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
dd778a5e 830 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
0de6c0df 831 else
dd778a5e 832 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
388e9c81
LB		 833 }
834 }
835
41618e63 836 if (DO_BIC(BIC_CPU_c1))
6168c2e0 837 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
562855ee 838 if (DO_BIC(BIC_CPU_c3))
6168c2e0 839 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
812db3f7 840 if (DO_BIC(BIC_CPU_c6))
6168c2e0 841 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
812db3f7 842 if (DO_BIC(BIC_CPU_c7))
6168c2e0 843 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
678a3bd1 844
0539ba11 845 if (DO_BIC(BIC_Mod_c6))
6168c2e0 846 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
678a3bd1 847
812db3f7 848 if (DO_BIC(BIC_CoreTmp))
6168c2e0 849 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
388e9c81 850
9392bd98
CW		 851 if (do_rapl && !rapl_joules) {
852 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
853 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
854 } else if (do_rapl && rapl_joules) {
855 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
856 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
857 }
858
388e9c81
LB		 859 for (mp = sys.cp; mp; mp = mp->next) {
860 if (mp->format == FORMAT_RAW) {
861 if (mp->width == 64)
c8ade361 862 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 863 else
c8ade361 864 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 865 } else {
0de6c0df
LB		 866 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
867 outp += sprintf(outp, "%s%8s", delim, mp->name);
868 else
869 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 870 }
871 }
872
812db3f7 873 if (DO_BIC(BIC_PkgTmp))
6168c2e0 874 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
889facbe 875
812db3f7 876 if (DO_BIC(BIC_GFX_rc6))
6168c2e0 877 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
fdf676e5 878
812db3f7 879 if (DO_BIC(BIC_GFXMHz))
6168c2e0 880 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
27d47356 881
b4b91569
RA		 882 if (DO_BIC(BIC_GFXACTMHz))
883 outp += sprintf(outp, "%sGFXAMHz", (printed++ ? delim : ""));
884
a99d8730 885 if (DO_BIC(BIC_Totl_c0))
6168c2e0 886 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
a99d8730 887 if (DO_BIC(BIC_Any_c0))
6168c2e0 888 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
a99d8730 889 if (DO_BIC(BIC_GFX_c0))
6168c2e0 890 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
a99d8730 891 if (DO_BIC(BIC_CPUGFX))
6168c2e0 892 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
0b2bb692 893
0f47c08d 894 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 895 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
0f47c08d 896 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 897 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
0f47c08d 898 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 899 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
0f47c08d 900 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 901 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
0f47c08d 902 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 903 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
0f47c08d 904 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 905 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
0f47c08d 906 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 907 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
be0e54c4
LB		 908 if (DO_BIC(BIC_CPU_LPI))
909 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
910 if (DO_BIC(BIC_SYS_LPI))
911 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
103a8fea 912
5c56be9a 913 if (do_rapl && !rapl_joules) {
812db3f7 914 if (DO_BIC(BIC_PkgWatt))
6168c2e0 915 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
9392bd98 916 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 917 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
812db3f7 918 if (DO_BIC(BIC_GFXWatt))
6168c2e0 919 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
812db3f7 920 if (DO_BIC(BIC_RAMWatt))
6168c2e0 921 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
812db3f7 922 if (DO_BIC(BIC_PKG__))
6168c2e0 923 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 924 if (DO_BIC(BIC_RAM__))
6168c2e0 925 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
d7899447 926 } else if (do_rapl && rapl_joules) {
812db3f7 927 if (DO_BIC(BIC_Pkg_J))
6168c2e0 928 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
9392bd98 929 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 930 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
812db3f7 931 if (DO_BIC(BIC_GFX_J))
6168c2e0 932 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
812db3f7 933 if (DO_BIC(BIC_RAM_J))
6168c2e0 934 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
812db3f7 935 if (DO_BIC(BIC_PKG__))
6168c2e0 936 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 937 if (DO_BIC(BIC_RAM__))
6168c2e0 938 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
5c56be9a 939 }
388e9c81
LB		 940 for (mp = sys.pp; mp; mp = mp->next) {
941 if (mp->format == FORMAT_RAW) {
942 if (mp->width == 64)
c8ade361 943 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 944 else
c8ade361 945 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 946 } else {
0de6c0df
LB		 947 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
948 outp += sprintf(outp, "%s%8s", delim, mp->name);
949 else
950 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 951 }
952 }
953
c98d5d94 954 outp += sprintf(outp, "\n");
103a8fea
LB		 955}
956
c98d5d94
LB		 957int dump_counters(struct thread_data *t, struct core_data *c,
958 struct pkg_data *p)
103a8fea 959{
388e9c81
LB		 960 int i;
961 struct msr_counter *mp;
962
3b4d5c7f 963 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 964
965 if (t) {
3b4d5c7f
AS		 966 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
967 t->cpu_id, t->flags);
968 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
969 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
970 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
971 outp += sprintf(outp, "c1: %016llX\n", t->c1);
6886fee4 972
2af4f9b8
LB		 973 if (DO_BIC(BIC_IPC))
974 outp += sprintf(outp, "IPC: %lld\n", t->instr_count);
975
812db3f7 976 if (DO_BIC(BIC_IRQ))
0de6c0df 977 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
812db3f7 978 if (DO_BIC(BIC_SMI))
218f0e8d 979 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
388e9c81
LB		 980
981 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
982 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
983 i, mp->msr_num, t->counter[i]);
984 }
c98d5d94 985 }
103a8fea 986
c98d5d94 987 if (c) {
3b4d5c7f
AS		 988 outp += sprintf(outp, "core: %d\n", c->core_id);
989 outp += sprintf(outp, "c3: %016llX\n", c->c3);
990 outp += sprintf(outp, "c6: %016llX\n", c->c6);
991 outp += sprintf(outp, "c7: %016llX\n", c->c7);
992 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
9392bd98 993 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
388e9c81
LB		 994
995 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
996 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
997 i, mp->msr_num, c->counter[i]);
998 }
0539ba11 999 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
c98d5d94 1000 }
103a8fea 1001
c98d5d94 1002 if (p) {
3b4d5c7f 1003 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 1004
1005 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
1006 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
1007 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
1008 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
1009
3b4d5c7f 1010 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
0f47c08d 1011 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1012 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
0f47c08d 1013 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1014 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
0f47c08d 1015 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1016 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 1017 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
1018 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
1019 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
be0e54c4
LB		 1020 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
1021 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
7c2ccc50
CY		 1022 outp += sprintf(outp, "Joules PKG: %0llX\n", p->energy_pkg);
1023 outp += sprintf(outp, "Joules COR: %0llX\n", p->energy_cores);
1024 outp += sprintf(outp, "Joules GFX: %0llX\n", p->energy_gfx);
1025 outp += sprintf(outp, "Joules RAM: %0llX\n", p->energy_dram);
1026 outp += sprintf(outp, "Throttle PKG: %0llX\n",
3b4d5c7f 1027 p->rapl_pkg_perf_status);
7c2ccc50 1028 outp += sprintf(outp, "Throttle RAM: %0llX\n",
3b4d5c7f
AS		 1029 p->rapl_dram_perf_status);
1030 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
388e9c81
LB		 1031
1032 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1033 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
1034 i, mp->msr_num, p->counter[i]);
1035 }
c98d5d94 1036 }
3b4d5c7f
AS		 1037
1038 outp += sprintf(outp, "\n");
1039
c98d5d94 1040 return 0;
103a8fea
LB		 1041}
1042
e23da037
LB		 1043/*
1044 * column formatting convention & formats
e23da037 1045 */
c98d5d94
LB		 1046int format_counters(struct thread_data *t, struct core_data *c,
1047 struct pkg_data *p)
103a8fea 1048{
008d396e 1049 double interval_float, tsc;
fc04cc67 1050 char *fmt8;
388e9c81
LB		 1051 int i;
1052 struct msr_counter *mp;
6168c2e0
LB		 1053 char *delim = "\t";
1054 int printed = 0;
103a8fea 1055
c98d5d94
LB		 1056 /* if showing only 1st thread in core and this isn't one, bail out */
1057 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1058 return 0;
1059
1060 /* if showing only 1st thread in pkg and this isn't one, bail out */
1061 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1062 return 0;
1063
1ef7d21a
LB		 1064 /*if not summary line and --cpu is used */
1065 if ((t != &average.threads) &&
1066 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
1067 return 0;
1068
3f44a5c6 1069 if (DO_BIC(BIC_USEC)) {
f4fdf2b4
LB		 1070 /* on each row, print how many usec each timestamp took to gather */
1071 struct timeval tv;
1072
1073 timersub(&t->tv_end, &t->tv_begin, &tv);
1074 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
1075 }
1076
3f44a5c6
LB		 1077 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
1078 if (DO_BIC(BIC_TOD))
1079 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
1080
d4794f25 1081 interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
103a8fea 1082
008d396e
LB		 1083 tsc = t->tsc * tsc_tweak;
1084
c98d5d94
LB		 1085 /* topo columns, print blanks on 1st (average) line */
1086 if (t == &average.threads) {
812db3f7 1087 if (DO_BIC(BIC_Package))
6168c2e0 1088 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
6de68fe1
LB		 1089 if (DO_BIC(BIC_Die))
1090 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
01235041
PB		 1091 if (DO_BIC(BIC_Node))
1092 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 1093 if (DO_BIC(BIC_Core))
6168c2e0 1094 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 1095 if (DO_BIC(BIC_CPU))
6168c2e0 1096 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
4c2122d4
LB		 1097 if (DO_BIC(BIC_APIC))
1098 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1099 if (DO_BIC(BIC_X2APIC))
1100 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
103a8fea 1101 } else {
812db3f7 1102 if (DO_BIC(BIC_Package)) {
c98d5d94 1103 if (p)
6168c2e0 1104 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
c98d5d94 1105 else
6168c2e0 1106 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 1107 }
6de68fe1
LB		 1108 if (DO_BIC(BIC_Die)) {
1109 if (c)
1110 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
1111 else
1112 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1113 }
01235041
PB		 1114 if (DO_BIC(BIC_Node)) {
1115 if (t)
1116 outp += sprintf(outp, "%s%d",
1117 (printed++ ? delim : ""),
1118 cpus[t->cpu_id].physical_node_id);
1119 else
1120 outp += sprintf(outp, "%s-",
1121 (printed++ ? delim : ""));
1122 }
812db3f7 1123 if (DO_BIC(BIC_Core)) {
c98d5d94 1124 if (c)
6168c2e0 1125 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
c98d5d94 1126 else
6168c2e0 1127 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 1128 }
812db3f7 1129 if (DO_BIC(BIC_CPU))
6168c2e0 1130 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
4c2122d4
LB		 1131 if (DO_BIC(BIC_APIC))
1132 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
1133 if (DO_BIC(BIC_X2APIC))
1134 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
103a8fea 1135 }
fc04cc67 1136
812db3f7 1137 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 1138 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
fc04cc67
LB		 1139 1.0 / units * t->aperf / interval_float);
1140
812db3f7 1141 if (DO_BIC(BIC_Busy))
6168c2e0 1142 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
103a8fea 1143
812db3f7 1144 if (DO_BIC(BIC_Bzy_MHz)) {
21ed5574 1145 if (has_base_hz)
6168c2e0 1146 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
21ed5574 1147 else
6168c2e0 1148 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
008d396e 1149 tsc / units * t->aperf / t->mperf / interval_float);
21ed5574 1150 }
103a8fea 1151
812db3f7 1152 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 1153 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
103a8fea 1154
2af4f9b8
LB		 1155 if (DO_BIC(BIC_IPC))
1156 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 1.0 * t->instr_count / t->aperf);
1157
562a2d37 1158 /* IRQ */
0de6c0df
LB		 1159 if (DO_BIC(BIC_IRQ)) {
1160 if (sums_need_wide_columns)
6168c2e0 1161 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 1162 else
6168c2e0 1163 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 1164 }
562a2d37 1165
1cc21f7b 1166 /* SMI */
812db3f7 1167 if (DO_BIC(BIC_SMI))
6168c2e0 1168 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1cc21f7b 1169
678a3bd1 1170 /* Added counters */
388e9c81
LB		 1171 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1172 if (mp->format == FORMAT_RAW) {
1173 if (mp->width == 32)
5f3aea57 1174 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
388e9c81 1175 else
6168c2e0 1176 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1177 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1178 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1179 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
0de6c0df 1180 else
6168c2e0 1181 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1182 } else if (mp->format == FORMAT_PERCENT) {
41618e63 1183 if (mp->type == COUNTER_USEC)
6168c2e0 1184 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
41618e63 1185 else
6168c2e0 1186 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
388e9c81
LB		 1187 }
1188 }
1189
41618e63
LB		 1190 /* C1 */
1191 if (DO_BIC(BIC_CPU_c1))
6168c2e0 1192 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
41618e63
LB		 1193
1194
678a3bd1
LB		 1195 /* print per-core data only for 1st thread in core */
1196 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1197 goto done;
1198
562855ee 1199 if (DO_BIC(BIC_CPU_c3))
6168c2e0 1200 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
812db3f7 1201 if (DO_BIC(BIC_CPU_c6))
6168c2e0 1202 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
812db3f7 1203 if (DO_BIC(BIC_CPU_c7))
6168c2e0 1204 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
678a3bd1 1205
0539ba11
LB		 1206 /* Mod%c6 */
1207 if (DO_BIC(BIC_Mod_c6))
6168c2e0 1208 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
0539ba11 1209
812db3f7 1210 if (DO_BIC(BIC_CoreTmp))
6168c2e0 1211 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
889facbe 1212
388e9c81
LB		 1213 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1214 if (mp->format == FORMAT_RAW) {
1215 if (mp->width == 32)
5f3aea57 1216 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
388e9c81 1217 else
6168c2e0 1218 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1219 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1220 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1221 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
0de6c0df 1222 else
6168c2e0 1223 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1224 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1225 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
388e9c81
LB		 1226 }
1227 }
1228
9972d5d8 1229 fmt8 = "%s%.2f";
9392bd98
CW		 1230
1231 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1232 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1233 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1234 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1235
c98d5d94
LB		 1236 /* print per-package data only for 1st core in package */
1237 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1238 goto done;
1239
0b2bb692 1240 /* PkgTmp */
812db3f7 1241 if (DO_BIC(BIC_PkgTmp))
6168c2e0 1242 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
889facbe 1243
fdf676e5 1244 /* GFXrc6 */
812db3f7 1245 if (DO_BIC(BIC_GFX_rc6)) {
ba3dec99 1246 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
6168c2e0 1247 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
9185e988 1248 } else {
6168c2e0 1249 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
9185e988
LB		 1250 p->gfx_rc6_ms / 10.0 / interval_float);
1251 }
1252 }
fdf676e5 1253
27d47356 1254 /* GFXMHz */
812db3f7 1255 if (DO_BIC(BIC_GFXMHz))
6168c2e0 1256 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
27d47356 1257
b4b91569
RA		 1258 /* GFXACTMHz */
1259 if (DO_BIC(BIC_GFXACTMHz))
1260 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_act_mhz);
1261
0b2bb692 1262 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
a99d8730 1263 if (DO_BIC(BIC_Totl_c0))
6168c2e0 1264 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
a99d8730 1265 if (DO_BIC(BIC_Any_c0))
6168c2e0 1266 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
a99d8730 1267 if (DO_BIC(BIC_GFX_c0))
6168c2e0 1268 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
a99d8730 1269 if (DO_BIC(BIC_CPUGFX))
6168c2e0 1270 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
0b2bb692 1271
0f47c08d 1272 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 1273 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
0f47c08d 1274 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 1275 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
0f47c08d 1276 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 1277 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
0f47c08d 1278 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 1279 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
0f47c08d 1280 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 1281 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
0f47c08d 1282 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 1283 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
0f47c08d 1284 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 1285 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
889facbe 1286
be0e54c4
LB		 1287 if (DO_BIC(BIC_CPU_LPI))
1288 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1289 if (DO_BIC(BIC_SYS_LPI))
1290 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1291
812db3f7 1292 if (DO_BIC(BIC_PkgWatt))
6168c2e0 1293 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
9392bd98 1294 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1295 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
812db3f7 1296 if (DO_BIC(BIC_GFXWatt))
6168c2e0 1297 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
812db3f7 1298 if (DO_BIC(BIC_RAMWatt))
6168c2e0 1299 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
812db3f7 1300 if (DO_BIC(BIC_Pkg_J))
6168c2e0 1301 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
9392bd98 1302 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1303 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
812db3f7 1304 if (DO_BIC(BIC_GFX_J))
6168c2e0 1305 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
812db3f7 1306 if (DO_BIC(BIC_RAM_J))
6168c2e0 1307 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
812db3f7 1308 if (DO_BIC(BIC_PKG__))
6168c2e0 1309 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
812db3f7 1310 if (DO_BIC(BIC_RAM__))
6168c2e0 1311 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
812db3f7 1312
388e9c81
LB		 1313 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1314 if (mp->format == FORMAT_RAW) {
1315 if (mp->width == 32)
5f3aea57 1316 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
388e9c81 1317 else
6168c2e0 1318 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1319 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1320 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1321 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
0de6c0df 1322 else
6168c2e0 1323 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1324 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1325 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
388e9c81
LB		 1326 }
1327 }
1328
c98d5d94 1329done:
94d6ab4b
LB		 1330 if (*(outp - 1) != '\n')
1331 outp += sprintf(outp, "\n");
c98d5d94
LB		 1332
1333 return 0;
103a8fea
LB		 1334}
1335
b7d8c148 1336void flush_output_stdout(void)
c98d5d94 1337{
b7d8c148
LB		 1338 FILE *filep;
1339
1340 if (outf == stderr)
1341 filep = stdout;
1342 else
1343 filep = outf;
1344
1345 fputs(output_buffer, filep);
1346 fflush(filep);
1347
c98d5d94
LB		 1348 outp = output_buffer;
1349}
b7d8c148 1350void flush_output_stderr(void)
c98d5d94 1351{
b7d8c148
LB		 1352 fputs(output_buffer, outf);
1353 fflush(outf);
c98d5d94
LB		 1354 outp = output_buffer;
1355}
1356void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 1357{
e23da037 1358 static int printed;
103a8fea 1359
e23da037 1360 if (!printed || !summary_only)
c8ade361 1361 print_header("\t");
103a8fea 1362
9d83601a 1363 format_counters(&average.threads, &average.cores, &average.packages);
103a8fea 1364
e23da037
LB		 1365 printed = 1;
1366
1367 if (summary_only)
1368 return;
1369
c98d5d94 1370 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 1371}
1372
889facbe 1373#define DELTA_WRAP32(new, old) \
7c2ccc50 1374 old = ((((unsigned long long)new << 32) - ((unsigned long long)old << 32)) >> 32);
889facbe 1375
ba3dec99 1376int
c98d5d94
LB		 1377delta_package(struct pkg_data *new, struct pkg_data *old)
1378{
388e9c81
LB		 1379 int i;
1380 struct msr_counter *mp;
0b2bb692 1381
a99d8730
LB		 1382
1383 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1384 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
a99d8730 1385 if (DO_BIC(BIC_Any_c0))
0b2bb692 1386 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
a99d8730 1387 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1388 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
a99d8730 1389 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1390 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
a99d8730 1391
c98d5d94 1392 old->pc2 = new->pc2 - old->pc2;
0f47c08d 1393 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1394 old->pc3 = new->pc3 - old->pc3;
0f47c08d 1395 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1396 old->pc6 = new->pc6 - old->pc6;
0f47c08d 1397 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1398 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 1399 old->pc8 = new->pc8 - old->pc8;
1400 old->pc9 = new->pc9 - old->pc9;
1401 old->pc10 = new->pc10 - old->pc10;
be0e54c4
LB		 1402 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1403 old->sys_lpi = new->sys_lpi - old->sys_lpi;
889facbe
LB		 1404 old->pkg_temp_c = new->pkg_temp_c;
1405
9185e988
LB		 1406 /* flag an error when rc6 counter resets/wraps */
1407 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1408 old->gfx_rc6_ms = -1;
1409 else
1410 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1411
27d47356 1412 old->gfx_mhz = new->gfx_mhz;
b4b91569 1413 old->gfx_act_mhz = new->gfx_act_mhz;
27d47356 1414
87e15da9
CY		 1415 old->energy_pkg = new->energy_pkg - old->energy_pkg;
1416 old->energy_cores = new->energy_cores - old->energy_cores;
1417 old->energy_gfx = new->energy_gfx - old->energy_gfx;
1418 old->energy_dram = new->energy_dram - old->energy_dram;
1419 old->rapl_pkg_perf_status = new->rapl_pkg_perf_status - old->rapl_pkg_perf_status;
1420 old->rapl_dram_perf_status = new->rapl_dram_perf_status - old->rapl_dram_perf_status;
ba3dec99 1421
388e9c81
LB		 1422 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1423 if (mp->format == FORMAT_RAW)
1424 old->counter[i] = new->counter[i];
1425 else
1426 old->counter[i] = new->counter[i] - old->counter[i];
1427 }
1428
ba3dec99 1429 return 0;
c98d5d94 1430}
103a8fea 1431
c98d5d94
LB		 1432void
1433delta_core(struct core_data *new, struct core_data *old)
103a8fea 1434{
388e9c81
LB		 1435 int i;
1436 struct msr_counter *mp;
1437
c98d5d94
LB		 1438 old->c3 = new->c3 - old->c3;
1439 old->c6 = new->c6 - old->c6;
1440 old->c7 = new->c7 - old->c7;
889facbe 1441 old->core_temp_c = new->core_temp_c;
0539ba11 1442 old->mc6_us = new->mc6_us - old->mc6_us;
388e9c81 1443
9392bd98
CW		 1444 DELTA_WRAP32(new->core_energy, old->core_energy);
1445
388e9c81
LB		 1446 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1447 if (mp->format == FORMAT_RAW)
1448 old->counter[i] = new->counter[i];
1449 else
1450 old->counter[i] = new->counter[i] - old->counter[i];
1451 }
c98d5d94 1452}
103a8fea 1453
1e9042b9
SP		 1454int soft_c1_residency_display(int bic)
1455{
1456 if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1457 return 0;
1458
1459 return DO_BIC_READ(bic);
1460}
1461
c3ae331d
LB		 1462/*
1463 * old = new - old
1464 */
ba3dec99 1465int
c98d5d94
LB		 1466delta_thread(struct thread_data *new, struct thread_data *old,
1467 struct core_data *core_delta)
1468{
388e9c81
LB		 1469 int i;
1470 struct msr_counter *mp;
1471
4c2122d4
LB		 1472 /* we run cpuid just the 1st time, copy the results */
1473 if (DO_BIC(BIC_APIC))
1474 new->apic_id = old->apic_id;
1475 if (DO_BIC(BIC_X2APIC))
1476 new->x2apic_id = old->x2apic_id;
1477
3f44a5c6
LB		 1478 /*
1479 * the timestamps from start of measurement interval are in "old"
1480 * the timestamp from end of measurement interval are in "new"
1481 * over-write old w/ new so we can print end of interval values
1482 */
1483
d4794f25 1484 timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
3f44a5c6
LB		 1485 old->tv_begin = new->tv_begin;
1486 old->tv_end = new->tv_end;
1487
c98d5d94
LB		 1488 old->tsc = new->tsc - old->tsc;
1489
1490 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 1491 if (old->tsc < (1000 * 1000))
1492 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1493 "You can disable all c-states by booting with \"idle=poll\"\n"
1494 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 1495
c98d5d94 1496 old->c1 = new->c1 - old->c1;
103a8fea 1497
1e9042b9
SP		 1498 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1499 soft_c1_residency_display(BIC_Avg_MHz)) {
a729617c
LB		 1500 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1501 old->aperf = new->aperf - old->aperf;
1502 old->mperf = new->mperf - old->mperf;
1503 } else {
ba3dec99 1504 return -1;
103a8fea 1505 }
c98d5d94 1506 }
103a8fea 1507
103a8fea 1508
144b44b1
LB		 1509 if (use_c1_residency_msr) {
1510 /*
1511 * Some models have a dedicated C1 residency MSR,
1512 * which should be more accurate than the derivation below.
1513 */
1514 } else {
1515 /*
1516 * As counter collection is not atomic,
1517 * it is possible for mperf's non-halted cycles + idle states
1518 * to exceed TSC's all cycles: show c1 = 0% in that case.
1519 */
95149369 1520 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
144b44b1
LB		 1521 old->c1 = 0;
1522 else {
1523 /* normal case, derive c1 */
008d396e 1524 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
c98d5d94 1525 - core_delta->c6 - core_delta->c7;
144b44b1 1526 }
c98d5d94 1527 }
c3ae331d 1528
c98d5d94 1529 if (old->mperf == 0) {
b7d8c148
LB		 1530 if (debug > 1)
1531 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 1532 old->mperf = 1; /* divide by 0 protection */
103a8fea 1533 }
c98d5d94 1534
2af4f9b8
LB		 1535 if (DO_BIC(BIC_IPC))
1536 old->instr_count = new->instr_count - old->instr_count;
1537
812db3f7 1538 if (DO_BIC(BIC_IRQ))
562a2d37
LB		 1539 old->irq_count = new->irq_count - old->irq_count;
1540
812db3f7 1541 if (DO_BIC(BIC_SMI))
1ed51011 1542 old->smi_count = new->smi_count - old->smi_count;
ba3dec99 1543
388e9c81
LB		 1544 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1545 if (mp->format == FORMAT_RAW)
1546 old->counter[i] = new->counter[i];
1547 else
1548 old->counter[i] = new->counter[i] - old->counter[i];
1549 }
ba3dec99 1550 return 0;
c98d5d94
LB		 1551}
1552
1553int delta_cpu(struct thread_data *t, struct core_data *c,
1554 struct pkg_data *p, struct thread_data *t2,
1555 struct core_data *c2, struct pkg_data *p2)
1556{
ba3dec99
LB		 1557 int retval = 0;
1558
c98d5d94
LB		 1559 /* calculate core delta only for 1st thread in core */
1560 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1561 delta_core(c, c2);
1562
1563 /* always calculate thread delta */
ba3dec99
LB		 1564 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1565 if (retval)
1566 return retval;
c98d5d94
LB		 1567
1568 /* calculate package delta only for 1st core in package */
1569 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
ba3dec99 1570 retval = delta_package(p, p2);
c98d5d94 1571
ba3dec99 1572 return retval;
103a8fea
LB		 1573}
1574
c98d5d94
LB		 1575void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1576{
388e9c81
LB		 1577 int i;
1578 struct msr_counter *mp;
1579
3f44a5c6
LB		 1580 t->tv_begin.tv_sec = 0;
1581 t->tv_begin.tv_usec = 0;
1582 t->tv_end.tv_sec = 0;
1583 t->tv_end.tv_usec = 0;
d4794f25
YG		 1584 t->tv_delta.tv_sec = 0;
1585 t->tv_delta.tv_usec = 0;
3f44a5c6 1586
c98d5d94
LB		 1587 t->tsc = 0;
1588 t->aperf = 0;
1589 t->mperf = 0;
1590 t->c1 = 0;
1591
2af4f9b8
LB		 1592 t->instr_count = 0;
1593
562a2d37
LB		 1594 t->irq_count = 0;
1595 t->smi_count = 0;
1596
c98d5d94
LB		 1597 /* tells format_counters to dump all fields from this set */
1598 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1599
1600 c->c3 = 0;
1601 c->c6 = 0;
1602 c->c7 = 0;
0539ba11 1603 c->mc6_us = 0;
889facbe 1604 c->core_temp_c = 0;
9392bd98 1605 c->core_energy = 0;
c98d5d94 1606
0b2bb692
LB		 1607 p->pkg_wtd_core_c0 = 0;
1608 p->pkg_any_core_c0 = 0;
1609 p->pkg_any_gfxe_c0 = 0;
1610 p->pkg_both_core_gfxe_c0 = 0;
1611
c98d5d94 1612 p->pc2 = 0;
0f47c08d 1613 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1614 p->pc3 = 0;
0f47c08d 1615 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1616 p->pc6 = 0;
0f47c08d 1617 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1618 p->pc7 = 0;
ca58710f
KCA		 1619 p->pc8 = 0;
1620 p->pc9 = 0;
1621 p->pc10 = 0;
be0e54c4
LB		 1622 p->cpu_lpi = 0;
1623 p->sys_lpi = 0;
889facbe
LB		 1624
1625 p->energy_pkg = 0;
1626 p->energy_dram = 0;
1627 p->energy_cores = 0;
1628 p->energy_gfx = 0;
1629 p->rapl_pkg_perf_status = 0;
1630 p->rapl_dram_perf_status = 0;
1631 p->pkg_temp_c = 0;
27d47356 1632
fdf676e5 1633 p->gfx_rc6_ms = 0;
27d47356 1634 p->gfx_mhz = 0;
b4b91569 1635 p->gfx_act_mhz = 0;
388e9c81
LB		 1636 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1637 t->counter[i] = 0;
1638
1639 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1640 c->counter[i] = 0;
1641
1642 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1643 p->counter[i] = 0;
c98d5d94
LB		 1644}
1645int sum_counters(struct thread_data *t, struct core_data *c,
1646 struct pkg_data *p)
103a8fea 1647{
388e9c81
LB		 1648 int i;
1649 struct msr_counter *mp;
1650
4c2122d4
LB		 1651 /* copy un-changing apic_id's */
1652 if (DO_BIC(BIC_APIC))
1653 average.threads.apic_id = t->apic_id;
1654 if (DO_BIC(BIC_X2APIC))
1655 average.threads.x2apic_id = t->x2apic_id;
1656
3f44a5c6
LB		 1657 /* remember first tv_begin */
1658 if (average.threads.tv_begin.tv_sec == 0)
1659 average.threads.tv_begin = t->tv_begin;
1660
1661 /* remember last tv_end */
1662 average.threads.tv_end = t->tv_end;
1663
c98d5d94
LB		 1664 average.threads.tsc += t->tsc;
1665 average.threads.aperf += t->aperf;
1666 average.threads.mperf += t->mperf;
1667 average.threads.c1 += t->c1;
103a8fea 1668
2af4f9b8
LB		 1669 average.threads.instr_count += t->instr_count;
1670
562a2d37
LB		 1671 average.threads.irq_count += t->irq_count;
1672 average.threads.smi_count += t->smi_count;
1673
388e9c81
LB		 1674 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1675 if (mp->format == FORMAT_RAW)
1676 continue;
1677 average.threads.counter[i] += t->counter[i];
1678 }
1679
c98d5d94
LB		 1680 /* sum per-core values only for 1st thread in core */
1681 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1682 return 0;
103a8fea 1683
c98d5d94
LB		 1684 average.cores.c3 += c->c3;
1685 average.cores.c6 += c->c6;
1686 average.cores.c7 += c->c7;
0539ba11 1687 average.cores.mc6_us += c->mc6_us;
c98d5d94 1688
889facbe
LB		 1689 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1690
9392bd98
CW		 1691 average.cores.core_energy += c->core_energy;
1692
388e9c81
LB		 1693 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1694 if (mp->format == FORMAT_RAW)
1695 continue;
1696 average.cores.counter[i] += c->counter[i];
1697 }
1698
c98d5d94
LB		 1699 /* sum per-pkg values only for 1st core in pkg */
1700 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1701 return 0;
1702
a99d8730 1703 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1704 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
a99d8730 1705 if (DO_BIC(BIC_Any_c0))
0b2bb692 1706 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
a99d8730 1707 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1708 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
a99d8730 1709 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1710 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
0b2bb692 1711
c98d5d94 1712 average.packages.pc2 += p->pc2;
0f47c08d 1713 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1714 average.packages.pc3 += p->pc3;
0f47c08d 1715 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1716 average.packages.pc6 += p->pc6;
0f47c08d 1717 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1718 average.packages.pc7 += p->pc7;
ca58710f
KCA		 1719 average.packages.pc8 += p->pc8;
1720 average.packages.pc9 += p->pc9;
1721 average.packages.pc10 += p->pc10;
c98d5d94 1722
be0e54c4
LB		 1723 average.packages.cpu_lpi = p->cpu_lpi;
1724 average.packages.sys_lpi = p->sys_lpi;
1725
889facbe
LB		 1726 average.packages.energy_pkg += p->energy_pkg;
1727 average.packages.energy_dram += p->energy_dram;
1728 average.packages.energy_cores += p->energy_cores;
1729 average.packages.energy_gfx += p->energy_gfx;
1730
fdf676e5 1731 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
27d47356 1732 average.packages.gfx_mhz = p->gfx_mhz;
b4b91569 1733 average.packages.gfx_act_mhz = p->gfx_act_mhz;
27d47356 1734
889facbe
LB		 1735 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1736
1737 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1738 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
388e9c81
LB		 1739
1740 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1741 if (mp->format == FORMAT_RAW)
1742 continue;
1743 average.packages.counter[i] += p->counter[i];
1744 }
c98d5d94
LB		 1745 return 0;
1746}
1747/*
1748 * sum the counters for all cpus in the system
1749 * compute the weighted average
1750 */
1751void compute_average(struct thread_data *t, struct core_data *c,
1752 struct pkg_data *p)
1753{
388e9c81
LB		 1754 int i;
1755 struct msr_counter *mp;
1756
c98d5d94
LB		 1757 clear_counters(&average.threads, &average.cores, &average.packages);
1758
1759 for_all_cpus(sum_counters, t, c, p);
1760
d4794f25
YG		 1761 /* Use the global time delta for the average. */
1762 average.threads.tv_delta = tv_delta;
1763
c98d5d94
LB		 1764 average.threads.tsc /= topo.num_cpus;
1765 average.threads.aperf /= topo.num_cpus;
1766 average.threads.mperf /= topo.num_cpus;
2af4f9b8 1767 average.threads.instr_count /= topo.num_cpus;
c98d5d94
LB		 1768 average.threads.c1 /= topo.num_cpus;
1769
0de6c0df
LB		 1770 if (average.threads.irq_count > 9999999)
1771 sums_need_wide_columns = 1;
1772
c98d5d94
LB		 1773 average.cores.c3 /= topo.num_cores;
1774 average.cores.c6 /= topo.num_cores;
1775 average.cores.c7 /= topo.num_cores;
0539ba11 1776 average.cores.mc6_us /= topo.num_cores;
c98d5d94 1777
a99d8730 1778 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1779 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
a99d8730 1780 if (DO_BIC(BIC_Any_c0))
0b2bb692 1781 average.packages.pkg_any_core_c0 /= topo.num_packages;
a99d8730 1782 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1783 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
a99d8730 1784 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1785 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
0b2bb692 1786
c98d5d94 1787 average.packages.pc2 /= topo.num_packages;
0f47c08d 1788 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1789 average.packages.pc3 /= topo.num_packages;
0f47c08d 1790 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1791 average.packages.pc6 /= topo.num_packages;
0f47c08d 1792 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1793 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 1794
1795 average.packages.pc8 /= topo.num_packages;
1796 average.packages.pc9 /= topo.num_packages;
1797 average.packages.pc10 /= topo.num_packages;
388e9c81
LB		 1798
1799 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1800 if (mp->format == FORMAT_RAW)
1801 continue;
0de6c0df
LB		 1802 if (mp->type == COUNTER_ITEMS) {
1803 if (average.threads.counter[i] > 9999999)
1804 sums_need_wide_columns = 1;
41618e63 1805 continue;
0de6c0df 1806 }
388e9c81
LB		 1807 average.threads.counter[i] /= topo.num_cpus;
1808 }
1809 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1810 if (mp->format == FORMAT_RAW)
1811 continue;
0de6c0df
LB		 1812 if (mp->type == COUNTER_ITEMS) {
1813 if (average.cores.counter[i] > 9999999)
1814 sums_need_wide_columns = 1;
1815 }
388e9c81
LB		 1816 average.cores.counter[i] /= topo.num_cores;
1817 }
1818 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1819 if (mp->format == FORMAT_RAW)
1820 continue;
0de6c0df
LB		 1821 if (mp->type == COUNTER_ITEMS) {
1822 if (average.packages.counter[i] > 9999999)
1823 sums_need_wide_columns = 1;
1824 }
388e9c81
LB		 1825 average.packages.counter[i] /= topo.num_packages;
1826 }
103a8fea
LB		 1827}
1828
c98d5d94 1829static unsigned long long rdtsc(void)
103a8fea 1830{
c98d5d94 1831 unsigned int low, high;
15aaa346 1832
c98d5d94 1833 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 1834
c98d5d94
LB		 1835 return low | ((unsigned long long)high) << 32;
1836}
15aaa346 1837
495c7654
LB		 1838/*
1839 * Open a file, and exit on failure
1840 */
1841FILE *fopen_or_die(const char *path, const char *mode)
1842{
1843 FILE *filep = fopen(path, mode);
1844
1845 if (!filep)
1846 err(1, "%s: open failed", path);
1847 return filep;
1848}
1849/*
1850 * snapshot_sysfs_counter()
1851 *
1852 * return snapshot of given counter
1853 */
1854unsigned long long snapshot_sysfs_counter(char *path)
1855{
1856 FILE *fp;
1857 int retval;
1858 unsigned long long counter;
1859
1860 fp = fopen_or_die(path, "r");
1861
1862 retval = fscanf(fp, "%lld", &counter);
1863 if (retval != 1)
1864 err(1, "snapshot_sysfs_counter(%s)", path);
1865
1866 fclose(fp);
1867
1868 return counter;
1869}
1870
1871int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1872{
1873 if (mp->msr_num != 0) {
1874 if (get_msr(cpu, mp->msr_num, counterp))
1875 return -1;
1876 } else {
46c27978 1877 char path[128 + PATH_BYTES];
41618e63
LB		 1878
1879 if (mp->flags & SYSFS_PERCPU) {
1880 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1881 cpu, mp->path);
1882
1883 *counterp = snapshot_sysfs_counter(path);
1884 } else {
1885 *counterp = snapshot_sysfs_counter(mp->path);
1886 }
495c7654
LB		 1887 }
1888
1889 return 0;
1890}
1891
6d6501d9
BP		 1892int get_epb(int cpu)
1893{
1894 char path[128 + PATH_BYTES];
7f1b11ba 1895 unsigned long long msr;
6d6501d9
BP		 1896 int ret, epb = -1;
1897 FILE *fp;
1898
1899 sprintf(path, "/sys/devices/system/cpu/cpu%d/power/energy_perf_bias", cpu);
1900
7f1b11ba
BP		 1901 fp = fopen(path, "r");
1902 if (!fp)
1903 goto msr_fallback;
6d6501d9
BP		 1904
1905 ret = fscanf(fp, "%d", &epb);
1906 if (ret != 1)
1907 err(1, "%s(%s)", __func__, path);
1908
1909 fclose(fp);
1910
1911 return epb;
7f1b11ba
BP		 1912
1913msr_fallback:
1914 get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);
1915
1916 return msr & 0xf;
6d6501d9
BP		 1917}
1918
4c2122d4
LB		 1919void get_apic_id(struct thread_data *t)
1920{
34041551 1921 unsigned int eax, ebx, ecx, edx;
4c2122d4 1922
34041551
LB		 1923 if (DO_BIC(BIC_APIC)) {
1924 eax = ebx = ecx = edx = 0;
1925 __cpuid(1, eax, ebx, ecx, edx);
4c2122d4 1926
34041551
LB		 1927 t->apic_id = (ebx >> 24) & 0xff;
1928 }
1929
1930 if (!DO_BIC(BIC_X2APIC))
4c2122d4
LB		 1931 return;
1932
c1c10cc7 1933 if (authentic_amd || hygon_genuine) {
34041551 1934 unsigned int topology_extensions;
4c2122d4 1935
34041551
LB		 1936 if (max_extended_level < 0x8000001e)
1937 return;
4c2122d4 1938
34041551
LB		 1939 eax = ebx = ecx = edx = 0;
1940 __cpuid(0x80000001, eax, ebx, ecx, edx);
1941 topology_extensions = ecx & (1 << 22);
1942
1943 if (topology_extensions == 0)
1944 return;
1945
1946 eax = ebx = ecx = edx = 0;
1947 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1948
1949 t->x2apic_id = eax;
4c2122d4 1950 return;
34041551 1951 }
4c2122d4 1952
34041551
LB		 1953 if (!genuine_intel)
1954 return;
1955
1956 if (max_level < 0xb)
4c2122d4
LB		 1957 return;
1958
1959 ecx = 0;
1960 __cpuid(0xb, eax, ebx, ecx, edx);
1961 t->x2apic_id = edx;
1962
34041551
LB		 1963 if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1964 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1965 t->cpu_id, t->apic_id, t->x2apic_id);
4c2122d4
LB		 1966}
1967
c98d5d94
LB		 1968/*
1969 * get_counters(...)
1970 * migrate to cpu
1971 * acquire and record local counters for that cpu
1972 */
1973int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1974{
1975 int cpu = t->cpu_id;
889facbe 1976 unsigned long long msr;
0102b067 1977 int aperf_mperf_retry_count = 0;
388e9c81
LB		 1978 struct msr_counter *mp;
1979 int i;
88c3281f 1980
e52966c0 1981 if (cpu_migrate(cpu)) {
3d7772ea 1982 fprintf(outf, "get_counters: Could not migrate to CPU %d\n", cpu);
c98d5d94 1983 return -1;
e52966c0 1984 }
15aaa346 1985
d4794f25
YG		 1986 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1987
4c2122d4
LB		 1988 if (first_counter_read)
1989 get_apic_id(t);
0102b067 1990retry:
c98d5d94
LB		 1991 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1992
1e9042b9
SP		 1993 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1994 soft_c1_residency_display(BIC_Avg_MHz)) {
0102b067
LB		 1995 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1996
1997 /*
1998 * The TSC, APERF and MPERF must be read together for
1999 * APERF/MPERF and MPERF/TSC to give accurate results.
2000 *
2001 * Unfortunately, APERF and MPERF are read by
2002 * individual system call, so delays may occur
2003 * between them. If the time to read them
2004 * varies by a large amount, we re-read them.
2005 */
2006
2007 /*
2008 * This initial dummy APERF read has been seen to
2009 * reduce jitter in the subsequent reads.
2010 */
2011
2012 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2013 return -3;
2014
2015 t->tsc = rdtsc(); /* re-read close to APERF */
2016
2017 tsc_before = t->tsc;
2018
9c63a650 2019 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 2020 return -3;
0102b067
LB		 2021
2022 tsc_between = rdtsc();
2023
9c63a650 2024 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 2025 return -4;
0102b067
LB		 2026
2027 tsc_after = rdtsc();
2028
2029 aperf_time = tsc_between - tsc_before;
2030 mperf_time = tsc_after - tsc_between;
2031
2032 /*
2033 * If the system call latency to read APERF and MPERF
2034 * differ by more than 2x, then try again.
2035 */
2036 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
2037 aperf_mperf_retry_count++;
2038 if (aperf_mperf_retry_count < 5)
2039 goto retry;
2040 else
2041 warnx("cpu%d jitter %lld %lld",
2042 cpu, aperf_time, mperf_time);
2043 }
2044 aperf_mperf_retry_count = 0;
2045
b2b34dfe
HC		 2046 t->aperf = t->aperf * aperf_mperf_multiplier;
2047 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 2048 }
2049
2af4f9b8
LB		 2050 if (DO_BIC(BIC_IPC))
2051 if (read(get_instr_count_fd(cpu), &t->instr_count, sizeof(long long)) != sizeof(long long))
2052 return -4;
2053
812db3f7 2054 if (DO_BIC(BIC_IRQ))
562a2d37 2055 t->irq_count = irqs_per_cpu[cpu];
812db3f7 2056 if (DO_BIC(BIC_SMI)) {
1ed51011
LB		 2057 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
2058 return -5;
2059 t->smi_count = msr & 0xFFFFFFFF;
2060 }
0539ba11 2061 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
144b44b1
LB		 2062 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
2063 return -6;
2064 }
2065
388e9c81 2066 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
495c7654 2067 if (get_mp(cpu, mp, &t->counter[i]))
388e9c81
LB		 2068 return -10;
2069 }
2070
c98d5d94
LB		 2071 /* collect core counters only for 1st thread in core */
2072 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
f4fdf2b4 2073 goto done;
c98d5d94 2074
1e9042b9 2075 if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
c98d5d94
LB		 2076 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
2077 return -6;
144b44b1
LB		 2078 }
2079
1e9042b9 2080 if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
c98d5d94
LB		 2081 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
2082 return -7;
1e9042b9 2083 } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
fb5d4327
DC		 2084 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
2085 return -7;
c98d5d94
LB		 2086 }
2087
1e9042b9 2088 if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
c98d5d94
LB		 2089 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
2090 return -8;
2091
0539ba11
LB		 2092 if (DO_BIC(BIC_Mod_c6))
2093 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2094 return -8;
2095
812db3f7 2096 if (DO_BIC(BIC_CoreTmp)) {
889facbe
LB		 2097 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2098 return -9;
2099 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2100 }
2101
9392bd98
CW		 2102 if (do_rapl & RAPL_AMD_F17H) {
2103 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2104 return -14;
2105 c->core_energy = msr & 0xFFFFFFFF;
2106 }
2107
388e9c81 2108 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
495c7654 2109 if (get_mp(cpu, mp, &c->counter[i]))
388e9c81
LB		 2110 return -10;
2111 }
889facbe 2112
c98d5d94
LB		 2113 /* collect package counters only for 1st core in package */
2114 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
f4fdf2b4 2115 goto done;
c98d5d94 2116
a99d8730 2117 if (DO_BIC(BIC_Totl_c0)) {
0b2bb692
LB		 2118 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
2119 return -10;
a99d8730
LB		 2120 }
2121 if (DO_BIC(BIC_Any_c0)) {
0b2bb692
LB		 2122 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
2123 return -11;
a99d8730
LB		 2124 }
2125 if (DO_BIC(BIC_GFX_c0)) {
0b2bb692
LB		 2126 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
2127 return -12;
a99d8730
LB		 2128 }
2129 if (DO_BIC(BIC_CPUGFX)) {
0b2bb692
LB		 2130 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
2131 return -13;
2132 }
0f47c08d 2133 if (DO_BIC(BIC_Pkgpc3))
c98d5d94
LB		 2134 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
2135 return -9;
0f47c08d 2136 if (DO_BIC(BIC_Pkgpc6)) {
0539ba11
LB		 2137 if (do_slm_cstates) {
2138 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
2139 return -10;
2140 } else {
2141 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
2142 return -10;
2143 }
2144 }
2145
0f47c08d 2146 if (DO_BIC(BIC_Pkgpc2))
c98d5d94
LB		 2147 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
2148 return -11;
0f47c08d 2149 if (DO_BIC(BIC_Pkgpc7))
c98d5d94
LB		 2150 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
2151 return -12;
0f47c08d 2152 if (DO_BIC(BIC_Pkgpc8))
ca58710f
KCA		 2153 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
2154 return -13;
0f47c08d 2155 if (DO_BIC(BIC_Pkgpc9))
ca58710f
KCA		 2156 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
2157 return -13;
0f47c08d 2158 if (DO_BIC(BIC_Pkgpc10))
ca58710f
KCA		 2159 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
2160 return -13;
0f47c08d 2161
be0e54c4
LB		 2162 if (DO_BIC(BIC_CPU_LPI))
2163 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
2164 if (DO_BIC(BIC_SYS_LPI))
2165 p->sys_lpi = cpuidle_cur_sys_lpi_us;
2166
889facbe 2167 if (do_rapl & RAPL_PKG) {
9972d5d8 2168 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STATUS, &msr))
889facbe 2169 return -13;
9972d5d8 2170 p->energy_pkg = msr;
889facbe 2171 }
9148494c 2172 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
9972d5d8 2173 if (get_msr_sum(cpu, MSR_PP0_ENERGY_STATUS, &msr))
889facbe 2174 return -14;
9972d5d8 2175 p->energy_cores = msr;
889facbe
LB		 2176 }
2177 if (do_rapl & RAPL_DRAM) {
9972d5d8 2178 if (get_msr_sum(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
889facbe 2179 return -15;
9972d5d8 2180 p->energy_dram = msr;
889facbe
LB		 2181 }
2182 if (do_rapl & RAPL_GFX) {
9972d5d8 2183 if (get_msr_sum(cpu, MSR_PP1_ENERGY_STATUS, &msr))
889facbe 2184 return -16;
9972d5d8 2185 p->energy_gfx = msr;
889facbe
LB		 2186 }
2187 if (do_rapl & RAPL_PKG_PERF_STATUS) {
9972d5d8 2188 if (get_msr_sum(cpu, MSR_PKG_PERF_STATUS, &msr))
889facbe 2189 return -16;
9972d5d8 2190 p->rapl_pkg_perf_status = msr;
889facbe
LB		 2191 }
2192 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
9972d5d8 2193 if (get_msr_sum(cpu, MSR_DRAM_PERF_STATUS, &msr))
889facbe 2194 return -16;
9972d5d8 2195 p->rapl_dram_perf_status = msr;
889facbe 2196 }
3316f99a 2197 if (do_rapl & RAPL_AMD_F17H) {
9972d5d8 2198 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
3316f99a 2199 return -13;
9972d5d8 2200 p->energy_pkg = msr;
3316f99a 2201 }
812db3f7 2202 if (DO_BIC(BIC_PkgTmp)) {
889facbe
LB		 2203 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2204 return -17;
2205 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2206 }
fdf676e5 2207
812db3f7 2208 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 2209 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2210
812db3f7 2211 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 2212 p->gfx_mhz = gfx_cur_mhz;
2213
b4b91569
RA		 2214 if (DO_BIC(BIC_GFXACTMHz))
2215 p->gfx_act_mhz = gfx_act_mhz;
2216
388e9c81 2217 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
495c7654 2218 if (get_mp(cpu, mp, &p->counter[i]))
388e9c81
LB		 2219 return -10;
2220 }
f4fdf2b4
LB		 2221done:
2222 gettimeofday(&t->tv_end, (struct timezone *)NULL);
388e9c81 2223
15aaa346 2224 return 0;
103a8fea
LB		 2225}
2226
ee7e38e3
LB		 2227/*
2228 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2229 * If you change the values, note they are used both in comparisons
2230 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2231 */
2232
2233#define PCLUKN 0 /* Unknown */
2234#define PCLRSV 1 /* Reserved */
2235#define PCL__0 2 /* PC0 */
2236#define PCL__1 3 /* PC1 */
2237#define PCL__2 4 /* PC2 */
2238#define PCL__3 5 /* PC3 */
2239#define PCL__4 6 /* PC4 */
2240#define PCL__6 7 /* PC6 */
2241#define PCL_6N 8 /* PC6 No Retention */
2242#define PCL_6R 9 /* PC6 Retention */
2243#define PCL__7 10 /* PC7 */
2244#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 2245#define PCL__8 12 /* PC8 */
2246#define PCL__9 13 /* PC9 */
445640a5
LB		 2247#define PCL_10 14 /* PC10 */
2248#define PCLUNL 15 /* Unlimited */
ee7e38e3
LB		 2249
2250int pkg_cstate_limit = PCLUKN;
2251char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
445640a5 2252 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
ee7e38e3 2253
e9257f5f
LB		 2254int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2255int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2256int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
0539ba11 2257int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
f2642888 2258int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
e9257f5f 2259int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
445640a5 2260int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2085e124 2261int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 2262
a2b7b749
LB		 2263
2264static void
2265calculate_tsc_tweak()
2266{
a2b7b749
LB		 2267 tsc_tweak = base_hz / tsc_hz;
2268}
2269
fcd17211
LB		 2270static void
2271dump_nhm_platform_info(void)
103a8fea
LB		 2272{
2273 unsigned long long msr;
2274 unsigned int ratio;
2275
ec0adc53 2276 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 2277
b7d8c148 2278 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 2279
103a8fea 2280 ratio = (msr >> 40) & 0xFF;
710f273b 2281 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
103a8fea
LB		 2282 ratio, bclk, ratio * bclk);
2283
2284 ratio = (msr >> 8) & 0xFF;
710f273b 2285 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
103a8fea
LB		 2286 ratio, bclk, ratio * bclk);
2287
7ce7d5de 2288 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
b7d8c148 2289 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
bfae2052 2290 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 2291
fcd17211
LB		 2292 return;
2293}
2294
2295static void
2296dump_hsw_turbo_ratio_limits(void)
2297{
2298 unsigned long long msr;
2299 unsigned int ratio;
2300
7ce7d5de 2301 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 2302
b7d8c148 2303 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 2304
2305 ratio = (msr >> 8) & 0xFF;
2306 if (ratio)
710f273b 2307 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
fcd17211
LB		 2308 ratio, bclk, ratio * bclk);
2309
2310 ratio = (msr >> 0) & 0xFF;
2311 if (ratio)
710f273b 2312 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
fcd17211
LB		 2313 ratio, bclk, ratio * bclk);
2314 return;
2315}
2316
2317static void
2318dump_ivt_turbo_ratio_limits(void)
2319{
2320 unsigned long long msr;
2321 unsigned int ratio;
6574a5d5 2322
7ce7d5de 2323 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 2324
b7d8c148 2325 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 2326
2327 ratio = (msr >> 56) & 0xFF;
2328 if (ratio)
710f273b 2329 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
6574a5d5
LB		 2330 ratio, bclk, ratio * bclk);
2331
2332 ratio = (msr >> 48) & 0xFF;
2333 if (ratio)
710f273b 2334 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
6574a5d5
LB		 2335 ratio, bclk, ratio * bclk);
2336
2337 ratio = (msr >> 40) & 0xFF;
2338 if (ratio)
710f273b 2339 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
6574a5d5
LB		 2340 ratio, bclk, ratio * bclk);
2341
2342 ratio = (msr >> 32) & 0xFF;
2343 if (ratio)
710f273b 2344 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
6574a5d5
LB		 2345 ratio, bclk, ratio * bclk);
2346
2347 ratio = (msr >> 24) & 0xFF;
2348 if (ratio)
710f273b 2349 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
6574a5d5
LB		 2350 ratio, bclk, ratio * bclk);
2351
2352 ratio = (msr >> 16) & 0xFF;
2353 if (ratio)
710f273b 2354 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
6574a5d5
LB		 2355 ratio, bclk, ratio * bclk);
2356
2357 ratio = (msr >> 8) & 0xFF;
2358 if (ratio)
710f273b 2359 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
6574a5d5
LB		 2360 ratio, bclk, ratio * bclk);
2361
2362 ratio = (msr >> 0) & 0xFF;
2363 if (ratio)
710f273b 2364 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
6574a5d5 2365 ratio, bclk, ratio * bclk);
fcd17211
LB		 2366 return;
2367}
31e07522
LB		 2368int has_turbo_ratio_group_limits(int family, int model)
2369{
2370
2371 if (!genuine_intel)
2372 return 0;
2373
2374 switch (model) {
2375 case INTEL_FAM6_ATOM_GOLDMONT:
2376 case INTEL_FAM6_SKYLAKE_X:
5ebb34ed 2377 case INTEL_FAM6_ATOM_GOLDMONT_D:
20de0dab 2378 case INTEL_FAM6_ATOM_TREMONT_D:
31e07522
LB		 2379 return 1;
2380 }
2381 return 0;
2382}
6574a5d5 2383
fcd17211 2384static void
31e07522 2385dump_turbo_ratio_limits(int family, int model)
fcd17211 2386{
31e07522
LB		 2387 unsigned long long msr, core_counts;
2388 unsigned int ratio, group_size;
103a8fea 2389
7ce7d5de 2390 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
b7d8c148 2391 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5 2392
31e07522
LB		 2393 if (has_turbo_ratio_group_limits(family, model)) {
2394 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2395 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2396 } else {
2397 core_counts = 0x0807060504030201;
2398 }
2399
6574a5d5 2400 ratio = (msr >> 56) & 0xFF;
31e07522 2401 group_size = (core_counts >> 56) & 0xFF;
6574a5d5 2402 if (ratio)
31e07522
LB		 2403 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2404 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2405
2406 ratio = (msr >> 48) & 0xFF;
31e07522 2407 group_size = (core_counts >> 48) & 0xFF;
6574a5d5 2408 if (ratio)
31e07522
LB		 2409 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2410 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2411
2412 ratio = (msr >> 40) & 0xFF;
31e07522 2413 group_size = (core_counts >> 40) & 0xFF;
6574a5d5 2414 if (ratio)
31e07522
LB		 2415 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2416 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2417
2418 ratio = (msr >> 32) & 0xFF;
31e07522 2419 group_size = (core_counts >> 32) & 0xFF;
6574a5d5 2420 if (ratio)
31e07522
LB		 2421 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2422 ratio, bclk, ratio * bclk, group_size);
6574a5d5 2423
103a8fea 2424 ratio = (msr >> 24) & 0xFF;
31e07522 2425 group_size = (core_counts >> 24) & 0xFF;
103a8fea 2426 if (ratio)
31e07522
LB		 2427 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2428 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2429
2430 ratio = (msr >> 16) & 0xFF;
31e07522 2431 group_size = (core_counts >> 16) & 0xFF;
103a8fea 2432 if (ratio)
31e07522
LB		 2433 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2434 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2435
2436 ratio = (msr >> 8) & 0xFF;
31e07522 2437 group_size = (core_counts >> 8) & 0xFF;
103a8fea 2438 if (ratio)
31e07522
LB		 2439 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2440 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2441
2442 ratio = (msr >> 0) & 0xFF;
31e07522 2443 group_size = (core_counts >> 0) & 0xFF;
103a8fea 2444 if (ratio)
31e07522
LB		 2445 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2446 ratio, bclk, ratio * bclk, group_size);
fcd17211
LB		 2447 return;
2448}
3a9a941d 2449
0f7887c4
LB		 2450static void
2451dump_atom_turbo_ratio_limits(void)
2452{
2453 unsigned long long msr;
2454 unsigned int ratio;
2455
2456 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2457 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2458
2459 ratio = (msr >> 0) & 0x3F;
2460 if (ratio)
2461 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2462 ratio, bclk, ratio * bclk);
2463
2464 ratio = (msr >> 8) & 0x3F;
2465 if (ratio)
2466 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2467 ratio, bclk, ratio * bclk);
2468
2469 ratio = (msr >> 16) & 0x3F;
2470 if (ratio)
2471 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2472 ratio, bclk, ratio * bclk);
2473
2474 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2475 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2476
2477 ratio = (msr >> 24) & 0x3F;
2478 if (ratio)
2479 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2480 ratio, bclk, ratio * bclk);
2481
2482 ratio = (msr >> 16) & 0x3F;
2483 if (ratio)
2484 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2485 ratio, bclk, ratio * bclk);
2486
2487 ratio = (msr >> 8) & 0x3F;
2488 if (ratio)
2489 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2490 ratio, bclk, ratio * bclk);
2491
2492 ratio = (msr >> 0) & 0x3F;
2493 if (ratio)
2494 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2495 ratio, bclk, ratio * bclk);
2496}
2497
fb5d4327
DC		 2498static void
2499dump_knl_turbo_ratio_limits(void)
2500{
cbf97aba
HC		 2501 const unsigned int buckets_no = 7;
2502
fb5d4327 2503 unsigned long long msr;
cbf97aba
HC		 2504 int delta_cores, delta_ratio;
2505 int i, b_nr;
2506 unsigned int cores[buckets_no];
2507 unsigned int ratio[buckets_no];
fb5d4327 2508
ebf5926a 2509 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
fb5d4327 2510
b7d8c148 2511 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
bfae2052 2512 base_cpu, msr);
fb5d4327
DC		 2513
2514 /**
2515 * Turbo encoding in KNL is as follows:
cbf97aba
HC		 2516 * [0] -- Reserved
2517 * [7:1] -- Base value of number of active cores of bucket 1.
fb5d4327
DC		 2518 * [15:8] -- Base value of freq ratio of bucket 1.
2519 * [20:16] -- +ve delta of number of active cores of bucket 2.
2520 * i.e. active cores of bucket 2 =
2521 * active cores of bucket 1 + delta
2522 * [23:21] -- Negative delta of freq ratio of bucket 2.
2523 * i.e. freq ratio of bucket 2 =
2524 * freq ratio of bucket 1 - delta
2525 * [28:24]-- +ve delta of number of active cores of bucket 3.
2526 * [31:29]-- -ve delta of freq ratio of bucket 3.
2527 * [36:32]-- +ve delta of number of active cores of bucket 4.
2528 * [39:37]-- -ve delta of freq ratio of bucket 4.
2529 * [44:40]-- +ve delta of number of active cores of bucket 5.
2530 * [47:45]-- -ve delta of freq ratio of bucket 5.
2531 * [52:48]-- +ve delta of number of active cores of bucket 6.
2532 * [55:53]-- -ve delta of freq ratio of bucket 6.
2533 * [60:56]-- +ve delta of number of active cores of bucket 7.
2534 * [63:61]-- -ve delta of freq ratio of bucket 7.
2535 */
cbf97aba
HC		 2536
2537 b_nr = 0;
2538 cores[b_nr] = (msr & 0xFF) >> 1;
2539 ratio[b_nr] = (msr >> 8) & 0xFF;
2540
2541 for (i = 16; i < 64; i += 8) {
fb5d4327 2542 delta_cores = (msr >> i) & 0x1F;
cbf97aba
HC		 2543 delta_ratio = (msr >> (i + 5)) & 0x7;
2544
2545 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2546 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2547 b_nr++;
fb5d4327 2548 }
cbf97aba
HC		 2549
2550 for (i = buckets_no - 1; i >= 0; i--)
2551 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
b7d8c148 2552 fprintf(outf,
710f273b 2553 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
cbf97aba 2554 ratio[i], bclk, ratio[i] * bclk, cores[i]);
fb5d4327
DC		 2555}
2556
fcd17211
LB		 2557static void
2558dump_nhm_cst_cfg(void)
2559{
2560 unsigned long long msr;
2561
1df2e55a 2562 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
fcd17211 2563
1df2e55a 2564 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
fcd17211 2565
3e8b62bf 2566 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
fcd17211
LB		 2567 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2568 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2569 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2570 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2571 (msr & (1 << 15)) ? "" : "UN",
6c34f160 2572 (unsigned int)msr & 0xF,
fcd17211 2573 pkg_cstate_limit_strings[pkg_cstate_limit]);
ac980e13
AB		 2574
2575#define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2576 if (has_automatic_cstate_conversion) {
2577 fprintf(outf, ", automatic c-state conversion=%s",
2578 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2579 }
2580
2581 fprintf(outf, ")\n");
2582
fcd17211 2583 return;
103a8fea
LB		 2584}
2585
6fb3143b
LB		 2586static void
2587dump_config_tdp(void)
2588{
2589 unsigned long long msr;
2590
2591 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
b7d8c148 2592 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
685b535b 2593 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
6fb3143b
LB		 2594
2595 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
b7d8c148 2596 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
6fb3143b 2597 if (msr) {
685b535b
CY		 2598 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2599 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2600 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2601 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2602 }
b7d8c148 2603 fprintf(outf, ")\n");
6fb3143b
LB		 2604
2605 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
b7d8c148 2606 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
6fb3143b 2607 if (msr) {
685b535b
CY		 2608 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2609 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2610 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2611 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2612 }
b7d8c148 2613 fprintf(outf, ")\n");
6fb3143b
LB		 2614
2615 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
b7d8c148 2616 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
6fb3143b 2617 if ((msr) & 0x3)
b7d8c148
LB		 2618 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2619 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2620 fprintf(outf, ")\n");
36229897 2621
6fb3143b 2622 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
b7d8c148 2623 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
685b535b 2624 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
b7d8c148
LB		 2625 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2626 fprintf(outf, ")\n");
6fb3143b 2627}
5a63426e
LB		 2628
2629unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2630
2631void print_irtl(void)
2632{
2633 unsigned long long msr;
2634
2635 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2636 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2637 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2638 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2639
2640 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2641 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2642 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2643 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2644
2645 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2646 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2647 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2648 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2649
2650 if (!do_irtl_hsw)
2651 return;
2652
2653 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2654 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2655 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2656 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2657
2658 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2659 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2660 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2661 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2662
2663 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2664 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2665 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2666 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2667
2668}
36229897
LB		 2669void free_fd_percpu(void)
2670{
2671 int i;
2672
01a67adf 2673 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
36229897
LB		 2674 if (fd_percpu[i] != 0)
2675 close(fd_percpu[i]);
2676 }
2677
2678 free(fd_percpu);
6fb3143b
LB		 2679}
2680
c98d5d94 2681void free_all_buffers(void)
103a8fea 2682{
0e2d8f05
LB		 2683 int i;
2684
c98d5d94
LB		 2685 CPU_FREE(cpu_present_set);
2686 cpu_present_set = NULL;
36229897 2687 cpu_present_setsize = 0;
103a8fea 2688
c98d5d94
LB		 2689 CPU_FREE(cpu_affinity_set);
2690 cpu_affinity_set = NULL;
2691 cpu_affinity_setsize = 0;
103a8fea 2692
c98d5d94
LB		 2693 free(thread_even);
2694 free(core_even);
2695 free(package_even);
103a8fea 2696
c98d5d94
LB		 2697 thread_even = NULL;
2698 core_even = NULL;
2699 package_even = NULL;
103a8fea 2700
c98d5d94
LB		 2701 free(thread_odd);
2702 free(core_odd);
2703 free(package_odd);
103a8fea 2704
c98d5d94
LB		 2705 thread_odd = NULL;
2706 core_odd = NULL;
2707 package_odd = NULL;
103a8fea 2708
c98d5d94
LB		 2709 free(output_buffer);
2710 output_buffer = NULL;
2711 outp = NULL;
36229897
LB		 2712
2713 free_fd_percpu();
562a2d37
LB		 2714
2715 free(irq_column_2_cpu);
2716 free(irqs_per_cpu);
0e2d8f05
LB		 2717
2718 for (i = 0; i <= topo.max_cpu_num; ++i) {
2719 if (cpus[i].put_ids)
2720 CPU_FREE(cpus[i].put_ids);
2721 }
2722 free(cpus);
103a8fea
LB		 2723}
2724
57a42a34 2725
c98d5d94 2726/*
95aebc44 2727 * Parse a file containing a single int.
6de68fe1
LB		 2728 * Return 0 if file can not be opened
2729 * Exit if file can be opened, but can not be parsed
c98d5d94 2730 */
95aebc44 2731int parse_int_file(const char *fmt, ...)
103a8fea 2732{
95aebc44
JT		 2733 va_list args;
2734 char path[PATH_MAX];
c98d5d94 2735 FILE *filep;
95aebc44 2736 int value;
103a8fea 2737
95aebc44
JT		 2738 va_start(args, fmt);
2739 vsnprintf(path, sizeof(path), fmt, args);
2740 va_end(args);
6de68fe1
LB		 2741 filep = fopen(path, "r");
2742 if (!filep)
2743 return 0;
b2c95d90
JT		 2744 if (fscanf(filep, "%d", &value) != 1)
2745 err(1, "%s: failed to parse number from file", path);
c98d5d94 2746 fclose(filep);
95aebc44
JT		 2747 return value;
2748}
2749
c98d5d94
LB		 2750/*
2751 * cpu_is_first_core_in_package(cpu)
2752 * return 1 if given CPU is 1st core in package
2753 */
2754int cpu_is_first_core_in_package(int cpu)
103a8fea 2755{
95aebc44 2756 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 2757}
2758
2759int get_physical_package_id(int cpu)
2760{
95aebc44 2761 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 2762}
2763
6de68fe1
LB		 2764int get_die_id(int cpu)
2765{
2766 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2767}
2768
103a8fea
LB		 2769int get_core_id(int cpu)
2770{
95aebc44 2771 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 2772}
2773
ef605741
PB		 2774void set_node_data(void)
2775{
2ffbb224
PB		 2776 int pkg, node, lnode, cpu, cpux;
2777 int cpu_count;
2778
2779 /* initialize logical_node_id */
2780 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2781 cpus[cpu].logical_node_id = -1;
2782
2783 cpu_count = 0;
2784 for (pkg = 0; pkg < topo.num_packages; pkg++) {
2785 lnode = 0;
2786 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2787 if (cpus[cpu].physical_package_id != pkg)
2788 continue;
2789 /* find a cpu with an unset logical_node_id */
2790 if (cpus[cpu].logical_node_id != -1)
2791 continue;
2792 cpus[cpu].logical_node_id = lnode;
2793 node = cpus[cpu].physical_node_id;
2794 cpu_count++;
2795 /*
2796 * find all matching cpus on this pkg and set
2797 * the logical_node_id
2798 */
2799 for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2800 if ((cpus[cpux].physical_package_id == pkg) &&
2801 (cpus[cpux].physical_node_id == node)) {
2802 cpus[cpux].logical_node_id = lnode;
2803 cpu_count++;
2804 }
2805 }
2806 lnode++;
2807 if (lnode > topo.nodes_per_pkg)
2808 topo.nodes_per_pkg = lnode;
2809 }
2810 if (cpu_count >= topo.max_cpu_num)
2811 break;
ef605741 2812 }
ef605741
PB		 2813}
2814
2815int get_physical_node_id(struct cpu_topology *thiscpu)
c98d5d94
LB		 2816{
2817 char path[80];
2818 FILE *filep;
0e2d8f05
LB		 2819 int i;
2820 int cpu = thiscpu->logical_cpu_id;
e275b388 2821
0e2d8f05
LB		 2822 for (i = 0; i <= topo.max_cpu_num; i++) {
2823 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2824 cpu, i);
2825 filep = fopen(path, "r");
2826 if (!filep)
2827 continue;
2828 fclose(filep);
2829 return i;
e275b388 2830 }
0e2d8f05
LB		 2831 return -1;
2832}
c98d5d94 2833
0e2d8f05
LB		 2834int get_thread_siblings(struct cpu_topology *thiscpu)
2835{
2836 char path[80], character;
2837 FILE *filep;
2838 unsigned long map;
8cb48b32 2839 int so, shift, sib_core;
0e2d8f05
LB		 2840 int cpu = thiscpu->logical_cpu_id;
2841 int offset = topo.max_cpu_num + 1;
2842 size_t size;
8cb48b32 2843 int thread_id = 0;
0e2d8f05
LB		 2844
2845 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
8cb48b32
PB		 2846 if (thiscpu->thread_id < 0)
2847 thiscpu->thread_id = thread_id++;
0e2d8f05
LB		 2848 if (!thiscpu->put_ids)
2849 return -1;
2850
2851 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2852 CPU_ZERO_S(size, thiscpu->put_ids);
2853
2854 sprintf(path,
2855 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
3d7772ea
LB		 2856 filep = fopen(path, "r");
2857
2858 if (!filep) {
2859 warnx("%s: open failed", path);
2860 return -1;
2861 }
0e2d8f05
LB		 2862 do {
2863 offset -= BITMASK_SIZE;
8173c336
BH		 2864 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2865 err(1, "%s: failed to parse file", path);
0e2d8f05
LB		 2866 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2867 if ((map >> shift) & 0x1) {
8cb48b32
PB		 2868 so = shift + offset;
2869 sib_core = get_core_id(so);
2870 if (sib_core == thiscpu->physical_core_id) {
2871 CPU_SET_S(so, size, thiscpu->put_ids);
2872 if ((so != cpu) &&
2873 (cpus[so].thread_id < 0))
2874 cpus[so].thread_id =
2875 thread_id++;
2876 }
0e2d8f05
LB		 2877 }
2878 }
2879 } while (!strncmp(&character, ",", 1));
c98d5d94 2880 fclose(filep);
0e2d8f05
LB		 2881
2882 return CPU_COUNT_S(size, thiscpu->put_ids);
c98d5d94
LB		 2883}
2884
103a8fea 2885/*
c98d5d94
LB		 2886 * run func(thread, core, package) in topology order
2887 * skip non-present cpus
103a8fea
LB		 2888 */
2889
c98d5d94
LB		 2890int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2891 struct pkg_data *, struct thread_data *, struct core_data *,
2892 struct pkg_data *), struct thread_data *thread_base,
2893 struct core_data *core_base, struct pkg_data *pkg_base,
2894 struct thread_data *thread_base2, struct core_data *core_base2,
2895 struct pkg_data *pkg_base2)
2896{
40f5cfe7 2897 int retval, pkg_no, node_no, core_no, thread_no;
c98d5d94
LB		 2898
2899 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
40f5cfe7
PB		 2900 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2901 for (core_no = 0; core_no < topo.cores_per_node;
2902 ++core_no) {
2903 for (thread_no = 0; thread_no <
2904 topo.threads_per_core; ++thread_no) {
2905 struct thread_data *t, *t2;
2906 struct core_data *c, *c2;
2907 struct pkg_data *p, *p2;
2908
2909 t = GET_THREAD(thread_base, thread_no,
2910 core_no, node_no,
2911 pkg_no);
2912
2913 if (cpu_is_not_present(t->cpu_id))
2914 continue;
2915
2916 t2 = GET_THREAD(thread_base2, thread_no,
2917 core_no, node_no,
2918 pkg_no);
2919
2920 c = GET_CORE(core_base, core_no,
2921 node_no, pkg_no);
2922 c2 = GET_CORE(core_base2, core_no,
2923 node_no,
2924 pkg_no);
2925
2926 p = GET_PKG(pkg_base, pkg_no);
2927 p2 = GET_PKG(pkg_base2, pkg_no);
2928
2929 retval = func(t, c, p, t2, c2, p2);
2930 if (retval)
2931 return retval;
2932 }
c98d5d94
LB		 2933 }
2934 }
2935 }
2936 return 0;
2937}
2938
2939/*
2940 * run func(cpu) on every cpu in /proc/stat
2941 * return max_cpu number
2942 */
2943int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 2944{
2945 FILE *fp;
c98d5d94 2946 int cpu_num;
103a8fea
LB		 2947 int retval;
2948
57a42a34 2949 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 2950
2951 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 2952 if (retval != 0)
2953 err(1, "%s: failed to parse format", proc_stat);
103a8fea 2954
c98d5d94
LB		 2955 while (1) {
2956 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 2957 if (retval != 1)
2958 break;
2959
c98d5d94
LB		 2960 retval = func(cpu_num);
2961 if (retval) {
2962 fclose(fp);
2963 return(retval);
2964 }
103a8fea
LB		 2965 }
2966 fclose(fp);
c98d5d94 2967 return 0;
103a8fea
LB		 2968}
2969
2970void re_initialize(void)
2971{
c98d5d94
LB		 2972 free_all_buffers();
2973 setup_all_buffers();
3d7772ea 2974 fprintf(outf, "turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 2975}
2976
843c5791
PB		 2977void set_max_cpu_num(void)
2978{
2979 FILE *filep;
8201a028 2980 int base_cpu;
843c5791 2981 unsigned long dummy;
8201a028 2982 char pathname[64];
843c5791 2983
8201a028
PB		 2984 base_cpu = sched_getcpu();
2985 if (base_cpu < 0)
2986 err(1, "cannot find calling cpu ID");
2987 sprintf(pathname,
2988 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings",
2989 base_cpu);
2990
2991 filep = fopen_or_die(pathname, "r");
843c5791 2992 topo.max_cpu_num = 0;
843c5791 2993 while (fscanf(filep, "%lx,", &dummy) == 1)
0e2d8f05 2994 topo.max_cpu_num += BITMASK_SIZE;
843c5791
PB		 2995 fclose(filep);
2996 topo.max_cpu_num--; /* 0 based */
2997}
c98d5d94 2998
103a8fea 2999/*
c98d5d94
LB		 3000 * count_cpus()
3001 * remember the last one seen, it will be the max
103a8fea 3002 */
c98d5d94 3003int count_cpus(int cpu)
103a8fea 3004{
843c5791 3005 topo.num_cpus++;
c98d5d94
LB		 3006 return 0;
3007}
3008int mark_cpu_present(int cpu)
3009{
3010 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 3011 return 0;
103a8fea
LB		 3012}
3013
8cb48b32
PB		 3014int init_thread_id(int cpu)
3015{
3016 cpus[cpu].thread_id = -1;
3017 return 0;
3018}
3019
562a2d37
LB		 3020/*
3021 * snapshot_proc_interrupts()
3022 *
3023 * read and record summary of /proc/interrupts
3024 *
3025 * return 1 if config change requires a restart, else return 0
3026 */
3027int snapshot_proc_interrupts(void)
3028{
3029 static FILE *fp;
3030 int column, retval;
3031
3032 if (fp == NULL)
3033 fp = fopen_or_die("/proc/interrupts", "r");
3034 else
3035 rewind(fp);
3036
3037 /* read 1st line of /proc/interrupts to get cpu* name for each column */
3038 for (column = 0; column < topo.num_cpus; ++column) {
3039 int cpu_number;
3040
3041 retval = fscanf(fp, " CPU%d", &cpu_number);
3042 if (retval != 1)
3043 break;
3044
3045 if (cpu_number > topo.max_cpu_num) {
3046 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
3047 return 1;
3048 }
3049
3050 irq_column_2_cpu[column] = cpu_number;
3051 irqs_per_cpu[cpu_number] = 0;
3052 }
3053
3054 /* read /proc/interrupt count lines and sum up irqs per cpu */
3055 while (1) {
3056 int column;
3057 char buf[64];
3058
3059 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
3060 if (retval != 1)
3061 break;
3062
3063 /* read the count per cpu */
3064 for (column = 0; column < topo.num_cpus; ++column) {
3065
3066 int cpu_number, irq_count;
3067
3068 retval = fscanf(fp, " %d", &irq_count);
3069 if (retval != 1)
3070 break;
3071
3072 cpu_number = irq_column_2_cpu[column];
3073 irqs_per_cpu[cpu_number] += irq_count;
3074
3075 }
3076
3077 while (getc(fp) != '\n')
3078 ; /* flush interrupt description */
3079
3080 }
3081 return 0;
3082}
fdf676e5
LB		 3083/*
3084 * snapshot_gfx_rc6_ms()
3085 *
3086 * record snapshot of
3087 * /sys/class/drm/card0/power/rc6_residency_ms
3088 *
3089 * return 1 if config change requires a restart, else return 0
3090 */
3091int snapshot_gfx_rc6_ms(void)
3092{
3093 FILE *fp;
3094 int retval;
3095
3096 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
3097
3098 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
3099 if (retval != 1)
3100 err(1, "GFX rc6");
3101
3102 fclose(fp);
3103
3104 return 0;
3105}
27d47356
LB		 3106/*
3107 * snapshot_gfx_mhz()
3108 *
3109 * record snapshot of
3110 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
3111 *
3112 * return 1 if config change requires a restart, else return 0
3113 */
3114int snapshot_gfx_mhz(void)
3115{
3116 static FILE *fp;
3117 int retval;
3118
3119 if (fp == NULL)
3120 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
22048c54 3121 else {
27d47356 3122 rewind(fp);
22048c54
LB		 3123 fflush(fp);
3124 }
27d47356
LB		 3125
3126 retval = fscanf(fp, "%d", &gfx_cur_mhz);
3127 if (retval != 1)
3128 err(1, "GFX MHz");
3129
3130 return 0;
3131}
562a2d37 3132
b4b91569
RA		 3133/*
3134 * snapshot_gfx_cur_mhz()
3135 *
3136 * record snapshot of
3137 * /sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz
3138 *
3139 * return 1 if config change requires a restart, else return 0
3140 */
3141int snapshot_gfx_act_mhz(void)
3142{
3143 static FILE *fp;
3144 int retval;
3145
3146 if (fp == NULL)
3147 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", "r");
3148 else {
3149 rewind(fp);
3150 fflush(fp);
3151 }
3152
3153 retval = fscanf(fp, "%d", &gfx_act_mhz);
3154 if (retval != 1)
3155 err(1, "GFX ACT MHz");
3156
3157 return 0;
3158}
3159
be0e54c4
LB		 3160/*
3161 * snapshot_cpu_lpi()
3162 *
3163 * record snapshot of
3164 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
be0e54c4
LB		 3165 */
3166int snapshot_cpu_lpi_us(void)
3167{
3168 FILE *fp;
3169 int retval;
3170
3171 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
3172
3173 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
5ea7647b
PB		 3174 if (retval != 1) {
3175 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
3176 BIC_NOT_PRESENT(BIC_CPU_LPI);
605736c6 3177 fclose(fp);
5ea7647b
PB		 3178 return -1;
3179 }
be0e54c4
LB		 3180
3181 fclose(fp);
3182
3183 return 0;
3184}
3185/*
3186 * snapshot_sys_lpi()
3187 *
1f81c5ef 3188 * record snapshot of sys_lpi_file
be0e54c4
LB		 3189 */
3190int snapshot_sys_lpi_us(void)
3191{
3192 FILE *fp;
3193 int retval;
3194
1f81c5ef 3195 fp = fopen_or_die(sys_lpi_file, "r");
be0e54c4
LB		 3196
3197 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
5ea7647b
PB		 3198 if (retval != 1) {
3199 fprintf(stderr, "Disabling Low Power Idle System output\n");
3200 BIC_NOT_PRESENT(BIC_SYS_LPI);
15423b95 3201 fclose(fp);
5ea7647b
PB		 3202 return -1;
3203 }
be0e54c4
LB		 3204 fclose(fp);
3205
3206 return 0;
3207}
562a2d37
LB		 3208/*
3209 * snapshot /proc and /sys files
3210 *
3211 * return 1 if configuration restart needed, else return 0
3212 */
3213int snapshot_proc_sysfs_files(void)
3214{
218f0e8d
LB		 3215 if (DO_BIC(BIC_IRQ))
3216 if (snapshot_proc_interrupts())
3217 return 1;
562a2d37 3218
812db3f7 3219 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 3220 snapshot_gfx_rc6_ms();
3221
812db3f7 3222 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 3223 snapshot_gfx_mhz();
3224
b4b91569
RA		 3225 if (DO_BIC(BIC_GFXACTMHz))
3226 snapshot_gfx_act_mhz();
3227
be0e54c4
LB		 3228 if (DO_BIC(BIC_CPU_LPI))
3229 snapshot_cpu_lpi_us();
3230
3231 if (DO_BIC(BIC_SYS_LPI))
3232 snapshot_sys_lpi_us();
3233
562a2d37
LB		 3234 return 0;
3235}
3236
8aa2ed0b
LB		 3237int exit_requested;
3238
3239static void signal_handler (int signal)
3240{
3241 switch (signal) {
3242 case SIGINT:
3243 exit_requested = 1;
3244 if (debug)
3245 fprintf(stderr, " SIGINT\n");
3246 break;
07211960
LB		 3247 case SIGUSR1:
3248 if (debug > 1)
3249 fprintf(stderr, "SIGUSR1\n");
3250 break;
8aa2ed0b
LB		 3251 }
3252}
3253
3254void setup_signal_handler(void)
3255{
3256 struct sigaction sa;
3257
3258 memset(&sa, 0, sizeof(sa));
3259
3260 sa.sa_handler = &signal_handler;
3261
3262 if (sigaction(SIGINT, &sa, NULL) < 0)
3263 err(1, "sigaction SIGINT");
07211960
LB		 3264 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3265 err(1, "sigaction SIGUSR1");
8aa2ed0b 3266}
b9ad8ee0 3267
47936f94 3268void do_sleep(void)
b9ad8ee0 3269{
c026c236
AB		 3270 struct timeval tout;
3271 struct timespec rest;
b9ad8ee0
LB		 3272 fd_set readfds;
3273 int retval;
3274
3275 FD_ZERO(&readfds);
3276 FD_SET(0, &readfds);
3277
c026c236 3278 if (ignore_stdin) {
47936f94
AB		 3279 nanosleep(&interval_ts, NULL);
3280 return;
3281 }
b9ad8ee0 3282
c026c236
AB		 3283 tout = interval_tv;
3284 retval = select(1, &readfds, NULL, NULL, &tout);
b9ad8ee0
LB		 3285
3286 if (retval == 1) {
b9ad8ee0
LB		 3287 switch (getc(stdin)) {
3288 case 'q':
3289 exit_requested = 1;
3290 break;
c026c236
AB		 3291 case EOF:
3292 /*
3293 * 'stdin' is a pipe closed on the other end. There
3294 * won't be any further input.
3295 */
3296 ignore_stdin = 1;
3297 /* Sleep the rest of the time */
3298 rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3299 rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3300 nanosleep(&rest, NULL);
b9ad8ee0 3301 }
b9ad8ee0 3302 }
b9ad8ee0 3303}
47936f94 3304
87e15da9
CY		 3305int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
3306{
3307 int ret, idx;
3308 unsigned long long msr_cur, msr_last;
3309
3310 if (!per_cpu_msr_sum)
3311 return 1;
3312
3313 idx = offset_to_idx(offset);
3314 if (idx < 0)
3315 return idx;
3316 /* get_msr_sum() = sum + (get_msr() - last) */
3317 ret = get_msr(cpu, offset, &msr_cur);
3318 if (ret)
3319 return ret;
3320 msr_last = per_cpu_msr_sum[cpu].entries[idx].last;
3321 DELTA_WRAP32(msr_cur, msr_last);
3322 *msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
3323
3324 return 0;
3325}
3326
3327timer_t timerid;
3328
3329/* Timer callback, update the sum of MSRs periodically. */
3330static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3331{
3332 int i, ret;
3333 int cpu = t->cpu_id;
3334
3335 for (i = IDX_PKG_ENERGY; i < IDX_COUNT; i++) {
3336 unsigned long long msr_cur, msr_last;
3337 int offset;
3338
3339 if (!idx_valid(i))
3340 continue;
3341 offset = idx_to_offset(i);
3342 if (offset < 0)
3343 continue;
3344 ret = get_msr(cpu, offset, &msr_cur);
3345 if (ret) {
3346 fprintf(outf, "Can not update msr(0x%x)\n", offset);
3347 continue;
3348 }
3349
3350 msr_last = per_cpu_msr_sum[cpu].entries[i].last;
3351 per_cpu_msr_sum[cpu].entries[i].last = msr_cur & 0xffffffff;
3352
3353 DELTA_WRAP32(msr_cur, msr_last);
3354 per_cpu_msr_sum[cpu].entries[i].sum += msr_last;
3355 }
3356 return 0;
3357}
3358
3359static void
3360msr_record_handler(union sigval v)
3361{
3362 for_all_cpus(update_msr_sum, EVEN_COUNTERS);
3363}
3364
3365void msr_sum_record(void)
3366{
3367 struct itimerspec its;
3368 struct sigevent sev;
3369
3370 per_cpu_msr_sum = calloc(topo.max_cpu_num + 1, sizeof(struct msr_sum_array));
3371 if (!per_cpu_msr_sum) {
3372 fprintf(outf, "Can not allocate memory for long time MSR.\n");
3373 return;
3374 }
3375 /*
3376 * Signal handler might be restricted, so use thread notifier instead.
3377 */
3378 memset(&sev, 0, sizeof(struct sigevent));
3379 sev.sigev_notify = SIGEV_THREAD;
3380 sev.sigev_notify_function = msr_record_handler;
3381
3382 sev.sigev_value.sival_ptr = &timerid;
3383 if (timer_create(CLOCK_REALTIME, &sev, &timerid) == -1) {
3384 fprintf(outf, "Can not create timer.\n");
3385 goto release_msr;
3386 }
3387
3388 its.it_value.tv_sec = 0;
3389 its.it_value.tv_nsec = 1;
3390 /*
3391 * A wraparound time has been calculated early.
3392 * Some sources state that the peak power for a
3393 * microprocessor is usually 1.5 times the TDP rating,
3394 * use 2 * TDP for safety.
3395 */
3396 its.it_interval.tv_sec = rapl_joule_counter_range / 2;
3397 its.it_interval.tv_nsec = 0;
3398
3399 if (timer_settime(timerid, 0, &its, NULL) == -1) {
3400 fprintf(outf, "Can not set timer.\n");
3401 goto release_timer;
3402 }
3403 return;
3404
3405 release_timer:
3406 timer_delete(timerid);
3407 release_msr:
3408 free(per_cpu_msr_sum);
3409}
4c2122d4 3410
103a8fea
LB		 3411void turbostat_loop()
3412{
c98d5d94 3413 int retval;
e52966c0 3414 int restarted = 0;
023fe0ac 3415 int done_iters = 0;
c98d5d94 3416
8aa2ed0b
LB		 3417 setup_signal_handler();
3418
103a8fea 3419restart:
e52966c0
LB		 3420 restarted++;
3421
562a2d37 3422 snapshot_proc_sysfs_files();
c98d5d94 3423 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 3424 first_counter_read = 0;
d91bb17c
LB		 3425 if (retval < -1) {
3426 exit(retval);
3427 } else if (retval == -1) {
3d7772ea 3428 if (restarted > 10) {
e52966c0
LB		 3429 exit(retval);
3430 }
c98d5d94
LB		 3431 re_initialize();
3432 goto restart;
3433 }
e52966c0 3434 restarted = 0;
023fe0ac 3435 done_iters = 0;
103a8fea
LB		 3436 gettimeofday(&tv_even, (struct timezone *)NULL);
3437
3438 while (1) {
c98d5d94 3439 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 3440 re_initialize();
3441 goto restart;
3442 }
b9ad8ee0 3443 do_sleep();
562a2d37
LB		 3444 if (snapshot_proc_sysfs_files())
3445 goto restart;
c98d5d94 3446 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 3447 if (retval < -1) {
3448 exit(retval);
3449 } else if (retval == -1) {
15aaa346
LB		 3450 re_initialize();
3451 goto restart;
3452 }
103a8fea 3453 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3454 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 3455 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3456 re_initialize();
3457 goto restart;
3458 }
c98d5d94
LB		 3459 compute_average(EVEN_COUNTERS);
3460 format_all_counters(EVEN_COUNTERS);
b7d8c148 3461 flush_output_stdout();
8aa2ed0b
LB		 3462 if (exit_requested)
3463 break;
023fe0ac
CY		 3464 if (num_iterations && ++done_iters >= num_iterations)
3465 break;
b9ad8ee0 3466 do_sleep();
562a2d37
LB		 3467 if (snapshot_proc_sysfs_files())
3468 goto restart;
c98d5d94 3469 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 3470 if (retval < -1) {
3471 exit(retval);
3472 } else if (retval == -1) {
103a8fea
LB		 3473 re_initialize();
3474 goto restart;
3475 }
103a8fea 3476 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 3477 timersub(&tv_even, &tv_odd, &tv_delta);
ba3dec99
LB		 3478 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3479 re_initialize();
3480 goto restart;
3481 }
c98d5d94
LB		 3482 compute_average(ODD_COUNTERS);
3483 format_all_counters(ODD_COUNTERS);
b7d8c148 3484 flush_output_stdout();
8aa2ed0b
LB		 3485 if (exit_requested)
3486 break;
023fe0ac
CY		 3487 if (num_iterations && ++done_iters >= num_iterations)
3488 break;
103a8fea
LB		 3489 }
3490}
3491
3492void check_dev_msr()
3493{
3494 struct stat sb;
7ce7d5de 3495 char pathname[32];
103a8fea 3496
7ce7d5de
PB		 3497 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3498 if (stat(pathname, &sb))
a21d38c8
LB		 3499 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3500 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 3501}
3502
fcaa681c
LB		 3503/*
3504 * check for CAP_SYS_RAWIO
3505 * return 0 on success
3506 * return 1 on fail
3507 */
3508int check_for_cap_sys_rawio(void)
103a8fea 3509{
fcaa681c
LB		 3510 cap_t caps;
3511 cap_flag_value_t cap_flag_value;
98481e79 3512
fcaa681c
LB		 3513 caps = cap_get_proc();
3514 if (caps == NULL)
3515 err(-6, "cap_get_proc\n");
98481e79 3516
fcaa681c
LB		 3517 if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3518 err(-6, "cap_get\n");
3519
3520 if (cap_flag_value != CAP_SET) {
98481e79
LB		 3521 warnx("capget(CAP_SYS_RAWIO) failed,"
3522 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
fcaa681c 3523 return 1;
98481e79
LB		 3524 }
3525
fcaa681c
LB		 3526 if (cap_free(caps) == -1)
3527 err(-6, "cap_free\n");
3528
3529 return 0;
3530}
3531void check_permissions(void)
3532{
3533 int do_exit = 0;
3534 char pathname[32];
3535
3536 /* check for CAP_SYS_RAWIO */
3537 do_exit += check_for_cap_sys_rawio();
3538
98481e79 3539 /* test file permissions */
7ce7d5de
PB		 3540 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3541 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 3542 do_exit++;
3543 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3544 }
3545
3546 /* if all else fails, thell them to be root */
3547 if (do_exit)
3548 if (getuid() != 0)
d7899447 3549 warnx("... or simply run as root");
98481e79
LB		 3550
3551 if (do_exit)
3552 exit(-6);
103a8fea
LB		 3553}
3554
d7899447
LB		 3555/*
3556 * NHM adds support for additional MSRs:
3557 *
3558 * MSR_SMI_COUNT 0x00000034
3559 *
ec0adc53 3560 * MSR_PLATFORM_INFO 0x000000ce
1df2e55a 3561 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
d7899447 3562 *
cf4cbe53
LB		 3563 * MSR_MISC_PWR_MGMT 0x000001aa
3564 *
d7899447
LB		 3565 * MSR_PKG_C3_RESIDENCY 0x000003f8
3566 * MSR_PKG_C6_RESIDENCY 0x000003f9
3567 * MSR_CORE_C3_RESIDENCY 0x000003fc
3568 * MSR_CORE_C6_RESIDENCY 0x000003fd
3569 *
ee7e38e3 3570 * Side effect:
1df2e55a 3571 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
33148d67 3572 * sets has_misc_feature_control
d7899447 3573 */
ee7e38e3 3574int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 3575{
ee7e38e3 3576 unsigned long long msr;
21ed5574 3577 unsigned int base_ratio;
ee7e38e3
LB		 3578 int *pkg_cstate_limits;
3579
103a8fea
LB		 3580 if (!genuine_intel)
3581 return 0;
3582
3583 if (family != 6)
3584 return 0;
3585
21ed5574
LB		 3586 bclk = discover_bclk(family, model);
3587
103a8fea 3588 switch (model) {
869ce69e 3589 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
869ce69e 3590 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
ee7e38e3
LB		 3591 pkg_cstate_limits = nhm_pkg_cstate_limits;
3592 break;
869ce69e
LB		 3593 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3594 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3595 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3596 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
ee7e38e3 3597 pkg_cstate_limits = snb_pkg_cstate_limits;
33148d67 3598 has_misc_feature_control = 1;
ee7e38e3 3599 break;
c66f78a6 3600 case INTEL_FAM6_HASWELL: /* HSW */
5e741407 3601 case INTEL_FAM6_HASWELL_G: /* HSW */
869ce69e 3602 case INTEL_FAM6_HASWELL_X: /* HSX */
77e5517c 3603 case INTEL_FAM6_HASWELL_L: /* HSW */
c66f78a6 3604 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 3605 case INTEL_FAM6_BROADWELL_G: /* BDW */
869ce69e 3606 case INTEL_FAM6_BROADWELL_X: /* BDX */
af239c44
PZ		 3607 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3608 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
ee7e38e3 3609 pkg_cstate_limits = hsw_pkg_cstate_limits;
33148d67 3610 has_misc_feature_control = 1;
ee7e38e3 3611 break;
d8ebb442
LB		 3612 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3613 pkg_cstate_limits = skx_pkg_cstate_limits;
33148d67 3614 has_misc_feature_control = 1;
d8ebb442 3615 break;
f2c4db1b 3616 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
cf4cbe53 3617 no_MSR_MISC_PWR_MGMT = 1;
5ebb34ed 3618 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
ee7e38e3
LB		 3619 pkg_cstate_limits = slv_pkg_cstate_limits;
3620 break;
869ce69e 3621 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
ee7e38e3 3622 pkg_cstate_limits = amt_pkg_cstate_limits;
cf4cbe53 3623 no_MSR_MISC_PWR_MGMT = 1;
ee7e38e3 3624 break;
869ce69e 3625 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
ee7e38e3
LB		 3626 pkg_cstate_limits = phi_pkg_cstate_limits;
3627 break;
869ce69e 3628 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 3629 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
5ebb34ed 3630 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
f6708400 3631 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
20de0dab 3632 case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
445640a5 3633 pkg_cstate_limits = glm_pkg_cstate_limits;
e4085d54 3634 break;
103a8fea
LB		 3635 default:
3636 return 0;
3637 }
1df2e55a 3638 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
e9257f5f 3639 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 3640
ec0adc53 3641 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 3642 base_ratio = (msr >> 8) & 0xFF;
3643
3644 base_hz = base_ratio * bclk * 1000000;
3645 has_base_hz = 1;
ee7e38e3 3646 return 1;
103a8fea 3647}
0f7887c4 3648/*
495c7654 3649 * SLV client has support for unique MSRs:
0f7887c4
LB		 3650 *
3651 * MSR_CC6_DEMOTION_POLICY_CONFIG
3652 * MSR_MC6_DEMOTION_POLICY_CONFIG
3653 */
3654
3655int has_slv_msrs(unsigned int family, unsigned int model)
3656{
3657 if (!genuine_intel)
3658 return 0;
3659
3660 switch (model) {
f2c4db1b
PZ		 3661 case INTEL_FAM6_ATOM_SILVERMONT:
3662 case INTEL_FAM6_ATOM_SILVERMONT_MID:
3663 case INTEL_FAM6_ATOM_AIRMONT_MID:
0f7887c4
LB		 3664 return 1;
3665 }
3666 return 0;
3667}
7170a374
LB		 3668int is_dnv(unsigned int family, unsigned int model)
3669{
3670
3671 if (!genuine_intel)
3672 return 0;
3673
3674 switch (model) {
5ebb34ed 3675 case INTEL_FAM6_ATOM_GOLDMONT_D:
7170a374
LB		 3676 return 1;
3677 }
3678 return 0;
3679}
ade0ebac
LB		 3680int is_bdx(unsigned int family, unsigned int model)
3681{
3682
3683 if (!genuine_intel)
3684 return 0;
3685
3686 switch (model) {
3687 case INTEL_FAM6_BROADWELL_X:
ade0ebac
LB		 3688 return 1;
3689 }
3690 return 0;
3691}
34c76197
LB		 3692int is_skx(unsigned int family, unsigned int model)
3693{
3694
3695 if (!genuine_intel)
3696 return 0;
3697
3698 switch (model) {
3699 case INTEL_FAM6_SKYLAKE_X:
3700 return 1;
3701 }
3702 return 0;
3703}
f6708400
CY		 3704int is_ehl(unsigned int family, unsigned int model)
3705{
3706 if (!genuine_intel)
3707 return 0;
3708
3709 switch (model) {
3710 case INTEL_FAM6_ATOM_TREMONT:
3711 return 1;
3712 }
3713 return 0;
3714}
20de0dab
AL		 3715int is_jvl(unsigned int family, unsigned int model)
3716{
3717 if (!genuine_intel)
3718 return 0;
3719
3720 switch (model) {
3721 case INTEL_FAM6_ATOM_TREMONT_D:
3722 return 1;
3723 }
3724 return 0;
3725}
0f7887c4 3726
31e07522 3727int has_turbo_ratio_limit(unsigned int family, unsigned int model)
d7899447 3728{
0f7887c4
LB		 3729 if (has_slv_msrs(family, model))
3730 return 0;
3731
d7899447
LB		 3732 switch (model) {
3733 /* Nehalem compatible, but do not include turbo-ratio limit support */
869ce69e 3734 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
869ce69e 3735 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
d7899447
LB		 3736 return 0;
3737 default:
3738 return 1;
3739 }
3740}
0f7887c4
LB		 3741int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3742{
3743 if (has_slv_msrs(family, model))
3744 return 1;
3745
3746 return 0;
3747}
6574a5d5
LB		 3748int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3749{
3750 if (!genuine_intel)
3751 return 0;
3752
3753 if (family != 6)
3754 return 0;
3755
3756 switch (model) {
869ce69e
LB		 3757 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3758 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
fcd17211
LB		 3759 return 1;
3760 default:
3761 return 0;
3762 }
3763}
3764int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3765{
3766 if (!genuine_intel)
3767 return 0;
3768
3769 if (family != 6)
3770 return 0;
3771
3772 switch (model) {
869ce69e 3773 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
6574a5d5
LB		 3774 return 1;
3775 default:
3776 return 0;
3777 }
3778}
3779
fb5d4327
DC		 3780int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3781{
3782 if (!genuine_intel)
3783 return 0;
3784
3785 if (family != 6)
3786 return 0;
3787
3788 switch (model) {
869ce69e 3789 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
fb5d4327
DC		 3790 return 1;
3791 default:
3792 return 0;
3793 }
3794}
31e07522
LB		 3795int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3796{
3797 if (!genuine_intel)
3798 return 0;
3799
3800 if (family != 6)
3801 return 0;
3802
3803 switch (model) {
3804 case INTEL_FAM6_ATOM_GOLDMONT:
3805 case INTEL_FAM6_SKYLAKE_X:
3806 return 1;
3807 default:
3808 return 0;
3809 }
3810}
6fb3143b
LB		 3811int has_config_tdp(unsigned int family, unsigned int model)
3812{
3813 if (!genuine_intel)
3814 return 0;
3815
3816 if (family != 6)
3817 return 0;
3818
3819 switch (model) {
869ce69e 3820 case INTEL_FAM6_IVYBRIDGE: /* IVB */
c66f78a6 3821 case INTEL_FAM6_HASWELL: /* HSW */
869ce69e 3822 case INTEL_FAM6_HASWELL_X: /* HSX */
77e5517c 3823 case INTEL_FAM6_HASWELL_L: /* HSW */
5e741407 3824 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 3825 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 3826 case INTEL_FAM6_BROADWELL_G: /* BDW */
869ce69e 3827 case INTEL_FAM6_BROADWELL_X: /* BDX */
af239c44
PZ		 3828 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3829 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
869ce69e
LB		 3830 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3831
3832 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
6fb3143b
LB		 3833 return 1;
3834 default:
3835 return 0;
3836 }
3837}
3838
fecb3bc8
DA		 3839static void
3840remove_underbar(char *s)
3841{
3842 char *to = s;
3843
3844 while (*s) {
3845 if (*s != '_')
3846 *to++ = *s;
3847 s++;
3848 }
3849
3850 *to = 0;
3851}
3852
fcd17211 3853static void
1b69317d 3854dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
fcd17211
LB		 3855{
3856 if (!do_nhm_platform_info)
3857 return;
3858
3859 dump_nhm_platform_info();
3860
3861 if (has_hsw_turbo_ratio_limit(family, model))
3862 dump_hsw_turbo_ratio_limits();
3863
3864 if (has_ivt_turbo_ratio_limit(family, model))
3865 dump_ivt_turbo_ratio_limits();
3866
31e07522
LB		 3867 if (has_turbo_ratio_limit(family, model))
3868 dump_turbo_ratio_limits(family, model);
fcd17211 3869
0f7887c4
LB		 3870 if (has_atom_turbo_ratio_limit(family, model))
3871 dump_atom_turbo_ratio_limits();
3872
fb5d4327
DC		 3873 if (has_knl_turbo_ratio_limit(family, model))
3874 dump_knl_turbo_ratio_limits();
3875
6fb3143b
LB		 3876 if (has_config_tdp(family, model))
3877 dump_config_tdp();
3878
fcd17211
LB		 3879 dump_nhm_cst_cfg();
3880}
3881
abdcbdb2
LB		 3882static void dump_sysfs_file(char *path)
3883{
3884 FILE *input;
3885 char cpuidle_buf[64];
3886
3887 input = fopen(path, "r");
3888 if (input == NULL) {
3889 if (debug)
3890 fprintf(outf, "NSFOD %s\n", path);
3891 return;
3892 }
3893 if (!fgets(cpuidle_buf, sizeof(cpuidle_buf), input))
3894 err(1, "%s: failed to read file", path);
3895 fclose(input);
3896
3897 fprintf(outf, "%s: %s", strrchr(path, '/') + 1, cpuidle_buf);
3898}
41618e63
LB		 3899static void
3900dump_sysfs_cstate_config(void)
3901{
3902 char path[64];
3903 char name_buf[16];
3904 char desc[64];
3905 FILE *input;
3906 int state;
3907 char *sp;
3908
abdcbdb2
LB		 3909 if (access("/sys/devices/system/cpu/cpuidle", R_OK)) {
3910 fprintf(outf, "cpuidle not loaded\n");
3911 return;
3912 }
3913
3914 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_driver");
3915 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor");
3916 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor_ro");
3917
41618e63
LB		 3918 for (state = 0; state < 10; ++state) {
3919
3920 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3921 base_cpu, state);
3922 input = fopen(path, "r");
3923 if (input == NULL)
3924 continue;
8173c336
BH		 3925 if (!fgets(name_buf, sizeof(name_buf), input))
3926 err(1, "%s: failed to read file", path);
41618e63
LB		 3927
3928 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3929 sp = strchr(name_buf, '-');
3930 if (!sp)
3931 sp = strchrnul(name_buf, '\n');
3932 *sp = '\0';
41618e63
LB		 3933 fclose(input);
3934
fecb3bc8
DA		 3935 remove_underbar(name_buf);
3936
41618e63
LB		 3937 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3938 base_cpu, state);
3939 input = fopen(path, "r");
3940 if (input == NULL)
3941 continue;
8173c336
BH		 3942 if (!fgets(desc, sizeof(desc), input))
3943 err(1, "%s: failed to read file", path);
41618e63
LB		 3944
3945 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3946 fclose(input);
3947 }
3948}
7293fccd
LB		 3949static void
3950dump_sysfs_pstate_config(void)
3951{
3952 char path[64];
3953 char driver_buf[64];
3954 char governor_buf[64];
3955 FILE *input;
3956 int turbo;
3957
3958 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3959 base_cpu);
3960 input = fopen(path, "r");
3961 if (input == NULL) {
0a42d235 3962 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3963 return;
3964 }
8173c336
BH		 3965 if (!fgets(driver_buf, sizeof(driver_buf), input))
3966 err(1, "%s: failed to read file", path);
7293fccd
LB		 3967 fclose(input);
3968
3969 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3970 base_cpu);
3971 input = fopen(path, "r");
3972 if (input == NULL) {
0a42d235 3973 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3974 return;
3975 }
8173c336
BH		 3976 if (!fgets(governor_buf, sizeof(governor_buf), input))
3977 err(1, "%s: failed to read file", path);
7293fccd
LB		 3978 fclose(input);
3979
3980 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3981 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3982
3983 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3984 input = fopen(path, "r");
3985 if (input != NULL) {
8173c336
BH		 3986 if (fscanf(input, "%d", &turbo) != 1)
3987 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3988 fprintf(outf, "cpufreq boost: %d\n", turbo);
3989 fclose(input);
3990 }
3991
3992 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3993 input = fopen(path, "r");
3994 if (input != NULL) {
8173c336
BH		 3995 if (fscanf(input, "%d", &turbo) != 1)
3996 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3997 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3998 fclose(input);
3999 }
4000}
41618e63 4001
fcd17211 4002
889facbe
LB		 4003/*
4004 * print_epb()
4005 * Decode the ENERGY_PERF_BIAS MSR
4006 */
4007int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4008{
889facbe 4009 char *epb_string;
6d6501d9 4010 int cpu, epb;
889facbe
LB		 4011
4012 if (!has_epb)
4013 return 0;
4014
4015 cpu = t->cpu_id;
4016
4017 /* EPB is per-package */
4018 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4019 return 0;
4020
4021 if (cpu_migrate(cpu)) {
3d7772ea 4022 fprintf(outf, "print_epb: Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4023 return -1;
4024 }
4025
6d6501d9
BP		 4026 epb = get_epb(cpu);
4027 if (epb < 0)
889facbe
LB		 4028 return 0;
4029
6d6501d9 4030 switch (epb) {
889facbe
LB		 4031 case ENERGY_PERF_BIAS_PERFORMANCE:
4032 epb_string = "performance";
4033 break;
4034 case ENERGY_PERF_BIAS_NORMAL:
4035 epb_string = "balanced";
4036 break;
4037 case ENERGY_PERF_BIAS_POWERSAVE:
4038 epb_string = "powersave";
4039 break;
4040 default:
4041 epb_string = "custom";
4042 break;
4043 }
6d6501d9 4044 fprintf(outf, "cpu%d: EPB: %d (%s)\n", cpu, epb, epb_string);
889facbe
LB		 4045
4046 return 0;
4047}
7f5c258e
LB		 4048/*
4049 * print_hwp()
4050 * Decode the MSR_HWP_CAPABILITIES
4051 */
4052int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4053{
4054 unsigned long long msr;
4055 int cpu;
4056
4057 if (!has_hwp)
4058 return 0;
4059
4060 cpu = t->cpu_id;
4061
4062 /* MSR_HWP_CAPABILITIES is per-package */
4063 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4064 return 0;
4065
4066 if (cpu_migrate(cpu)) {
3d7772ea 4067 fprintf(outf, "print_hwp: Could not migrate to CPU %d\n", cpu);
7f5c258e
LB		 4068 return -1;
4069 }
4070
4071 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
4072 return 0;
4073
b7d8c148 4074 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
7f5c258e
LB		 4075 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
4076
4077 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
4078 if ((msr & (1 << 0)) == 0)
4079 return 0;
4080
4081 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
4082 return 0;
4083
b7d8c148 4084 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
6dbd25a2 4085 "(high %d guar %d eff %d low %d)\n",
7f5c258e
LB		 4086 cpu, msr,
4087 (unsigned int)HWP_HIGHEST_PERF(msr),
4088 (unsigned int)HWP_GUARANTEED_PERF(msr),
4089 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
4090 (unsigned int)HWP_LOWEST_PERF(msr));
4091
4092 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
4093 return 0;
4094
b7d8c148 4095 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
6dbd25a2 4096 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
7f5c258e
LB		 4097 cpu, msr,
4098 (unsigned int)(((msr) >> 0) & 0xff),
4099 (unsigned int)(((msr) >> 8) & 0xff),
4100 (unsigned int)(((msr) >> 16) & 0xff),
4101 (unsigned int)(((msr) >> 24) & 0xff),
4102 (unsigned int)(((msr) >> 32) & 0xff3),
4103 (unsigned int)(((msr) >> 42) & 0x1));
4104
4105 if (has_hwp_pkg) {
4106 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
4107 return 0;
4108
b7d8c148 4109 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
6dbd25a2 4110 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
7f5c258e
LB		 4111 cpu, msr,
4112 (unsigned int)(((msr) >> 0) & 0xff),
4113 (unsigned int)(((msr) >> 8) & 0xff),
4114 (unsigned int)(((msr) >> 16) & 0xff),
4115 (unsigned int)(((msr) >> 24) & 0xff),
4116 (unsigned int)(((msr) >> 32) & 0xff3));
4117 }
4118 if (has_hwp_notify) {
4119 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
4120 return 0;
4121
b7d8c148 4122 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
7f5c258e
LB		 4123 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
4124 cpu, msr,
4125 ((msr) & 0x1) ? "EN" : "Dis",
4126 ((msr) & 0x2) ? "EN" : "Dis");
4127 }
4128 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
4129 return 0;
4130
b7d8c148 4131 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
7f5c258e
LB		 4132 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
4133 cpu, msr,
4134 ((msr) & 0x1) ? "" : "No-",
4135 ((msr) & 0x2) ? "" : "No-");
889facbe
LB		 4136
4137 return 0;
4138}
4139
3a9a941d
LB		 4140/*
4141 * print_perf_limit()
4142 */
4143int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4144{
4145 unsigned long long msr;
4146 int cpu;
4147
4148 cpu = t->cpu_id;
4149
4150 /* per-package */
4151 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4152 return 0;
4153
4154 if (cpu_migrate(cpu)) {
3d7772ea 4155 fprintf(outf, "print_perf_limit: Could not migrate to CPU %d\n", cpu);
3a9a941d
LB		 4156 return -1;
4157 }
4158
4159 if (do_core_perf_limit_reasons) {
4160 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 4161 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4162 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 4163 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 4164 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 4165 (msr & 1 << 13) ? "Transitions, " : "",
4166 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
4167 (msr & 1 << 11) ? "PkgPwrL2, " : "",
4168 (msr & 1 << 10) ? "PkgPwrL1, " : "",
4169 (msr & 1 << 9) ? "CorePwr, " : "",
4170 (msr & 1 << 8) ? "Amps, " : "",
4171 (msr & 1 << 6) ? "VR-Therm, " : "",
4172 (msr & 1 << 5) ? "Auto-HWP, " : "",
4173 (msr & 1 << 4) ? "Graphics, " : "",
4174 (msr & 1 << 2) ? "bit2, " : "",
4175 (msr & 1 << 1) ? "ThermStatus, " : "",
4176 (msr & 1 << 0) ? "PROCHOT, " : "");
b7d8c148 4177 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 4178 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 4179 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 4180 (msr & 1 << 29) ? "Transitions, " : "",
4181 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
4182 (msr & 1 << 27) ? "PkgPwrL2, " : "",
4183 (msr & 1 << 26) ? "PkgPwrL1, " : "",
4184 (msr & 1 << 25) ? "CorePwr, " : "",
4185 (msr & 1 << 24) ? "Amps, " : "",
4186 (msr & 1 << 22) ? "VR-Therm, " : "",
4187 (msr & 1 << 21) ? "Auto-HWP, " : "",
4188 (msr & 1 << 20) ? "Graphics, " : "",
4189 (msr & 1 << 18) ? "bit18, " : "",
4190 (msr & 1 << 17) ? "ThermStatus, " : "",
4191 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 4192
4193 }
4194 if (do_gfx_perf_limit_reasons) {
4195 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 4196 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4197 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3a9a941d
LB		 4198 (msr & 1 << 0) ? "PROCHOT, " : "",
4199 (msr & 1 << 1) ? "ThermStatus, " : "",
4200 (msr & 1 << 4) ? "Graphics, " : "",
4201 (msr & 1 << 6) ? "VR-Therm, " : "",
4202 (msr & 1 << 8) ? "Amps, " : "",
4203 (msr & 1 << 9) ? "GFXPwr, " : "",
4204 (msr & 1 << 10) ? "PkgPwrL1, " : "",
4205 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 4206 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3a9a941d
LB		 4207 (msr & 1 << 16) ? "PROCHOT, " : "",
4208 (msr & 1 << 17) ? "ThermStatus, " : "",
4209 (msr & 1 << 20) ? "Graphics, " : "",
4210 (msr & 1 << 22) ? "VR-Therm, " : "",
4211 (msr & 1 << 24) ? "Amps, " : "",
4212 (msr & 1 << 25) ? "GFXPwr, " : "",
4213 (msr & 1 << 26) ? "PkgPwrL1, " : "",
4214 (msr & 1 << 27) ? "PkgPwrL2, " : "");
4215 }
4216 if (do_ring_perf_limit_reasons) {
4217 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 4218 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4219 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3a9a941d
LB		 4220 (msr & 1 << 0) ? "PROCHOT, " : "",
4221 (msr & 1 << 1) ? "ThermStatus, " : "",
4222 (msr & 1 << 6) ? "VR-Therm, " : "",
4223 (msr & 1 << 8) ? "Amps, " : "",
4224 (msr & 1 << 10) ? "PkgPwrL1, " : "",
4225 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 4226 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3a9a941d
LB		 4227 (msr & 1 << 16) ? "PROCHOT, " : "",
4228 (msr & 1 << 17) ? "ThermStatus, " : "",
4229 (msr & 1 << 22) ? "VR-Therm, " : "",
4230 (msr & 1 << 24) ? "Amps, " : "",
4231 (msr & 1 << 26) ? "PkgPwrL1, " : "",
4232 (msr & 1 << 27) ? "PkgPwrL2, " : "");
4233 }
4234 return 0;
4235}
4236
889facbe
LB		 4237#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
4238#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
4239
9392bd98 4240double get_tdp_intel(unsigned int model)
144b44b1
LB		 4241{
4242 unsigned long long msr;
4243
4244 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 4245 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 4246 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
4247
4248 switch (model) {
f2c4db1b 4249 case INTEL_FAM6_ATOM_SILVERMONT:
5ebb34ed 4250 case INTEL_FAM6_ATOM_SILVERMONT_D:
144b44b1
LB		 4251 return 30.0;
4252 default:
4253 return 135.0;
4254 }
4255}
4256
9392bd98
CW		 4257double get_tdp_amd(unsigned int family)
4258{
33eb8225
KP		 4259 /* This is the max stock TDP of HEDT/Server Fam17h+ chips */
4260 return 280.0;
9392bd98
CW		 4261}
4262
40ee8e3b
AS		 4263/*
4264 * rapl_dram_energy_units_probe()
4265 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
4266 */
4267static double
4268rapl_dram_energy_units_probe(int model, double rapl_energy_units)
4269{
4270 /* only called for genuine_intel, family 6 */
4271
4272 switch (model) {
869ce69e
LB		 4273 case INTEL_FAM6_HASWELL_X: /* HSX */
4274 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 4275 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
40ee8e3b
AS		 4276 return (rapl_dram_energy_units = 15.3 / 1000000);
4277 default:
4278 return (rapl_energy_units);
4279 }
4280}
4281
9392bd98 4282void rapl_probe_intel(unsigned int family, unsigned int model)
889facbe
LB		 4283{
4284 unsigned long long msr;
144b44b1 4285 unsigned int time_unit;
889facbe
LB		 4286 double tdp;
4287
889facbe
LB		 4288 if (family != 6)
4289 return;
4290
4291 switch (model) {
869ce69e
LB		 4292 case INTEL_FAM6_SANDYBRIDGE:
4293 case INTEL_FAM6_IVYBRIDGE:
c66f78a6 4294 case INTEL_FAM6_HASWELL: /* HSW */
77e5517c 4295 case INTEL_FAM6_HASWELL_L: /* HSW */
5e741407 4296 case INTEL_FAM6_HASWELL_G: /* HSW */
c66f78a6 4297 case INTEL_FAM6_BROADWELL: /* BDW */
5e741407 4298 case INTEL_FAM6_BROADWELL_G: /* BDW */
144b44b1 4299 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 4300 if (rapl_joules) {
4301 BIC_PRESENT(BIC_Pkg_J);
4302 BIC_PRESENT(BIC_Cor_J);
4303 BIC_PRESENT(BIC_GFX_J);
4304 } else {
4305 BIC_PRESENT(BIC_PkgWatt);
4306 BIC_PRESENT(BIC_CorWatt);
4307 BIC_PRESENT(BIC_GFXWatt);
4308 }
889facbe 4309 break;
869ce69e 4310 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4311 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e4085d54 4312 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
812db3f7
LB		 4313 if (rapl_joules)
4314 BIC_PRESENT(BIC_Pkg_J);
4315 else
4316 BIC_PRESENT(BIC_PkgWatt);
e4085d54 4317 break;
f6708400
CY		 4318 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
4319 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4320 if (rapl_joules) {
4321 BIC_PRESENT(BIC_Pkg_J);
4322 BIC_PRESENT(BIC_Cor_J);
4323 BIC_PRESENT(BIC_RAM_J);
4324 BIC_PRESENT(BIC_GFX_J);
4325 } else {
4326 BIC_PRESENT(BIC_PkgWatt);
4327 BIC_PRESENT(BIC_CorWatt);
4328 BIC_PRESENT(BIC_RAMWatt);
4329 BIC_PRESENT(BIC_GFXWatt);
4330 }
4331 break;
20de0dab
AL		 4332 case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
4333 do_rapl = RAPL_PKG | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4334 BIC_PRESENT(BIC_PKG__);
4335 if (rapl_joules)
4336 BIC_PRESENT(BIC_Pkg_J);
4337 else
4338 BIC_PRESENT(BIC_PkgWatt);
4339 break;
af239c44
PZ		 4340 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4341 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
81824921 4342 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 4343 BIC_PRESENT(BIC_PKG__);
4344 BIC_PRESENT(BIC_RAM__);
4345 if (rapl_joules) {
4346 BIC_PRESENT(BIC_Pkg_J);
4347 BIC_PRESENT(BIC_Cor_J);
4348 BIC_PRESENT(BIC_RAM_J);
81824921 4349 BIC_PRESENT(BIC_GFX_J);
812db3f7
LB		 4350 } else {
4351 BIC_PRESENT(BIC_PkgWatt);
4352 BIC_PRESENT(BIC_CorWatt);
4353 BIC_PRESENT(BIC_RAMWatt);
81824921 4354 BIC_PRESENT(BIC_GFXWatt);
812db3f7 4355 }
0b2bb692 4356 break;
869ce69e
LB		 4357 case INTEL_FAM6_HASWELL_X: /* HSX */
4358 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e
LB		 4359 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4360 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
0b2bb692 4361 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 4362 BIC_PRESENT(BIC_PKG__);
4363 BIC_PRESENT(BIC_RAM__);
4364 if (rapl_joules) {
4365 BIC_PRESENT(BIC_Pkg_J);
4366 BIC_PRESENT(BIC_RAM_J);
4367 } else {
4368 BIC_PRESENT(BIC_PkgWatt);
4369 BIC_PRESENT(BIC_RAMWatt);
4370 }
e6f9bb3c 4371 break;
869ce69e
LB		 4372 case INTEL_FAM6_SANDYBRIDGE_X:
4373 case INTEL_FAM6_IVYBRIDGE_X:
0b2bb692 4374 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 4375 BIC_PRESENT(BIC_PKG__);
4376 BIC_PRESENT(BIC_RAM__);
4377 if (rapl_joules) {
4378 BIC_PRESENT(BIC_Pkg_J);
4379 BIC_PRESENT(BIC_Cor_J);
4380 BIC_PRESENT(BIC_RAM_J);
4381 } else {
4382 BIC_PRESENT(BIC_PkgWatt);
4383 BIC_PRESENT(BIC_CorWatt);
4384 BIC_PRESENT(BIC_RAMWatt);
4385 }
144b44b1 4386 break;
f2c4db1b 4387 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
5ebb34ed 4388 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
9148494c 4389 do_rapl = RAPL_PKG | RAPL_CORES;
812db3f7
LB		 4390 if (rapl_joules) {
4391 BIC_PRESENT(BIC_Pkg_J);
4392 BIC_PRESENT(BIC_Cor_J);
4393 } else {
4394 BIC_PRESENT(BIC_PkgWatt);
4395 BIC_PRESENT(BIC_CorWatt);
4396 }
889facbe 4397 break;
5ebb34ed 4398 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
0f644909 4399 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
812db3f7
LB		 4400 BIC_PRESENT(BIC_PKG__);
4401 BIC_PRESENT(BIC_RAM__);
4402 if (rapl_joules) {
4403 BIC_PRESENT(BIC_Pkg_J);
4404 BIC_PRESENT(BIC_Cor_J);
4405 BIC_PRESENT(BIC_RAM_J);
4406 } else {
4407 BIC_PRESENT(BIC_PkgWatt);
4408 BIC_PRESENT(BIC_CorWatt);
4409 BIC_PRESENT(BIC_RAMWatt);
4410 }
0f644909 4411 break;
889facbe
LB		 4412 default:
4413 return;
4414 }
4415
4416 /* units on package 0, verify later other packages match */
7ce7d5de 4417 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 4418 return;
4419
4420 rapl_power_units = 1.0 / (1 << (msr & 0xF));
f2c4db1b 4421 if (model == INTEL_FAM6_ATOM_SILVERMONT)
144b44b1
LB		 4422 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
4423 else
4424 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 4425
40ee8e3b
AS		 4426 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
4427
144b44b1
LB		 4428 time_unit = msr >> 16 & 0xF;
4429 if (time_unit == 0)
4430 time_unit = 0xA;
889facbe 4431
144b44b1 4432 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 4433
9392bd98 4434 tdp = get_tdp_intel(model);
889facbe 4435
144b44b1 4436 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
96e47158 4437 if (!quiet)
b7d8c148 4438 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
9392bd98 4439}
889facbe 4440
9392bd98
CW		 4441void rapl_probe_amd(unsigned int family, unsigned int model)
4442{
4443 unsigned long long msr;
4444 unsigned int eax, ebx, ecx, edx;
4445 unsigned int has_rapl = 0;
4446 double tdp;
4447
4448 if (max_extended_level >= 0x80000007) {
4449 __cpuid(0x80000007, eax, ebx, ecx, edx);
33eb8225 4450 /* RAPL (Fam 17h+) */
9392bd98
CW		 4451 has_rapl = edx & (1 << 14);
4452 }
4453
33eb8225 4454 if (!has_rapl || family < 0x17)
9392bd98
CW		 4455 return;
4456
33eb8225
KP		 4457 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
4458 if (rapl_joules) {
4459 BIC_PRESENT(BIC_Pkg_J);
4460 BIC_PRESENT(BIC_Cor_J);
4461 } else {
4462 BIC_PRESENT(BIC_PkgWatt);
4463 BIC_PRESENT(BIC_CorWatt);
9392bd98
CW		 4464 }
4465
4466 if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4467 return;
4468
4469 rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4470 rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4471 rapl_power_units = ldexp(1.0, -(msr & 0xf));
4472
9cfa8e04 4473 tdp = get_tdp_amd(family);
9392bd98
CW		 4474
4475 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4476 if (!quiet)
4477 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4478}
4479
4480/*
4481 * rapl_probe()
4482 *
4483 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4484 */
4485void rapl_probe(unsigned int family, unsigned int model)
4486{
4487 if (genuine_intel)
4488 rapl_probe_intel(family, model);
c1c10cc7 4489 if (authentic_amd || hygon_genuine)
9392bd98 4490 rapl_probe_amd(family, model);
889facbe
LB		 4491}
4492
1b69317d 4493void perf_limit_reasons_probe(unsigned int family, unsigned int model)
3a9a941d
LB		 4494{
4495 if (!genuine_intel)
4496 return;
4497
4498 if (family != 6)
4499 return;
4500
4501 switch (model) {
c66f78a6 4502 case INTEL_FAM6_HASWELL: /* HSW */
77e5517c 4503 case INTEL_FAM6_HASWELL_L: /* HSW */
5e741407 4504 case INTEL_FAM6_HASWELL_G: /* HSW */
3a9a941d 4505 do_gfx_perf_limit_reasons = 1;
869ce69e 4506 case INTEL_FAM6_HASWELL_X: /* HSX */
3a9a941d
LB		 4507 do_core_perf_limit_reasons = 1;
4508 do_ring_perf_limit_reasons = 1;
4509 default:
4510 return;
4511 }
4512}
4513
ac980e13
AB		 4514void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4515{
4516 if (is_skx(family, model) || is_bdx(family, model))
4517 has_automatic_cstate_conversion = 1;
4518}
4519
889facbe
LB		 4520int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4521{
4522 unsigned long long msr;
f4896fa5 4523 unsigned int dts, dts2;
889facbe
LB		 4524 int cpu;
4525
4526 if (!(do_dts || do_ptm))
4527 return 0;
4528
4529 cpu = t->cpu_id;
4530
4531 /* DTS is per-core, no need to print for each thread */
388e9c81 4532 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
889facbe
LB		 4533 return 0;
4534
4535 if (cpu_migrate(cpu)) {
3d7772ea 4536 fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4537 return -1;
4538 }
4539
4540 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4541 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4542 return 0;
4543
4544 dts = (msr >> 16) & 0x7F;
b7d8c148 4545 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
889facbe
LB		 4546 cpu, msr, tcc_activation_temp - dts);
4547
889facbe
LB		 4548 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4549 return 0;
4550
4551 dts = (msr >> 16) & 0x7F;
4552 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4553 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4554 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4555 }
4556
4557
f4896fa5 4558 if (do_dts && debug) {
889facbe
LB		 4559 unsigned int resolution;
4560
4561 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4562 return 0;
4563
4564 dts = (msr >> 16) & 0x7F;
4565 resolution = (msr >> 27) & 0xF;
b7d8c148 4566 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
889facbe
LB		 4567 cpu, msr, tcc_activation_temp - dts, resolution);
4568
889facbe
LB		 4569 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4570 return 0;
4571
4572 dts = (msr >> 16) & 0x7F;
4573 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4574 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4575 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4576 }
4577
4578 return 0;
4579}
36229897 4580
889facbe
LB		 4581void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4582{
b7d8c148 4583 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
889facbe
LB		 4584 cpu, label,
4585 ((msr >> 15) & 1) ? "EN" : "DIS",
4586 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4587 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4588 (((msr >> 16) & 1) ? "EN" : "DIS"));
4589
4590 return;
4591}
4592
4593int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4594{
4595 unsigned long long msr;
9392bd98 4596 const char *msr_name;
889facbe 4597 int cpu;
889facbe
LB		 4598
4599 if (!do_rapl)
4600 return 0;
4601
4602 /* RAPL counters are per package, so print only for 1st thread/package */
4603 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4604 return 0;
4605
4606 cpu = t->cpu_id;
4607 if (cpu_migrate(cpu)) {
3d7772ea 4608 fprintf(outf, "print_rapl: Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4609 return -1;
4610 }
4611
9392bd98
CW		 4612 if (do_rapl & RAPL_AMD_F17H) {
4613 msr_name = "MSR_RAPL_PWR_UNIT";
4614 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4615 return -1;
4616 } else {
4617 msr_name = "MSR_RAPL_POWER_UNIT";
4618 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4619 return -1;
4620 }
889facbe 4621
9392bd98 4622 fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
96e47158
LB		 4623 rapl_power_units, rapl_energy_units, rapl_time_units);
4624
144b44b1
LB		 4625 if (do_rapl & RAPL_PKG_POWER_INFO) {
4626
889facbe
LB		 4627 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4628 return -5;
4629
4630
b7d8c148 4631 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4632 cpu, msr,
4633 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4634 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4635 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4636 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4637
144b44b1
LB		 4638 }
4639 if (do_rapl & RAPL_PKG) {
4640
889facbe
LB		 4641 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4642 return -9;
4643
b7d8c148 4644 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4645 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
889facbe
LB		 4646
4647 print_power_limit_msr(cpu, msr, "PKG Limit #1");
b7d8c148 4648 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
889facbe
LB		 4649 cpu,
4650 ((msr >> 47) & 1) ? "EN" : "DIS",
4651 ((msr >> 32) & 0x7FFF) * rapl_power_units,
4652 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4653 ((msr >> 48) & 1) ? "EN" : "DIS");
4654 }
4655
0b2bb692 4656 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 4657 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4658 return -6;
4659
b7d8c148 4660 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4661 cpu, msr,
4662 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4663 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4664 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4665 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 4666 }
4667 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 4668 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4669 return -9;
b7d8c148 4670 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4671 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
889facbe
LB		 4672
4673 print_power_limit_msr(cpu, msr, "DRAM Limit");
4674 }
144b44b1 4675 if (do_rapl & RAPL_CORE_POLICY) {
96e47158
LB		 4676 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4677 return -7;
889facbe 4678
96e47158 4679 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1 4680 }
9148494c 4681 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
96e47158
LB		 4682 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4683 return -9;
4684 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4685 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4686 print_power_limit_msr(cpu, msr, "Cores Limit");
889facbe
LB		 4687 }
4688 if (do_rapl & RAPL_GFX) {
96e47158
LB		 4689 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4690 return -8;
889facbe 4691
96e47158 4692 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
889facbe 4693
96e47158
LB		 4694 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4695 return -9;
4696 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4697 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4698 print_power_limit_msr(cpu, msr, "GFX Limit");
889facbe
LB		 4699 }
4700 return 0;
4701}
4702
d7899447
LB		 4703/*
4704 * SNB adds support for additional MSRs:
4705 *
4706 * MSR_PKG_C7_RESIDENCY 0x000003fa
4707 * MSR_CORE_C7_RESIDENCY 0x000003fe
4708 * MSR_PKG_C2_RESIDENCY 0x0000060d
4709 */
103a8fea 4710
d7899447 4711int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 4712{
4713 if (!genuine_intel)
4714 return 0;
4715
4716 switch (model) {
869ce69e
LB		 4717 case INTEL_FAM6_SANDYBRIDGE:
4718 case INTEL_FAM6_SANDYBRIDGE_X:
77e5517c
IM		 4719 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4720 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
4721 case INTEL_FAM6_HASWELL: /* HSW */
4722 case INTEL_FAM6_HASWELL_X: /* HSW */
4723 case INTEL_FAM6_HASWELL_L: /* HSW */
4724 case INTEL_FAM6_HASWELL_G: /* HSW */
4725 case INTEL_FAM6_BROADWELL: /* BDW */
4726 case INTEL_FAM6_BROADWELL_G: /* BDW */
4727 case INTEL_FAM6_BROADWELL_X: /* BDX */
4728 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4729 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4730 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4731 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4732 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
5ebb34ed 4733 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
f6708400 4734 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
20de0dab 4735 case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
103a8fea
LB		 4736 return 1;
4737 }
4738 return 0;
4739}
4740
d7899447 4741/*
570992fc 4742 * HSW ULT added support for C8/C9/C10 MSRs:
d7899447 4743 *
5a63426e
LB		 4744 * MSR_PKG_C8_RESIDENCY 0x00000630
4745 * MSR_PKG_C9_RESIDENCY 0x00000631
4746 * MSR_PKG_C10_RESIDENCY 0x00000632
4747 *
4748 * MSR_PKGC8_IRTL 0x00000633
4749 * MSR_PKGC9_IRTL 0x00000634
4750 * MSR_PKGC10_IRTL 0x00000635
4751 *
d7899447 4752 */
570992fc 4753int has_c8910_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 4754{
4755 if (!genuine_intel)
4756 return 0;
4757
4758 switch (model) {
77e5517c 4759 case INTEL_FAM6_HASWELL_L: /* HSW */
c66f78a6 4760 case INTEL_FAM6_BROADWELL: /* BDW */
af239c44
PZ		 4761 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4762 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
869ce69e 4763 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4764 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
f6708400 4765 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
0b2bb692
LB		 4766 return 1;
4767 }
4768 return 0;
4769}
4770
4771/*
4772 * SKL adds support for additional MSRS:
4773 *
4774 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4775 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4776 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4777 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4778 */
4779int has_skl_msrs(unsigned int family, unsigned int model)
4780{
4781 if (!genuine_intel)
4782 return 0;
4783
4784 switch (model) {
af239c44
PZ		 4785 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4786 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
ca58710f
KCA		 4787 return 1;
4788 }
4789 return 0;
4790}
4791
144b44b1
LB		 4792int is_slm(unsigned int family, unsigned int model)
4793{
4794 if (!genuine_intel)
4795 return 0;
4796 switch (model) {
f2c4db1b 4797 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
5ebb34ed 4798 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
144b44b1
LB		 4799 return 1;
4800 }
4801 return 0;
4802}
4803
fb5d4327
DC		 4804int is_knl(unsigned int family, unsigned int model)
4805{
4806 if (!genuine_intel)
4807 return 0;
4808 switch (model) {
869ce69e 4809 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
fb5d4327
DC		 4810 return 1;
4811 }
4812 return 0;
4813}
4814
997e5395
SP		 4815int is_cnl(unsigned int family, unsigned int model)
4816{
4817 if (!genuine_intel)
4818 return 0;
4819
4820 switch (model) {
af239c44 4821 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
997e5395
SP		 4822 return 1;
4823 }
4824
4825 return 0;
4826}
4827
b2b34dfe
HC		 4828unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4829{
4830 if (is_knl(family, model))
4831 return 1024;
4832 return 1;
4833}
4834
144b44b1
LB		 4835#define SLM_BCLK_FREQS 5
4836double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4837
4838double slm_bclk(void)
4839{
4840 unsigned long long msr = 3;
4841 unsigned int i;
4842 double freq;
4843
7ce7d5de 4844 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
b7d8c148 4845 fprintf(outf, "SLM BCLK: unknown\n");
144b44b1
LB		 4846
4847 i = msr & 0xf;
4848 if (i >= SLM_BCLK_FREQS) {
b7d8c148 4849 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
0a91e551 4850 i = 3;
144b44b1
LB		 4851 }
4852 freq = slm_freq_table[i];
4853
96e47158 4854 if (!quiet)
8f6196c1 4855 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
144b44b1
LB		 4856
4857 return freq;
4858}
4859
103a8fea
LB		 4860double discover_bclk(unsigned int family, unsigned int model)
4861{
121b48bb 4862 if (has_snb_msrs(family, model) || is_knl(family, model))
103a8fea 4863 return 100.00;
144b44b1
LB		 4864 else if (is_slm(family, model))
4865 return slm_bclk();
103a8fea
LB		 4866 else
4867 return 133.33;
4868}
4869
889facbe
LB		 4870/*
4871 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4872 * the Thermal Control Circuit (TCC) activates.
4873 * This is usually equal to tjMax.
4874 *
4875 * Older processors do not have this MSR, so there we guess,
4876 * but also allow cmdline over-ride with -T.
4877 *
4878 * Several MSR temperature values are in units of degrees-C
4879 * below this value, including the Digital Thermal Sensor (DTS),
4880 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4881 */
6ff7cb37 4882int read_tcc_activation_temp()
889facbe
LB		 4883{
4884 unsigned long long msr;
6ff7cb37
LB		 4885 unsigned int tcc, target_c, offset_c;
4886
4887 /* Temperature Target MSR is Nehalem and newer only */
4888 if (!do_nhm_platform_info)
4889 return 0;
4890
4891 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4892 return 0;
889facbe 4893
6ff7cb37
LB		 4894 target_c = (msr >> 16) & 0xFF;
4895
4896 offset_c = (msr >> 24) & 0xF;
4897
4898 tcc = target_c - offset_c;
4899
4900 if (!quiet)
4901 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
4902 base_cpu, msr, tcc, target_c, offset_c);
4903
4904 return tcc;
4905}
4906
4907int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4908{
889facbe
LB		 4909 /* tcc_activation_temp is used only for dts or ptm */
4910 if (!(do_dts || do_ptm))
4911 return 0;
4912
4913 /* this is a per-package concept */
4914 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4915 return 0;
4916
889facbe
LB		 4917 if (tcc_activation_temp_override != 0) {
4918 tcc_activation_temp = tcc_activation_temp_override;
6ff7cb37 4919 fprintf(outf, "Using cmdline TCC Target (%d C)\n", tcc_activation_temp);
889facbe
LB		 4920 return 0;
4921 }
4922
6ff7cb37
LB		 4923 tcc_activation_temp = read_tcc_activation_temp();
4924 if (tcc_activation_temp)
4925 return 0;
889facbe 4926
889facbe 4927 tcc_activation_temp = TJMAX_DEFAULT;
6ff7cb37 4928 fprintf(outf, "Guessing tjMax %d C, Please use -T to specify\n", tcc_activation_temp);
889facbe
LB		 4929
4930 return 0;
4931}
69807a63 4932
aa8d8cc7
LB		 4933void decode_feature_control_msr(void)
4934{
4935 unsigned long long msr;
4936
f6505c88 4937 if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
aa8d8cc7
LB		 4938 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4939 base_cpu, msr,
f6505c88 4940 msr & FEAT_CTL_LOCKED ? "" : "UN-",
aa8d8cc7
LB		 4941 msr & (1 << 18) ? "SGX" : "");
4942}
4943
69807a63
LB		 4944void decode_misc_enable_msr(void)
4945{
4946 unsigned long long msr;
4947
f26b1519
LB		 4948 if (!genuine_intel)
4949 return;
4950
69807a63 4951 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
e6512624 4952 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
69807a63 4953 base_cpu, msr,
e6512624
LB		 4954 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4955 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
fd3933ca 4956 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
e6512624
LB		 4957 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4958 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
69807a63
LB		 4959}
4960
33148d67
LB		 4961void decode_misc_feature_control(void)
4962{
4963 unsigned long long msr;
4964
4965 if (!has_misc_feature_control)
4966 return;
4967
4968 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4969 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4970 base_cpu, msr,
4971 msr & (0 << 0) ? "No-" : "",
4972 msr & (1 << 0) ? "No-" : "",
4973 msr & (2 << 0) ? "No-" : "",
4974 msr & (3 << 0) ? "No-" : "");
4975}
f0057310
LB		 4976/*
4977 * Decode MSR_MISC_PWR_MGMT
4978 *
4979 * Decode the bits according to the Nehalem documentation
4980 * bit[0] seems to continue to have same meaning going forward
4981 * bit[1] less so...
4982 */
4983void decode_misc_pwr_mgmt_msr(void)
4984{
4985 unsigned long long msr;
4986
4987 if (!do_nhm_platform_info)
4988 return;
4989
cf4cbe53
LB		 4990 if (no_MSR_MISC_PWR_MGMT)
4991 return;
4992
f0057310 4993 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
ddadb8ad 4994 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
f0057310
LB		 4995 base_cpu, msr,
4996 msr & (1 << 0) ? "DIS" : "EN",
ddadb8ad
SP		 4997 msr & (1 << 1) ? "EN" : "DIS",
4998 msr & (1 << 8) ? "EN" : "DIS");
f0057310 4999}
71616c8e
LB		 5000/*
5001 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
5002 *
5003 * This MSRs are present on Silvermont processors,
5004 * Intel Atom processor E3000 series (Baytrail), and friends.
5005 */
5006void decode_c6_demotion_policy_msr(void)
5007{
5008 unsigned long long msr;
5009
5010 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
5011 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
5012 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5013
5014 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
5015 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
5016 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5017}
7f5c258e 5018
f5a4c76a
LB		 5019/*
5020 * When models are the same, for the purpose of turbostat, reuse
5021 */
5022unsigned int intel_model_duplicates(unsigned int model)
5023{
5024
5025 switch(model) {
5026 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
5027 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
5028 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
5029 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
5030 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
5031 return INTEL_FAM6_NEHALEM;
5032
5033 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
5034 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
5035 return INTEL_FAM6_NEHALEM_EX;
5036
5037 case INTEL_FAM6_XEON_PHI_KNM:
5038 return INTEL_FAM6_XEON_PHI_KNL;
5039
f5a4c76a 5040 case INTEL_FAM6_BROADWELL_X:
5ebb34ed 5041 case INTEL_FAM6_BROADWELL_D: /* BDX-DE */
f5a4c76a
LB		 5042 return INTEL_FAM6_BROADWELL_X;
5043
af239c44 5044 case INTEL_FAM6_SKYLAKE_L:
c66f78a6 5045 case INTEL_FAM6_SKYLAKE:
af239c44 5046 case INTEL_FAM6_KABYLAKE_L:
c66f78a6 5047 case INTEL_FAM6_KABYLAKE:
081c5432
CY		 5048 case INTEL_FAM6_COMETLAKE_L:
5049 case INTEL_FAM6_COMETLAKE:
af239c44 5050 return INTEL_FAM6_SKYLAKE_L;
937807d3 5051
af239c44 5052 case INTEL_FAM6_ICELAKE_L:
d93ea567 5053 case INTEL_FAM6_ICELAKE_NNPI:
4bf7132a
CY		 5054 case INTEL_FAM6_TIGERLAKE_L:
5055 case INTEL_FAM6_TIGERLAKE:
e7af1ed3
LB		 5056 case INTEL_FAM6_ROCKETLAKE:
5057 case INTEL_FAM6_LAKEFIELD:
5058 case INTEL_FAM6_ALDERLAKE:
5683460b 5059 case INTEL_FAM6_ALDERLAKE_L:
af239c44 5060 return INTEL_FAM6_CANNONLAKE_L;
b62b3184 5061
d7814c30
CY		 5062 case INTEL_FAM6_ATOM_TREMONT_L:
5063 return INTEL_FAM6_ATOM_TREMONT;
5064
23274faf 5065 case INTEL_FAM6_ICELAKE_X:
e7af1ed3 5066 case INTEL_FAM6_SAPPHIRERAPIDS_X:
23274faf 5067 return INTEL_FAM6_SKYLAKE_X;
f5a4c76a
LB		 5068 }
5069 return model;
5070}
d76bb7a0
LB		 5071
5072void print_dev_latency(void)
5073{
5074 char *path = "/dev/cpu_dma_latency";
5075 int fd;
5076 int value;
5077 int retval;
5078
5079 fd = open(path, O_RDONLY);
5080 if (fd < 0) {
5081 warn("fopen %s\n", path);
5082 return;
5083 }
5084
5085 retval = read(fd, (void *)&value, sizeof(int));
5086 if (retval != sizeof(int)) {
5087 warn("read %s\n", path);
5088 close(fd);
5089 return;
5090 }
5091 fprintf(outf, "/dev/cpu_dma_latency: %d usec (%s)\n",
5092 value, value == 2000000000 ? "default" : "constrained");
5093
5094 close(fd);
5095}
5096
2af4f9b8
LB		 5097
5098/*
5099 * Linux-perf manages the the HW instructions-retired counter
5100 * by enabling when requested, and hiding rollover
5101 */
5102void linux_perf_init(void)
5103{
5104 if (!BIC_IS_ENABLED(BIC_IPC))
5105 return;
5106
5107 if (access("/proc/sys/kernel/perf_event_paranoid", F_OK))
5108 return;
5109
5110 fd_instr_count_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5111 if (fd_instr_count_percpu == NULL)
5112 err(-1, "calloc fd_instr_count_percpu");
5113
5114 BIC_PRESENT(BIC_IPC);
5115}
5116
fcd17211 5117void process_cpuid()
103a8fea 5118{
34041551
LB		 5119 unsigned int eax, ebx, ecx, edx;
5120 unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
b3a34e93 5121 unsigned int has_turbo;
ed0757b8 5122 unsigned long long ucode_patch = 0;
103a8fea
LB		 5123
5124 eax = ebx = ecx = edx = 0;
5125
5aea2f7f 5126 __cpuid(0, max_level, ebx, ecx, edx);
103a8fea 5127
34041551 5128 if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
103a8fea 5129 genuine_intel = 1;
34041551
LB		 5130 else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
5131 authentic_amd = 1;
c1c10cc7
PW		 5132 else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
5133 hygon_genuine = 1;
103a8fea 5134
96e47158 5135 if (!quiet)
ed0757b8
LB		 5136 fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n",
5137 (char *)&ebx, (char *)&edx, (char *)&ecx, max_level);
103a8fea 5138
5aea2f7f 5139 __cpuid(1, fms, ebx, ecx, edx);
103a8fea
LB		 5140 family = (fms >> 8) & 0xf;
5141 model = (fms >> 4) & 0xf;
5142 stepping = fms & 0xf;
5aa3d1a2
CW		 5143 if (family == 0xf)
5144 family += (fms >> 20) & 0xff;
5145 if (family >= 6)
103a8fea 5146 model += ((fms >> 16) & 0xf) << 4;
34041551
LB		 5147 ecx_flags = ecx;
5148 edx_flags = edx;
103a8fea 5149
ed0757b8
LB		 5150 if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch))
5151 warnx("get_msr(UCODE)\n");
5152
103a8fea
LB		 5153 /*
5154 * check max extended function levels of CPUID.
5155 * This is needed to check for invariant TSC.
5156 * This check is valid for both Intel and AMD.
5157 */
5158 ebx = ecx = edx = 0;
5aea2f7f 5159 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
103a8fea 5160
34041551 5161 if (!quiet) {
ed0757b8
LB		 5162 fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d) microcode 0x%x\n",
5163 family, model, stepping, family, model, stepping, (unsigned int)((ucode_patch >> 32) & 0xFFFFFFFF));
5164 fprintf(outf, "CPUID(0x80000000): max_extended_levels: 0x%x\n", max_extended_level);
34041551
LB		 5165 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
5166 ecx_flags & (1 << 0) ? "SSE3" : "-",
5167 ecx_flags & (1 << 3) ? "MONITOR" : "-",
5168 ecx_flags & (1 << 6) ? "SMX" : "-",
5169 ecx_flags & (1 << 7) ? "EIST" : "-",
5170 ecx_flags & (1 << 8) ? "TM2" : "-",
5171 edx_flags & (1 << 4) ? "TSC" : "-",
5172 edx_flags & (1 << 5) ? "MSR" : "-",
5173 edx_flags & (1 << 22) ? "ACPI-TM" : "-",
5174 edx_flags & (1 << 28) ? "HT" : "-",
5175 edx_flags & (1 << 29) ? "TM" : "-");
5176 }
f5a4c76a
LB		 5177 if (genuine_intel)
5178 model = intel_model_duplicates(model);
34041551
LB		 5179
5180 if (!(edx_flags & (1 << 5)))
5181 errx(1, "CPUID: no MSR");
5182
61a87ba7 5183 if (max_extended_level >= 0x80000007) {
103a8fea 5184
d7899447
LB		 5185 /*
5186 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
5187 * this check is valid for both Intel and AMD
5188 */
5aea2f7f 5189 __cpuid(0x80000007, eax, ebx, ecx, edx);
d7899447
LB		 5190 has_invariant_tsc = edx & (1 << 8);
5191 }
103a8fea
LB		 5192
5193 /*
5194 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
5195 * this check is valid for both Intel and AMD
5196 */
5197
5aea2f7f 5198 __cpuid(0x6, eax, ebx, ecx, edx);
8209e054 5199 has_aperf = ecx & (1 << 0);
812db3f7
LB		 5200 if (has_aperf) {
5201 BIC_PRESENT(BIC_Avg_MHz);
5202 BIC_PRESENT(BIC_Busy);
5203 BIC_PRESENT(BIC_Bzy_MHz);
5204 }
889facbe 5205 do_dts = eax & (1 << 0);
812db3f7
LB		 5206 if (do_dts)
5207 BIC_PRESENT(BIC_CoreTmp);
b3a34e93 5208 has_turbo = eax & (1 << 1);
889facbe 5209 do_ptm = eax & (1 << 6);
812db3f7
LB		 5210 if (do_ptm)
5211 BIC_PRESENT(BIC_PkgTmp);
7f5c258e
LB		 5212 has_hwp = eax & (1 << 7);
5213 has_hwp_notify = eax & (1 << 8);
5214 has_hwp_activity_window = eax & (1 << 9);
5215 has_hwp_epp = eax & (1 << 10);
5216 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 5217 has_epb = ecx & (1 << 3);
5218
96e47158 5219 if (!quiet)
b3a34e93 5220 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
7f5c258e
LB		 5221 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
5222 has_aperf ? "" : "No-",
b3a34e93 5223 has_turbo ? "" : "No-",
7f5c258e
LB		 5224 do_dts ? "" : "No-",
5225 do_ptm ? "" : "No-",
5226 has_hwp ? "" : "No-",
5227 has_hwp_notify ? "" : "No-",
5228 has_hwp_activity_window ? "" : "No-",
5229 has_hwp_epp ? "" : "No-",
5230 has_hwp_pkg ? "" : "No-",
5231 has_epb ? "" : "No-");
103a8fea 5232
96e47158 5233 if (!quiet)
69807a63
LB		 5234 decode_misc_enable_msr();
5235
33148d67 5236
96e47158 5237 if (max_level >= 0x7 && !quiet) {
aa8d8cc7 5238 int has_sgx;
103a8fea 5239
aa8d8cc7
LB		 5240 ecx = 0;
5241
5242 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
5243
5244 has_sgx = ebx & (1 << 2);
5245 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
5246
5247 if (has_sgx)
5248 decode_feature_control_msr();
5249 }
5250
61a87ba7 5251 if (max_level >= 0x15) {
8a5bdf41
LB		 5252 unsigned int eax_crystal;
5253 unsigned int ebx_tsc;
5254
5255 /*
5256 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
5257 */
5258 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5aea2f7f 5259 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
8a5bdf41
LB		 5260
5261 if (ebx_tsc != 0) {
5262
96e47158 5263 if (!quiet && (ebx != 0))
b7d8c148 5264 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
8a5bdf41
LB		 5265 eax_crystal, ebx_tsc, crystal_hz);
5266
5267 if (crystal_hz == 0)
5268 switch(model) {
af239c44 5269 case INTEL_FAM6_SKYLAKE_L: /* SKL */
e8efbc80
LB		 5270 crystal_hz = 24000000; /* 24.0 MHz */
5271 break;
5ebb34ed 5272 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
ec53e594
LB		 5273 crystal_hz = 25000000; /* 25.0 MHz */
5274 break;
869ce69e 5275 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 5276 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e8efbc80 5277 crystal_hz = 19200000; /* 19.2 MHz */
8a5bdf41
LB		 5278 break;
5279 default:
5280 crystal_hz = 0;
5281 }
5282
5283 if (crystal_hz) {
5284 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
96e47158 5285 if (!quiet)
b7d8c148 5286 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
8a5bdf41
LB		 5287 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
5288 }
5289 }
5290 }
61a87ba7
LB		 5291 if (max_level >= 0x16) {
5292 unsigned int base_mhz, max_mhz, bus_mhz, edx;
5293
5294 /*
5295 * CPUID 16H Base MHz, Max MHz, Bus MHz
5296 */
5297 base_mhz = max_mhz = bus_mhz = edx = 0;
5298
5aea2f7f 5299 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
96e47158 5300 if (!quiet)
b7d8c148 5301 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
61a87ba7
LB		 5302 base_mhz, max_mhz, bus_mhz);
5303 }
8a5bdf41 5304
b2b34dfe
HC		 5305 if (has_aperf)
5306 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
5307
812db3f7
LB		 5308 BIC_PRESENT(BIC_IRQ);
5309 BIC_PRESENT(BIC_TSC_MHz);
5310
5311 if (probe_nhm_msrs(family, model)) {
5312 do_nhm_platform_info = 1;
5313 BIC_PRESENT(BIC_CPU_c1);
5314 BIC_PRESENT(BIC_CPU_c3);
5315 BIC_PRESENT(BIC_CPU_c6);
5316 BIC_PRESENT(BIC_SMI);
5317 }
d7899447 5318 do_snb_cstates = has_snb_msrs(family, model);
812db3f7
LB		 5319
5320 if (do_snb_cstates)
5321 BIC_PRESENT(BIC_CPU_c7);
5322
5a63426e 5323 do_irtl_snb = has_snb_msrs(family, model);
0f47c08d
LB		 5324 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
5325 BIC_PRESENT(BIC_Pkgpc2);
5326 if (pkg_cstate_limit >= PCL__3)
5327 BIC_PRESENT(BIC_Pkgpc3);
5328 if (pkg_cstate_limit >= PCL__6)
5329 BIC_PRESENT(BIC_Pkgpc6);
5330 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
5331 BIC_PRESENT(BIC_Pkgpc7);
0539ba11 5332 if (has_slv_msrs(family, model)) {
0f47c08d
LB		 5333 BIC_NOT_PRESENT(BIC_Pkgpc2);
5334 BIC_NOT_PRESENT(BIC_Pkgpc3);
5335 BIC_PRESENT(BIC_Pkgpc6);
5336 BIC_NOT_PRESENT(BIC_Pkgpc7);
0539ba11
LB		 5337 BIC_PRESENT(BIC_Mod_c6);
5338 use_c1_residency_msr = 1;
5339 }
20de0dab
AL		 5340 if (is_jvl(family, model)) {
5341 BIC_NOT_PRESENT(BIC_CPU_c3);
5342 BIC_NOT_PRESENT(BIC_CPU_c7);
5343 BIC_NOT_PRESENT(BIC_Pkgpc2);
5344 BIC_NOT_PRESENT(BIC_Pkgpc3);
5345 BIC_NOT_PRESENT(BIC_Pkgpc6);
5346 BIC_NOT_PRESENT(BIC_Pkgpc7);
5347 }
7170a374
LB		 5348 if (is_dnv(family, model)) {
5349 BIC_PRESENT(BIC_CPU_c1);
5350 BIC_NOT_PRESENT(BIC_CPU_c3);
5351 BIC_NOT_PRESENT(BIC_Pkgpc3);
5352 BIC_NOT_PRESENT(BIC_CPU_c7);
5353 BIC_NOT_PRESENT(BIC_Pkgpc7);
5354 use_c1_residency_msr = 1;
5355 }
34c76197
LB		 5356 if (is_skx(family, model)) {
5357 BIC_NOT_PRESENT(BIC_CPU_c3);
5358 BIC_NOT_PRESENT(BIC_Pkgpc3);
5359 BIC_NOT_PRESENT(BIC_CPU_c7);
5360 BIC_NOT_PRESENT(BIC_Pkgpc7);
5361 }
ade0ebac
LB		 5362 if (is_bdx(family, model)) {
5363 BIC_NOT_PRESENT(BIC_CPU_c7);
5364 BIC_NOT_PRESENT(BIC_Pkgpc7);
5365 }
570992fc 5366 if (has_c8910_msrs(family, model)) {
c315a09b
LB		 5367 if (pkg_cstate_limit >= PCL__8)
5368 BIC_PRESENT(BIC_Pkgpc8);
5369 if (pkg_cstate_limit >= PCL__9)
5370 BIC_PRESENT(BIC_Pkgpc9);
5371 if (pkg_cstate_limit >= PCL_10)
5372 BIC_PRESENT(BIC_Pkgpc10);
0f47c08d 5373 }
570992fc 5374 do_irtl_hsw = has_c8910_msrs(family, model);
a99d8730
LB		 5375 if (has_skl_msrs(family, model)) {
5376 BIC_PRESENT(BIC_Totl_c0);
5377 BIC_PRESENT(BIC_Any_c0);
5378 BIC_PRESENT(BIC_GFX_c0);
5379 BIC_PRESENT(BIC_CPUGFX);
5380 }
144b44b1 5381 do_slm_cstates = is_slm(family, model);
fb5d4327 5382 do_knl_cstates = is_knl(family, model);
103a8fea 5383
f6708400
CY		 5384 if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) ||
5385 is_ehl(family, model))
562855ee 5386 BIC_NOT_PRESENT(BIC_CPU_c3);
103a8fea 5387
96e47158 5388 if (!quiet)
f0057310
LB		 5389 decode_misc_pwr_mgmt_msr();
5390
96e47158 5391 if (!quiet && has_slv_msrs(family, model))
71616c8e
LB		 5392 decode_c6_demotion_policy_msr();
5393
889facbe 5394 rapl_probe(family, model);
3a9a941d 5395 perf_limit_reasons_probe(family, model);
ac980e13 5396 automatic_cstate_conversion_probe(family, model);
889facbe 5397
96e47158 5398 if (!quiet)
1b69317d 5399 dump_cstate_pstate_config_info(family, model);
fcd17211 5400
d76bb7a0
LB		 5401 if (!quiet)
5402 print_dev_latency();
41618e63
LB		 5403 if (!quiet)
5404 dump_sysfs_cstate_config();
7293fccd
LB		 5405 if (!quiet)
5406 dump_sysfs_pstate_config();
41618e63 5407
a2b7b749
LB		 5408 if (has_skl_msrs(family, model))
5409 calculate_tsc_tweak();
5410
812db3f7
LB		 5411 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
5412 BIC_PRESENT(BIC_GFX_rc6);
fdf676e5 5413
812db3f7
LB		 5414 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
5415 BIC_PRESENT(BIC_GFXMHz);
27d47356 5416
b4b91569
RA		 5417 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", R_OK))
5418 BIC_PRESENT(BIC_GFXACTMHz);
5419
be0e54c4
LB		 5420 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
5421 BIC_PRESENT(BIC_CPU_LPI);
5422 else
5423 BIC_NOT_PRESENT(BIC_CPU_LPI);
5424
1f81c5ef
LB		 5425 if (!access(sys_lpi_file_sysfs, R_OK)) {
5426 sys_lpi_file = sys_lpi_file_sysfs;
be0e54c4 5427 BIC_PRESENT(BIC_SYS_LPI);
1f81c5ef
LB		 5428 } else if (!access(sys_lpi_file_debugfs, R_OK)) {
5429 sys_lpi_file = sys_lpi_file_debugfs;
5430 BIC_PRESENT(BIC_SYS_LPI);
5431 } else {
5432 sys_lpi_file_sysfs = NULL;
be0e54c4 5433 BIC_NOT_PRESENT(BIC_SYS_LPI);
1f81c5ef 5434 }
be0e54c4 5435
96e47158 5436 if (!quiet)
33148d67
LB		 5437 decode_misc_feature_control();
5438
889facbe 5439 return;
103a8fea
LB		 5440}
5441
103a8fea
LB		 5442/*
5443 * in /dev/cpu/ return success for names that are numbers
5444 * ie. filter out ".", "..", "microcode".
5445 */
5446int dir_filter(const struct dirent *dirp)
5447{
5448 if (isdigit(dirp->d_name[0]))
5449 return 1;
5450 else
5451 return 0;
5452}
5453
5454int open_dev_cpu_msr(int dummy1)
5455{
5456 return 0;
5457}
5458
c98d5d94
LB		 5459void topology_probe()
5460{
5461 int i;
5462 int max_core_id = 0;
5463 int max_package_id = 0;
6de68fe1 5464 int max_die_id = 0;
c98d5d94 5465 int max_siblings = 0;
c98d5d94
LB		 5466
5467 /* Initialize num_cpus, max_cpu_num */
843c5791 5468 set_max_cpu_num();
c98d5d94 5469 topo.num_cpus = 0;
c98d5d94
LB		 5470 for_all_proc_cpus(count_cpus);
5471 if (!summary_only && topo.num_cpus > 1)
812db3f7 5472 BIC_PRESENT(BIC_CPU);
c98d5d94 5473
d8af6f5f 5474 if (debug > 1)
b7d8c148 5475 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
c98d5d94
LB		 5476
5477 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 5478 if (cpus == NULL)
5479 err(1, "calloc cpus");
c98d5d94
LB		 5480
5481 /*
5482 * Allocate and initialize cpu_present_set
5483 */
5484 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 5485 if (cpu_present_set == NULL)
5486 err(3, "CPU_ALLOC");
c98d5d94
LB		 5487 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5488 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
5489 for_all_proc_cpus(mark_cpu_present);
5490
1ef7d21a
LB		 5491 /*
5492 * Validate that all cpus in cpu_subset are also in cpu_present_set
5493 */
5494 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
5495 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
5496 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
5497 err(1, "cpu%d not present", i);
5498 }
5499
c98d5d94
LB		 5500 /*
5501 * Allocate and initialize cpu_affinity_set
5502 */
5503 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 5504 if (cpu_affinity_set == NULL)
5505 err(3, "CPU_ALLOC");
c98d5d94
LB		 5506 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5507 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5508
8cb48b32 5509 for_all_proc_cpus(init_thread_id);
c98d5d94
LB		 5510
5511 /*
5512 * For online cpus
5513 * find max_core_id, max_package_id
5514 */
5515 for (i = 0; i <= topo.max_cpu_num; ++i) {
5516 int siblings;
5517
5518 if (cpu_is_not_present(i)) {
d8af6f5f 5519 if (debug > 1)
b7d8c148 5520 fprintf(outf, "cpu%d NOT PRESENT\n", i);
c98d5d94
LB		 5521 continue;
5522 }
c98d5d94 5523
0e2d8f05
LB		 5524 cpus[i].logical_cpu_id = i;
5525
5526 /* get package information */
c98d5d94
LB		 5527 cpus[i].physical_package_id = get_physical_package_id(i);
5528 if (cpus[i].physical_package_id > max_package_id)
5529 max_package_id = cpus[i].physical_package_id;
5530
6de68fe1
LB		 5531 /* get die information */
5532 cpus[i].die_id = get_die_id(i);
5533 if (cpus[i].die_id > max_die_id)
5534 max_die_id = cpus[i].die_id;
5535
0e2d8f05 5536 /* get numa node information */
ef605741
PB		 5537 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5538 if (cpus[i].physical_node_id > topo.max_node_num)
5539 topo.max_node_num = cpus[i].physical_node_id;
0e2d8f05
LB		 5540
5541 /* get core information */
5542 cpus[i].physical_core_id = get_core_id(i);
5543 if (cpus[i].physical_core_id > max_core_id)
5544 max_core_id = cpus[i].physical_core_id;
5545
5546 /* get thread information */
5547 siblings = get_thread_siblings(&cpus[i]);
c98d5d94
LB		 5548 if (siblings > max_siblings)
5549 max_siblings = siblings;
4f206a0f 5550 if (cpus[i].thread_id == 0)
8cb48b32 5551 topo.num_cores++;
c98d5d94 5552 }
ef605741 5553
70a9c6e8 5554 topo.cores_per_node = max_core_id + 1;
d8af6f5f 5555 if (debug > 1)
b7d8c148 5556 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
70a9c6e8
PB		 5557 max_core_id, topo.cores_per_node);
5558 if (!summary_only && topo.cores_per_node > 1)
812db3f7 5559 BIC_PRESENT(BIC_Core);
c98d5d94 5560
6de68fe1
LB		 5561 topo.num_die = max_die_id + 1;
5562 if (debug > 1)
5563 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5564 max_die_id, topo.num_die);
5565 if (!summary_only && topo.num_die > 1)
5566 BIC_PRESENT(BIC_Die);
5567
c98d5d94 5568 topo.num_packages = max_package_id + 1;
d8af6f5f 5569 if (debug > 1)
b7d8c148 5570 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
c98d5d94 5571 max_package_id, topo.num_packages);
7da6e3e2 5572 if (!summary_only && topo.num_packages > 1)
812db3f7 5573 BIC_PRESENT(BIC_Package);
c98d5d94 5574
ef605741
PB		 5575 set_node_data();
5576 if (debug > 1)
70a9c6e8 5577 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
01235041
PB		 5578 if (!summary_only && topo.nodes_per_pkg > 1)
5579 BIC_PRESENT(BIC_Node);
ef605741 5580
70a9c6e8 5581 topo.threads_per_core = max_siblings;
d8af6f5f 5582 if (debug > 1)
b7d8c148 5583 fprintf(outf, "max_siblings %d\n", max_siblings);
2ffbb224
PB		 5584
5585 if (debug < 1)
5586 return;
5587
5588 for (i = 0; i <= topo.max_cpu_num; ++i) {
0ec712e3
LB		 5589 if (cpu_is_not_present(i))
5590 continue;
2ffbb224 5591 fprintf(outf,
6de68fe1
LB		 5592 "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5593 i, cpus[i].physical_package_id, cpus[i].die_id,
2ffbb224
PB		 5594 cpus[i].physical_node_id,
5595 cpus[i].logical_node_id,
5596 cpus[i].physical_core_id,
5597 cpus[i].thread_id);
5598 }
5599
c98d5d94
LB		 5600}
5601
5602void
40f5cfe7
PB		 5603allocate_counters(struct thread_data **t, struct core_data **c,
5604 struct pkg_data **p)
c98d5d94
LB		 5605{
5606 int i;
40f5cfe7
PB		 5607 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5608 topo.num_packages;
5609 int num_threads = topo.threads_per_core * num_cores;
c98d5d94 5610
40f5cfe7 5611 *t = calloc(num_threads, sizeof(struct thread_data));
c98d5d94
LB		 5612 if (*t == NULL)
5613 goto error;
5614
40f5cfe7 5615 for (i = 0; i < num_threads; i++)
c98d5d94
LB		 5616 (*t)[i].cpu_id = -1;
5617
40f5cfe7 5618 *c = calloc(num_cores, sizeof(struct core_data));
c98d5d94
LB		 5619 if (*c == NULL)
5620 goto error;
5621
40f5cfe7 5622 for (i = 0; i < num_cores; i++)
c98d5d94
LB		 5623 (*c)[i].core_id = -1;
5624
678a3bd1 5625 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
c98d5d94
LB		 5626 if (*p == NULL)
5627 goto error;
5628
5629 for (i = 0; i < topo.num_packages; i++)
5630 (*p)[i].package_id = i;
5631
5632 return;
5633error:
b2c95d90 5634 err(1, "calloc counters");
c98d5d94
LB		 5635}
5636/*
5637 * init_counter()
5638 *
c98d5d94 5639 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
c98d5d94
LB		 5640 */
5641void init_counter(struct thread_data *thread_base, struct core_data *core_base,
8cb48b32 5642 struct pkg_data *pkg_base, int cpu_id)
c98d5d94 5643{
8cb48b32 5644 int pkg_id = cpus[cpu_id].physical_package_id;
40f5cfe7 5645 int node_id = cpus[cpu_id].logical_node_id;
8cb48b32
PB		 5646 int core_id = cpus[cpu_id].physical_core_id;
5647 int thread_id = cpus[cpu_id].thread_id;
c98d5d94
LB		 5648 struct thread_data *t;
5649 struct core_data *c;
5650 struct pkg_data *p;
5651
42dd4520
NC		 5652
5653 /* Workaround for systems where physical_node_id==-1
5654 * and logical_node_id==(-1 - topo.num_cpus)
5655 */
5656 if (node_id < 0)
5657 node_id = 0;
5658
40f5cfe7
PB		 5659 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5660 c = GET_CORE(core_base, core_id, node_id, pkg_id);
8cb48b32 5661 p = GET_PKG(pkg_base, pkg_id);
c98d5d94
LB		 5662
5663 t->cpu_id = cpu_id;
8cb48b32 5664 if (thread_id == 0) {
c98d5d94
LB		 5665 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5666 if (cpu_is_first_core_in_package(cpu_id))
5667 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5668 }
5669
8cb48b32
PB		 5670 c->core_id = core_id;
5671 p->package_id = pkg_id;
c98d5d94
LB		 5672}
5673
5674
5675int initialize_counters(int cpu_id)
5676{
8cb48b32
PB		 5677 init_counter(EVEN_COUNTERS, cpu_id);
5678 init_counter(ODD_COUNTERS, cpu_id);
c98d5d94
LB		 5679 return 0;
5680}
5681
5682void allocate_output_buffer()
5683{
eeb71c95 5684 output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
c98d5d94 5685 outp = output_buffer;
b2c95d90
JT		 5686 if (outp == NULL)
5687 err(-1, "calloc output buffer");
c98d5d94 5688}
36229897
LB		 5689void allocate_fd_percpu(void)
5690{
01a67adf 5691 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
36229897
LB		 5692 if (fd_percpu == NULL)
5693 err(-1, "calloc fd_percpu");
5694}
562a2d37
LB		 5695void allocate_irq_buffers(void)
5696{
5697 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5698 if (irq_column_2_cpu == NULL)
5699 err(-1, "calloc %d", topo.num_cpus);
c98d5d94 5700
01a67adf 5701 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
562a2d37 5702 if (irqs_per_cpu == NULL)
01a67adf 5703 err(-1, "calloc %d", topo.max_cpu_num + 1);
562a2d37 5704}
c98d5d94
LB		 5705void setup_all_buffers(void)
5706{
5707 topology_probe();
562a2d37 5708 allocate_irq_buffers();
36229897 5709 allocate_fd_percpu();
c98d5d94
LB		 5710 allocate_counters(&thread_even, &core_even, &package_even);
5711 allocate_counters(&thread_odd, &core_odd, &package_odd);
5712 allocate_output_buffer();
5713 for_all_proc_cpus(initialize_counters);
5714}
3b4d5c7f 5715
7ce7d5de
PB		 5716void set_base_cpu(void)
5717{
5718 base_cpu = sched_getcpu();
5719 if (base_cpu < 0)
5720 err(-ENODEV, "No valid cpus found");
5721
5722 if (debug > 1)
b7d8c148 5723 fprintf(outf, "base_cpu = %d\n", base_cpu);
7ce7d5de
PB		 5724}
5725
103a8fea
LB		 5726void turbostat_init()
5727{
7ce7d5de
PB		 5728 setup_all_buffers();
5729 set_base_cpu();
103a8fea 5730 check_dev_msr();
98481e79 5731 check_permissions();
fcd17211 5732 process_cpuid();
2af4f9b8 5733 linux_perf_init();
103a8fea 5734
103a8fea 5735
96e47158 5736 if (!quiet)
7f5c258e
LB		 5737 for_all_cpus(print_hwp, ODD_COUNTERS);
5738
96e47158 5739 if (!quiet)
889facbe
LB		 5740 for_all_cpus(print_epb, ODD_COUNTERS);
5741
96e47158 5742 if (!quiet)
3a9a941d
LB		 5743 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5744
96e47158 5745 if (!quiet)
889facbe
LB		 5746 for_all_cpus(print_rapl, ODD_COUNTERS);
5747
5748 for_all_cpus(set_temperature_target, ODD_COUNTERS);
5749
96e47158 5750 if (!quiet)
889facbe 5751 for_all_cpus(print_thermal, ODD_COUNTERS);
5a63426e 5752
96e47158 5753 if (!quiet && do_irtl_snb)
5a63426e 5754 print_irtl();
103a8fea
LB		 5755}
5756
5757int fork_it(char **argv)
5758{
103a8fea 5759 pid_t child_pid;
d91bb17c 5760 int status;
d15cf7c1 5761
218f0e8d 5762 snapshot_proc_sysfs_files();
d91bb17c 5763 status = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 5764 first_counter_read = 0;
d91bb17c
LB		 5765 if (status)
5766 exit(status);
c98d5d94
LB		 5767 /* clear affinity side-effect of get_counters() */
5768 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 5769 gettimeofday(&tv_even, (struct timezone *)NULL);
5770
5771 child_pid = fork();
5772 if (!child_pid) {
5773 /* child */
5774 execvp(argv[0], argv);
0815a3d0 5775 err(errno, "exec %s", argv[0]);
103a8fea 5776 } else {
103a8fea
LB		 5777
5778 /* parent */
b2c95d90
JT		 5779 if (child_pid == -1)
5780 err(1, "fork");
103a8fea
LB		 5781
5782 signal(SIGINT, SIG_IGN);
5783 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 5784 if (waitpid(child_pid, &status, 0) == -1)
5785 err(status, "waitpid");
2a954966
DA		 5786
5787 if (WIFEXITED(status))
5788 status = WEXITSTATUS(status);
103a8fea 5789 }
c98d5d94
LB		 5790 /*
5791 * n.b. fork_it() does not check for errors from for_all_cpus()
5792 * because re-starting is problematic when forking
5793 */
218f0e8d 5794 snapshot_proc_sysfs_files();
c98d5d94 5795 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 5796 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 5797 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 5798 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5799 fprintf(outf, "%s: Counter reset detected\n", progname);
5800 else {
5801 compute_average(EVEN_COUNTERS);
5802 format_all_counters(EVEN_COUNTERS);
5803 }
103a8fea 5804
b7d8c148
LB		 5805 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5806
5807 flush_output_stderr();
103a8fea 5808
d91bb17c 5809 return status;
103a8fea
LB		 5810}
5811
3b4d5c7f
AS		 5812int get_and_dump_counters(void)
5813{
5814 int status;
5815
218f0e8d 5816 snapshot_proc_sysfs_files();
3b4d5c7f
AS		 5817 status = for_all_cpus(get_counters, ODD_COUNTERS);
5818 if (status)
5819 return status;
5820
5821 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5822 if (status)
5823 return status;
5824
b7d8c148 5825 flush_output_stdout();
3b4d5c7f
AS		 5826
5827 return status;
5828}
5829
d8af6f5f 5830void print_version() {
3e9fa998 5831 fprintf(outf, "turbostat version 20.09.30"
d8af6f5f
LB		 5832 " - Len Brown <lenb@kernel.org>\n");
5833}
5834
495c7654
LB		 5835int add_counter(unsigned int msr_num, char *path, char *name,
5836 unsigned int width, enum counter_scope scope,
41618e63 5837 enum counter_type type, enum counter_format format, int flags)
388e9c81
LB		 5838{
5839 struct msr_counter *msrp;
5840
5841 msrp = calloc(1, sizeof(struct msr_counter));
5842 if (msrp == NULL) {
5843 perror("calloc");
5844 exit(1);
5845 }
5846
5847 msrp->msr_num = msr_num;
d8d005ba 5848 strncpy(msrp->name, name, NAME_BYTES - 1);
495c7654 5849 if (path)
d8d005ba 5850 strncpy(msrp->path, path, PATH_BYTES - 1);
388e9c81
LB		 5851 msrp->width = width;
5852 msrp->type = type;
5853 msrp->format = format;
41618e63 5854 msrp->flags = flags;
388e9c81
LB		 5855
5856 switch (scope) {
5857
5858 case SCOPE_CPU:
388e9c81
LB		 5859 msrp->next = sys.tp;
5860 sys.tp = msrp;
678a3bd1 5861 sys.added_thread_counters++;
0748eaf0 5862 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
678a3bd1
LB		 5863 fprintf(stderr, "exceeded max %d added thread counters\n",
5864 MAX_ADDED_COUNTERS);
5865 exit(-1);
5866 }
388e9c81
LB		 5867 break;
5868
5869 case SCOPE_CORE:
388e9c81
LB		 5870 msrp->next = sys.cp;
5871 sys.cp = msrp;
678a3bd1
LB		 5872 sys.added_core_counters++;
5873 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5874 fprintf(stderr, "exceeded max %d added core counters\n",
5875 MAX_ADDED_COUNTERS);
5876 exit(-1);
5877 }
388e9c81
LB		 5878 break;
5879
5880 case SCOPE_PACKAGE:
388e9c81
LB		 5881 msrp->next = sys.pp;
5882 sys.pp = msrp;
678a3bd1
LB		 5883 sys.added_package_counters++;
5884 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5885 fprintf(stderr, "exceeded max %d added package counters\n",
5886 MAX_ADDED_COUNTERS);
5887 exit(-1);
5888 }
388e9c81
LB		 5889 break;
5890 }
5891
5892 return 0;
5893}
5894
5895void parse_add_command(char *add_command)
5896{
5897 int msr_num = 0;
495c7654 5898 char *path = NULL;
0f47c08d 5899 char name_buffer[NAME_BYTES] = "";
388e9c81
LB		 5900 int width = 64;
5901 int fail = 0;
5902 enum counter_scope scope = SCOPE_CPU;
5903 enum counter_type type = COUNTER_CYCLES;
5904 enum counter_format format = FORMAT_DELTA;
5905
5906 while (add_command) {
5907
5908 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5909 goto next;
5910
5911 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5912 goto next;
5913
495c7654
LB		 5914 if (*add_command == '/') {
5915 path = add_command;
5916 goto next;
5917 }
5918
388e9c81
LB		 5919 if (sscanf(add_command, "u%d", &width) == 1) {
5920 if ((width == 32) || (width == 64))
5921 goto next;
5922 width = 64;
5923 }
5924 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5925 scope = SCOPE_CPU;
5926 goto next;
5927 }
5928 if (!strncmp(add_command, "core", strlen("core"))) {
5929 scope = SCOPE_CORE;
5930 goto next;
5931 }
5932 if (!strncmp(add_command, "package", strlen("package"))) {
5933 scope = SCOPE_PACKAGE;
5934 goto next;
5935 }
5936 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5937 type = COUNTER_CYCLES;
5938 goto next;
5939 }
5940 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5941 type = COUNTER_SECONDS;
5942 goto next;
5943 }
41618e63
LB		 5944 if (!strncmp(add_command, "usec", strlen("usec"))) {
5945 type = COUNTER_USEC;
5946 goto next;
5947 }
388e9c81
LB		 5948 if (!strncmp(add_command, "raw", strlen("raw"))) {
5949 format = FORMAT_RAW;
5950 goto next;
5951 }
5952 if (!strncmp(add_command, "delta", strlen("delta"))) {
5953 format = FORMAT_DELTA;
5954 goto next;
5955 }
5956 if (!strncmp(add_command, "percent", strlen("percent"))) {
5957 format = FORMAT_PERCENT;
5958 goto next;
5959 }
5960
5961 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5962 char *eos;
5963
5964 eos = strchr(name_buffer, ',');
5965 if (eos)
5966 *eos = '\0';
5967 goto next;
5968 }
5969
5970next:
5971 add_command = strchr(add_command, ',');
495c7654
LB		 5972 if (add_command) {
5973 *add_command = '\0';
388e9c81 5974 add_command++;
495c7654 5975 }
388e9c81
LB		 5976
5977 }
495c7654
LB		 5978 if ((msr_num == 0) && (path == NULL)) {
5979 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
388e9c81
LB		 5980 fail++;
5981 }
5982
5983 /* generate default column header */
5984 if (*name_buffer == '\0') {
5f3aea57
LB		 5985 if (width == 32)
5986 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5987 else
5988 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
388e9c81
LB		 5989 }
5990
41618e63 5991 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
388e9c81
LB		 5992 fail++;
5993
5994 if (fail) {
5995 help();
5996 exit(1);
5997 }
5998}
41618e63 5999
dd778a5e
LB		 6000int is_deferred_skip(char *name)
6001{
6002 int i;
6003
6004 for (i = 0; i < deferred_skip_index; ++i)
6005 if (!strcmp(name, deferred_skip_names[i]))
6006 return 1;
6007 return 0;
6008}
6009
41618e63
LB		 6010void probe_sysfs(void)
6011{
6012 char path[64];
6013 char name_buf[16];
6014 FILE *input;
6015 int state;
6016 char *sp;
6017
6018 if (!DO_BIC(BIC_sysfs))
6019 return;
6020
0748eaf0 6021 for (state = 10; state >= 0; --state) {
41618e63
LB		 6022
6023 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6024 base_cpu, state);
6025 input = fopen(path, "r");
6026 if (input == NULL)
6027 continue;
8173c336
BH		 6028 if (!fgets(name_buf, sizeof(name_buf), input))
6029 err(1, "%s: failed to read file", path);
41618e63
LB		 6030
6031 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6032 sp = strchr(name_buf, '-');
6033 if (!sp)
6034 sp = strchrnul(name_buf, '\n');
6035 *sp = '%';
6036 *(sp + 1) = '\0';
6037
fecb3bc8
DA		 6038 remove_underbar(name_buf);
6039
41618e63
LB		 6040 fclose(input);
6041
6042 sprintf(path, "cpuidle/state%d/time", state);
6043
dd778a5e
LB		 6044 if (is_deferred_skip(name_buf))
6045 continue;
6046
41618e63
LB		 6047 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
6048 FORMAT_PERCENT, SYSFS_PERCPU);
6049 }
6050
0748eaf0 6051 for (state = 10; state >= 0; --state) {
41618e63
LB		 6052
6053 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6054 base_cpu, state);
6055 input = fopen(path, "r");
6056 if (input == NULL)
6057 continue;
8173c336
BH		 6058 if (!fgets(name_buf, sizeof(name_buf), input))
6059 err(1, "%s: failed to read file", path);
41618e63
LB		 6060 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6061 sp = strchr(name_buf, '-');
6062 if (!sp)
6063 sp = strchrnul(name_buf, '\n');
6064 *sp = '\0';
6065 fclose(input);
fecb3bc8
DA		 6066
6067 remove_underbar(name_buf);
41618e63
LB		 6068
6069 sprintf(path, "cpuidle/state%d/usage", state);
6070
dd778a5e
LB		 6071 if (is_deferred_skip(name_buf))
6072 continue;
6073
41618e63
LB		 6074 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
6075 FORMAT_DELTA, SYSFS_PERCPU);
6076 }
6077
6078}
6079
1ef7d21a
LB		 6080
6081/*
6082 * parse cpuset with following syntax
6083 * 1,2,4..6,8-10 and set bits in cpu_subset
6084 */
6085void parse_cpu_command(char *optarg)
6086{
6087 unsigned int start, end;
6088 char *next;
6089
4e4e1e7c
LB		 6090 if (!strcmp(optarg, "core")) {
6091 if (cpu_subset)
6092 goto error;
6093 show_core_only++;
6094 return;
6095 }
6096 if (!strcmp(optarg, "package")) {
6097 if (cpu_subset)
6098 goto error;
6099 show_pkg_only++;
6100 return;
6101 }
6102 if (show_core_only || show_pkg_only)
6103 goto error;
6104
1ef7d21a
LB		 6105 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
6106 if (cpu_subset == NULL)
6107 err(3, "CPU_ALLOC");
6108 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
6109
6110 CPU_ZERO_S(cpu_subset_size, cpu_subset);
6111
6112 next = optarg;
6113
6114 while (next && *next) {
6115
6116 if (*next == '-') /* no negative cpu numbers */
6117 goto error;
6118
6119 start = strtoul(next, &next, 10);
6120
6121 if (start >= CPU_SUBSET_MAXCPUS)
6122 goto error;
6123 CPU_SET_S(start, cpu_subset_size, cpu_subset);
6124
6125 if (*next == '\0')
6126 break;
6127
6128 if (*next == ',') {
6129 next += 1;
6130 continue;
6131 }
6132
6133 if (*next == '-') {
6134 next += 1; /* start range */
6135 } else if (*next == '.') {
6136 next += 1;
6137 if (*next == '.')
6138 next += 1; /* start range */
6139 else
6140 goto error;
6141 }
6142
6143 end = strtoul(next, &next, 10);
6144 if (end <= start)
6145 goto error;
6146
6147 while (++start <= end) {
6148 if (start >= CPU_SUBSET_MAXCPUS)
6149 goto error;
6150 CPU_SET_S(start, cpu_subset_size, cpu_subset);
6151 }
6152
6153 if (*next == ',')
6154 next += 1;
6155 else if (*next != '\0')
6156 goto error;
6157 }
6158
6159 return;
6160
6161error:
4e4e1e7c
LB		 6162 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
6163 help();
1ef7d21a
LB		 6164 exit(-1);
6165}
6166
812db3f7 6167
103a8fea
LB		 6168void cmdline(int argc, char **argv)
6169{
6170 int opt;
d8af6f5f
LB		 6171 int option_index = 0;
6172 static struct option long_options[] = {
388e9c81 6173 {"add", required_argument, 0, 'a'},
1ef7d21a 6174 {"cpu", required_argument, 0, 'c'},
d8af6f5f 6175 {"Dump", no_argument, 0, 'D'},
96e47158 6176 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
3f44a5c6 6177 {"enable", required_argument, 0, 'e'},
d8af6f5f 6178 {"interval", required_argument, 0, 'i'},
2af4f9b8 6179 {"IPC", no_argument, 0, 'I'},
023fe0ac 6180 {"num_iterations", required_argument, 0, 'n'},
d8af6f5f 6181 {"help", no_argument, 0, 'h'},
812db3f7 6182 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
d8af6f5f 6183 {"Joules", no_argument, 0, 'J'},
c8ade361 6184 {"list", no_argument, 0, 'l'},
b7d8c148 6185 {"out", required_argument, 0, 'o'},
96e47158 6186 {"quiet", no_argument, 0, 'q'},
812db3f7 6187 {"show", required_argument, 0, 's'},
d8af6f5f
LB		 6188 {"Summary", no_argument, 0, 'S'},
6189 {"TCC", required_argument, 0, 'T'},
6190 {"version", no_argument, 0, 'v' },
6191 {0, 0, 0, 0 }
6192 };
103a8fea
LB		 6193
6194 progname = argv[0];
6195
023fe0ac 6196 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
d8af6f5f 6197 long_options, &option_index)) != -1) {
103a8fea 6198 switch (opt) {
388e9c81
LB		 6199 case 'a':
6200 parse_add_command(optarg);
6201 break;
1ef7d21a
LB		 6202 case 'c':
6203 parse_cpu_command(optarg);
6204 break;
d8af6f5f 6205 case 'D':
3b4d5c7f
AS		 6206 dump_only++;
6207 break;
3f44a5c6
LB		 6208 case 'e':
6209 /* --enable specified counter */
4c2122d4 6210 bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
3f44a5c6 6211 break;
d8af6f5f
LB		 6212 case 'd':
6213 debug++;
3f44a5c6 6214 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
103a8fea 6215 break;
812db3f7 6216 case 'H':
3f44a5c6
LB		 6217 /*
6218 * --hide: do not show those specified
6219 * multiple invocations simply clear more bits in enabled mask
6220 */
6221 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
812db3f7 6222 break;
d8af6f5f
LB		 6223 case 'h':
6224 default:
6225 help();
6226 exit(1);
103a8fea 6227 case 'i':
2a0609c0
LB		 6228 {
6229 double interval = strtod(optarg, NULL);
6230
6231 if (interval < 0.001) {
b7d8c148 6232 fprintf(outf, "interval %f seconds is too small\n",
2a0609c0
LB		 6233 interval);
6234 exit(2);
6235 }
6236
47936f94 6237 interval_tv.tv_sec = interval_ts.tv_sec = interval;
b9ad8ee0 6238 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
47936f94 6239 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
2a0609c0 6240 }
103a8fea 6241 break;
d8af6f5f
LB		 6242 case 'J':
6243 rapl_joules++;
8e180f3c 6244 break;
c8ade361 6245 case 'l':
3f44a5c6 6246 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
c8ade361
LB		 6247 list_header_only++;
6248 quiet++;
6249 break;
b7d8c148
LB		 6250 case 'o':
6251 outf = fopen_or_die(optarg, "w");
6252 break;
96e47158
LB		 6253 case 'q':
6254 quiet = 1;
6255 break;
023fe0ac
CY		 6256 case 'n':
6257 num_iterations = strtod(optarg, NULL);
6258
6259 if (num_iterations <= 0) {
6260 fprintf(outf, "iterations %d should be positive number\n",
6261 num_iterations);
6262 exit(2);
6263 }
6264 break;
812db3f7 6265 case 's':
3f44a5c6
LB		 6266 /*
6267 * --show: show only those specified
6268 * The 1st invocation will clear and replace the enabled mask
6269 * subsequent invocations can add to it.
6270 */
6271 if (shown == 0)
6272 bic_enabled = bic_lookup(optarg, SHOW_LIST);
6273 else
6274 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6275 shown = 1;
812db3f7 6276 break;
d8af6f5f
LB		 6277 case 'S':
6278 summary_only++;
889facbe
LB		 6279 break;
6280 case 'T':
6281 tcc_activation_temp_override = atoi(optarg);
6282 break;
d8af6f5f
LB		 6283 case 'v':
6284 print_version();
6285 exit(0);
5c56be9a 6286 break;
103a8fea
LB		 6287 }
6288 }
6289}
6290
6291int main(int argc, char **argv)
6292{
b7d8c148 6293 outf = stderr;
103a8fea
LB		 6294 cmdline(argc, argv);
6295
96e47158 6296 if (!quiet)
d8af6f5f 6297 print_version();
103a8fea 6298
41618e63
LB		 6299 probe_sysfs();
6300
103a8fea
LB		 6301 turbostat_init();
6302
3b4d5c7f
AS		 6303 /* dump counters and exit */
6304 if (dump_only)
6305 return get_and_dump_counters();
6306
c8ade361
LB		 6307 /* list header and exit */
6308 if (list_header_only) {
6309 print_header(",");
6310 flush_output_stdout();
6311 return 0;
6312 }
6313
9972d5d8 6314 msr_sum_record();
103a8fea
LB		 6315 /*
6316 * if any params left, it must be a command to fork
6317 */
6318 if (argc - optind)
6319 return fork_it(argv + optind);
6320 else
6321 turbostat_loop();
6322
6323 return 0;
6324}
Linux 6.x block layer and io_uring tree(s)