Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[linux-2.6-block.git] / tools / power / x86 / turbostat / turbostat.8
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1.TH TURBOSTAT 8
2.SH NAME
3turbostat \- Report processor frequency and idle statistics
4.SH SYNOPSIS
5.ft B
6.B turbostat
8e180f3c 7.RB [ Options ]
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8.RB command
9.br
10.B turbostat
8e180f3c 11.RB [ Options ]
d8af6f5f 12.RB [ "\--interval seconds" ]
103a8fea 13.SH DESCRIPTION
889facbe 14\fBturbostat \fP reports processor topology, frequency,
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15idle power-state statistics, temperature and power on X86 processors.
16There are two ways to invoke turbostat.
17The first method is to supply a
18\fBcommand\fP, which is forked and statistics are printed
19upon its completion.
20The second method is to omit the command,
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21and turbostat displays statistics every 5 seconds.
22The 5-second interval can be changed using the --interval option.
1cc21f7b 23.PP
d8af6f5f 24Some information is not available on older processors.
103a8fea 25.SS Options
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26Options can be specified with a single or double '-', and only as much of the option
27name as necessary to disambiguate it from others is necessary. Note that options are case-sensitive.
d8af6f5f 28\fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter.
c98d5d94 29.PP
d8af6f5f 30\fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter.
c98d5d94 31.PP
d8af6f5f 32\fB--Dump\fP displays the raw counter values.
e23da037 33.PP
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34\fB--debug\fP displays additional system configuration information. Invoking this parameter
35more than once may also enable internal turbostat debug information.
103a8fea 36.PP
2a0609c0 37\fB--interval seconds\fP overrides the default 5.0 second measurement interval.
f9240813 38.PP
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39\fB--out output_file\fP turbostat output is written to the specified output_file.
40The file is truncated if it already exists, and it is created if it does not exist.
41.PP
d8af6f5f 42\fB--help\fP displays usage for the most common parameters.
8e180f3c 43.PP
d8af6f5f 44\fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts.
8e180f3c 45.PP
d8af6f5f 46\fB--MSR MSR#\fP shows the specified 64-bit MSR value.
103a8fea 47.PP
d8af6f5f 48\fB--msr MSR#\fP shows the specified 32-bit MSR value.
103a8fea 49.PP
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50\fB--Package\fP limits output to the system summary plus the 1st thread in each Package.
51.PP
52\fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
53.PP
54\fB--Summary\fP limits output to a 1-line System Summary for each interval.
55.PP
56\fB--TCC temperature\fP sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.
57.PP
58\fB--version\fP displays the version.
59.PP
60The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
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61displays the statistics gathered since it was forked.
62.PP
1cc21f7b 63.SH DEFAULT FIELD DESCRIPTIONS
103a8fea 64.nf
1cc21f7b 65\fBCPU\fP Linux CPU (logical processor) number. Yes, it is okay that on many systems the CPUs are not listed in numerical order -- for efficiency reasons, turbostat runs in topology order, so HT siblings appear together.
fc04cc67 66\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
75d2e44e 67\fBBusy%\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
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68\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
69\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
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70.fi
71.PP
72.SH DEBUG FIELD DESCRIPTIONS
73.nf
74\fBPackage\fP processor package number.
75\fBCore\fP processor core number.
76Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology (HT).
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77\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
78\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
79\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
80\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
81\fBPkgWatt\fP Watts consumed by the whole package.
82\fBCorWatt\fP Watts consumed by the core part of the package.
83\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
84\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
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85\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
86\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
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87.fi
88.PP
b7d8c148 89.SH PERIODIC EXAMPLE
d8af6f5f 90Without any parameters, turbostat displays statistics ever 5 seconds.
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91Periodic output goes to stdout, by default, unless --out is used to specify an output file.
92The 5-second interval can be changed with th "-i sec" option.
93Or a command may be specified as in "FORK EXAMPLE" below.
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94.nf
95[root@hsw]# ./turbostat
75d2e44e 96 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz
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97 - 488 12.51 3898 3498
98 0 0 0.01 3885 3498
99 4 3897 99.99 3898 3498
100 1 0 0.00 3861 3498
101 5 0 0.00 3882 3498
102 2 1 0.02 3894 3498
103 6 2 0.06 3898 3498
104 3 0 0.00 3849 3498
105 7 0 0.00 3877 3498
106
107.fi
108.SH DEBUG EXAMPLE
109The "--debug" option prints additional system information before measurements:
103a8fea 110
e23da037 111The first row of statistics is a summary for the entire system.
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112For residency % columns, the summary is a weighted average.
113For Temperature columns, the summary is the column maximum.
114For Watts columns, the summary is a system total.
103a8fea 115Subsequent rows show per-CPU statistics.
103a8fea 116.nf
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117turbostat version 4.1 10-Feb, 2015 - Len Brown <lenb@kernel.org>
118CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3c:3 (6:60:3)
889facbe 119CPUID(6): APERF, DTS, PTM, EPB
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120RAPL: 3121 sec. Joule Counter Range, at 84 Watts
121cpu0: MSR_NHM_PLATFORM_INFO: 0x80838f3012300
1228 * 100 = 800 MHz max efficiency
889facbe 12335 * 100 = 3500 MHz TSC frequency
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124cpu0: MSR_IA32_POWER_CTL: 0x0004005d (C1E auto-promotion: DISabled)
125cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e000400 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, UNlocked: pkg-cstate-limit=0: pc0)
ebf5926a 126cpu0: MSR_TURBO_RATIO_LIMIT: 0x25262727
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12737 * 100 = 3700 MHz max turbo 4 active cores
12838 * 100 = 3800 MHz max turbo 3 active cores
12939 * 100 = 3900 MHz max turbo 2 active cores
13039 * 100 = 3900 MHz max turbo 1 active cores
131cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
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132cpu0: MSR_CORE_PERF_LIMIT_REASONS, 0x31200000 (Active: ) (Logged: Auto-HWP, Amps, MultiCoreTurbo, Transitions, )
133cpu0: MSR_GFX_PERF_LIMIT_REASONS, 0x00000000 (Active: ) (Logged: )
134cpu0: MSR_RING_PERF_LIMIT_REASONS, 0x0d000000 (Active: ) (Logged: Amps, PkgPwrL1, PkgPwrL2, )
135cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.)
136cpu0: MSR_PKG_POWER_INFO: 0x000002a0 (84 W TDP, RAPL 0 - 0 W, 0.000000 sec.)
137cpu0: MSR_PKG_POWER_LIMIT: 0x428348001a82a0 (UNlocked)
138cpu0: PKG Limit #1: ENabled (84.000000 Watts, 8.000000 sec, clamp DISabled)
139cpu0: PKG Limit #2: ENabled (105.000000 Watts, 0.002441* sec, clamp DISabled)
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140cpu0: MSR_PP0_POLICY: 0
141cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
142cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
143cpu0: MSR_PP1_POLICY: 0
144cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
145cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
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146cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00641400 (100 C)
147cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x88340800 (48 C)
148cpu0: MSR_IA32_THERM_STATUS: 0x88340000 (48 C +/- 1)
149cpu1: MSR_IA32_THERM_STATUS: 0x88440000 (32 C +/- 1)
150cpu2: MSR_IA32_THERM_STATUS: 0x88450000 (31 C +/- 1)
151cpu3: MSR_IA32_THERM_STATUS: 0x88490000 (27 C +/- 1)
75d2e44e 152 Core CPU Avg_MHz Busy% Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp PkgWatt CorWatt GFXWatt
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153 - - 493 12.64 3898 3498 0 12.64 0.00 0.00 74.72 47 47 21.62 13.74 0.00
154 0 0 4 0.11 3894 3498 0 99.89 0.00 0.00 0.00 47 47 21.62 13.74 0.00
155 0 4 3897 99.98 3898 3498 0 0.02
156 1 1 7 0.17 3887 3498 0 0.04 0.00 0.00 99.79 32
157 1 5 0 0.00 3885 3498 0 0.21
158 2 2 29 0.76 3895 3498 0 0.10 0.01 0.01 99.13 32
159 2 6 2 0.06 3896 3498 0 0.80
160 3 3 1 0.02 3832 3498 0 0.03 0.00 0.00 99.95 28
161 3 7 0 0.00 3879 3498 0 0.04
162^C
163
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164.fi
165The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
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166available at the minimum package voltage. The \fBTSC frequency\fP is the base
167frequency of the processor -- this should match the brand string
168in /proc/cpuinfo. This base frequency
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169should be sustainable on all CPUs indefinitely, given nominal power and cooling.
170The remaining rows show what maximum turbo frequency is possible
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171depending on the number of idle cores. Note that not all information is
172available on all processors.
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173.PP
174The --debug option adds additional columns to the measurement ouput, including CPU idle power-state residency processor temperature sensor readinds.
175See the field definitions above.
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176.SH FORK EXAMPLE
177If turbostat is invoked with a command, it will fork that command
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178and output the statistics gathered after the command exits.
179In this case, turbostat output goes to stderr, by default.
180Output can instead be saved to a file using the --out option.
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181eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
182until ^C while the other CPUs are mostly idle:
183
184.nf
1cc21f7b 185root@hsw: turbostat cat /dev/zero > /dev/null
e23da037 186^C
75d2e44e 187 CPU Avg_MHz Busy% Bzy_MHz TSC_MHz
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188 - 482 12.51 3854 3498
189 0 0 0.01 1960 3498
190 4 0 0.00 2128 3498
191 1 0 0.00 3003 3498
192 5 3854 99.98 3855 3498
193 2 0 0.01 3504 3498
194 6 3 0.08 3884 3498
195 3 0 0.00 2553 3498
196 7 0 0.00 2126 3498
19710.783983 sec
fc04cc67 198
103a8fea 199.fi
1cc21f7b 200Above the cycle soaker drives cpu5 up its 3.9 GHz turbo limit.
75d2e44e 201The first row shows the average MHz and Busy% across all the processors in the system.
103a8fea 202
fc04cc67 203Note that the Avg_MHz column reflects the total number of cycles executed
75d2e44e 204divided by the measurement interval. If the Busy% column is 100%,
fc04cc67 205then the processor was running at that speed the entire interval.
75d2e44e 206The Avg_MHz multiplied by the Busy% results in the Bzy_MHz --
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207which is the average frequency while the processor was executing --
208not including any non-busy idle time.
209
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210.SH NOTES
211
212.B "turbostat "
213must be run as root.
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214Alternatively, non-root users can be enabled to run turbostat this way:
215
216# setcap cap_sys_rawio=ep ./turbostat
217
218# chmod +r /dev/cpu/*/msr
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219
220.B "turbostat "
221reads hardware counters, but doesn't write them.
222So it will not interfere with the OS or other programs, including
223multiple invocations of itself.
224
225\fBturbostat \fP
226may work poorly on Linux-2.6.20 through 2.6.29,
a729617c 227as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs
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228in those kernels.
229
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230AVG_MHz = APERF_delta/measurement_interval. This is the actual
231number of elapsed cycles divided by the entire sample interval --
d8af6f5f 232including idle time. Note that this calculation is resilient
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233to systems lacking a non-stop TSC.
234
235TSC_MHz = TSC_delta/measurement_interval.
236On a system with an invariant TSC, this value will be constant
237and will closely match the base frequency value shown
238in the brand string in /proc/cpuinfo. On a system where
239the TSC stops in idle, TSC_MHz will drop
240below the processor's base frequency.
241
75d2e44e 242Busy% = MPERF_delta/TSC_delta
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243
244Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval
245
246Note that these calculations depend on TSC_delta, so they
247are not reliable during intervals when TSC_MHz is not running at the base frequency.
248
249Turbostat data collection is not atomic.
250Extremely short measurement intervals (much less than 1 second),
251or system activity that prevents turbostat from being able
252to run on all CPUS to quickly collect data, will result in
253inconsistent results.
2f32edf1 254
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255The APERF, MPERF MSRs are defined to count non-halted cycles.
256Although it is not guaranteed by the architecture, turbostat assumes
257that they count at TSC rate, which is true on all processors tested to date.
258
259.SH REFERENCES
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260Volume 3B: System Programming Guide"
261http://www.intel.com/products/processor/manuals/
262
263.SH FILES
264.ta
265.nf
266/dev/cpu/*/msr
267.fi
268
269.SH "SEE ALSO"
270msr(4), vmstat(8)
271.PP
e23da037 272.SH AUTHOR
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273.nf
274Written by Len Brown <len.brown@intel.com>