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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
a43783ae | 2 | #include <errno.h> |
fd20e811 | 3 | #include <inttypes.h> |
f2a39fe8 | 4 | #include <limits.h> |
aeb00b1a | 5 | #include <stdbool.h> |
3bd5a5fc | 6 | #include <stdio.h> |
3bd5a5fc | 7 | #include <unistd.h> |
d944c4ee | 8 | #include <linux/types.h> |
3bd5a5fc | 9 | #include <sys/prctl.h> |
9c3516d1 | 10 | #include <perf/cpumap.h> |
453fa030 | 11 | #include <perf/evlist.h> |
7728fa0c | 12 | #include <perf/mmap.h> |
3bd5a5fc | 13 | |
b4209025 | 14 | #include "debug.h" |
3bd5a5fc AH |
15 | #include "parse-events.h" |
16 | #include "evlist.h" | |
17 | #include "evsel.h" | |
18 | #include "thread_map.h" | |
aeb00b1a | 19 | #include "record.h" |
0b437860 | 20 | #include "tsc.h" |
3989bbf9 LY |
21 | #include "mmap.h" |
22 | #include "tests.h" | |
3bd5a5fc | 23 | |
e74dd9cb IR |
24 | /* |
25 | * Except x86_64/i386 and Arm64, other archs don't support TSC in perf. Just | |
26 | * enable the test for x86_64/i386 and Arm64 archs. | |
27 | */ | |
28 | #if defined(__x86_64__) || defined(__i386__) || defined(__aarch64__) | |
29 | #define TSC_IS_SUPPORTED 1 | |
30 | #else | |
31 | #define TSC_IS_SUPPORTED 0 | |
32 | #endif | |
33 | ||
3bd5a5fc AH |
34 | #define CHECK__(x) { \ |
35 | while ((x) < 0) { \ | |
36 | pr_debug(#x " failed!\n"); \ | |
37 | goto out_err; \ | |
38 | } \ | |
39 | } | |
40 | ||
41 | #define CHECK_NOT_NULL__(x) { \ | |
42 | while ((x) == NULL) { \ | |
43 | pr_debug(#x " failed!\n"); \ | |
44 | goto out_err; \ | |
45 | } \ | |
46 | } | |
47 | ||
290fa68b CL |
48 | static int test__tsc_is_supported(struct test_suite *test __maybe_unused, |
49 | int subtest __maybe_unused) | |
50 | { | |
51 | if (!TSC_IS_SUPPORTED) { | |
52 | pr_debug("Test not supported on this architecture\n"); | |
53 | return TEST_SKIP; | |
54 | } | |
55 | ||
56 | return TEST_OK; | |
57 | } | |
58 | ||
3bd5a5fc AH |
59 | /** |
60 | * test__perf_time_to_tsc - test converting perf time to TSC. | |
61 | * | |
62 | * This function implements a test that checks that the conversion of perf time | |
63 | * to and from TSC is consistent with the order of events. If the test passes | |
64 | * %0 is returned, otherwise %-1 is returned. If TSC conversion is not | |
65 | * supported then then the test passes but " (not supported)" is printed. | |
66 | */ | |
33f44bfd | 67 | static int test__perf_time_to_tsc(struct test_suite *test __maybe_unused, int subtest __maybe_unused) |
3bd5a5fc | 68 | { |
b4006796 | 69 | struct record_opts opts = { |
3bd5a5fc AH |
70 | .mmap_pages = UINT_MAX, |
71 | .user_freq = UINT_MAX, | |
72 | .user_interval = ULLONG_MAX, | |
3bd5a5fc AH |
73 | .target = { |
74 | .uses_mmap = true, | |
75 | }, | |
76 | .sample_time = true, | |
77 | }; | |
9749b90e | 78 | struct perf_thread_map *threads = NULL; |
f854839b | 79 | struct perf_cpu_map *cpus = NULL; |
63503dba | 80 | struct evlist *evlist = NULL; |
32dcd021 | 81 | struct evsel *evsel = NULL; |
290fa68b | 82 | int err = TEST_FAIL, ret, i; |
3bd5a5fc AH |
83 | const char *comm1, *comm2; |
84 | struct perf_tsc_conversion tc; | |
85 | struct perf_event_mmap_page *pc; | |
86 | union perf_event *event; | |
87 | u64 test_tsc, comm1_tsc, comm2_tsc; | |
88 | u64 test_time, comm1_time = 0, comm2_time = 0; | |
a5830532 | 89 | struct mmap *md; |
3bd5a5fc | 90 | |
e74dd9cb | 91 | |
3bd5a5fc AH |
92 | threads = thread_map__new(-1, getpid(), UINT_MAX); |
93 | CHECK_NOT_NULL__(threads); | |
94 | ||
9c3516d1 | 95 | cpus = perf_cpu_map__new(NULL); |
3bd5a5fc AH |
96 | CHECK_NOT_NULL__(cpus); |
97 | ||
0f98b11c | 98 | evlist = evlist__new(); |
3bd5a5fc AH |
99 | CHECK_NOT_NULL__(evlist); |
100 | ||
453fa030 | 101 | perf_evlist__set_maps(&evlist->core, cpus, threads); |
3bd5a5fc | 102 | |
b39b8393 | 103 | CHECK__(parse_events(evlist, "cycles:u", NULL)); |
3bd5a5fc | 104 | |
78e1bc25 | 105 | evlist__config(evlist, &opts, NULL); |
3bd5a5fc | 106 | |
deb44a62 AH |
107 | /* For hybrid "cycles:u", it creates two events */ |
108 | evlist__for_each_entry(evlist, evsel) { | |
d9da6f70 JY |
109 | evsel->core.attr.comm = 1; |
110 | evsel->core.attr.disabled = 1; | |
111 | evsel->core.attr.enable_on_exec = 0; | |
112 | } | |
113 | ||
498c7a54 AH |
114 | ret = evlist__open(evlist); |
115 | if (ret < 0) { | |
116 | if (ret == -ENOENT) | |
117 | err = TEST_SKIP; | |
118 | else | |
119 | pr_debug("evlist__open() failed\n"); | |
5bb017d4 TR |
120 | goto out_err; |
121 | } | |
3bd5a5fc | 122 | |
9521b5f2 | 123 | CHECK__(evlist__mmap(evlist, UINT_MAX)); |
3bd5a5fc | 124 | |
547740f7 | 125 | pc = evlist->mmap[0].core.base; |
3bd5a5fc AH |
126 | ret = perf_read_tsc_conversion(pc, &tc); |
127 | if (ret) { | |
128 | if (ret == -EOPNOTSUPP) { | |
290fa68b CL |
129 | pr_debug("perf_read_tsc_conversion is not supported in current kernel\n"); |
130 | err = TEST_SKIP; | |
3bd5a5fc AH |
131 | } |
132 | goto out_err; | |
133 | } | |
134 | ||
1c87f165 | 135 | evlist__enable(evlist); |
3bd5a5fc AH |
136 | |
137 | comm1 = "Test COMM 1"; | |
138 | CHECK__(prctl(PR_SET_NAME, (unsigned long)comm1, 0, 0, 0)); | |
139 | ||
140 | test_tsc = rdtsc(); | |
141 | ||
142 | comm2 = "Test COMM 2"; | |
143 | CHECK__(prctl(PR_SET_NAME, (unsigned long)comm2, 0, 0, 0)); | |
144 | ||
e74676de | 145 | evlist__disable(evlist); |
3bd5a5fc | 146 | |
c976ee11 | 147 | for (i = 0; i < evlist->core.nr_mmaps; i++) { |
9dfb85df | 148 | md = &evlist->mmap[i]; |
7c4d4182 | 149 | if (perf_mmap__read_init(&md->core) < 0) |
9dfb85df KL |
150 | continue; |
151 | ||
151ed5d7 | 152 | while ((event = perf_mmap__read_event(&md->core)) != NULL) { |
3bd5a5fc AH |
153 | struct perf_sample sample; |
154 | ||
155 | if (event->header.type != PERF_RECORD_COMM || | |
156 | (pid_t)event->comm.pid != getpid() || | |
157 | (pid_t)event->comm.tid != getpid()) | |
8e50d384 | 158 | goto next_event; |
3bd5a5fc AH |
159 | |
160 | if (strcmp(event->comm.comm, comm1) == 0) { | |
deb44a62 | 161 | CHECK_NOT_NULL__(evsel = evlist__event2evsel(evlist, event)); |
6b6017a2 | 162 | CHECK__(evsel__parse_sample(evsel, event, &sample)); |
3bd5a5fc AH |
163 | comm1_time = sample.time; |
164 | } | |
165 | if (strcmp(event->comm.comm, comm2) == 0) { | |
deb44a62 | 166 | CHECK_NOT_NULL__(evsel = evlist__event2evsel(evlist, event)); |
6b6017a2 | 167 | CHECK__(evsel__parse_sample(evsel, event, &sample)); |
3bd5a5fc AH |
168 | comm2_time = sample.time; |
169 | } | |
8e50d384 | 170 | next_event: |
7728fa0c | 171 | perf_mmap__consume(&md->core); |
3bd5a5fc | 172 | } |
32fdc2ca | 173 | perf_mmap__read_done(&md->core); |
3bd5a5fc AH |
174 | } |
175 | ||
176 | if (!comm1_time || !comm2_time) | |
177 | goto out_err; | |
178 | ||
179 | test_time = tsc_to_perf_time(test_tsc, &tc); | |
180 | comm1_tsc = perf_time_to_tsc(comm1_time, &tc); | |
181 | comm2_tsc = perf_time_to_tsc(comm2_time, &tc); | |
182 | ||
183 | pr_debug("1st event perf time %"PRIu64" tsc %"PRIu64"\n", | |
184 | comm1_time, comm1_tsc); | |
185 | pr_debug("rdtsc time %"PRIu64" tsc %"PRIu64"\n", | |
186 | test_time, test_tsc); | |
187 | pr_debug("2nd event perf time %"PRIu64" tsc %"PRIu64"\n", | |
188 | comm2_time, comm2_tsc); | |
189 | ||
190 | if (test_time <= comm1_time || | |
191 | test_time >= comm2_time) | |
192 | goto out_err; | |
193 | ||
194 | if (test_tsc <= comm1_tsc || | |
195 | test_tsc >= comm2_tsc) | |
196 | goto out_err; | |
197 | ||
290fa68b | 198 | err = TEST_OK; |
3bd5a5fc AH |
199 | |
200 | out_err: | |
c12995a5 | 201 | evlist__delete(evlist); |
846580c2 NK |
202 | perf_cpu_map__put(cpus); |
203 | perf_thread_map__put(threads); | |
3bd5a5fc AH |
204 | return err; |
205 | } | |
248dd9b5 | 206 | |
290fa68b CL |
207 | static struct test_case time_to_tsc_tests[] = { |
208 | TEST_CASE_REASON("TSC support", tsc_is_supported, | |
209 | "This architecture does not support"), | |
210 | TEST_CASE_REASON("Perf time to TSC", perf_time_to_tsc, | |
211 | "perf_read_tsc_conversion is not supported"), | |
212 | { .name = NULL, } | |
213 | }; | |
214 | ||
215 | struct test_suite suite__perf_time_to_tsc = { | |
216 | .desc = "Convert perf time to TSC", | |
217 | .test_cases = time_to_tsc_tests, | |
218 | }; |