ALSA: x86: Fold intel_hdmi_audio_if.c into main file
[linux-block.git] / sound / x86 / intel_hdmi_audio.c
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1/*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
24#define pr_fmt(fmt) "had: " fmt
25
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/slab.h>
29#include <linux/module.h>
da864809 30#include <linux/interrupt.h>
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31#include <linux/acpi.h>
32#include <asm/cacheflush.h>
33#include <sound/pcm.h>
34#include <sound/core.h>
35#include <sound/pcm_params.h>
36#include <sound/initval.h>
37#include <sound/control.h>
38#include <sound/initval.h>
da864809 39#include <drm/intel_lpe_audio.h>
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40#include "intel_hdmi_audio.h"
41
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42/*standard module options for ALSA. This module supports only one card*/
43static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
44static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
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45
46module_param_named(index, hdmi_card_index, int, 0444);
47MODULE_PARM_DESC(index,
48 "Index value for INTEL Intel HDMI Audio controller.");
49module_param_named(id, hdmi_card_id, charp, 0444);
50MODULE_PARM_DESC(id,
51 "ID string for INTEL Intel HDMI Audio controller.");
52
53/*
54 * ELD SA bits in the CEA Speaker Allocation data block
55 */
56static int eld_speaker_allocation_bits[] = {
57 [0] = FL | FR,
58 [1] = LFE,
59 [2] = FC,
60 [3] = RL | RR,
61 [4] = RC,
62 [5] = FLC | FRC,
63 [6] = RLC | RRC,
64 /* the following are not defined in ELD yet */
65 [7] = 0,
66};
67
68/*
69 * This is an ordered list!
70 *
71 * The preceding ones have better chances to be selected by
72 * hdmi_channel_allocation().
73 */
74static struct cea_channel_speaker_allocation channel_allocations[] = {
75/* channel: 7 6 5 4 3 2 1 0 */
76{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
77 /* 2.1 */
78{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
79 /* Dolby Surround */
80{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
81 /* surround40 */
82{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
83 /* surround41 */
84{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
85 /* surround50 */
86{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
87 /* surround51 */
88{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
89 /* 6.1 */
90{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
91 /* surround71 */
92{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
93
94{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
95{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
96{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
97{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
98{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
99{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
100{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
101{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
102{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
103{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
104{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
105{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
106{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
107{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
108{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
109{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
110{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
111{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
112{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
113{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
114{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
115{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
116{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
117};
118
119static struct channel_map_table map_tables[] = {
120 { SNDRV_CHMAP_FL, 0x00, FL },
121 { SNDRV_CHMAP_FR, 0x01, FR },
122 { SNDRV_CHMAP_RL, 0x04, RL },
123 { SNDRV_CHMAP_RR, 0x05, RR },
124 { SNDRV_CHMAP_LFE, 0x02, LFE },
125 { SNDRV_CHMAP_FC, 0x03, FC },
126 { SNDRV_CHMAP_RLC, 0x06, RLC },
127 { SNDRV_CHMAP_RRC, 0x07, RRC },
128 {} /* terminator */
129};
130
131/* hardware capability structure */
132static const struct snd_pcm_hardware snd_intel_hadstream = {
133 .info = (SNDRV_PCM_INFO_INTERLEAVED |
134 SNDRV_PCM_INFO_DOUBLE |
135 SNDRV_PCM_INFO_MMAP|
136 SNDRV_PCM_INFO_MMAP_VALID |
137 SNDRV_PCM_INFO_BATCH),
138 .formats = (SNDRV_PCM_FMTBIT_S24 |
139 SNDRV_PCM_FMTBIT_U24),
140 .rates = SNDRV_PCM_RATE_32000 |
141 SNDRV_PCM_RATE_44100 |
142 SNDRV_PCM_RATE_48000 |
143 SNDRV_PCM_RATE_88200 |
144 SNDRV_PCM_RATE_96000 |
145 SNDRV_PCM_RATE_176400 |
146 SNDRV_PCM_RATE_192000,
147 .rate_min = HAD_MIN_RATE,
148 .rate_max = HAD_MAX_RATE,
149 .channels_min = HAD_MIN_CHANNEL,
150 .channels_max = HAD_MAX_CHANNEL,
151 .buffer_bytes_max = HAD_MAX_BUFFER,
152 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
153 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
154 .periods_min = HAD_MIN_PERIODS,
155 .periods_max = HAD_MAX_PERIODS,
156 .fifo_size = HAD_FIFO_SIZE,
157};
158
159/* Register access functions */
372d855f 160static int had_get_hwstate(struct snd_intelhad *intelhaddata)
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161{
162 /* Check for device presence -SW state */
163 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
164 pr_debug("%s:Device not connected:%d\n", __func__,
165 intelhaddata->drv_status);
166 return -ENODEV;
167 }
168
169 return 0;
170}
171
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172static inline void
173mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val)
5dab11d8 174{
da864809 175 *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
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176}
177
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178static inline void
179mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val)
5dab11d8 180{
da864809 181 iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
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182}
183
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184static int had_read_register(struct snd_intelhad *intelhaddata,
185 u32 offset, u32 *data)
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186{
187 int retval;
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188
189 retval = had_get_hwstate(intelhaddata);
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190 if (retval)
191 return retval;
5dab11d8 192
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193 mid_hdmi_audio_read(intelhaddata, offset, data);
194 return 0;
195}
196
197static void fixup_dp_config(struct snd_intelhad *intelhaddata,
198 u32 offset, u32 *data)
199{
200 if (intelhaddata->dp_output) {
201 if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT))
202 *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT;
203 }
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204}
205
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206static int had_write_register(struct snd_intelhad *intelhaddata,
207 u32 offset, u32 data)
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208{
209 int retval;
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210
211 retval = had_get_hwstate(intelhaddata);
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212 if (retval)
213 return retval;
5dab11d8 214
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215 fixup_dp_config(intelhaddata, offset, &data);
216 mid_hdmi_audio_write(intelhaddata, offset, data);
217 return 0;
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218}
219
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220static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset,
221 u32 data, u32 mask)
5dab11d8 222{
da864809 223 u32 val_tmp;
5dab11d8 224 int retval;
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225
226 retval = had_get_hwstate(intelhaddata);
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227 if (retval)
228 return retval;
5dab11d8 229
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230 mid_hdmi_audio_read(intelhaddata, offset, &val_tmp);
231 val_tmp &= ~mask;
232 val_tmp |= (data & mask);
233
234 fixup_dp_config(intelhaddata, offset, &val_tmp);
235 mid_hdmi_audio_write(intelhaddata, offset, val_tmp);
236 return 0;
5dab11d8 237}
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238
239/*
240 * function to read-modify AUD_CONFIG register on VLV2.
241 * The had_read_modify() function should not directly be used on VLV2 for
242 * updating AUD_CONFIG register.
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243 * This is because:
244 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
245 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
246 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
247 * register. This field should be 1xy binary for configuration with 6 or
248 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
249 * causes the "channels" field to be updated as 0xy binary resulting in
250 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
251 * appropriate value when doing read-modify of AUD_CONFIG register.
252 *
253 * @substream: the current substream or NULL if no active substream
254 * @data : data to be written
255 * @mask : mask
256 *
257 */
da864809 258static int had_read_modify_aud_config_v2(struct snd_intelhad *intelhaddata,
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259 u32 data, u32 mask)
260{
da864809 261 struct snd_pcm_substream *substream;
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262 union aud_cfg cfg_val = {.cfg_regval = 0};
263 u8 channels;
264
265 /*
266 * If substream is NULL, there is no active stream.
267 * In this case just set channels to 2
268 */
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269 substream = intelhaddata->stream_info.had_substream;
270 if (substream && substream->runtime)
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271 channels = substream->runtime->channels;
272 else
273 channels = 2;
274 cfg_val.cfg_regx_v2.num_ch = channels - 2;
275
276 data = data | cfg_val.cfg_regval;
277 mask = mask | AUD_CONFIG_CH_MASK_V2;
278
279 pr_debug("%s : data = %x, mask =%x\n", __func__, data, mask);
280
79dda75a 281 return had_read_modify(intelhaddata, AUD_CONFIG, data, mask);
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282}
283
372d855f 284static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable)
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285{
286 u32 status_reg;
287
288 if (enable) {
289 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg);
290 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
291 mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS_v2, status_reg);
292 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg);
293 }
294}
295
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296static void snd_intelhad_enable_audio(struct snd_intelhad *intelhaddata,
297 bool enable)
5dab11d8 298{
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299 had_read_modify_aud_config_v2(intelhaddata, enable ? BIT(0) : 0,
300 BIT(0));
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301}
302
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303static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata,
304 u8 reset)
5dab11d8 305{
79dda75a 306 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, reset);
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307}
308
309/**
310 * initialize audio channel status registers
311 * This function is called in the prepare callback
312 */
313static int had_prog_status_reg(struct snd_pcm_substream *substream,
314 struct snd_intelhad *intelhaddata)
315{
316 union aud_cfg cfg_val = {.cfg_regval = 0};
317 union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
318 union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
319 int format;
320
321 pr_debug("Entry %s\n", __func__);
322
323 ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits &
324 IEC958_AES0_NONAUDIO)>>1;
325 ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
326 IEC958_AES3_CON_CLOCK)>>4;
4812dcc4 327 cfg_val.cfg_regx_v2.val_bit = ch_stat0.status_0_regx.lpcm_id;
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328
329 switch (substream->runtime->rate) {
330 case AUD_SAMPLE_RATE_32:
331 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
332 break;
333
334 case AUD_SAMPLE_RATE_44_1:
335 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ;
336 break;
337 case AUD_SAMPLE_RATE_48:
338 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ;
339 break;
340 case AUD_SAMPLE_RATE_88_2:
341 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ;
342 break;
343 case AUD_SAMPLE_RATE_96:
344 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ;
345 break;
346 case AUD_SAMPLE_RATE_176_4:
347 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ;
348 break;
349 case AUD_SAMPLE_RATE_192:
350 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ;
351 break;
352
353 default:
354 /* control should never come here */
355 return -EINVAL;
356 break;
357
358 }
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359 had_write_register(intelhaddata,
360 AUD_CH_STATUS_0, ch_stat0.status_0_regval);
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361
362 format = substream->runtime->format;
363
364 if (format == SNDRV_PCM_FORMAT_S16_LE) {
365 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20;
366 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS;
367 } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
368 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24;
369 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS;
370 } else {
371 ch_stat1.status_1_regx.max_wrd_len = 0;
372 ch_stat1.status_1_regx.wrd_len = 0;
373 }
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374 had_write_register(intelhaddata,
375 AUD_CH_STATUS_1, ch_stat1.status_1_regval);
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376 return 0;
377}
378
76296ef0 379/*
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380 * function to initialize audio
381 * registers and buffer confgiuration registers
382 * This function is called in the prepare callback
383 */
76296ef0
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384static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream,
385 struct snd_intelhad *intelhaddata)
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386{
387 union aud_cfg cfg_val = {.cfg_regval = 0};
388 union aud_buf_config buf_cfg = {.buf_cfgval = 0};
389 u8 channels;
390
391 had_prog_status_reg(substream, intelhaddata);
392
393 buf_cfg.buf_cfg_regx_v2.audio_fifo_watermark = FIFO_THRESHOLD;
394 buf_cfg.buf_cfg_regx_v2.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
395 buf_cfg.buf_cfg_regx_v2.aud_delay = 0;
79dda75a 396 had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
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397
398 channels = substream->runtime->channels;
399 cfg_val.cfg_regx_v2.num_ch = channels - 2;
400 if (channels <= 2)
401 cfg_val.cfg_regx_v2.layout = LAYOUT0;
402 else
403 cfg_val.cfg_regx_v2.layout = LAYOUT1;
404
964ca808 405 cfg_val.cfg_regx_v2.val_bit = 1;
79dda75a 406 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.cfg_regval);
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407 return 0;
408}
409
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410/*
411 * Compute derived values in channel_allocations[].
412 */
413static void init_channel_allocations(void)
414{
415 int i, j;
416 struct cea_channel_speaker_allocation *p;
417
418 pr_debug("%s: Enter\n", __func__);
419
420 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
421 p = channel_allocations + i;
422 p->channels = 0;
423 p->spk_mask = 0;
424 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
425 if (p->speakers[j]) {
426 p->channels++;
427 p->spk_mask |= p->speakers[j];
428 }
429 }
430}
431
432/*
433 * The transformation takes two steps:
434 *
435 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
436 * spk_mask => (channel_allocations[]) => ai->CA
437 *
438 * TODO: it could select the wrong CA from multiple candidates.
439 */
440static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
441 int channels)
442{
443 int i;
444 int ca = 0;
445 int spk_mask = 0;
446
447 /*
448 * CA defaults to 0 for basic stereo audio
449 */
450 if (channels <= 2)
451 return 0;
452
453 /*
454 * expand ELD's speaker allocation mask
455 *
456 * ELD tells the speaker mask in a compact(paired) form,
457 * expand ELD's notions to match the ones used by Audio InfoFrame.
458 */
459
460 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
da864809 461 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
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462 spk_mask |= eld_speaker_allocation_bits[i];
463 }
464
465 /* search for the first working match in the CA table */
466 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
467 if (channels == channel_allocations[i].channels &&
468 (spk_mask & channel_allocations[i].spk_mask) ==
469 channel_allocations[i].spk_mask) {
470 ca = channel_allocations[i].ca_index;
471 break;
472 }
473 }
474
475 pr_debug("HDMI: select CA 0x%x for %d\n", ca, channels);
476
477 return ca;
478}
479
480/* from speaker bit mask to ALSA API channel position */
481static int spk_to_chmap(int spk)
482{
483 struct channel_map_table *t = map_tables;
484
485 for (; t->map; t++) {
486 if (t->spk_mask == spk)
487 return t->map;
488 }
489 return 0;
490}
491
372d855f 492static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
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493{
494 int i = 0, c = 0;
495 int spk_mask = 0;
496 struct snd_pcm_chmap_elem *chmap;
497 u8 eld_high, eld_high_mask = 0xF0;
498 u8 high_msb;
499
500 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
501 if (chmap == NULL) {
502 intelhaddata->chmap->chmap = NULL;
503 return;
504 }
505
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506 pr_debug("eld.speaker_allocation_block = %x\n",
507 intelhaddata->eld.speaker_allocation_block);
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508
509 /* WA: Fix the max channel supported to 8 */
510
511 /*
512 * Sink may support more than 8 channels, if eld_high has more than
513 * one bit set. SOC supports max 8 channels.
514 * Refer eld_speaker_allocation_bits, for sink speaker allocation
515 */
516
517 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
da864809 518 eld_high = intelhaddata->eld.speaker_allocation_block & eld_high_mask;
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519 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
520 /* eld_high & (eld_high-1): if more than 1 bit set */
521 /* 0x1F: 7 channels */
522 for (i = 1; i < 4; i++) {
523 high_msb = eld_high & (0x80 >> i);
524 if (high_msb) {
da864809 525 intelhaddata->eld.speaker_allocation_block &=
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526 high_msb | 0xF;
527 break;
528 }
529 }
530 }
531
532 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
da864809 533 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
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534 spk_mask |= eld_speaker_allocation_bits[i];
535 }
536
537 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
538 if (spk_mask == channel_allocations[i].spk_mask) {
539 for (c = 0; c < channel_allocations[i].channels; c++) {
540 chmap->map[c] = spk_to_chmap(
541 channel_allocations[i].speakers[
542 (MAX_SPEAKERS - 1)-c]);
543 }
544 chmap->channels = channel_allocations[i].channels;
545 intelhaddata->chmap->chmap = chmap;
546 break;
547 }
548 }
549 if (i >= ARRAY_SIZE(channel_allocations)) {
550 intelhaddata->chmap->chmap = NULL;
551 kfree(chmap);
552 }
553}
554
555/*
556 * ALSA API channel-map control callbacks
557 */
558static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_info *uinfo)
560{
561 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
562 struct snd_intelhad *intelhaddata = info->private_data;
563
564 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
565 return -ENODEV;
566 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
567 uinfo->count = HAD_MAX_CHANNEL;
568 uinfo->value.integer.min = 0;
569 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
570 return 0;
571}
572
573static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
574 struct snd_ctl_elem_value *ucontrol)
575{
576 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
577 struct snd_intelhad *intelhaddata = info->private_data;
578 int i = 0;
579 const struct snd_pcm_chmap_elem *chmap;
580
581 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
582 return -ENODEV;
583 if (intelhaddata->chmap->chmap == NULL)
584 return -ENODATA;
585 chmap = intelhaddata->chmap->chmap;
586 for (i = 0; i < chmap->channels; i++) {
587 ucontrol->value.integer.value[i] = chmap->map[i];
588 pr_debug("chmap->map[%d] = %d\n", i, chmap->map[i]);
589 }
590
591 return 0;
592}
593
594static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
595 struct snd_pcm *pcm)
596{
597 int err = 0;
598
599 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
600 NULL, 0, (unsigned long)intelhaddata,
601 &intelhaddata->chmap);
602 if (err < 0)
603 return err;
604
605 intelhaddata->chmap->private_data = intelhaddata;
606 intelhaddata->kctl = intelhaddata->chmap->kctl;
607 intelhaddata->kctl->info = had_chmap_ctl_info;
608 intelhaddata->kctl->get = had_chmap_ctl_get;
609 intelhaddata->chmap->chmap = NULL;
610 return 0;
611}
612
76296ef0
TI
613/*
614 * snd_intelhad_prog_dip - to initialize Data Island Packets registers
5dab11d8
JA
615 *
616 * @substream:substream for which the prepare function is called
617 * @intelhaddata:substream private data
618 *
619 * This function is called in the prepare callback
620 */
76296ef0
TI
621static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream,
622 struct snd_intelhad *intelhaddata)
5dab11d8
JA
623{
624 int i;
625 union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
626 union aud_info_frame2 frame2 = {.fr2_val = 0};
627 union aud_info_frame3 frame3 = {.fr3_val = 0};
628 u8 checksum = 0;
964ca808 629 u32 info_frame;
5dab11d8
JA
630 int channels;
631
632 channels = substream->runtime->channels;
633
79dda75a 634 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
5dab11d8 635
964ca808
PLB
636 if (intelhaddata->dp_output) {
637 info_frame = DP_INFO_FRAME_WORD1;
638 frame2.fr2_val = 1;
639 } else {
640 info_frame = HDMI_INFO_FRAME_WORD1;
641 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
5dab11d8 642
964ca808
PLB
643 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
644 intelhaddata, channels);
5dab11d8 645
964ca808
PLB
646 /*Calculte the byte wide checksum for all valid DIP words*/
647 for (i = 0; i < BYTES_PER_WORD; i++)
648 checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0;
649 for (i = 0; i < BYTES_PER_WORD; i++)
650 checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
651 for (i = 0; i < BYTES_PER_WORD; i++)
652 checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
5dab11d8 653
964ca808
PLB
654 frame2.fr2_regx.chksum = -(checksum);
655 }
5dab11d8 656
79dda75a
TI
657 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, info_frame);
658 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame2.fr2_val);
659 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame3.fr3_val);
5dab11d8
JA
660
661 /* program remaining DIP words with zero */
662 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
79dda75a 663 had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, 0x0);
5dab11d8
JA
664
665 ctrl_state.ctrl_regx.dip_freq = 1;
666 ctrl_state.ctrl_regx.dip_en_sta = 1;
79dda75a 667 had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
5dab11d8
JA
668}
669
670/**
671 * snd_intelhad_prog_buffer - programs buffer
672 * address and length registers
673 *
674 * @substream:substream for which the prepare function is called
675 * @intelhaddata:substream private data
676 *
677 * This function programs ring buffer address and length into registers.
678 */
372d855f 679static int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata,
5dab11d8
JA
680 int start, int end)
681{
682 u32 ring_buf_addr, ring_buf_size, period_bytes;
683 u8 i, num_periods;
684 struct snd_pcm_substream *substream;
685
686 substream = intelhaddata->stream_info.had_substream;
687 if (!substream) {
688 pr_err("substream is NULL\n");
689 dump_stack();
690 return 0;
691 }
692
693 ring_buf_addr = substream->runtime->dma_addr;
694 ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
695 intelhaddata->stream_info.ring_buf_size = ring_buf_size;
696 period_bytes = frames_to_bytes(substream->runtime,
697 substream->runtime->period_size);
698 num_periods = substream->runtime->periods;
699
700 /*
701 * buffer addr should be 64 byte aligned, period bytes
702 * will be used to calculate addr offset
703 */
704 period_bytes &= ~0x3F;
705
706 /* Hardware supports MAX_PERIODS buffers */
707 if (end >= HAD_MAX_PERIODS)
708 return -EINVAL;
709
710 for (i = start; i <= end; i++) {
711 /* Program the buf registers with addr and len */
712 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
713 (i * period_bytes);
714 if (i < num_periods-1)
715 intelhaddata->buf_info[i].buf_size = period_bytes;
716 else
717 intelhaddata->buf_info[i].buf_size = ring_buf_size -
718 (period_bytes*i);
719
79dda75a
TI
720 had_write_register(intelhaddata,
721 AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
5dab11d8
JA
722 intelhaddata->buf_info[i].buf_addr |
723 BIT(0) | BIT(1));
79dda75a
TI
724 had_write_register(intelhaddata,
725 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
5dab11d8
JA
726 period_bytes);
727 intelhaddata->buf_info[i].is_valid = true;
728 }
729 pr_debug("%s:buf[%d-%d] addr=%#x and size=%d\n", __func__, start, end,
730 intelhaddata->buf_info[start].buf_addr,
731 intelhaddata->buf_info[start].buf_size);
732 intelhaddata->valid_buf_cnt = num_periods;
733 return 0;
734}
735
372d855f 736static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
5dab11d8
JA
737{
738 int i, retval = 0;
739 u32 len[4];
740
741 for (i = 0; i < 4 ; i++) {
79dda75a
TI
742 had_read_register(intelhaddata,
743 AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
744 &len[i]);
5dab11d8
JA
745 if (!len[i])
746 retval++;
747 }
748 if (retval != 1) {
749 for (i = 0; i < 4 ; i++)
750 pr_debug("buf[%d] size=%d\n", i, len[i]);
751 }
752
753 return retval;
754}
755
964ca808
PLB
756static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
757{
758 u32 maud_val;
759
760 /* Select maud according to DP 1.2 spec*/
761 if (link_rate == DP_2_7_GHZ) {
762 switch (aud_samp_freq) {
763 case AUD_SAMPLE_RATE_32:
764 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
765 break;
766
767 case AUD_SAMPLE_RATE_44_1:
768 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
769 break;
770
771 case AUD_SAMPLE_RATE_48:
772 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
773 break;
774
775 case AUD_SAMPLE_RATE_88_2:
776 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
777 break;
778
779 case AUD_SAMPLE_RATE_96:
780 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
781 break;
782
783 case AUD_SAMPLE_RATE_176_4:
784 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
785 break;
786
787 case HAD_MAX_RATE:
788 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
789 break;
790
791 default:
792 maud_val = -EINVAL;
793 break;
794 }
795 } else if (link_rate == DP_1_62_GHZ) {
796 switch (aud_samp_freq) {
797 case AUD_SAMPLE_RATE_32:
798 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
799 break;
800
801 case AUD_SAMPLE_RATE_44_1:
802 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
803 break;
804
805 case AUD_SAMPLE_RATE_48:
806 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
807 break;
808
809 case AUD_SAMPLE_RATE_88_2:
810 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
811 break;
812
813 case AUD_SAMPLE_RATE_96:
814 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
815 break;
816
817 case AUD_SAMPLE_RATE_176_4:
818 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
819 break;
820
821 case HAD_MAX_RATE:
822 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
823 break;
824
825 default:
826 maud_val = -EINVAL;
827 break;
828 }
829 } else
830 maud_val = -EINVAL;
831
832 return maud_val;
833}
834
76296ef0
TI
835/*
836 * snd_intelhad_prog_cts - Program HDMI audio CTS value
5dab11d8
JA
837 *
838 * @aud_samp_freq: sampling frequency of audio data
839 * @tmds: sampling frequency of the display data
840 * @n_param: N value, depends on aud_samp_freq
841 * @intelhaddata:substream private data
842 *
843 * Program CTS register based on the audio and display sampling frequency
844 */
76296ef0
TI
845static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds,
846 u32 link_rate, u32 n_param,
847 struct snd_intelhad *intelhaddata)
5dab11d8
JA
848{
849 u32 cts_val;
850 u64 dividend, divisor;
851
964ca808
PLB
852 if (intelhaddata->dp_output) {
853 /* Substitute cts_val with Maud according to DP 1.2 spec*/
854 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
855 } else {
856 /* Calculate CTS according to HDMI 1.3a spec*/
857 dividend = (u64)tmds * n_param*1000;
858 divisor = 128 * aud_samp_freq;
859 cts_val = div64_u64(dividend, divisor);
860 }
5dab11d8 861 pr_debug("TMDS value=%d, N value=%d, CTS Value=%d\n",
964ca808 862 tmds, n_param, cts_val);
79dda75a 863 had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
5dab11d8
JA
864}
865
866static int had_calculate_n_value(u32 aud_samp_freq)
867{
868 s32 n_val;
869
870 /* Select N according to HDMI 1.3a spec*/
871 switch (aud_samp_freq) {
872 case AUD_SAMPLE_RATE_32:
873 n_val = 4096;
874 break;
875
876 case AUD_SAMPLE_RATE_44_1:
877 n_val = 6272;
878 break;
879
880 case AUD_SAMPLE_RATE_48:
881 n_val = 6144;
882 break;
883
884 case AUD_SAMPLE_RATE_88_2:
885 n_val = 12544;
886 break;
887
888 case AUD_SAMPLE_RATE_96:
889 n_val = 12288;
890 break;
891
892 case AUD_SAMPLE_RATE_176_4:
893 n_val = 25088;
894 break;
895
896 case HAD_MAX_RATE:
897 n_val = 24576;
898 break;
899
900 default:
901 n_val = -EINVAL;
902 break;
903 }
904 return n_val;
905}
906
76296ef0
TI
907/*
908 * snd_intelhad_prog_n - Program HDMI audio N value
5dab11d8
JA
909 *
910 * @aud_samp_freq: sampling frequency of audio data
911 * @n_param: N value, depends on aud_samp_freq
912 * @intelhaddata:substream private data
913 *
914 * This function is called in the prepare callback.
915 * It programs based on the audio and display sampling frequency
916 */
76296ef0
TI
917static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param,
918 struct snd_intelhad *intelhaddata)
5dab11d8
JA
919{
920 s32 n_val;
921
964ca808
PLB
922 if (intelhaddata->dp_output) {
923 /*
924 * According to DP specs, Maud and Naud values hold
925 * a relationship, which is stated as:
926 * Maud/Naud = 512 * fs / f_LS_Clk
927 * where, fs is the sampling frequency of the audio stream
928 * and Naud is 32768 for Async clock.
929 */
930
931 n_val = DP_NAUD_VAL;
932 } else
933 n_val = had_calculate_n_value(aud_samp_freq);
5dab11d8
JA
934
935 if (n_val < 0)
936 return n_val;
937
79dda75a 938 had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
5dab11d8
JA
939 *n_param = n_val;
940 return 0;
941}
942
372d855f 943static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata)
5dab11d8
JA
944{
945 u32 hdmi_status, i = 0;
946
947 /* Handle Underrun interrupt within Audio Unit */
79dda75a 948 had_write_register(intelhaddata, AUD_CONFIG, 0);
5dab11d8 949 /* Reset buffer pointers */
79dda75a
TI
950 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 1);
951 had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 0);
5dab11d8
JA
952 /**
953 * The interrupt status 'sticky' bits might not be cleared by
954 * setting '1' to that bit once...
955 */
956 do { /* clear bit30, 31 AUD_HDMI_STATUS */
79dda75a
TI
957 had_read_register(intelhaddata, AUD_HDMI_STATUS_v2,
958 &hdmi_status);
5dab11d8
JA
959 pr_debug("HDMI status =0x%x\n", hdmi_status);
960 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
961 i++;
79dda75a
TI
962 had_write_register(intelhaddata,
963 AUD_HDMI_STATUS_v2, hdmi_status);
5dab11d8
JA
964 } else
965 break;
966 } while (i < MAX_CNT);
967 if (i >= MAX_CNT)
968 pr_err("Unable to clear UNDERRUN bits\n");
969}
970
971/**
972 * snd_intelhad_open - stream initializations are done here
973 * @substream:substream for which the stream function is called
974 *
975 * This function is called whenever a PCM stream is opened
976 */
977static int snd_intelhad_open(struct snd_pcm_substream *substream)
978{
979 struct snd_intelhad *intelhaddata;
980 struct snd_pcm_runtime *runtime;
981 struct had_stream_pvt *stream;
5647aec2 982 struct had_stream_data *had_stream;
5dab11d8
JA
983 int retval;
984
985 pr_debug("snd_intelhad_open called\n");
986 intelhaddata = snd_pcm_substream_chip(substream);
5647aec2 987 had_stream = &intelhaddata->stream_data;
5dab11d8 988 runtime = substream->runtime;
6ddb3ab6 989 intelhaddata->underrun_count = 0;
5dab11d8
JA
990
991 pm_runtime_get(intelhaddata->dev);
992
993 if (had_get_hwstate(intelhaddata)) {
994 pr_err("%s: HDMI cable plugged-out\n", __func__);
995 retval = -ENODEV;
996 goto exit_put_handle;
997 }
998
999 /* Check, if device already in use */
1000 if (runtime->private_data) {
1001 pr_err("Device already in use\n");
1002 retval = -EBUSY;
1003 goto exit_put_handle;
1004 }
1005
1006 /* set the runtime hw parameter with local snd_pcm_hardware struct */
1007 runtime->hw = snd_intel_hadstream;
1008
1009 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
1010 if (!stream) {
1011 retval = -ENOMEM;
1012 goto exit_put_handle;
1013 }
1014 stream->stream_status = STREAM_INIT;
1015 runtime->private_data = stream;
1016
1017 retval = snd_pcm_hw_constraint_integer(runtime,
1018 SNDRV_PCM_HW_PARAM_PERIODS);
1019 if (retval < 0)
1020 goto exit_err;
1021
1022 /* Make sure, that the period size is always aligned
1023 * 64byte boundary
1024 */
1025 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
1026 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
1027 if (retval < 0) {
1028 pr_err("%s:step_size=64 failed,err=%d\n", __func__, retval);
1029 goto exit_err;
1030 }
1031
1032 return retval;
1033exit_err:
1034 kfree(stream);
1035exit_put_handle:
1036 pm_runtime_put(intelhaddata->dev);
1037 runtime->private_data = NULL;
1038 return retval;
1039}
1040
1041/**
1042 * had_period_elapsed - updates the hardware pointer status
1043 * @had_substream:substream for which the stream function is called
1044 *
1045 */
1046static void had_period_elapsed(void *had_substream)
1047{
1048 struct snd_pcm_substream *substream = had_substream;
1049 struct had_stream_pvt *stream;
1050
1051 /* pr_debug("had_period_elapsed called\n"); */
1052
1053 if (!substream || !substream->runtime)
1054 return;
1055 stream = substream->runtime->private_data;
1056 if (!stream)
1057 return;
1058
1059 if (stream->stream_status != STREAM_RUNNING)
1060 return;
1061 snd_pcm_period_elapsed(substream);
1062}
1063
1064/**
1065 * snd_intelhad_init_stream - internal function to initialize stream info
1066 * @substream:substream for which the stream function is called
1067 *
1068 */
1069static int snd_intelhad_init_stream(struct snd_pcm_substream *substream)
1070{
1071 struct snd_intelhad *intelhaddata = snd_pcm_substream_chip(substream);
1072
1073 pr_debug("snd_intelhad_init_stream called\n");
1074
1075 pr_debug("setting buffer ptr param\n");
1076 intelhaddata->stream_info.period_elapsed = had_period_elapsed;
1077 intelhaddata->stream_info.had_substream = substream;
1078 intelhaddata->stream_info.buffer_ptr = 0;
1079 intelhaddata->stream_info.buffer_rendered = 0;
1080 intelhaddata->stream_info.sfreq = substream->runtime->rate;
1081 return 0;
1082}
1083
1084/**
1085 * snd_intelhad_close- to free parameteres when stream is stopped
1086 *
1087 * @substream: substream for which the function is called
1088 *
1089 * This function is called by ALSA framework when stream is stopped
1090 */
1091static int snd_intelhad_close(struct snd_pcm_substream *substream)
1092{
1093 struct snd_intelhad *intelhaddata;
1094 struct snd_pcm_runtime *runtime;
1095
1096 pr_debug("snd_intelhad_close called\n");
1097
1098 intelhaddata = snd_pcm_substream_chip(substream);
1099 runtime = substream->runtime;
1100
1101 if (!runtime->private_data) {
1102 pr_debug("close() might have called after failed open");
1103 return 0;
1104 }
1105
1106 intelhaddata->stream_info.buffer_rendered = 0;
1107 intelhaddata->stream_info.buffer_ptr = 0;
1108 intelhaddata->stream_info.str_id = 0;
1109 intelhaddata->stream_info.had_substream = NULL;
1110
1111 /* Check if following drv_status modification is required - VA */
1112 if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1113 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1114 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1115 __func__, __LINE__);
1116 }
1117 kfree(runtime->private_data);
1118 runtime->private_data = NULL;
1119 pm_runtime_put(intelhaddata->dev);
1120 return 0;
1121}
1122
1123/**
1124 * snd_intelhad_hw_params- to setup the hardware parameters
1125 * like allocating the buffers
1126 *
1127 * @substream: substream for which the function is called
1128 * @hw_params: hardware parameters
1129 *
1130 * This function is called by ALSA framework when hardware params are set
1131 */
1132static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1133 struct snd_pcm_hw_params *hw_params)
1134{
1135 unsigned long addr;
1136 int pages, buf_size, retval;
1137
1138 pr_debug("snd_intelhad_hw_params called\n");
1139
1140 if (!hw_params)
1141 return -EINVAL;
1142
1143 buf_size = params_buffer_bytes(hw_params);
1144 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1145 if (retval < 0)
1146 return retval;
1147 pr_debug("%s:allocated memory = %d\n", __func__, buf_size);
1148 /* mark the pages as uncached region */
1149 addr = (unsigned long) substream->runtime->dma_area;
1150 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1151 retval = set_memory_uc(addr, pages);
1152 if (retval) {
1153 pr_err("set_memory_uc failed.Error:%d\n", retval);
1154 return retval;
1155 }
1156 memset(substream->runtime->dma_area, 0, buf_size);
1157
1158 return retval;
1159}
1160
1161/**
1162 * snd_intelhad_hw_free- to release the resources allocated during
1163 * hardware params setup
1164 *
1165 * @substream: substream for which the function is called
1166 *
1167 * This function is called by ALSA framework before close callback.
1168 *
1169 */
1170static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1171{
1172 unsigned long addr;
1173 u32 pages;
1174
1175 pr_debug("snd_intelhad_hw_free called\n");
1176
1177 /* mark back the pages as cached/writeback region before the free */
1178 if (substream->runtime->dma_area != NULL) {
1179 addr = (unsigned long) substream->runtime->dma_area;
1180 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1181 PAGE_SIZE;
1182 set_memory_wb(addr, pages);
1183 return snd_pcm_lib_free_pages(substream);
1184 }
1185 return 0;
1186}
1187
1188/**
1189 * snd_intelhad_pcm_trigger - stream activities are handled here
1190 * @substream:substream for which the stream function is called
1191 * @cmd:the stream commamd thats requested from upper layer
1192 * This function is called whenever an a stream activity is invoked
1193 */
1194static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1195 int cmd)
1196{
da864809 1197 int retval = 0;
5dab11d8
JA
1198 unsigned long flag_irq;
1199 struct snd_intelhad *intelhaddata;
1200 struct had_stream_pvt *stream;
5647aec2 1201 struct had_stream_data *had_stream;
5dab11d8
JA
1202
1203 pr_debug("snd_intelhad_pcm_trigger called\n");
1204
1205 intelhaddata = snd_pcm_substream_chip(substream);
1206 stream = substream->runtime->private_data;
5647aec2 1207 had_stream = &intelhaddata->stream_data;
5dab11d8
JA
1208
1209 switch (cmd) {
1210 case SNDRV_PCM_TRIGGER_START:
1211 pr_debug("Trigger Start\n");
1212
1213 /* Disable local INTRs till register prgmng is done */
1214 if (had_get_hwstate(intelhaddata)) {
1215 pr_err("_START: HDMI cable plugged-out\n");
1216 retval = -ENODEV;
1217 break;
1218 }
1219 stream->stream_status = STREAM_RUNNING;
1220
1221 had_stream->stream_type = HAD_RUNNING_STREAM;
1222
1223 /* Enable Audio */
da864809
TI
1224 snd_intelhad_enable_audio_int(intelhaddata, true);
1225 snd_intelhad_enable_audio(intelhaddata, true);
5dab11d8
JA
1226
1227 pr_debug("Processed _Start\n");
1228
1229 break;
1230
1231 case SNDRV_PCM_TRIGGER_STOP:
1232 pr_debug("Trigger Stop\n");
1233 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irq);
1234 intelhaddata->stream_info.str_id = 0;
1235 intelhaddata->curr_buf = 0;
1236
1237 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers*/
1238
1239 had_stream->stream_type = HAD_INIT;
1240 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irq);
1241 /* Disable Audio */
da864809
TI
1242 snd_intelhad_enable_audio_int(intelhaddata, false);
1243 snd_intelhad_enable_audio(intelhaddata, false);
5dab11d8 1244 /* Reset buffer pointers */
79dda75a
TI
1245 snd_intelhad_reset_audio(intelhaddata, 1);
1246 snd_intelhad_reset_audio(intelhaddata, 0);
5dab11d8 1247 stream->stream_status = STREAM_DROPPED;
da864809 1248 snd_intelhad_enable_audio_int(intelhaddata, false);
5dab11d8
JA
1249 break;
1250
1251 default:
1252 retval = -EINVAL;
1253 }
1254 return retval;
1255}
1256
1257/**
1258 * snd_intelhad_pcm_prepare- internal preparation before starting a stream
1259 *
1260 * @substream: substream for which the function is called
1261 *
1262 * This function is called when a stream is started for internal preparation.
1263 */
1264static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1265{
1266 int retval;
1267 u32 disp_samp_freq, n_param;
964ca808 1268 u32 link_rate = 0;
5dab11d8
JA
1269 struct snd_intelhad *intelhaddata;
1270 struct snd_pcm_runtime *runtime;
5647aec2 1271 struct had_stream_data *had_stream;
5dab11d8
JA
1272
1273 pr_debug("snd_intelhad_pcm_prepare called\n");
1274
1275 intelhaddata = snd_pcm_substream_chip(substream);
1276 runtime = substream->runtime;
5647aec2 1277 had_stream = &intelhaddata->stream_data;
5dab11d8
JA
1278
1279 if (had_get_hwstate(intelhaddata)) {
1280 pr_err("%s: HDMI cable plugged-out\n", __func__);
1281 retval = -ENODEV;
1282 goto prep_end;
1283 }
1284
1285 pr_debug("period_size=%d\n",
1286 (int)frames_to_bytes(runtime, runtime->period_size));
1287 pr_debug("periods=%d\n", runtime->periods);
1288 pr_debug("buffer_size=%d\n", (int)snd_pcm_lib_buffer_bytes(substream));
1289 pr_debug("rate=%d\n", runtime->rate);
1290 pr_debug("channels=%d\n", runtime->channels);
1291
1292 if (intelhaddata->stream_info.str_id) {
1293 pr_debug("_prepare is called for existing str_id#%d\n",
1294 intelhaddata->stream_info.str_id);
1295 retval = snd_intelhad_pcm_trigger(substream,
1296 SNDRV_PCM_TRIGGER_STOP);
1297 return retval;
1298 }
1299
1300 retval = snd_intelhad_init_stream(substream);
1301 if (retval)
1302 goto prep_end;
1303
1304
1305 /* Get N value in KHz */
da864809 1306 disp_samp_freq = intelhaddata->tmds_clock_speed;
5dab11d8 1307
76296ef0
TI
1308 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1309 intelhaddata);
5dab11d8
JA
1310 if (retval) {
1311 pr_err("programming N value failed %#x\n", retval);
1312 goto prep_end;
1313 }
964ca808
PLB
1314
1315 if (intelhaddata->dp_output)
da864809 1316 link_rate = intelhaddata->link_rate;
964ca808 1317
76296ef0
TI
1318 snd_intelhad_prog_cts(substream->runtime->rate,
1319 disp_samp_freq, link_rate,
1320 n_param, intelhaddata);
5dab11d8 1321
76296ef0 1322 snd_intelhad_prog_dip(substream, intelhaddata);
5dab11d8 1323
76296ef0 1324 retval = snd_intelhad_audio_ctrl(substream, intelhaddata);
5dab11d8
JA
1325
1326 /* Prog buffer address */
1327 retval = snd_intelhad_prog_buffer(intelhaddata,
1328 HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1329
1330 /*
1331 * Program channel mapping in following order:
1332 * FL, FR, C, LFE, RL, RR
1333 */
1334
79dda75a 1335 had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
5dab11d8
JA
1336
1337prep_end:
1338 return retval;
1339}
1340
1341/**
1342 * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
1343 *
1344 * @substream: substream for which the function is called
1345 *
1346 * This function is called by ALSA framework to get the current hw buffer ptr
1347 * when a period is elapsed
1348 */
1349static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1350 struct snd_pcm_substream *substream)
1351{
1352 struct snd_intelhad *intelhaddata;
1353 u32 bytes_rendered = 0;
1354 u32 t;
1355 int buf_id;
1356
1357 /* pr_debug("snd_intelhad_pcm_pointer called\n"); */
1358
1359 intelhaddata = snd_pcm_substream_chip(substream);
1360
1361 if (intelhaddata->flag_underrun) {
1362 intelhaddata->flag_underrun = 0;
1363 return SNDRV_PCM_POS_XRUN;
1364 }
1365
1366 /* Use a hw register to calculate sub-period position reports.
1367 * This makes PulseAudio happier.
1368 */
1369
1370 buf_id = intelhaddata->curr_buf % 4;
79dda75a
TI
1371 had_read_register(intelhaddata,
1372 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
232892fb
JA
1373
1374 if ((t == 0) || (t == ((u32)-1L))) {
6ddb3ab6 1375 intelhaddata->underrun_count++;
232892fb 1376 pr_debug("discovered buffer done for buf %d, count = %d\n",
6ddb3ab6 1377 buf_id, intelhaddata->underrun_count);
232892fb 1378
6ddb3ab6 1379 if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) {
232892fb 1380 pr_debug("assume audio_codec_reset, underrun = %d - do xrun\n",
6ddb3ab6
TI
1381 intelhaddata->underrun_count);
1382 intelhaddata->underrun_count = 0;
232892fb
JA
1383 return SNDRV_PCM_POS_XRUN;
1384 }
1385 } else {
1386 /* Reset Counter */
6ddb3ab6 1387 intelhaddata->underrun_count = 0;
5dab11d8 1388 }
232892fb 1389
5dab11d8
JA
1390 t = intelhaddata->buf_info[buf_id].buf_size - t;
1391
1392 if (intelhaddata->stream_info.buffer_rendered)
1393 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1394 intelhaddata->stream_info.ring_buf_size,
1395 &(bytes_rendered));
1396
1397 intelhaddata->stream_info.buffer_ptr = bytes_to_frames(
1398 substream->runtime,
1399 bytes_rendered + t);
1400 return intelhaddata->stream_info.buffer_ptr;
1401}
1402
1403/**
1404 * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
1405 *
1406 * @substream: substream for which the function is called
1407 * @vma: struct instance of memory VMM memory area
1408 *
1409 * This function is called by OS when a user space component
1410 * tries to get mmap memory from driver
1411 */
1412static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1413 struct vm_area_struct *vma)
1414{
1415
1416 pr_debug("snd_intelhad_pcm_mmap called\n");
1417
1418 pr_debug("entry with prot:%s\n", __func__);
1419 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1420 return remap_pfn_range(vma, vma->vm_start,
1421 substream->dma_buffer.addr >> PAGE_SHIFT,
1422 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1423}
1424
da864809 1425static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata)
5dab11d8 1426{
da864809 1427 struct snd_pcm_substream *substream;
5dab11d8
JA
1428 int retval = 0;
1429 u32 disp_samp_freq, n_param;
964ca808 1430 u32 link_rate = 0;
5dab11d8 1431
da864809
TI
1432 substream = intelhaddata->stream_info.had_substream;
1433 if (!substream || !substream->runtime)
1434 return 0;
5dab11d8
JA
1435
1436 /* Disable Audio */
da864809 1437 snd_intelhad_enable_audio(intelhaddata, false);
5dab11d8
JA
1438
1439 /* Update CTS value */
da864809 1440 disp_samp_freq = intelhaddata->tmds_clock_speed;
5dab11d8 1441
76296ef0
TI
1442 retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1443 intelhaddata);
5dab11d8
JA
1444 if (retval) {
1445 pr_err("programming N value failed %#x\n", retval);
1446 goto out;
1447 }
964ca808
PLB
1448
1449 if (intelhaddata->dp_output)
da864809 1450 link_rate = intelhaddata->link_rate;
964ca808 1451
76296ef0
TI
1452 snd_intelhad_prog_cts(substream->runtime->rate,
1453 disp_samp_freq, link_rate,
1454 n_param, intelhaddata);
5dab11d8
JA
1455
1456 /* Enable Audio */
da864809 1457 snd_intelhad_enable_audio(intelhaddata, true);
5dab11d8
JA
1458
1459out:
1460 return retval;
1461}
1462
372d855f
TI
1463/*
1464 * hdmi_lpe_audio_suspend - power management suspend function
1465 *
1466 * @pdev: platform device
1467 *
1468 * This function is called by client driver to suspend the
1469 * hdmi audio.
1470 */
1471static int hdmi_lpe_audio_suspend(struct platform_device *pdev,
1472 pm_message_t state)
1473{
1474 struct had_stream_data *had_stream;
1475 unsigned long flag_irqs;
1476 struct snd_pcm_substream *substream;
1477 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1478
1479 pr_debug("Enter:%s\n", __func__);
1480
1481 had_stream = &intelhaddata->stream_data;
1482 substream = intelhaddata->stream_info.had_substream;
1483
1484 if (intelhaddata->dev->power.runtime_status != RPM_SUSPENDED) {
1485 pr_err("audio stream is active\n");
1486 return -EAGAIN;
1487 }
1488
1489
1490 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1491 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1492 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1493 pr_debug("had not connected\n");
1494 return 0;
1495 }
1496
1497 if (intelhaddata->drv_status == HAD_DRV_SUSPENDED) {
1498 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1499 pr_debug("had already suspended\n");
1500 return 0;
1501 }
1502
1503 intelhaddata->drv_status = HAD_DRV_SUSPENDED;
1504 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_SUSPENDED\n",
1505 __func__, __LINE__);
1506
1507 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1508 snd_intelhad_enable_audio_int(intelhaddata, false);
1509 pr_debug("Exit:%s", __func__);
1510 return 0;
1511}
1512
1513/*
1514 * hdmi_lpe_audio_resume - power management resume function
1515 *
1516 *@pdev: platform device
1517 *
1518 * This function is called by client driver to resume the
1519 * hdmi audio.
1520 */
1521static int hdmi_lpe_audio_resume(struct platform_device *pdev)
1522{
1523 struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1524 unsigned long flag_irqs;
1525
1526 pr_debug("Enter:%s\n", __func__);
1527
1528 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1529 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1530 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1531 pr_debug("had not connected\n");
1532 return 0;
1533 }
1534
1535 if (intelhaddata->drv_status != HAD_DRV_SUSPENDED) {
1536 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1537 pr_err("had is not in suspended state\n");
1538 return 0;
1539 }
1540
1541 if (had_get_hwstate(intelhaddata)) {
1542 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1543 pr_err("Failed to resume. Device not accessible\n");
1544 return -ENODEV;
1545 }
1546
1547 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1548 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1549 __func__, __LINE__);
1550 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1551 snd_intelhad_enable_audio_int(intelhaddata, true);
1552 pr_debug("Exit:%s", __func__);
1553 return 0;
1554}
1555
1556static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata,
1557 enum intel_had_aud_buf_type buf_id)
1558{
1559 int i, intr_count = 0;
1560 enum intel_had_aud_buf_type buff_done;
1561 u32 buf_size, buf_addr;
1562 struct had_stream_data *had_stream;
1563 unsigned long flag_irqs;
1564
1565 had_stream = &intelhaddata->stream_data;
1566
1567 buff_done = buf_id;
1568
1569 intr_count = snd_intelhad_read_len(intelhaddata);
1570 if (intr_count > 1) {
1571 /* In case of active playback */
1572 pr_err("Driver detected %d missed buffer done interrupt(s)!!!!\n",
1573 (intr_count - 1));
1574 if (intr_count > 3)
1575 return intr_count;
1576
1577 buf_id += (intr_count - 1);
1578 /* Reprogram registers*/
1579 for (i = buff_done; i < buf_id; i++) {
1580 int j = i % 4;
1581
1582 buf_size = intelhaddata->buf_info[j].buf_size;
1583 buf_addr = intelhaddata->buf_info[j].buf_addr;
1584 had_write_register(intelhaddata,
1585 AUD_BUF_A_LENGTH +
1586 (j * HAD_REG_WIDTH), buf_size);
1587 had_write_register(intelhaddata,
1588 AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH),
1589 (buf_addr | BIT(0) | BIT(1)));
1590 }
1591 buf_id = buf_id % 4;
1592 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1593 intelhaddata->buff_done = buf_id;
1594 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1595 }
1596
1597 return intr_count;
1598}
1599
1600static int had_process_buffer_done(struct snd_intelhad *intelhaddata)
1601{
1602 u32 len = 1;
1603 enum intel_had_aud_buf_type buf_id;
1604 enum intel_had_aud_buf_type buff_done;
1605 struct pcm_stream_info *stream;
1606 u32 buf_size;
1607 struct had_stream_data *had_stream;
1608 int intr_count;
1609 enum had_status_stream stream_type;
1610 unsigned long flag_irqs;
1611
1612 had_stream = &intelhaddata->stream_data;
1613 stream = &intelhaddata->stream_info;
1614 intr_count = 1;
1615
1616 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1617 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1618 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1619 pr_err("%s:Device already disconnected\n", __func__);
1620 return 0;
1621 }
1622 buf_id = intelhaddata->curr_buf;
1623 intelhaddata->buff_done = buf_id;
1624 buff_done = intelhaddata->buff_done;
1625 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1626 stream_type = had_stream->stream_type;
1627
1628 pr_debug("Enter:%s buf_id=%d\n", __func__, buf_id);
1629
1630 /* Every debug statement has an implication
1631 * of ~5msec. Thus, avoid having >3 debug statements
1632 * for each buffer_done handling.
1633 */
1634
1635 /* Check for any intr_miss in case of active playback */
1636 if (had_stream->stream_type == HAD_RUNNING_STREAM) {
1637 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1638 intr_count = had_chk_intrmiss(intelhaddata, buf_id);
1639 if (!intr_count || (intr_count > 3)) {
1640 pr_err("HAD SW state in non-recoverable!!! mode\n");
1641 pr_err("Already played stale data\n");
1642 return 0;
1643 }
1644 buf_id += (intr_count - 1);
1645 buf_id = buf_id % 4;
1646 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1647 }
1648
1649 intelhaddata->buf_info[buf_id].is_valid = true;
1650 if (intelhaddata->valid_buf_cnt-1 == buf_id) {
1651 if (had_stream->stream_type >= HAD_RUNNING_STREAM)
1652 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1653 } else
1654 intelhaddata->curr_buf = buf_id + 1;
1655
1656 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1657
1658 if (had_get_hwstate(intelhaddata)) {
1659 pr_err("HDMI cable plugged-out\n");
1660 return 0;
1661 }
1662
1663 /*Reprogram the registers with addr and length*/
1664 had_write_register(intelhaddata,
1665 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1666 buf_size);
1667 had_write_register(intelhaddata,
1668 AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH),
1669 intelhaddata->buf_info[buf_id].buf_addr |
1670 BIT(0) | BIT(1));
1671
1672 had_read_register(intelhaddata,
1673 AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1674 &len);
1675 pr_debug("%s:Enabled buf[%d]\n", __func__, buf_id);
1676
1677 /* In case of actual data,
1678 * report buffer_done to above ALSA layer
1679 */
1680 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1681 if (stream_type >= HAD_RUNNING_STREAM) {
1682 intelhaddata->stream_info.buffer_rendered +=
1683 (intr_count * buf_size);
1684 stream->period_elapsed(stream->had_substream);
1685 }
1686
1687 return 0;
1688}
1689
1690static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1691{
1692 enum intel_had_aud_buf_type buf_id;
1693 struct pcm_stream_info *stream;
1694 struct had_stream_data *had_stream;
1695 enum had_status_stream stream_type;
1696 unsigned long flag_irqs;
1697 int drv_status;
1698
1699 had_stream = &intelhaddata->stream_data;
1700 stream = &intelhaddata->stream_info;
1701
1702 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1703 buf_id = intelhaddata->curr_buf;
1704 stream_type = had_stream->stream_type;
1705 intelhaddata->buff_done = buf_id;
1706 drv_status = intelhaddata->drv_status;
1707 if (stream_type == HAD_RUNNING_STREAM)
1708 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1709
1710 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1711
1712 pr_debug("Enter:%s buf_id=%d, stream_type=%d\n",
1713 __func__, buf_id, stream_type);
1714
1715 snd_intelhad_handle_underrun(intelhaddata);
1716
1717 if (drv_status == HAD_DRV_DISCONNECTED) {
1718 pr_err("%s:Device already disconnected\n", __func__);
1719 return 0;
1720 }
1721
1722 if (stream_type == HAD_RUNNING_STREAM) {
1723 /* Report UNDERRUN error to above layers */
1724 intelhaddata->flag_underrun = 1;
1725 stream->period_elapsed(stream->had_substream);
1726 }
1727
1728 return 0;
1729}
1730
1731static int had_process_hot_plug(struct snd_intelhad *intelhaddata)
1732{
1733 enum intel_had_aud_buf_type buf_id;
1734 struct snd_pcm_substream *substream;
1735 struct had_stream_data *had_stream;
1736 unsigned long flag_irqs;
1737
1738 pr_debug("Enter:%s\n", __func__);
1739
1740 substream = intelhaddata->stream_info.had_substream;
1741 had_stream = &intelhaddata->stream_data;
1742
1743 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1744 if (intelhaddata->drv_status == HAD_DRV_CONNECTED) {
1745 pr_debug("Device already connected\n");
1746 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1747 return 0;
1748 }
1749 buf_id = intelhaddata->curr_buf;
1750 intelhaddata->buff_done = buf_id;
1751 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1752 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1753 __func__, __LINE__);
1754 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1755
1756 pr_debug("Processing HOT_PLUG, buf_id = %d\n", buf_id);
1757
1758 /* Safety check */
1759 if (substream) {
1760 pr_debug("There should not be active PB from ALSA\n");
1761 pr_debug("Signifies, cable is plugged-in even before\n");
1762 pr_debug("processing snd_pcm_disconnect\n");
1763 /* Set runtime->state to hw_params done */
1764 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1765 }
1766
1767 had_build_channel_allocation_map(intelhaddata);
1768
1769 return 0;
1770}
1771
1772static int had_process_hot_unplug(struct snd_intelhad *intelhaddata)
1773{
1774 enum intel_had_aud_buf_type buf_id;
1775 struct had_stream_data *had_stream;
1776 unsigned long flag_irqs;
1777
1778 pr_debug("Enter:%s\n", __func__);
1779
1780 had_stream = &intelhaddata->stream_data;
1781 buf_id = intelhaddata->curr_buf;
1782
1783 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1784
1785 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1786 pr_debug("Device already disconnected\n");
1787 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1788 return 0;
1789
1790 } else {
1791 /* Disable Audio */
1792 snd_intelhad_enable_audio_int(intelhaddata, false);
1793 snd_intelhad_enable_audio(intelhaddata, false);
1794 }
1795
1796 intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
1797 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1798 __func__, __LINE__);
1799
1800 /* Report to above ALSA layer */
1801 if (intelhaddata->stream_info.had_substream != NULL) {
1802 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1803 pr_debug("%s: unlock -> sending pcm_stop -> lock\n", __func__);
1804 snd_pcm_stop(intelhaddata->stream_info.had_substream,
1805 SNDRV_PCM_STATE_SETUP);
1806 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs);
1807 }
1808
1809 had_stream->stream_type = HAD_INIT;
1810 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs);
1811 kfree(intelhaddata->chmap->chmap);
1812 intelhaddata->chmap->chmap = NULL;
1813 intelhaddata->audio_reg_base = NULL;
1814 pr_debug("%s: unlocked -> returned\n", __func__);
1815
1816 return 0;
1817}
1818
1819/* PCM operations structure and the calls back for the same */
1820static struct snd_pcm_ops snd_intelhad_playback_ops = {
5dab11d8
JA
1821 .open = snd_intelhad_open,
1822 .close = snd_intelhad_close,
1823 .ioctl = snd_pcm_lib_ioctl,
1824 .hw_params = snd_intelhad_hw_params,
1825 .hw_free = snd_intelhad_hw_free,
1826 .prepare = snd_intelhad_pcm_prepare,
1827 .trigger = snd_intelhad_pcm_trigger,
1828 .pointer = snd_intelhad_pcm_pointer,
1829 .mmap = snd_intelhad_pcm_mmap,
1830};
1831
372d855f 1832/*
5dab11d8
JA
1833 * snd_intelhad_pcm_free - to free the memory allocated
1834 *
1835 * @pcm: pointer to pcm instance
1836 * This function is called when the device is removed
1837 */
1838static void snd_intelhad_pcm_free(struct snd_pcm *pcm)
1839{
1840 pr_debug("Freeing PCM preallocated pages\n");
1841 snd_pcm_lib_preallocate_free_for_all(pcm);
1842}
1843
1844static int had_iec958_info(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_info *uinfo)
1846{
1847 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1848 uinfo->count = 1;
1849 return 0;
1850}
1851
1852static int had_iec958_get(struct snd_kcontrol *kcontrol,
1853 struct snd_ctl_elem_value *ucontrol)
1854{
1855 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1856
1857 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1858 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1859 ucontrol->value.iec958.status[2] =
1860 (intelhaddata->aes_bits >> 16) & 0xff;
1861 ucontrol->value.iec958.status[3] =
1862 (intelhaddata->aes_bits >> 24) & 0xff;
1863 return 0;
1864}
372d855f 1865
5dab11d8
JA
1866static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1867 struct snd_ctl_elem_value *ucontrol)
1868{
1869 ucontrol->value.iec958.status[0] = 0xff;
1870 ucontrol->value.iec958.status[1] = 0xff;
1871 ucontrol->value.iec958.status[2] = 0xff;
1872 ucontrol->value.iec958.status[3] = 0xff;
1873 return 0;
1874}
372d855f 1875
5dab11d8
JA
1876static int had_iec958_put(struct snd_kcontrol *kcontrol,
1877 struct snd_ctl_elem_value *ucontrol)
1878{
1879 unsigned int val;
1880 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1881
1882 pr_debug("entered had_iec958_put\n");
1883 val = (ucontrol->value.iec958.status[0] << 0) |
1884 (ucontrol->value.iec958.status[1] << 8) |
1885 (ucontrol->value.iec958.status[2] << 16) |
1886 (ucontrol->value.iec958.status[3] << 24);
1887 if (intelhaddata->aes_bits != val) {
1888 intelhaddata->aes_bits = val;
1889 return 1;
1890 }
1891 return 1;
1892}
1893
1894static struct snd_kcontrol_new had_control_iec958_mask = {
1895 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1896 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1897 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1898 .info = had_iec958_info, /* shared */
1899 .get = had_iec958_mask_get,
1900};
1901
1902static struct snd_kcontrol_new had_control_iec958 = {
1903 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1904 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1905 .info = had_iec958_info,
1906 .get = had_iec958_get,
1907 .put = had_iec958_put
1908};
1909
da864809
TI
1910static void _had_wq(struct work_struct *work)
1911{
1912 struct snd_intelhad *ctx =
1913 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1914
1915 had_process_hot_plug(ctx);
1916}
1917
1918static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1919{
1920 struct snd_intelhad *ctx = dev_id;
1921 u32 audio_stat, audio_reg;
1922
1923 audio_reg = AUD_HDMI_STATUS_v2;
1924 mid_hdmi_audio_read(ctx, audio_reg, &audio_stat);
1925
1926 if (audio_stat & HDMI_AUDIO_UNDERRUN) {
1927 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
1928 had_process_buffer_underrun(ctx);
1929 }
1930
1931 if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
1932 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
1933 had_process_buffer_done(ctx);
1934 }
1935
1936 return IRQ_HANDLED;
1937}
1938
1939static void notify_audio_lpe(struct platform_device *pdev)
1940{
1941 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
1942 struct intel_hdmi_lpe_audio_pdata *pdata = pdev->dev.platform_data;
1943
1944 if (pdata->hdmi_connected != true) {
1945
1946 dev_dbg(&pdev->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
1947 __func__);
1948
1949 if (ctx->state == hdmi_connector_status_connected) {
1950
1951 ctx->state = hdmi_connector_status_disconnected;
1952
1953 had_process_hot_unplug(ctx);
1954 } else
1955 dev_dbg(&pdev->dev, "%s: Already Unplugged!\n",
1956 __func__);
1957
1958 } else {
1959 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1960
1961 switch (eld->pipe_id) {
1962 case 0:
1963 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1964 break;
1965 case 1:
1966 ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1967 break;
1968 case 2:
1969 ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1970 break;
1971 default:
1972 dev_dbg(&pdev->dev, "Invalid pipe %d\n",
1973 eld->pipe_id);
1974 break;
1975 }
1976
1977 memcpy(&ctx->eld, eld->eld_data, sizeof(ctx->eld));
1978
1979 had_process_hot_plug(ctx);
1980
1981 ctx->state = hdmi_connector_status_connected;
1982
1983 dev_dbg(&pdev->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
1984 __func__, eld->port_id, pdata->tmds_clock_speed);
1985
1986 if (pdata->tmds_clock_speed) {
1987 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1988 ctx->dp_output = pdata->dp_output;
1989 ctx->link_rate = pdata->link_rate;
1990
1991 /* Process mode change if stream is active */
1992 if (ctx->stream_data.stream_type == HAD_RUNNING_STREAM)
1993 hdmi_audio_mode_change(ctx);
1994 }
1995 }
1996}
1997
1998/* release resources */
1999static void hdmi_lpe_audio_free(struct snd_card *card)
2000{
2001 struct snd_intelhad *ctx = card->private_data;
2002
2003 if (ctx->mmio_start)
2004 iounmap(ctx->mmio_start);
2005 if (ctx->irq >= 0)
2006 free_irq(ctx->irq, ctx);
2007}
2008
79dda75a 2009/*
da864809 2010 * hdmi_lpe_audio_probe - start bridge with i915
5dab11d8 2011 *
da864809
TI
2012 * This function is called when the i915 driver creates the
2013 * hdmi-lpe-audio platform device. Card creation is deferred until a
2014 * hot plug event is received
5dab11d8 2015 */
da864809 2016static int hdmi_lpe_audio_probe(struct platform_device *pdev)
5dab11d8 2017{
5dab11d8 2018 struct snd_card *card;
da864809
TI
2019 struct snd_intelhad *ctx;
2020 struct snd_pcm *pcm;
2021 struct intel_hdmi_lpe_audio_pdata *pdata;
2022 int irq;
2023 struct resource *res_mmio;
2024 int ret;
2025 unsigned long flags;
2026
2027 dev_dbg(&pdev->dev, "Enter %s\n", __func__);
2028 dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask);
2029
2030 pdata = pdev->dev.platform_data;
2031 if (!pdata) {
2032 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
2033 return -EINVAL;
2034 }
5dab11d8 2035
da864809
TI
2036 /* get resources */
2037 irq = platform_get_irq(pdev, 0);
2038 if (irq < 0) {
2039 dev_err(&pdev->dev, "Could not get irq resource\n");
2040 return -ENODEV;
2041 }
2042
2043 res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2044 if (!res_mmio) {
2045 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
2046 return -ENXIO;
2047 }
5dab11d8 2048
5647aec2 2049 /* create a card instance with ALSA framework */
da864809
TI
2050 ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
2051 THIS_MODULE, sizeof(*ctx), &card);
2052 if (ret)
2053 return ret;
2054
2055 ctx = card->private_data;
2056 spin_lock_init(&ctx->had_spinlock);
2057 ctx->drv_status = HAD_DRV_DISCONNECTED;
2058 ctx->dev = &pdev->dev;
2059 ctx->card = card;
2060 ctx->card_id = hdmi_card_id;
2061 ctx->card_index = card->number;
2062 ctx->flag_underrun = 0;
2063 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
2064 strcpy(card->driver, INTEL_HAD);
2065 strcpy(card->shortname, INTEL_HAD);
2066
2067 ctx->irq = -1;
2068 ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
2069 INIT_WORK(&ctx->hdmi_audio_wq, _had_wq);
2070 ctx->state = hdmi_connector_status_disconnected;
2071
2072 card->private_free = hdmi_lpe_audio_free;
2073
2074 /* assume pipe A as default */
2075 ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
2076
2077 platform_set_drvdata(pdev, ctx);
2078
2079 dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
2080 __func__, (unsigned int)res_mmio->start,
2081 (unsigned int)res_mmio->end);
2082
2083 ctx->mmio_start = ioremap_nocache(res_mmio->start,
2084 (size_t)(resource_size(res_mmio)));
2085 if (!ctx->mmio_start) {
2086 dev_err(&pdev->dev, "Could not get ioremap\n");
2087 ret = -EACCES;
2088 goto err;
2089 }
5dab11d8 2090
da864809
TI
2091 /* setup interrupt handler */
2092 ret = request_irq(irq, display_pipe_interrupt_handler, 0,
2093 pdev->name, ctx);
2094 if (ret < 0) {
2095 dev_err(&pdev->dev, "request_irq failed\n");
2096 goto err;
2097 }
5dab11d8 2098
da864809
TI
2099 ctx->irq = irq;
2100
2101 ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
2102 MAX_CAP_STREAMS, &pcm);
2103 if (ret)
5dab11d8
JA
2104 goto err;
2105
2106 /* setup private data which can be retrieved when required */
da864809 2107 pcm->private_data = ctx;
5dab11d8
JA
2108 pcm->private_free = snd_intelhad_pcm_free;
2109 pcm->info_flags = 0;
2110 strncpy(pcm->name, card->shortname, strlen(card->shortname));
da864809 2111 /* setup the ops for playabck */
5dab11d8
JA
2112 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
2113 &snd_intelhad_playback_ops);
2114 /* allocate dma pages for ALSA stream operations
2115 * memory allocated is based on size, not max value
2116 * thus using same argument for max & size
2117 */
da864809 2118 snd_pcm_lib_preallocate_pages_for_all(pcm,
5dab11d8
JA
2119 SNDRV_DMA_TYPE_DEV, NULL,
2120 HAD_MAX_BUFFER, HAD_MAX_BUFFER);
5dab11d8 2121
5dab11d8 2122 /* IEC958 controls */
da864809
TI
2123 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx));
2124 if (ret < 0)
5dab11d8 2125 goto err;
da864809
TI
2126 ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx));
2127 if (ret < 0)
5dab11d8
JA
2128 goto err;
2129
2130 init_channel_allocations();
2131
2132 /* Register channel map controls */
da864809
TI
2133 ret = had_register_chmap_ctls(ctx, pcm);
2134 if (ret < 0)
5dab11d8
JA
2135 goto err;
2136
da864809
TI
2137 ret = snd_card_register(card);
2138 if (ret)
36ec0d99
TI
2139 goto err;
2140
da864809
TI
2141 spin_lock_irqsave(&pdata->lpe_audio_slock, flags);
2142 pdata->notify_audio_lpe = notify_audio_lpe;
2143 if (pdata->notify_pending) {
5dab11d8 2144
da864809
TI
2145 dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
2146 notify_audio_lpe(pdev);
2147 pdata->notify_pending = false;
2148 }
2149 spin_unlock_irqrestore(&pdata->lpe_audio_slock, flags);
2150
2151 pm_runtime_set_active(&pdev->dev);
2152 pm_runtime_enable(&pdev->dev);
2153
2154 schedule_work(&ctx->hdmi_audio_wq);
5dab11d8 2155
79dda75a 2156 return 0;
5647aec2 2157
5dab11d8
JA
2158err:
2159 snd_card_free(card);
da864809 2160 return ret;
5dab11d8
JA
2161}
2162
79dda75a 2163/*
da864809 2164 * hdmi_lpe_audio_remove - stop bridge with i915
5dab11d8 2165 *
da864809
TI
2166 * This function is called when the platform device is destroyed. The sound
2167 * card should have been removed on hot plug event.
5dab11d8 2168 */
da864809 2169static int hdmi_lpe_audio_remove(struct platform_device *pdev)
5dab11d8 2170{
da864809 2171 struct snd_intelhad *ctx = platform_get_drvdata(pdev);
5dab11d8 2172
da864809 2173 dev_dbg(&pdev->dev, "Enter %s\n", __func__);
5dab11d8 2174
da864809
TI
2175 if (ctx->drv_status != HAD_DRV_DISCONNECTED)
2176 snd_intelhad_enable_audio_int(ctx, false);
2177 snd_card_free(ctx->card);
5dab11d8
JA
2178 return 0;
2179}
2180
da864809
TI
2181static struct platform_driver hdmi_lpe_audio_driver = {
2182 .driver = {
2183 .name = "hdmi-lpe-audio",
2184 },
2185 .probe = hdmi_lpe_audio_probe,
2186 .remove = hdmi_lpe_audio_remove,
2187 .suspend = hdmi_lpe_audio_suspend,
2188 .resume = hdmi_lpe_audio_resume
2189};
2190
2191module_platform_driver(hdmi_lpe_audio_driver);
2192MODULE_ALIAS("platform:hdmi_lpe_audio");
2193
5dab11d8
JA
2194MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
2195MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
2196MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
2197MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
2198MODULE_DESCRIPTION("Intel HDMI Audio driver");
2199MODULE_LICENSE("GPL v2");
2200MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");