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5dab11d8 JA |
1 | /* |
2 | * intel_hdmi_audio.c - Intel HDMI audio driver | |
3 | * | |
4 | * Copyright (C) 2016 Intel Corp | |
5 | * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com> | |
6 | * Ramesh Babu K V <ramesh.babu@intel.com> | |
7 | * Vaibhav Agarwal <vaibhav.agarwal@intel.com> | |
8 | * Jerome Anand <jerome.anand@intel.com> | |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; version 2 of the License. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
21 | * ALSA driver for Intel HDMI audio | |
22 | */ | |
23 | ||
5dab11d8 JA |
24 | #include <linux/platform_device.h> |
25 | #include <linux/io.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/module.h> | |
da864809 | 28 | #include <linux/interrupt.h> |
5dab11d8 JA |
29 | #include <linux/acpi.h> |
30 | #include <asm/cacheflush.h> | |
31 | #include <sound/pcm.h> | |
32 | #include <sound/core.h> | |
33 | #include <sound/pcm_params.h> | |
34 | #include <sound/initval.h> | |
35 | #include <sound/control.h> | |
36 | #include <sound/initval.h> | |
da864809 | 37 | #include <drm/intel_lpe_audio.h> |
5dab11d8 JA |
38 | #include "intel_hdmi_audio.h" |
39 | ||
5dab11d8 JA |
40 | /*standard module options for ALSA. This module supports only one card*/ |
41 | static int hdmi_card_index = SNDRV_DEFAULT_IDX1; | |
42 | static char *hdmi_card_id = SNDRV_DEFAULT_STR1; | |
5dab11d8 JA |
43 | |
44 | module_param_named(index, hdmi_card_index, int, 0444); | |
45 | MODULE_PARM_DESC(index, | |
46 | "Index value for INTEL Intel HDMI Audio controller."); | |
47 | module_param_named(id, hdmi_card_id, charp, 0444); | |
48 | MODULE_PARM_DESC(id, | |
49 | "ID string for INTEL Intel HDMI Audio controller."); | |
50 | ||
51 | /* | |
52 | * ELD SA bits in the CEA Speaker Allocation data block | |
53 | */ | |
54 | static int eld_speaker_allocation_bits[] = { | |
55 | [0] = FL | FR, | |
56 | [1] = LFE, | |
57 | [2] = FC, | |
58 | [3] = RL | RR, | |
59 | [4] = RC, | |
60 | [5] = FLC | FRC, | |
61 | [6] = RLC | RRC, | |
62 | /* the following are not defined in ELD yet */ | |
63 | [7] = 0, | |
64 | }; | |
65 | ||
66 | /* | |
67 | * This is an ordered list! | |
68 | * | |
69 | * The preceding ones have better chances to be selected by | |
70 | * hdmi_channel_allocation(). | |
71 | */ | |
72 | static struct cea_channel_speaker_allocation channel_allocations[] = { | |
73 | /* channel: 7 6 5 4 3 2 1 0 */ | |
74 | { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, | |
75 | /* 2.1 */ | |
76 | { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, | |
77 | /* Dolby Surround */ | |
78 | { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, | |
79 | /* surround40 */ | |
80 | { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, | |
81 | /* surround41 */ | |
82 | { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, | |
83 | /* surround50 */ | |
84 | { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, | |
85 | /* surround51 */ | |
86 | { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, | |
87 | /* 6.1 */ | |
88 | { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, | |
89 | /* surround71 */ | |
90 | { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, | |
91 | ||
92 | { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, | |
93 | { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, | |
94 | { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, | |
95 | { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, | |
96 | { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, | |
97 | { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, | |
98 | { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, | |
99 | { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, | |
100 | { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, | |
101 | { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, | |
102 | { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, | |
103 | { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, | |
104 | { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, | |
105 | { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, | |
106 | { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, | |
107 | { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, | |
108 | { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, | |
109 | { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, | |
110 | { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, | |
111 | { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, | |
112 | { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, | |
113 | { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, | |
114 | { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, | |
115 | }; | |
116 | ||
117 | static struct channel_map_table map_tables[] = { | |
118 | { SNDRV_CHMAP_FL, 0x00, FL }, | |
119 | { SNDRV_CHMAP_FR, 0x01, FR }, | |
120 | { SNDRV_CHMAP_RL, 0x04, RL }, | |
121 | { SNDRV_CHMAP_RR, 0x05, RR }, | |
122 | { SNDRV_CHMAP_LFE, 0x02, LFE }, | |
123 | { SNDRV_CHMAP_FC, 0x03, FC }, | |
124 | { SNDRV_CHMAP_RLC, 0x06, RLC }, | |
125 | { SNDRV_CHMAP_RRC, 0x07, RRC }, | |
126 | {} /* terminator */ | |
127 | }; | |
128 | ||
129 | /* hardware capability structure */ | |
130 | static const struct snd_pcm_hardware snd_intel_hadstream = { | |
131 | .info = (SNDRV_PCM_INFO_INTERLEAVED | | |
132 | SNDRV_PCM_INFO_DOUBLE | | |
133 | SNDRV_PCM_INFO_MMAP| | |
134 | SNDRV_PCM_INFO_MMAP_VALID | | |
135 | SNDRV_PCM_INFO_BATCH), | |
136 | .formats = (SNDRV_PCM_FMTBIT_S24 | | |
137 | SNDRV_PCM_FMTBIT_U24), | |
138 | .rates = SNDRV_PCM_RATE_32000 | | |
139 | SNDRV_PCM_RATE_44100 | | |
140 | SNDRV_PCM_RATE_48000 | | |
141 | SNDRV_PCM_RATE_88200 | | |
142 | SNDRV_PCM_RATE_96000 | | |
143 | SNDRV_PCM_RATE_176400 | | |
144 | SNDRV_PCM_RATE_192000, | |
145 | .rate_min = HAD_MIN_RATE, | |
146 | .rate_max = HAD_MAX_RATE, | |
147 | .channels_min = HAD_MIN_CHANNEL, | |
148 | .channels_max = HAD_MAX_CHANNEL, | |
149 | .buffer_bytes_max = HAD_MAX_BUFFER, | |
150 | .period_bytes_min = HAD_MIN_PERIOD_BYTES, | |
151 | .period_bytes_max = HAD_MAX_PERIOD_BYTES, | |
152 | .periods_min = HAD_MIN_PERIODS, | |
153 | .periods_max = HAD_MAX_PERIODS, | |
154 | .fifo_size = HAD_FIFO_SIZE, | |
155 | }; | |
156 | ||
157 | /* Register access functions */ | |
da864809 TI |
158 | static inline void |
159 | mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val) | |
5dab11d8 | 160 | { |
da864809 | 161 | *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg); |
5dab11d8 JA |
162 | } |
163 | ||
da864809 TI |
164 | static inline void |
165 | mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val) | |
5dab11d8 | 166 | { |
da864809 | 167 | iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg); |
5dab11d8 JA |
168 | } |
169 | ||
372d855f TI |
170 | static int had_read_register(struct snd_intelhad *intelhaddata, |
171 | u32 offset, u32 *data) | |
5dab11d8 | 172 | { |
79f439ea TI |
173 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) |
174 | return -ENODEV; | |
5dab11d8 | 175 | |
da864809 TI |
176 | mid_hdmi_audio_read(intelhaddata, offset, data); |
177 | return 0; | |
178 | } | |
179 | ||
180 | static void fixup_dp_config(struct snd_intelhad *intelhaddata, | |
181 | u32 offset, u32 *data) | |
182 | { | |
183 | if (intelhaddata->dp_output) { | |
184 | if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT)) | |
185 | *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT; | |
186 | } | |
5dab11d8 JA |
187 | } |
188 | ||
372d855f TI |
189 | static int had_write_register(struct snd_intelhad *intelhaddata, |
190 | u32 offset, u32 data) | |
5dab11d8 | 191 | { |
79f439ea TI |
192 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) |
193 | return -ENODEV; | |
5dab11d8 | 194 | |
da864809 TI |
195 | fixup_dp_config(intelhaddata, offset, &data); |
196 | mid_hdmi_audio_write(intelhaddata, offset, data); | |
197 | return 0; | |
5dab11d8 JA |
198 | } |
199 | ||
372d855f TI |
200 | static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset, |
201 | u32 data, u32 mask) | |
5dab11d8 | 202 | { |
da864809 | 203 | u32 val_tmp; |
5dab11d8 | 204 | |
79f439ea TI |
205 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) |
206 | return -ENODEV; | |
5dab11d8 | 207 | |
da864809 TI |
208 | mid_hdmi_audio_read(intelhaddata, offset, &val_tmp); |
209 | val_tmp &= ~mask; | |
210 | val_tmp |= (data & mask); | |
211 | ||
212 | fixup_dp_config(intelhaddata, offset, &val_tmp); | |
213 | mid_hdmi_audio_write(intelhaddata, offset, val_tmp); | |
214 | return 0; | |
5dab11d8 | 215 | } |
da864809 TI |
216 | |
217 | /* | |
218 | * function to read-modify AUD_CONFIG register on VLV2. | |
219 | * The had_read_modify() function should not directly be used on VLV2 for | |
220 | * updating AUD_CONFIG register. | |
5dab11d8 JA |
221 | * This is because: |
222 | * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2 | |
223 | * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always | |
224 | * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the | |
225 | * register. This field should be 1xy binary for configuration with 6 or | |
226 | * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio) | |
227 | * causes the "channels" field to be updated as 0xy binary resulting in | |
228 | * bad audio. The fix is to always write the AUD_CONFIG[6:4] with | |
229 | * appropriate value when doing read-modify of AUD_CONFIG register. | |
230 | * | |
231 | * @substream: the current substream or NULL if no active substream | |
232 | * @data : data to be written | |
233 | * @mask : mask | |
234 | * | |
235 | */ | |
da864809 | 236 | static int had_read_modify_aud_config_v2(struct snd_intelhad *intelhaddata, |
5dab11d8 JA |
237 | u32 data, u32 mask) |
238 | { | |
da864809 | 239 | struct snd_pcm_substream *substream; |
5dab11d8 JA |
240 | union aud_cfg cfg_val = {.cfg_regval = 0}; |
241 | u8 channels; | |
242 | ||
243 | /* | |
244 | * If substream is NULL, there is no active stream. | |
245 | * In this case just set channels to 2 | |
246 | */ | |
da864809 TI |
247 | substream = intelhaddata->stream_info.had_substream; |
248 | if (substream && substream->runtime) | |
5dab11d8 JA |
249 | channels = substream->runtime->channels; |
250 | else | |
251 | channels = 2; | |
252 | cfg_val.cfg_regx_v2.num_ch = channels - 2; | |
253 | ||
254 | data = data | cfg_val.cfg_regval; | |
255 | mask = mask | AUD_CONFIG_CH_MASK_V2; | |
256 | ||
c75b0476 TI |
257 | dev_dbg(intelhaddata->dev, "%s : data = %x, mask =%x\n", |
258 | __func__, data, mask); | |
5dab11d8 | 259 | |
79dda75a | 260 | return had_read_modify(intelhaddata, AUD_CONFIG, data, mask); |
5dab11d8 JA |
261 | } |
262 | ||
372d855f | 263 | static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable) |
da864809 TI |
264 | { |
265 | u32 status_reg; | |
266 | ||
267 | if (enable) { | |
268 | mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg); | |
269 | status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN; | |
270 | mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS_v2, status_reg); | |
271 | mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS_v2, &status_reg); | |
272 | } | |
273 | } | |
274 | ||
372d855f TI |
275 | static void snd_intelhad_enable_audio(struct snd_intelhad *intelhaddata, |
276 | bool enable) | |
5dab11d8 | 277 | { |
da864809 TI |
278 | had_read_modify_aud_config_v2(intelhaddata, enable ? BIT(0) : 0, |
279 | BIT(0)); | |
5dab11d8 JA |
280 | } |
281 | ||
79dda75a TI |
282 | static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata, |
283 | u8 reset) | |
5dab11d8 | 284 | { |
79dda75a | 285 | had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, reset); |
5dab11d8 JA |
286 | } |
287 | ||
2e52f5e5 | 288 | /* |
5dab11d8 JA |
289 | * initialize audio channel status registers |
290 | * This function is called in the prepare callback | |
291 | */ | |
292 | static int had_prog_status_reg(struct snd_pcm_substream *substream, | |
293 | struct snd_intelhad *intelhaddata) | |
294 | { | |
295 | union aud_cfg cfg_val = {.cfg_regval = 0}; | |
296 | union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0}; | |
297 | union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0}; | |
298 | int format; | |
299 | ||
5dab11d8 | 300 | ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits & |
2e52f5e5 | 301 | IEC958_AES0_NONAUDIO) >> 1; |
5dab11d8 | 302 | ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits & |
2e52f5e5 | 303 | IEC958_AES3_CON_CLOCK) >> 4; |
4812dcc4 | 304 | cfg_val.cfg_regx_v2.val_bit = ch_stat0.status_0_regx.lpcm_id; |
5dab11d8 JA |
305 | |
306 | switch (substream->runtime->rate) { | |
307 | case AUD_SAMPLE_RATE_32: | |
308 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ; | |
309 | break; | |
310 | ||
311 | case AUD_SAMPLE_RATE_44_1: | |
312 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ; | |
313 | break; | |
314 | case AUD_SAMPLE_RATE_48: | |
315 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ; | |
316 | break; | |
317 | case AUD_SAMPLE_RATE_88_2: | |
318 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ; | |
319 | break; | |
320 | case AUD_SAMPLE_RATE_96: | |
321 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ; | |
322 | break; | |
323 | case AUD_SAMPLE_RATE_176_4: | |
324 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ; | |
325 | break; | |
326 | case AUD_SAMPLE_RATE_192: | |
327 | ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ; | |
328 | break; | |
329 | ||
330 | default: | |
331 | /* control should never come here */ | |
332 | return -EINVAL; | |
5dab11d8 | 333 | } |
2e52f5e5 | 334 | |
79dda75a TI |
335 | had_write_register(intelhaddata, |
336 | AUD_CH_STATUS_0, ch_stat0.status_0_regval); | |
5dab11d8 JA |
337 | |
338 | format = substream->runtime->format; | |
339 | ||
340 | if (format == SNDRV_PCM_FORMAT_S16_LE) { | |
341 | ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20; | |
342 | ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS; | |
343 | } else if (format == SNDRV_PCM_FORMAT_S24_LE) { | |
344 | ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24; | |
345 | ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS; | |
346 | } else { | |
347 | ch_stat1.status_1_regx.max_wrd_len = 0; | |
348 | ch_stat1.status_1_regx.wrd_len = 0; | |
349 | } | |
2e52f5e5 | 350 | |
79dda75a TI |
351 | had_write_register(intelhaddata, |
352 | AUD_CH_STATUS_1, ch_stat1.status_1_regval); | |
5dab11d8 JA |
353 | return 0; |
354 | } | |
355 | ||
76296ef0 | 356 | /* |
5dab11d8 JA |
357 | * function to initialize audio |
358 | * registers and buffer confgiuration registers | |
359 | * This function is called in the prepare callback | |
360 | */ | |
76296ef0 TI |
361 | static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream, |
362 | struct snd_intelhad *intelhaddata) | |
5dab11d8 JA |
363 | { |
364 | union aud_cfg cfg_val = {.cfg_regval = 0}; | |
365 | union aud_buf_config buf_cfg = {.buf_cfgval = 0}; | |
366 | u8 channels; | |
367 | ||
368 | had_prog_status_reg(substream, intelhaddata); | |
369 | ||
370 | buf_cfg.buf_cfg_regx_v2.audio_fifo_watermark = FIFO_THRESHOLD; | |
371 | buf_cfg.buf_cfg_regx_v2.dma_fifo_watermark = DMA_FIFO_THRESHOLD; | |
372 | buf_cfg.buf_cfg_regx_v2.aud_delay = 0; | |
79dda75a | 373 | had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.buf_cfgval); |
5dab11d8 JA |
374 | |
375 | channels = substream->runtime->channels; | |
376 | cfg_val.cfg_regx_v2.num_ch = channels - 2; | |
377 | if (channels <= 2) | |
378 | cfg_val.cfg_regx_v2.layout = LAYOUT0; | |
379 | else | |
380 | cfg_val.cfg_regx_v2.layout = LAYOUT1; | |
381 | ||
964ca808 | 382 | cfg_val.cfg_regx_v2.val_bit = 1; |
79dda75a | 383 | had_write_register(intelhaddata, AUD_CONFIG, cfg_val.cfg_regval); |
5dab11d8 JA |
384 | return 0; |
385 | } | |
386 | ||
5dab11d8 JA |
387 | /* |
388 | * Compute derived values in channel_allocations[]. | |
389 | */ | |
390 | static void init_channel_allocations(void) | |
391 | { | |
392 | int i, j; | |
393 | struct cea_channel_speaker_allocation *p; | |
394 | ||
5dab11d8 JA |
395 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { |
396 | p = channel_allocations + i; | |
397 | p->channels = 0; | |
398 | p->spk_mask = 0; | |
399 | for (j = 0; j < ARRAY_SIZE(p->speakers); j++) | |
400 | if (p->speakers[j]) { | |
401 | p->channels++; | |
402 | p->spk_mask |= p->speakers[j]; | |
403 | } | |
404 | } | |
405 | } | |
406 | ||
407 | /* | |
408 | * The transformation takes two steps: | |
409 | * | |
410 | * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask | |
411 | * spk_mask => (channel_allocations[]) => ai->CA | |
412 | * | |
413 | * TODO: it could select the wrong CA from multiple candidates. | |
414 | */ | |
415 | static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata, | |
416 | int channels) | |
417 | { | |
418 | int i; | |
419 | int ca = 0; | |
420 | int spk_mask = 0; | |
421 | ||
422 | /* | |
423 | * CA defaults to 0 for basic stereo audio | |
424 | */ | |
425 | if (channels <= 2) | |
426 | return 0; | |
427 | ||
428 | /* | |
429 | * expand ELD's speaker allocation mask | |
430 | * | |
431 | * ELD tells the speaker mask in a compact(paired) form, | |
432 | * expand ELD's notions to match the ones used by Audio InfoFrame. | |
433 | */ | |
434 | ||
435 | for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { | |
da864809 | 436 | if (intelhaddata->eld.speaker_allocation_block & (1 << i)) |
5dab11d8 JA |
437 | spk_mask |= eld_speaker_allocation_bits[i]; |
438 | } | |
439 | ||
440 | /* search for the first working match in the CA table */ | |
441 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { | |
442 | if (channels == channel_allocations[i].channels && | |
443 | (spk_mask & channel_allocations[i].spk_mask) == | |
444 | channel_allocations[i].spk_mask) { | |
445 | ca = channel_allocations[i].ca_index; | |
446 | break; | |
447 | } | |
448 | } | |
449 | ||
c75b0476 | 450 | dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels); |
5dab11d8 JA |
451 | |
452 | return ca; | |
453 | } | |
454 | ||
455 | /* from speaker bit mask to ALSA API channel position */ | |
456 | static int spk_to_chmap(int spk) | |
457 | { | |
458 | struct channel_map_table *t = map_tables; | |
459 | ||
460 | for (; t->map; t++) { | |
461 | if (t->spk_mask == spk) | |
462 | return t->map; | |
463 | } | |
464 | return 0; | |
465 | } | |
466 | ||
372d855f | 467 | static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata) |
5dab11d8 | 468 | { |
2e52f5e5 | 469 | int i, c; |
5dab11d8 JA |
470 | int spk_mask = 0; |
471 | struct snd_pcm_chmap_elem *chmap; | |
472 | u8 eld_high, eld_high_mask = 0xF0; | |
473 | u8 high_msb; | |
474 | ||
475 | chmap = kzalloc(sizeof(*chmap), GFP_KERNEL); | |
2e52f5e5 | 476 | if (!chmap) { |
5dab11d8 JA |
477 | intelhaddata->chmap->chmap = NULL; |
478 | return; | |
479 | } | |
480 | ||
c75b0476 | 481 | dev_dbg(intelhaddata->dev, "eld.speaker_allocation_block = %x\n", |
da864809 | 482 | intelhaddata->eld.speaker_allocation_block); |
5dab11d8 JA |
483 | |
484 | /* WA: Fix the max channel supported to 8 */ | |
485 | ||
486 | /* | |
487 | * Sink may support more than 8 channels, if eld_high has more than | |
488 | * one bit set. SOC supports max 8 channels. | |
489 | * Refer eld_speaker_allocation_bits, for sink speaker allocation | |
490 | */ | |
491 | ||
492 | /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */ | |
da864809 | 493 | eld_high = intelhaddata->eld.speaker_allocation_block & eld_high_mask; |
5dab11d8 JA |
494 | if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) { |
495 | /* eld_high & (eld_high-1): if more than 1 bit set */ | |
496 | /* 0x1F: 7 channels */ | |
497 | for (i = 1; i < 4; i++) { | |
498 | high_msb = eld_high & (0x80 >> i); | |
499 | if (high_msb) { | |
da864809 | 500 | intelhaddata->eld.speaker_allocation_block &= |
5dab11d8 JA |
501 | high_msb | 0xF; |
502 | break; | |
503 | } | |
504 | } | |
505 | } | |
506 | ||
507 | for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { | |
da864809 | 508 | if (intelhaddata->eld.speaker_allocation_block & (1 << i)) |
5dab11d8 JA |
509 | spk_mask |= eld_speaker_allocation_bits[i]; |
510 | } | |
511 | ||
512 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { | |
513 | if (spk_mask == channel_allocations[i].spk_mask) { | |
514 | for (c = 0; c < channel_allocations[i].channels; c++) { | |
515 | chmap->map[c] = spk_to_chmap( | |
516 | channel_allocations[i].speakers[ | |
2e52f5e5 | 517 | (MAX_SPEAKERS - 1) - c]); |
5dab11d8 JA |
518 | } |
519 | chmap->channels = channel_allocations[i].channels; | |
520 | intelhaddata->chmap->chmap = chmap; | |
521 | break; | |
522 | } | |
523 | } | |
524 | if (i >= ARRAY_SIZE(channel_allocations)) { | |
525 | intelhaddata->chmap->chmap = NULL; | |
526 | kfree(chmap); | |
527 | } | |
528 | } | |
529 | ||
530 | /* | |
531 | * ALSA API channel-map control callbacks | |
532 | */ | |
533 | static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol, | |
534 | struct snd_ctl_elem_info *uinfo) | |
535 | { | |
536 | struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); | |
537 | struct snd_intelhad *intelhaddata = info->private_data; | |
538 | ||
539 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) | |
540 | return -ENODEV; | |
541 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
542 | uinfo->count = HAD_MAX_CHANNEL; | |
543 | uinfo->value.integer.min = 0; | |
544 | uinfo->value.integer.max = SNDRV_CHMAP_LAST; | |
545 | return 0; | |
546 | } | |
547 | ||
548 | static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol, | |
549 | struct snd_ctl_elem_value *ucontrol) | |
550 | { | |
551 | struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); | |
552 | struct snd_intelhad *intelhaddata = info->private_data; | |
2e52f5e5 | 553 | int i; |
5dab11d8 JA |
554 | const struct snd_pcm_chmap_elem *chmap; |
555 | ||
556 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) | |
557 | return -ENODEV; | |
2e52f5e5 | 558 | if (!intelhaddata->chmap->chmap) |
5dab11d8 JA |
559 | return -ENODATA; |
560 | chmap = intelhaddata->chmap->chmap; | |
c75b0476 | 561 | for (i = 0; i < chmap->channels; i++) |
5dab11d8 | 562 | ucontrol->value.integer.value[i] = chmap->map[i]; |
5dab11d8 JA |
563 | |
564 | return 0; | |
565 | } | |
566 | ||
567 | static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata, | |
568 | struct snd_pcm *pcm) | |
569 | { | |
2e52f5e5 | 570 | int err; |
5dab11d8 JA |
571 | |
572 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
573 | NULL, 0, (unsigned long)intelhaddata, | |
574 | &intelhaddata->chmap); | |
575 | if (err < 0) | |
576 | return err; | |
577 | ||
578 | intelhaddata->chmap->private_data = intelhaddata; | |
e9d65abf TI |
579 | intelhaddata->chmap->kctl->info = had_chmap_ctl_info; |
580 | intelhaddata->chmap->kctl->get = had_chmap_ctl_get; | |
5dab11d8 JA |
581 | intelhaddata->chmap->chmap = NULL; |
582 | return 0; | |
583 | } | |
584 | ||
76296ef0 TI |
585 | /* |
586 | * snd_intelhad_prog_dip - to initialize Data Island Packets registers | |
5dab11d8 JA |
587 | * |
588 | * @substream:substream for which the prepare function is called | |
589 | * @intelhaddata:substream private data | |
590 | * | |
591 | * This function is called in the prepare callback | |
592 | */ | |
76296ef0 TI |
593 | static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream, |
594 | struct snd_intelhad *intelhaddata) | |
5dab11d8 JA |
595 | { |
596 | int i; | |
597 | union aud_ctrl_st ctrl_state = {.ctrl_val = 0}; | |
598 | union aud_info_frame2 frame2 = {.fr2_val = 0}; | |
599 | union aud_info_frame3 frame3 = {.fr3_val = 0}; | |
600 | u8 checksum = 0; | |
964ca808 | 601 | u32 info_frame; |
5dab11d8 JA |
602 | int channels; |
603 | ||
604 | channels = substream->runtime->channels; | |
605 | ||
79dda75a | 606 | had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val); |
5dab11d8 | 607 | |
964ca808 PLB |
608 | if (intelhaddata->dp_output) { |
609 | info_frame = DP_INFO_FRAME_WORD1; | |
610 | frame2.fr2_val = 1; | |
611 | } else { | |
612 | info_frame = HDMI_INFO_FRAME_WORD1; | |
613 | frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1; | |
5dab11d8 | 614 | |
964ca808 PLB |
615 | frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation( |
616 | intelhaddata, channels); | |
5dab11d8 | 617 | |
2e52f5e5 | 618 | /* Calculte the byte wide checksum for all valid DIP words */ |
964ca808 PLB |
619 | for (i = 0; i < BYTES_PER_WORD; i++) |
620 | checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0; | |
621 | for (i = 0; i < BYTES_PER_WORD; i++) | |
622 | checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0; | |
623 | for (i = 0; i < BYTES_PER_WORD; i++) | |
624 | checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0; | |
5dab11d8 | 625 | |
964ca808 PLB |
626 | frame2.fr2_regx.chksum = -(checksum); |
627 | } | |
5dab11d8 | 628 | |
79dda75a TI |
629 | had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, info_frame); |
630 | had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame2.fr2_val); | |
631 | had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, frame3.fr3_val); | |
5dab11d8 JA |
632 | |
633 | /* program remaining DIP words with zero */ | |
634 | for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++) | |
79dda75a | 635 | had_write_register(intelhaddata, AUD_HDMIW_INFOFR_v2, 0x0); |
5dab11d8 JA |
636 | |
637 | ctrl_state.ctrl_regx.dip_freq = 1; | |
638 | ctrl_state.ctrl_regx.dip_en_sta = 1; | |
79dda75a | 639 | had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val); |
5dab11d8 JA |
640 | } |
641 | ||
2e52f5e5 TI |
642 | /* |
643 | * snd_intelhad_prog_buffer - programs buffer address and length registers | |
5dab11d8 JA |
644 | * @substream:substream for which the prepare function is called |
645 | * @intelhaddata:substream private data | |
646 | * | |
647 | * This function programs ring buffer address and length into registers. | |
648 | */ | |
372d855f | 649 | static int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata, |
5dab11d8 JA |
650 | int start, int end) |
651 | { | |
652 | u32 ring_buf_addr, ring_buf_size, period_bytes; | |
653 | u8 i, num_periods; | |
654 | struct snd_pcm_substream *substream; | |
655 | ||
656 | substream = intelhaddata->stream_info.had_substream; | |
c75b0476 | 657 | if (WARN_ON(!substream)) |
5dab11d8 | 658 | return 0; |
5dab11d8 JA |
659 | |
660 | ring_buf_addr = substream->runtime->dma_addr; | |
661 | ring_buf_size = snd_pcm_lib_buffer_bytes(substream); | |
662 | intelhaddata->stream_info.ring_buf_size = ring_buf_size; | |
663 | period_bytes = frames_to_bytes(substream->runtime, | |
664 | substream->runtime->period_size); | |
665 | num_periods = substream->runtime->periods; | |
666 | ||
667 | /* | |
668 | * buffer addr should be 64 byte aligned, period bytes | |
669 | * will be used to calculate addr offset | |
670 | */ | |
671 | period_bytes &= ~0x3F; | |
672 | ||
673 | /* Hardware supports MAX_PERIODS buffers */ | |
674 | if (end >= HAD_MAX_PERIODS) | |
675 | return -EINVAL; | |
676 | ||
677 | for (i = start; i <= end; i++) { | |
678 | /* Program the buf registers with addr and len */ | |
679 | intelhaddata->buf_info[i].buf_addr = ring_buf_addr + | |
680 | (i * period_bytes); | |
681 | if (i < num_periods-1) | |
682 | intelhaddata->buf_info[i].buf_size = period_bytes; | |
683 | else | |
684 | intelhaddata->buf_info[i].buf_size = ring_buf_size - | |
2e52f5e5 | 685 | (i * period_bytes); |
5dab11d8 | 686 | |
79dda75a TI |
687 | had_write_register(intelhaddata, |
688 | AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH), | |
5dab11d8 JA |
689 | intelhaddata->buf_info[i].buf_addr | |
690 | BIT(0) | BIT(1)); | |
79dda75a TI |
691 | had_write_register(intelhaddata, |
692 | AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH), | |
5dab11d8 JA |
693 | period_bytes); |
694 | intelhaddata->buf_info[i].is_valid = true; | |
695 | } | |
c75b0476 TI |
696 | dev_dbg(intelhaddata->dev, "%s:buf[%d-%d] addr=%#x and size=%d\n", |
697 | __func__, start, end, | |
698 | intelhaddata->buf_info[start].buf_addr, | |
699 | intelhaddata->buf_info[start].buf_size); | |
5dab11d8 JA |
700 | intelhaddata->valid_buf_cnt = num_periods; |
701 | return 0; | |
702 | } | |
703 | ||
372d855f | 704 | static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata) |
5dab11d8 JA |
705 | { |
706 | int i, retval = 0; | |
707 | u32 len[4]; | |
708 | ||
709 | for (i = 0; i < 4 ; i++) { | |
79dda75a TI |
710 | had_read_register(intelhaddata, |
711 | AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH), | |
712 | &len[i]); | |
5dab11d8 JA |
713 | if (!len[i]) |
714 | retval++; | |
715 | } | |
716 | if (retval != 1) { | |
717 | for (i = 0; i < 4 ; i++) | |
c75b0476 TI |
718 | dev_dbg(intelhaddata->dev, "buf[%d] size=%d\n", |
719 | i, len[i]); | |
5dab11d8 JA |
720 | } |
721 | ||
722 | return retval; | |
723 | } | |
724 | ||
964ca808 PLB |
725 | static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate) |
726 | { | |
727 | u32 maud_val; | |
728 | ||
2e52f5e5 | 729 | /* Select maud according to DP 1.2 spec */ |
964ca808 PLB |
730 | if (link_rate == DP_2_7_GHZ) { |
731 | switch (aud_samp_freq) { | |
732 | case AUD_SAMPLE_RATE_32: | |
733 | maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL; | |
734 | break; | |
735 | ||
736 | case AUD_SAMPLE_RATE_44_1: | |
737 | maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL; | |
738 | break; | |
739 | ||
740 | case AUD_SAMPLE_RATE_48: | |
741 | maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL; | |
742 | break; | |
743 | ||
744 | case AUD_SAMPLE_RATE_88_2: | |
745 | maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL; | |
746 | break; | |
747 | ||
748 | case AUD_SAMPLE_RATE_96: | |
749 | maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL; | |
750 | break; | |
751 | ||
752 | case AUD_SAMPLE_RATE_176_4: | |
753 | maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL; | |
754 | break; | |
755 | ||
756 | case HAD_MAX_RATE: | |
757 | maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL; | |
758 | break; | |
759 | ||
760 | default: | |
761 | maud_val = -EINVAL; | |
762 | break; | |
763 | } | |
764 | } else if (link_rate == DP_1_62_GHZ) { | |
765 | switch (aud_samp_freq) { | |
766 | case AUD_SAMPLE_RATE_32: | |
767 | maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL; | |
768 | break; | |
769 | ||
770 | case AUD_SAMPLE_RATE_44_1: | |
771 | maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL; | |
772 | break; | |
773 | ||
774 | case AUD_SAMPLE_RATE_48: | |
775 | maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL; | |
776 | break; | |
777 | ||
778 | case AUD_SAMPLE_RATE_88_2: | |
779 | maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL; | |
780 | break; | |
781 | ||
782 | case AUD_SAMPLE_RATE_96: | |
783 | maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL; | |
784 | break; | |
785 | ||
786 | case AUD_SAMPLE_RATE_176_4: | |
787 | maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL; | |
788 | break; | |
789 | ||
790 | case HAD_MAX_RATE: | |
791 | maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL; | |
792 | break; | |
793 | ||
794 | default: | |
795 | maud_val = -EINVAL; | |
796 | break; | |
797 | } | |
798 | } else | |
799 | maud_val = -EINVAL; | |
800 | ||
801 | return maud_val; | |
802 | } | |
803 | ||
76296ef0 TI |
804 | /* |
805 | * snd_intelhad_prog_cts - Program HDMI audio CTS value | |
5dab11d8 JA |
806 | * |
807 | * @aud_samp_freq: sampling frequency of audio data | |
808 | * @tmds: sampling frequency of the display data | |
809 | * @n_param: N value, depends on aud_samp_freq | |
810 | * @intelhaddata:substream private data | |
811 | * | |
812 | * Program CTS register based on the audio and display sampling frequency | |
813 | */ | |
76296ef0 TI |
814 | static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds, |
815 | u32 link_rate, u32 n_param, | |
816 | struct snd_intelhad *intelhaddata) | |
5dab11d8 JA |
817 | { |
818 | u32 cts_val; | |
819 | u64 dividend, divisor; | |
820 | ||
964ca808 PLB |
821 | if (intelhaddata->dp_output) { |
822 | /* Substitute cts_val with Maud according to DP 1.2 spec*/ | |
823 | cts_val = had_calculate_maud_value(aud_samp_freq, link_rate); | |
824 | } else { | |
825 | /* Calculate CTS according to HDMI 1.3a spec*/ | |
826 | dividend = (u64)tmds * n_param*1000; | |
827 | divisor = 128 * aud_samp_freq; | |
828 | cts_val = div64_u64(dividend, divisor); | |
829 | } | |
c75b0476 | 830 | dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n", |
964ca808 | 831 | tmds, n_param, cts_val); |
79dda75a | 832 | had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val)); |
5dab11d8 JA |
833 | } |
834 | ||
835 | static int had_calculate_n_value(u32 aud_samp_freq) | |
836 | { | |
2e52f5e5 | 837 | int n_val; |
5dab11d8 JA |
838 | |
839 | /* Select N according to HDMI 1.3a spec*/ | |
840 | switch (aud_samp_freq) { | |
841 | case AUD_SAMPLE_RATE_32: | |
842 | n_val = 4096; | |
2e52f5e5 | 843 | break; |
5dab11d8 JA |
844 | |
845 | case AUD_SAMPLE_RATE_44_1: | |
846 | n_val = 6272; | |
2e52f5e5 | 847 | break; |
5dab11d8 JA |
848 | |
849 | case AUD_SAMPLE_RATE_48: | |
850 | n_val = 6144; | |
2e52f5e5 | 851 | break; |
5dab11d8 JA |
852 | |
853 | case AUD_SAMPLE_RATE_88_2: | |
854 | n_val = 12544; | |
2e52f5e5 | 855 | break; |
5dab11d8 JA |
856 | |
857 | case AUD_SAMPLE_RATE_96: | |
858 | n_val = 12288; | |
2e52f5e5 | 859 | break; |
5dab11d8 JA |
860 | |
861 | case AUD_SAMPLE_RATE_176_4: | |
862 | n_val = 25088; | |
2e52f5e5 | 863 | break; |
5dab11d8 JA |
864 | |
865 | case HAD_MAX_RATE: | |
866 | n_val = 24576; | |
2e52f5e5 | 867 | break; |
5dab11d8 JA |
868 | |
869 | default: | |
870 | n_val = -EINVAL; | |
2e52f5e5 | 871 | break; |
5dab11d8 JA |
872 | } |
873 | return n_val; | |
874 | } | |
875 | ||
76296ef0 TI |
876 | /* |
877 | * snd_intelhad_prog_n - Program HDMI audio N value | |
5dab11d8 JA |
878 | * |
879 | * @aud_samp_freq: sampling frequency of audio data | |
880 | * @n_param: N value, depends on aud_samp_freq | |
881 | * @intelhaddata:substream private data | |
882 | * | |
883 | * This function is called in the prepare callback. | |
884 | * It programs based on the audio and display sampling frequency | |
885 | */ | |
76296ef0 TI |
886 | static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param, |
887 | struct snd_intelhad *intelhaddata) | |
5dab11d8 | 888 | { |
2e52f5e5 | 889 | int n_val; |
5dab11d8 | 890 | |
964ca808 PLB |
891 | if (intelhaddata->dp_output) { |
892 | /* | |
893 | * According to DP specs, Maud and Naud values hold | |
894 | * a relationship, which is stated as: | |
895 | * Maud/Naud = 512 * fs / f_LS_Clk | |
896 | * where, fs is the sampling frequency of the audio stream | |
897 | * and Naud is 32768 for Async clock. | |
898 | */ | |
899 | ||
900 | n_val = DP_NAUD_VAL; | |
901 | } else | |
902 | n_val = had_calculate_n_value(aud_samp_freq); | |
5dab11d8 JA |
903 | |
904 | if (n_val < 0) | |
905 | return n_val; | |
906 | ||
79dda75a | 907 | had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val)); |
5dab11d8 JA |
908 | *n_param = n_val; |
909 | return 0; | |
910 | } | |
911 | ||
372d855f | 912 | static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata) |
5dab11d8 | 913 | { |
79f439ea | 914 | u32 hdmi_status = 0, i = 0; |
5dab11d8 JA |
915 | |
916 | /* Handle Underrun interrupt within Audio Unit */ | |
79dda75a | 917 | had_write_register(intelhaddata, AUD_CONFIG, 0); |
5dab11d8 | 918 | /* Reset buffer pointers */ |
79dda75a TI |
919 | had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 1); |
920 | had_write_register(intelhaddata, AUD_HDMI_STATUS_v2, 0); | |
2e52f5e5 | 921 | /* |
5dab11d8 JA |
922 | * The interrupt status 'sticky' bits might not be cleared by |
923 | * setting '1' to that bit once... | |
924 | */ | |
925 | do { /* clear bit30, 31 AUD_HDMI_STATUS */ | |
79dda75a TI |
926 | had_read_register(intelhaddata, AUD_HDMI_STATUS_v2, |
927 | &hdmi_status); | |
c75b0476 | 928 | dev_dbg(intelhaddata->dev, "HDMI status =0x%x\n", hdmi_status); |
5dab11d8 JA |
929 | if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) { |
930 | i++; | |
79dda75a TI |
931 | had_write_register(intelhaddata, |
932 | AUD_HDMI_STATUS_v2, hdmi_status); | |
5dab11d8 JA |
933 | } else |
934 | break; | |
935 | } while (i < MAX_CNT); | |
936 | if (i >= MAX_CNT) | |
c75b0476 | 937 | dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n"); |
5dab11d8 JA |
938 | } |
939 | ||
2e52f5e5 | 940 | /* |
5dab11d8 JA |
941 | * snd_intelhad_open - stream initializations are done here |
942 | * @substream:substream for which the stream function is called | |
943 | * | |
944 | * This function is called whenever a PCM stream is opened | |
945 | */ | |
946 | static int snd_intelhad_open(struct snd_pcm_substream *substream) | |
947 | { | |
948 | struct snd_intelhad *intelhaddata; | |
949 | struct snd_pcm_runtime *runtime; | |
950 | struct had_stream_pvt *stream; | |
5647aec2 | 951 | struct had_stream_data *had_stream; |
5dab11d8 JA |
952 | int retval; |
953 | ||
5dab11d8 | 954 | intelhaddata = snd_pcm_substream_chip(substream); |
5647aec2 | 955 | had_stream = &intelhaddata->stream_data; |
5dab11d8 | 956 | runtime = substream->runtime; |
6ddb3ab6 | 957 | intelhaddata->underrun_count = 0; |
5dab11d8 JA |
958 | |
959 | pm_runtime_get(intelhaddata->dev); | |
960 | ||
79f439ea | 961 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { |
c75b0476 TI |
962 | dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n", |
963 | __func__); | |
5dab11d8 JA |
964 | retval = -ENODEV; |
965 | goto exit_put_handle; | |
966 | } | |
967 | ||
968 | /* Check, if device already in use */ | |
969 | if (runtime->private_data) { | |
c75b0476 | 970 | dev_dbg(intelhaddata->dev, "Device already in use\n"); |
5dab11d8 JA |
971 | retval = -EBUSY; |
972 | goto exit_put_handle; | |
973 | } | |
974 | ||
975 | /* set the runtime hw parameter with local snd_pcm_hardware struct */ | |
976 | runtime->hw = snd_intel_hadstream; | |
977 | ||
978 | stream = kzalloc(sizeof(*stream), GFP_KERNEL); | |
979 | if (!stream) { | |
980 | retval = -ENOMEM; | |
981 | goto exit_put_handle; | |
982 | } | |
983 | stream->stream_status = STREAM_INIT; | |
984 | runtime->private_data = stream; | |
985 | ||
986 | retval = snd_pcm_hw_constraint_integer(runtime, | |
987 | SNDRV_PCM_HW_PARAM_PERIODS); | |
988 | if (retval < 0) | |
989 | goto exit_err; | |
990 | ||
991 | /* Make sure, that the period size is always aligned | |
992 | * 64byte boundary | |
993 | */ | |
994 | retval = snd_pcm_hw_constraint_step(substream->runtime, 0, | |
995 | SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64); | |
996 | if (retval < 0) { | |
c75b0476 TI |
997 | dev_dbg(intelhaddata->dev, "%s:step_size=64 failed,err=%d\n", |
998 | __func__, retval); | |
5dab11d8 JA |
999 | goto exit_err; |
1000 | } | |
1001 | ||
1002 | return retval; | |
1003 | exit_err: | |
1004 | kfree(stream); | |
1005 | exit_put_handle: | |
1006 | pm_runtime_put(intelhaddata->dev); | |
1007 | runtime->private_data = NULL; | |
1008 | return retval; | |
1009 | } | |
1010 | ||
df76df12 | 1011 | /* |
5dab11d8 | 1012 | * had_period_elapsed - updates the hardware pointer status |
df76df12 | 1013 | * @had_substream: substream for which the stream function is called |
5dab11d8 | 1014 | */ |
df76df12 | 1015 | static void had_period_elapsed(struct snd_pcm_substream *substream) |
5dab11d8 | 1016 | { |
5dab11d8 JA |
1017 | struct had_stream_pvt *stream; |
1018 | ||
5dab11d8 JA |
1019 | if (!substream || !substream->runtime) |
1020 | return; | |
1021 | stream = substream->runtime->private_data; | |
1022 | if (!stream) | |
1023 | return; | |
1024 | ||
1025 | if (stream->stream_status != STREAM_RUNNING) | |
1026 | return; | |
1027 | snd_pcm_period_elapsed(substream); | |
1028 | } | |
1029 | ||
2e52f5e5 TI |
1030 | /* |
1031 | * snd_intelhad_close - to free parameteres when stream is stopped | |
5dab11d8 JA |
1032 | * @substream: substream for which the function is called |
1033 | * | |
1034 | * This function is called by ALSA framework when stream is stopped | |
1035 | */ | |
1036 | static int snd_intelhad_close(struct snd_pcm_substream *substream) | |
1037 | { | |
1038 | struct snd_intelhad *intelhaddata; | |
1039 | struct snd_pcm_runtime *runtime; | |
1040 | ||
5dab11d8 JA |
1041 | intelhaddata = snd_pcm_substream_chip(substream); |
1042 | runtime = substream->runtime; | |
1043 | ||
c75b0476 | 1044 | if (WARN_ON(!runtime->private_data)) |
5dab11d8 | 1045 | return 0; |
5dab11d8 JA |
1046 | |
1047 | intelhaddata->stream_info.buffer_rendered = 0; | |
1048 | intelhaddata->stream_info.buffer_ptr = 0; | |
1049 | intelhaddata->stream_info.str_id = 0; | |
1050 | intelhaddata->stream_info.had_substream = NULL; | |
1051 | ||
1052 | /* Check if following drv_status modification is required - VA */ | |
1053 | if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) { | |
1054 | intelhaddata->drv_status = HAD_DRV_CONNECTED; | |
c75b0476 TI |
1055 | dev_dbg(intelhaddata->dev, |
1056 | "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n", | |
5dab11d8 JA |
1057 | __func__, __LINE__); |
1058 | } | |
1059 | kfree(runtime->private_data); | |
1060 | runtime->private_data = NULL; | |
1061 | pm_runtime_put(intelhaddata->dev); | |
1062 | return 0; | |
1063 | } | |
1064 | ||
2e52f5e5 TI |
1065 | /* |
1066 | * snd_intelhad_hw_params - to setup the hardware parameters | |
1067 | * like allocating the buffers | |
1068 | * @substream: substream for which the function is called | |
5dab11d8 JA |
1069 | * @hw_params: hardware parameters |
1070 | * | |
1071 | * This function is called by ALSA framework when hardware params are set | |
1072 | */ | |
1073 | static int snd_intelhad_hw_params(struct snd_pcm_substream *substream, | |
1074 | struct snd_pcm_hw_params *hw_params) | |
1075 | { | |
c75b0476 | 1076 | struct snd_intelhad *intelhaddata; |
5dab11d8 JA |
1077 | unsigned long addr; |
1078 | int pages, buf_size, retval; | |
1079 | ||
5dab11d8 JA |
1080 | if (!hw_params) |
1081 | return -EINVAL; | |
1082 | ||
c75b0476 | 1083 | intelhaddata = snd_pcm_substream_chip(substream); |
5dab11d8 JA |
1084 | buf_size = params_buffer_bytes(hw_params); |
1085 | retval = snd_pcm_lib_malloc_pages(substream, buf_size); | |
1086 | if (retval < 0) | |
1087 | return retval; | |
c75b0476 TI |
1088 | dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n", |
1089 | __func__, buf_size); | |
5dab11d8 JA |
1090 | /* mark the pages as uncached region */ |
1091 | addr = (unsigned long) substream->runtime->dma_area; | |
1092 | pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE; | |
1093 | retval = set_memory_uc(addr, pages); | |
1094 | if (retval) { | |
c75b0476 TI |
1095 | dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n", |
1096 | retval); | |
5dab11d8 JA |
1097 | return retval; |
1098 | } | |
1099 | memset(substream->runtime->dma_area, 0, buf_size); | |
1100 | ||
1101 | return retval; | |
1102 | } | |
1103 | ||
2e52f5e5 TI |
1104 | /* |
1105 | * snd_intelhad_hw_free - to release the resources allocated during | |
1106 | * hardware params setup | |
5dab11d8 JA |
1107 | * @substream: substream for which the function is called |
1108 | * | |
1109 | * This function is called by ALSA framework before close callback. | |
5dab11d8 JA |
1110 | */ |
1111 | static int snd_intelhad_hw_free(struct snd_pcm_substream *substream) | |
1112 | { | |
1113 | unsigned long addr; | |
1114 | u32 pages; | |
1115 | ||
5dab11d8 JA |
1116 | /* mark back the pages as cached/writeback region before the free */ |
1117 | if (substream->runtime->dma_area != NULL) { | |
1118 | addr = (unsigned long) substream->runtime->dma_area; | |
1119 | pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / | |
1120 | PAGE_SIZE; | |
1121 | set_memory_wb(addr, pages); | |
1122 | return snd_pcm_lib_free_pages(substream); | |
1123 | } | |
1124 | return 0; | |
1125 | } | |
1126 | ||
2e52f5e5 | 1127 | /* |
5dab11d8 | 1128 | * snd_intelhad_pcm_trigger - stream activities are handled here |
2e52f5e5 TI |
1129 | * @substream: substream for which the stream function is called |
1130 | * @cmd: the stream commamd thats requested from upper layer | |
1131 | * | |
5dab11d8 JA |
1132 | * This function is called whenever an a stream activity is invoked |
1133 | */ | |
1134 | static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream, | |
1135 | int cmd) | |
1136 | { | |
da864809 | 1137 | int retval = 0; |
5dab11d8 JA |
1138 | unsigned long flag_irq; |
1139 | struct snd_intelhad *intelhaddata; | |
1140 | struct had_stream_pvt *stream; | |
5647aec2 | 1141 | struct had_stream_data *had_stream; |
5dab11d8 | 1142 | |
5dab11d8 JA |
1143 | intelhaddata = snd_pcm_substream_chip(substream); |
1144 | stream = substream->runtime->private_data; | |
5647aec2 | 1145 | had_stream = &intelhaddata->stream_data; |
5dab11d8 JA |
1146 | |
1147 | switch (cmd) { | |
1148 | case SNDRV_PCM_TRIGGER_START: | |
5dab11d8 | 1149 | /* Disable local INTRs till register prgmng is done */ |
79f439ea | 1150 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { |
c75b0476 TI |
1151 | dev_dbg(intelhaddata->dev, |
1152 | "_START: HDMI cable plugged-out\n"); | |
5dab11d8 JA |
1153 | retval = -ENODEV; |
1154 | break; | |
1155 | } | |
1156 | stream->stream_status = STREAM_RUNNING; | |
1157 | ||
1158 | had_stream->stream_type = HAD_RUNNING_STREAM; | |
1159 | ||
1160 | /* Enable Audio */ | |
da864809 TI |
1161 | snd_intelhad_enable_audio_int(intelhaddata, true); |
1162 | snd_intelhad_enable_audio(intelhaddata, true); | |
5dab11d8 JA |
1163 | break; |
1164 | ||
1165 | case SNDRV_PCM_TRIGGER_STOP: | |
5dab11d8 JA |
1166 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irq); |
1167 | intelhaddata->stream_info.str_id = 0; | |
1168 | intelhaddata->curr_buf = 0; | |
1169 | ||
c75b0476 | 1170 | /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */ |
5dab11d8 JA |
1171 | |
1172 | had_stream->stream_type = HAD_INIT; | |
1173 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irq); | |
1174 | /* Disable Audio */ | |
da864809 TI |
1175 | snd_intelhad_enable_audio_int(intelhaddata, false); |
1176 | snd_intelhad_enable_audio(intelhaddata, false); | |
5dab11d8 | 1177 | /* Reset buffer pointers */ |
79dda75a TI |
1178 | snd_intelhad_reset_audio(intelhaddata, 1); |
1179 | snd_intelhad_reset_audio(intelhaddata, 0); | |
5dab11d8 | 1180 | stream->stream_status = STREAM_DROPPED; |
da864809 | 1181 | snd_intelhad_enable_audio_int(intelhaddata, false); |
5dab11d8 JA |
1182 | break; |
1183 | ||
1184 | default: | |
1185 | retval = -EINVAL; | |
1186 | } | |
1187 | return retval; | |
1188 | } | |
1189 | ||
2e52f5e5 TI |
1190 | /* |
1191 | * snd_intelhad_pcm_prepare - internal preparation before starting a stream | |
1192 | * @substream: substream for which the function is called | |
5dab11d8 JA |
1193 | * |
1194 | * This function is called when a stream is started for internal preparation. | |
1195 | */ | |
1196 | static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream) | |
1197 | { | |
1198 | int retval; | |
1199 | u32 disp_samp_freq, n_param; | |
964ca808 | 1200 | u32 link_rate = 0; |
5dab11d8 JA |
1201 | struct snd_intelhad *intelhaddata; |
1202 | struct snd_pcm_runtime *runtime; | |
5647aec2 | 1203 | struct had_stream_data *had_stream; |
5dab11d8 | 1204 | |
5dab11d8 JA |
1205 | intelhaddata = snd_pcm_substream_chip(substream); |
1206 | runtime = substream->runtime; | |
5647aec2 | 1207 | had_stream = &intelhaddata->stream_data; |
5dab11d8 | 1208 | |
79f439ea | 1209 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { |
c75b0476 TI |
1210 | dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n", |
1211 | __func__); | |
5dab11d8 JA |
1212 | retval = -ENODEV; |
1213 | goto prep_end; | |
1214 | } | |
1215 | ||
c75b0476 | 1216 | dev_dbg(intelhaddata->dev, "period_size=%d\n", |
5dab11d8 | 1217 | (int)frames_to_bytes(runtime, runtime->period_size)); |
c75b0476 TI |
1218 | dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods); |
1219 | dev_dbg(intelhaddata->dev, "buffer_size=%d\n", | |
1220 | (int)snd_pcm_lib_buffer_bytes(substream)); | |
1221 | dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate); | |
1222 | dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels); | |
5dab11d8 JA |
1223 | |
1224 | if (intelhaddata->stream_info.str_id) { | |
c75b0476 TI |
1225 | dev_dbg(intelhaddata->dev, |
1226 | "_prepare is called for existing str_id#%d\n", | |
5dab11d8 JA |
1227 | intelhaddata->stream_info.str_id); |
1228 | retval = snd_intelhad_pcm_trigger(substream, | |
1229 | SNDRV_PCM_TRIGGER_STOP); | |
1230 | return retval; | |
1231 | } | |
1232 | ||
2e52f5e5 TI |
1233 | intelhaddata->stream_info.had_substream = substream; |
1234 | intelhaddata->stream_info.buffer_ptr = 0; | |
1235 | intelhaddata->stream_info.buffer_rendered = 0; | |
1236 | intelhaddata->stream_info.sfreq = substream->runtime->rate; | |
5dab11d8 JA |
1237 | |
1238 | /* Get N value in KHz */ | |
da864809 | 1239 | disp_samp_freq = intelhaddata->tmds_clock_speed; |
5dab11d8 | 1240 | |
76296ef0 TI |
1241 | retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param, |
1242 | intelhaddata); | |
5dab11d8 | 1243 | if (retval) { |
c75b0476 TI |
1244 | dev_err(intelhaddata->dev, |
1245 | "programming N value failed %#x\n", retval); | |
5dab11d8 JA |
1246 | goto prep_end; |
1247 | } | |
964ca808 PLB |
1248 | |
1249 | if (intelhaddata->dp_output) | |
da864809 | 1250 | link_rate = intelhaddata->link_rate; |
964ca808 | 1251 | |
76296ef0 TI |
1252 | snd_intelhad_prog_cts(substream->runtime->rate, |
1253 | disp_samp_freq, link_rate, | |
1254 | n_param, intelhaddata); | |
5dab11d8 | 1255 | |
76296ef0 | 1256 | snd_intelhad_prog_dip(substream, intelhaddata); |
5dab11d8 | 1257 | |
76296ef0 | 1258 | retval = snd_intelhad_audio_ctrl(substream, intelhaddata); |
5dab11d8 JA |
1259 | |
1260 | /* Prog buffer address */ | |
1261 | retval = snd_intelhad_prog_buffer(intelhaddata, | |
1262 | HAD_BUF_TYPE_A, HAD_BUF_TYPE_D); | |
1263 | ||
1264 | /* | |
1265 | * Program channel mapping in following order: | |
1266 | * FL, FR, C, LFE, RL, RR | |
1267 | */ | |
1268 | ||
79dda75a | 1269 | had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER); |
5dab11d8 JA |
1270 | |
1271 | prep_end: | |
1272 | return retval; | |
1273 | } | |
1274 | ||
2e52f5e5 | 1275 | /* |
5dab11d8 | 1276 | * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw |
2e52f5e5 | 1277 | * @substream: substream for which the function is called |
5dab11d8 JA |
1278 | * |
1279 | * This function is called by ALSA framework to get the current hw buffer ptr | |
1280 | * when a period is elapsed | |
1281 | */ | |
1282 | static snd_pcm_uframes_t snd_intelhad_pcm_pointer( | |
1283 | struct snd_pcm_substream *substream) | |
1284 | { | |
1285 | struct snd_intelhad *intelhaddata; | |
1286 | u32 bytes_rendered = 0; | |
1287 | u32 t; | |
1288 | int buf_id; | |
1289 | ||
5dab11d8 JA |
1290 | intelhaddata = snd_pcm_substream_chip(substream); |
1291 | ||
79f439ea TI |
1292 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) |
1293 | return SNDRV_PCM_POS_XRUN; | |
1294 | ||
5dab11d8 | 1295 | if (intelhaddata->flag_underrun) { |
e9d65abf | 1296 | intelhaddata->flag_underrun = false; |
5dab11d8 JA |
1297 | return SNDRV_PCM_POS_XRUN; |
1298 | } | |
1299 | ||
1300 | /* Use a hw register to calculate sub-period position reports. | |
1301 | * This makes PulseAudio happier. | |
1302 | */ | |
1303 | ||
1304 | buf_id = intelhaddata->curr_buf % 4; | |
79dda75a TI |
1305 | had_read_register(intelhaddata, |
1306 | AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t); | |
232892fb JA |
1307 | |
1308 | if ((t == 0) || (t == ((u32)-1L))) { | |
6ddb3ab6 | 1309 | intelhaddata->underrun_count++; |
c75b0476 TI |
1310 | dev_dbg(intelhaddata->dev, |
1311 | "discovered buffer done for buf %d, count = %d\n", | |
6ddb3ab6 | 1312 | buf_id, intelhaddata->underrun_count); |
232892fb | 1313 | |
6ddb3ab6 | 1314 | if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) { |
c75b0476 TI |
1315 | dev_dbg(intelhaddata->dev, |
1316 | "assume audio_codec_reset, underrun = %d - do xrun\n", | |
6ddb3ab6 TI |
1317 | intelhaddata->underrun_count); |
1318 | intelhaddata->underrun_count = 0; | |
232892fb JA |
1319 | return SNDRV_PCM_POS_XRUN; |
1320 | } | |
1321 | } else { | |
1322 | /* Reset Counter */ | |
6ddb3ab6 | 1323 | intelhaddata->underrun_count = 0; |
5dab11d8 | 1324 | } |
232892fb | 1325 | |
5dab11d8 JA |
1326 | t = intelhaddata->buf_info[buf_id].buf_size - t; |
1327 | ||
1328 | if (intelhaddata->stream_info.buffer_rendered) | |
1329 | div_u64_rem(intelhaddata->stream_info.buffer_rendered, | |
1330 | intelhaddata->stream_info.ring_buf_size, | |
1331 | &(bytes_rendered)); | |
1332 | ||
1333 | intelhaddata->stream_info.buffer_ptr = bytes_to_frames( | |
1334 | substream->runtime, | |
1335 | bytes_rendered + t); | |
1336 | return intelhaddata->stream_info.buffer_ptr; | |
1337 | } | |
1338 | ||
2e52f5e5 | 1339 | /* |
5dab11d8 | 1340 | * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data |
2e52f5e5 TI |
1341 | * @substream: substream for which the function is called |
1342 | * @vma: struct instance of memory VMM memory area | |
5dab11d8 JA |
1343 | * |
1344 | * This function is called by OS when a user space component | |
1345 | * tries to get mmap memory from driver | |
1346 | */ | |
1347 | static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream, | |
1348 | struct vm_area_struct *vma) | |
1349 | { | |
5dab11d8 JA |
1350 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
1351 | return remap_pfn_range(vma, vma->vm_start, | |
1352 | substream->dma_buffer.addr >> PAGE_SHIFT, | |
1353 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | |
1354 | } | |
1355 | ||
da864809 | 1356 | static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata) |
5dab11d8 | 1357 | { |
da864809 | 1358 | struct snd_pcm_substream *substream; |
5dab11d8 JA |
1359 | int retval = 0; |
1360 | u32 disp_samp_freq, n_param; | |
964ca808 | 1361 | u32 link_rate = 0; |
5dab11d8 | 1362 | |
da864809 TI |
1363 | substream = intelhaddata->stream_info.had_substream; |
1364 | if (!substream || !substream->runtime) | |
1365 | return 0; | |
5dab11d8 JA |
1366 | |
1367 | /* Disable Audio */ | |
da864809 | 1368 | snd_intelhad_enable_audio(intelhaddata, false); |
5dab11d8 JA |
1369 | |
1370 | /* Update CTS value */ | |
da864809 | 1371 | disp_samp_freq = intelhaddata->tmds_clock_speed; |
5dab11d8 | 1372 | |
76296ef0 TI |
1373 | retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param, |
1374 | intelhaddata); | |
5dab11d8 | 1375 | if (retval) { |
c75b0476 TI |
1376 | dev_err(intelhaddata->dev, |
1377 | "programming N value failed %#x\n", retval); | |
5dab11d8 JA |
1378 | goto out; |
1379 | } | |
964ca808 PLB |
1380 | |
1381 | if (intelhaddata->dp_output) | |
da864809 | 1382 | link_rate = intelhaddata->link_rate; |
964ca808 | 1383 | |
76296ef0 TI |
1384 | snd_intelhad_prog_cts(substream->runtime->rate, |
1385 | disp_samp_freq, link_rate, | |
1386 | n_param, intelhaddata); | |
5dab11d8 JA |
1387 | |
1388 | /* Enable Audio */ | |
da864809 | 1389 | snd_intelhad_enable_audio(intelhaddata, true); |
5dab11d8 JA |
1390 | |
1391 | out: | |
1392 | return retval; | |
1393 | } | |
1394 | ||
372d855f TI |
1395 | /* |
1396 | * hdmi_lpe_audio_suspend - power management suspend function | |
372d855f TI |
1397 | * @pdev: platform device |
1398 | * | |
2e52f5e5 | 1399 | * This function is called to suspend the hdmi audio. |
372d855f TI |
1400 | */ |
1401 | static int hdmi_lpe_audio_suspend(struct platform_device *pdev, | |
1402 | pm_message_t state) | |
1403 | { | |
1404 | struct had_stream_data *had_stream; | |
1405 | unsigned long flag_irqs; | |
1406 | struct snd_pcm_substream *substream; | |
1407 | struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev); | |
1408 | ||
372d855f TI |
1409 | had_stream = &intelhaddata->stream_data; |
1410 | substream = intelhaddata->stream_info.had_substream; | |
1411 | ||
e29c0f96 | 1412 | if (!pm_runtime_status_suspended(intelhaddata->dev)) { |
c75b0476 | 1413 | dev_err(intelhaddata->dev, "audio stream is active\n"); |
372d855f TI |
1414 | return -EAGAIN; |
1415 | } | |
1416 | ||
372d855f TI |
1417 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); |
1418 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { | |
1419 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
c75b0476 | 1420 | dev_dbg(intelhaddata->dev, "had not connected\n"); |
372d855f TI |
1421 | return 0; |
1422 | } | |
1423 | ||
1424 | if (intelhaddata->drv_status == HAD_DRV_SUSPENDED) { | |
1425 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
c75b0476 | 1426 | dev_dbg(intelhaddata->dev, "had already suspended\n"); |
372d855f TI |
1427 | return 0; |
1428 | } | |
1429 | ||
1430 | intelhaddata->drv_status = HAD_DRV_SUSPENDED; | |
c75b0476 TI |
1431 | dev_dbg(intelhaddata->dev, |
1432 | "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_SUSPENDED\n", | |
372d855f TI |
1433 | __func__, __LINE__); |
1434 | ||
1435 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1436 | snd_intelhad_enable_audio_int(intelhaddata, false); | |
372d855f TI |
1437 | return 0; |
1438 | } | |
1439 | ||
1440 | /* | |
1441 | * hdmi_lpe_audio_resume - power management resume function | |
2e52f5e5 | 1442 | * @pdev: platform device |
372d855f | 1443 | * |
2e52f5e5 | 1444 | * This function is called to resume the hdmi audio. |
372d855f TI |
1445 | */ |
1446 | static int hdmi_lpe_audio_resume(struct platform_device *pdev) | |
1447 | { | |
1448 | struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev); | |
1449 | unsigned long flag_irqs; | |
1450 | ||
372d855f TI |
1451 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); |
1452 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { | |
1453 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
c75b0476 | 1454 | dev_dbg(intelhaddata->dev, "had not connected\n"); |
372d855f TI |
1455 | return 0; |
1456 | } | |
1457 | ||
1458 | if (intelhaddata->drv_status != HAD_DRV_SUSPENDED) { | |
1459 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
caa2a61a | 1460 | dev_dbg(intelhaddata->dev, "had is not in suspended state\n"); |
372d855f TI |
1461 | return 0; |
1462 | } | |
1463 | ||
372d855f | 1464 | intelhaddata->drv_status = HAD_DRV_CONNECTED; |
c75b0476 TI |
1465 | dev_dbg(intelhaddata->dev, |
1466 | "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n", | |
372d855f TI |
1467 | __func__, __LINE__); |
1468 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1469 | snd_intelhad_enable_audio_int(intelhaddata, true); | |
372d855f TI |
1470 | return 0; |
1471 | } | |
1472 | ||
1473 | static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata, | |
1474 | enum intel_had_aud_buf_type buf_id) | |
1475 | { | |
1476 | int i, intr_count = 0; | |
1477 | enum intel_had_aud_buf_type buff_done; | |
1478 | u32 buf_size, buf_addr; | |
1479 | struct had_stream_data *had_stream; | |
1480 | unsigned long flag_irqs; | |
1481 | ||
1482 | had_stream = &intelhaddata->stream_data; | |
1483 | ||
1484 | buff_done = buf_id; | |
1485 | ||
1486 | intr_count = snd_intelhad_read_len(intelhaddata); | |
1487 | if (intr_count > 1) { | |
1488 | /* In case of active playback */ | |
c75b0476 TI |
1489 | dev_err(intelhaddata->dev, |
1490 | "Driver detected %d missed buffer done interrupt(s)\n", | |
1491 | (intr_count - 1)); | |
372d855f TI |
1492 | if (intr_count > 3) |
1493 | return intr_count; | |
1494 | ||
1495 | buf_id += (intr_count - 1); | |
1496 | /* Reprogram registers*/ | |
1497 | for (i = buff_done; i < buf_id; i++) { | |
1498 | int j = i % 4; | |
1499 | ||
1500 | buf_size = intelhaddata->buf_info[j].buf_size; | |
1501 | buf_addr = intelhaddata->buf_info[j].buf_addr; | |
1502 | had_write_register(intelhaddata, | |
1503 | AUD_BUF_A_LENGTH + | |
1504 | (j * HAD_REG_WIDTH), buf_size); | |
1505 | had_write_register(intelhaddata, | |
1506 | AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH), | |
1507 | (buf_addr | BIT(0) | BIT(1))); | |
1508 | } | |
1509 | buf_id = buf_id % 4; | |
1510 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1511 | intelhaddata->buff_done = buf_id; | |
1512 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1513 | } | |
1514 | ||
1515 | return intr_count; | |
1516 | } | |
1517 | ||
1518 | static int had_process_buffer_done(struct snd_intelhad *intelhaddata) | |
1519 | { | |
1520 | u32 len = 1; | |
1521 | enum intel_had_aud_buf_type buf_id; | |
1522 | enum intel_had_aud_buf_type buff_done; | |
1523 | struct pcm_stream_info *stream; | |
1524 | u32 buf_size; | |
1525 | struct had_stream_data *had_stream; | |
1526 | int intr_count; | |
1527 | enum had_status_stream stream_type; | |
1528 | unsigned long flag_irqs; | |
1529 | ||
1530 | had_stream = &intelhaddata->stream_data; | |
1531 | stream = &intelhaddata->stream_info; | |
1532 | intr_count = 1; | |
1533 | ||
1534 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1535 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { | |
1536 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
c75b0476 TI |
1537 | dev_dbg(intelhaddata->dev, |
1538 | "%s:Device already disconnected\n", __func__); | |
372d855f TI |
1539 | return 0; |
1540 | } | |
1541 | buf_id = intelhaddata->curr_buf; | |
1542 | intelhaddata->buff_done = buf_id; | |
1543 | buff_done = intelhaddata->buff_done; | |
1544 | buf_size = intelhaddata->buf_info[buf_id].buf_size; | |
1545 | stream_type = had_stream->stream_type; | |
1546 | ||
372d855f TI |
1547 | /* Every debug statement has an implication |
1548 | * of ~5msec. Thus, avoid having >3 debug statements | |
1549 | * for each buffer_done handling. | |
1550 | */ | |
1551 | ||
1552 | /* Check for any intr_miss in case of active playback */ | |
1553 | if (had_stream->stream_type == HAD_RUNNING_STREAM) { | |
1554 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1555 | intr_count = had_chk_intrmiss(intelhaddata, buf_id); | |
1556 | if (!intr_count || (intr_count > 3)) { | |
c75b0476 TI |
1557 | dev_err(intelhaddata->dev, |
1558 | "HAD SW state in non-recoverable mode\n"); | |
372d855f TI |
1559 | return 0; |
1560 | } | |
1561 | buf_id += (intr_count - 1); | |
1562 | buf_id = buf_id % 4; | |
1563 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1564 | } | |
1565 | ||
1566 | intelhaddata->buf_info[buf_id].is_valid = true; | |
1567 | if (intelhaddata->valid_buf_cnt-1 == buf_id) { | |
1568 | if (had_stream->stream_type >= HAD_RUNNING_STREAM) | |
1569 | intelhaddata->curr_buf = HAD_BUF_TYPE_A; | |
1570 | } else | |
1571 | intelhaddata->curr_buf = buf_id + 1; | |
1572 | ||
1573 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1574 | ||
79f439ea | 1575 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { |
c75b0476 | 1576 | dev_dbg(intelhaddata->dev, "HDMI cable plugged-out\n"); |
372d855f TI |
1577 | return 0; |
1578 | } | |
1579 | ||
2e52f5e5 | 1580 | /* Reprogram the registers with addr and length */ |
372d855f TI |
1581 | had_write_register(intelhaddata, |
1582 | AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), | |
1583 | buf_size); | |
1584 | had_write_register(intelhaddata, | |
1585 | AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH), | |
1586 | intelhaddata->buf_info[buf_id].buf_addr | | |
1587 | BIT(0) | BIT(1)); | |
1588 | ||
1589 | had_read_register(intelhaddata, | |
1590 | AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), | |
1591 | &len); | |
c75b0476 | 1592 | dev_dbg(intelhaddata->dev, "%s:Enabled buf[%d]\n", __func__, buf_id); |
372d855f TI |
1593 | |
1594 | /* In case of actual data, | |
1595 | * report buffer_done to above ALSA layer | |
1596 | */ | |
df76df12 | 1597 | buf_size = intelhaddata->buf_info[buf_id].buf_size; |
372d855f TI |
1598 | if (stream_type >= HAD_RUNNING_STREAM) { |
1599 | intelhaddata->stream_info.buffer_rendered += | |
1600 | (intr_count * buf_size); | |
df76df12 | 1601 | had_period_elapsed(stream->had_substream); |
372d855f TI |
1602 | } |
1603 | ||
1604 | return 0; | |
1605 | } | |
1606 | ||
1607 | static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata) | |
1608 | { | |
1609 | enum intel_had_aud_buf_type buf_id; | |
1610 | struct pcm_stream_info *stream; | |
1611 | struct had_stream_data *had_stream; | |
1612 | enum had_status_stream stream_type; | |
1613 | unsigned long flag_irqs; | |
1614 | int drv_status; | |
1615 | ||
1616 | had_stream = &intelhaddata->stream_data; | |
1617 | stream = &intelhaddata->stream_info; | |
1618 | ||
1619 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1620 | buf_id = intelhaddata->curr_buf; | |
1621 | stream_type = had_stream->stream_type; | |
1622 | intelhaddata->buff_done = buf_id; | |
1623 | drv_status = intelhaddata->drv_status; | |
1624 | if (stream_type == HAD_RUNNING_STREAM) | |
1625 | intelhaddata->curr_buf = HAD_BUF_TYPE_A; | |
1626 | ||
1627 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1628 | ||
c75b0476 | 1629 | dev_dbg(intelhaddata->dev, "Enter:%s buf_id=%d, stream_type=%d\n", |
372d855f TI |
1630 | __func__, buf_id, stream_type); |
1631 | ||
1632 | snd_intelhad_handle_underrun(intelhaddata); | |
1633 | ||
1634 | if (drv_status == HAD_DRV_DISCONNECTED) { | |
c75b0476 TI |
1635 | dev_dbg(intelhaddata->dev, |
1636 | "%s:Device already disconnected\n", __func__); | |
372d855f TI |
1637 | return 0; |
1638 | } | |
1639 | ||
1640 | if (stream_type == HAD_RUNNING_STREAM) { | |
1641 | /* Report UNDERRUN error to above layers */ | |
e9d65abf | 1642 | intelhaddata->flag_underrun = true; |
df76df12 | 1643 | had_period_elapsed(stream->had_substream); |
372d855f TI |
1644 | } |
1645 | ||
1646 | return 0; | |
1647 | } | |
1648 | ||
1649 | static int had_process_hot_plug(struct snd_intelhad *intelhaddata) | |
1650 | { | |
1651 | enum intel_had_aud_buf_type buf_id; | |
1652 | struct snd_pcm_substream *substream; | |
1653 | struct had_stream_data *had_stream; | |
1654 | unsigned long flag_irqs; | |
1655 | ||
372d855f TI |
1656 | substream = intelhaddata->stream_info.had_substream; |
1657 | had_stream = &intelhaddata->stream_data; | |
1658 | ||
1659 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1660 | if (intelhaddata->drv_status == HAD_DRV_CONNECTED) { | |
c75b0476 | 1661 | dev_dbg(intelhaddata->dev, "Device already connected\n"); |
372d855f TI |
1662 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); |
1663 | return 0; | |
1664 | } | |
1665 | buf_id = intelhaddata->curr_buf; | |
1666 | intelhaddata->buff_done = buf_id; | |
1667 | intelhaddata->drv_status = HAD_DRV_CONNECTED; | |
c75b0476 TI |
1668 | dev_dbg(intelhaddata->dev, |
1669 | "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n", | |
372d855f TI |
1670 | __func__, __LINE__); |
1671 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1672 | ||
c75b0476 TI |
1673 | dev_dbg(intelhaddata->dev, "Processing HOT_PLUG, buf_id = %d\n", |
1674 | buf_id); | |
372d855f TI |
1675 | |
1676 | /* Safety check */ | |
1677 | if (substream) { | |
c75b0476 TI |
1678 | dev_dbg(intelhaddata->dev, |
1679 | "Force to stop the active stream by disconnection\n"); | |
372d855f TI |
1680 | /* Set runtime->state to hw_params done */ |
1681 | snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP); | |
1682 | } | |
1683 | ||
1684 | had_build_channel_allocation_map(intelhaddata); | |
1685 | ||
1686 | return 0; | |
1687 | } | |
1688 | ||
1689 | static int had_process_hot_unplug(struct snd_intelhad *intelhaddata) | |
1690 | { | |
1691 | enum intel_had_aud_buf_type buf_id; | |
1692 | struct had_stream_data *had_stream; | |
1693 | unsigned long flag_irqs; | |
1694 | ||
372d855f TI |
1695 | had_stream = &intelhaddata->stream_data; |
1696 | buf_id = intelhaddata->curr_buf; | |
1697 | ||
1698 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1699 | ||
1700 | if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { | |
c75b0476 | 1701 | dev_dbg(intelhaddata->dev, "Device already disconnected\n"); |
372d855f TI |
1702 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); |
1703 | return 0; | |
1704 | ||
1705 | } else { | |
1706 | /* Disable Audio */ | |
1707 | snd_intelhad_enable_audio_int(intelhaddata, false); | |
1708 | snd_intelhad_enable_audio(intelhaddata, false); | |
1709 | } | |
1710 | ||
1711 | intelhaddata->drv_status = HAD_DRV_DISCONNECTED; | |
c75b0476 TI |
1712 | dev_dbg(intelhaddata->dev, |
1713 | "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n", | |
372d855f TI |
1714 | __func__, __LINE__); |
1715 | ||
1716 | /* Report to above ALSA layer */ | |
1717 | if (intelhaddata->stream_info.had_substream != NULL) { | |
1718 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
372d855f TI |
1719 | snd_pcm_stop(intelhaddata->stream_info.had_substream, |
1720 | SNDRV_PCM_STATE_SETUP); | |
1721 | spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irqs); | |
1722 | } | |
1723 | ||
1724 | had_stream->stream_type = HAD_INIT; | |
1725 | spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); | |
1726 | kfree(intelhaddata->chmap->chmap); | |
1727 | intelhaddata->chmap->chmap = NULL; | |
372d855f TI |
1728 | |
1729 | return 0; | |
1730 | } | |
1731 | ||
1732 | /* PCM operations structure and the calls back for the same */ | |
1733 | static struct snd_pcm_ops snd_intelhad_playback_ops = { | |
5dab11d8 JA |
1734 | .open = snd_intelhad_open, |
1735 | .close = snd_intelhad_close, | |
1736 | .ioctl = snd_pcm_lib_ioctl, | |
1737 | .hw_params = snd_intelhad_hw_params, | |
1738 | .hw_free = snd_intelhad_hw_free, | |
1739 | .prepare = snd_intelhad_pcm_prepare, | |
1740 | .trigger = snd_intelhad_pcm_trigger, | |
1741 | .pointer = snd_intelhad_pcm_pointer, | |
1742 | .mmap = snd_intelhad_pcm_mmap, | |
1743 | }; | |
1744 | ||
5dab11d8 JA |
1745 | static int had_iec958_info(struct snd_kcontrol *kcontrol, |
1746 | struct snd_ctl_elem_info *uinfo) | |
1747 | { | |
1748 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
1749 | uinfo->count = 1; | |
1750 | return 0; | |
1751 | } | |
1752 | ||
1753 | static int had_iec958_get(struct snd_kcontrol *kcontrol, | |
1754 | struct snd_ctl_elem_value *ucontrol) | |
1755 | { | |
1756 | struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol); | |
1757 | ||
1758 | ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff; | |
1759 | ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff; | |
1760 | ucontrol->value.iec958.status[2] = | |
1761 | (intelhaddata->aes_bits >> 16) & 0xff; | |
1762 | ucontrol->value.iec958.status[3] = | |
1763 | (intelhaddata->aes_bits >> 24) & 0xff; | |
1764 | return 0; | |
1765 | } | |
372d855f | 1766 | |
5dab11d8 JA |
1767 | static int had_iec958_mask_get(struct snd_kcontrol *kcontrol, |
1768 | struct snd_ctl_elem_value *ucontrol) | |
1769 | { | |
1770 | ucontrol->value.iec958.status[0] = 0xff; | |
1771 | ucontrol->value.iec958.status[1] = 0xff; | |
1772 | ucontrol->value.iec958.status[2] = 0xff; | |
1773 | ucontrol->value.iec958.status[3] = 0xff; | |
1774 | return 0; | |
1775 | } | |
372d855f | 1776 | |
5dab11d8 JA |
1777 | static int had_iec958_put(struct snd_kcontrol *kcontrol, |
1778 | struct snd_ctl_elem_value *ucontrol) | |
1779 | { | |
1780 | unsigned int val; | |
1781 | struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol); | |
1782 | ||
5dab11d8 JA |
1783 | val = (ucontrol->value.iec958.status[0] << 0) | |
1784 | (ucontrol->value.iec958.status[1] << 8) | | |
1785 | (ucontrol->value.iec958.status[2] << 16) | | |
1786 | (ucontrol->value.iec958.status[3] << 24); | |
1787 | if (intelhaddata->aes_bits != val) { | |
1788 | intelhaddata->aes_bits = val; | |
1789 | return 1; | |
1790 | } | |
1791 | return 1; | |
1792 | } | |
1793 | ||
1794 | static struct snd_kcontrol_new had_control_iec958_mask = { | |
1795 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1796 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1797 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK), | |
1798 | .info = had_iec958_info, /* shared */ | |
1799 | .get = had_iec958_mask_get, | |
1800 | }; | |
1801 | ||
1802 | static struct snd_kcontrol_new had_control_iec958 = { | |
1803 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
1804 | .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), | |
1805 | .info = had_iec958_info, | |
1806 | .get = had_iec958_get, | |
1807 | .put = had_iec958_put | |
1808 | }; | |
1809 | ||
da864809 TI |
1810 | static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id) |
1811 | { | |
1812 | struct snd_intelhad *ctx = dev_id; | |
1813 | u32 audio_stat, audio_reg; | |
1814 | ||
1815 | audio_reg = AUD_HDMI_STATUS_v2; | |
1816 | mid_hdmi_audio_read(ctx, audio_reg, &audio_stat); | |
1817 | ||
1818 | if (audio_stat & HDMI_AUDIO_UNDERRUN) { | |
1819 | mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN); | |
1820 | had_process_buffer_underrun(ctx); | |
1821 | } | |
1822 | ||
1823 | if (audio_stat & HDMI_AUDIO_BUFFER_DONE) { | |
1824 | mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE); | |
1825 | had_process_buffer_done(ctx); | |
1826 | } | |
1827 | ||
1828 | return IRQ_HANDLED; | |
1829 | } | |
1830 | ||
1831 | static void notify_audio_lpe(struct platform_device *pdev) | |
1832 | { | |
1833 | struct snd_intelhad *ctx = platform_get_drvdata(pdev); | |
da864809 | 1834 | |
99b2ab9d TI |
1835 | schedule_work(&ctx->hdmi_audio_wq); |
1836 | } | |
da864809 | 1837 | |
99b2ab9d TI |
1838 | static void had_audio_wq(struct work_struct *work) |
1839 | { | |
1840 | struct snd_intelhad *ctx = | |
1841 | container_of(work, struct snd_intelhad, hdmi_audio_wq); | |
1842 | struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data; | |
da864809 | 1843 | |
99b2ab9d TI |
1844 | if (!pdata->hdmi_connected) { |
1845 | dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n", | |
1846 | __func__); | |
da864809 | 1847 | |
99b2ab9d TI |
1848 | if (ctx->state != hdmi_connector_status_connected) { |
1849 | dev_dbg(ctx->dev, "%s: Already Unplugged!\n", | |
da864809 | 1850 | __func__); |
99b2ab9d TI |
1851 | return; |
1852 | } | |
1853 | ||
1854 | ctx->state = hdmi_connector_status_disconnected; | |
1855 | had_process_hot_unplug(ctx); | |
da864809 TI |
1856 | |
1857 | } else { | |
1858 | struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld; | |
1859 | ||
1860 | switch (eld->pipe_id) { | |
1861 | case 0: | |
1862 | ctx->had_config_offset = AUDIO_HDMI_CONFIG_A; | |
1863 | break; | |
1864 | case 1: | |
1865 | ctx->had_config_offset = AUDIO_HDMI_CONFIG_B; | |
1866 | break; | |
1867 | case 2: | |
1868 | ctx->had_config_offset = AUDIO_HDMI_CONFIG_C; | |
1869 | break; | |
1870 | default: | |
99b2ab9d | 1871 | dev_dbg(ctx->dev, "Invalid pipe %d\n", |
da864809 TI |
1872 | eld->pipe_id); |
1873 | break; | |
1874 | } | |
1875 | ||
1876 | memcpy(&ctx->eld, eld->eld_data, sizeof(ctx->eld)); | |
1877 | ||
1878 | had_process_hot_plug(ctx); | |
1879 | ||
1880 | ctx->state = hdmi_connector_status_connected; | |
1881 | ||
99b2ab9d | 1882 | dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n", |
da864809 TI |
1883 | __func__, eld->port_id, pdata->tmds_clock_speed); |
1884 | ||
1885 | if (pdata->tmds_clock_speed) { | |
1886 | ctx->tmds_clock_speed = pdata->tmds_clock_speed; | |
1887 | ctx->dp_output = pdata->dp_output; | |
1888 | ctx->link_rate = pdata->link_rate; | |
1889 | ||
1890 | /* Process mode change if stream is active */ | |
1891 | if (ctx->stream_data.stream_type == HAD_RUNNING_STREAM) | |
1892 | hdmi_audio_mode_change(ctx); | |
1893 | } | |
1894 | } | |
1895 | } | |
1896 | ||
1897 | /* release resources */ | |
1898 | static void hdmi_lpe_audio_free(struct snd_card *card) | |
1899 | { | |
1900 | struct snd_intelhad *ctx = card->private_data; | |
1901 | ||
99b2ab9d TI |
1902 | cancel_work_sync(&ctx->hdmi_audio_wq); |
1903 | ||
da864809 TI |
1904 | if (ctx->mmio_start) |
1905 | iounmap(ctx->mmio_start); | |
1906 | if (ctx->irq >= 0) | |
1907 | free_irq(ctx->irq, ctx); | |
1908 | } | |
1909 | ||
79dda75a | 1910 | /* |
da864809 | 1911 | * hdmi_lpe_audio_probe - start bridge with i915 |
5dab11d8 | 1912 | * |
da864809 | 1913 | * This function is called when the i915 driver creates the |
2e52f5e5 | 1914 | * hdmi-lpe-audio platform device. |
5dab11d8 | 1915 | */ |
da864809 | 1916 | static int hdmi_lpe_audio_probe(struct platform_device *pdev) |
5dab11d8 | 1917 | { |
5dab11d8 | 1918 | struct snd_card *card; |
da864809 TI |
1919 | struct snd_intelhad *ctx; |
1920 | struct snd_pcm *pcm; | |
1921 | struct intel_hdmi_lpe_audio_pdata *pdata; | |
1922 | int irq; | |
1923 | struct resource *res_mmio; | |
1924 | int ret; | |
1925 | unsigned long flags; | |
1926 | ||
da864809 TI |
1927 | dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask); |
1928 | ||
1929 | pdata = pdev->dev.platform_data; | |
1930 | if (!pdata) { | |
1931 | dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__); | |
1932 | return -EINVAL; | |
1933 | } | |
5dab11d8 | 1934 | |
da864809 TI |
1935 | /* get resources */ |
1936 | irq = platform_get_irq(pdev, 0); | |
1937 | if (irq < 0) { | |
1938 | dev_err(&pdev->dev, "Could not get irq resource\n"); | |
1939 | return -ENODEV; | |
1940 | } | |
1941 | ||
1942 | res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1943 | if (!res_mmio) { | |
1944 | dev_err(&pdev->dev, "Could not get IO_MEM resources\n"); | |
1945 | return -ENXIO; | |
1946 | } | |
5dab11d8 | 1947 | |
5647aec2 | 1948 | /* create a card instance with ALSA framework */ |
da864809 TI |
1949 | ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id, |
1950 | THIS_MODULE, sizeof(*ctx), &card); | |
1951 | if (ret) | |
1952 | return ret; | |
1953 | ||
1954 | ctx = card->private_data; | |
1955 | spin_lock_init(&ctx->had_spinlock); | |
1956 | ctx->drv_status = HAD_DRV_DISCONNECTED; | |
1957 | ctx->dev = &pdev->dev; | |
1958 | ctx->card = card; | |
e9d65abf | 1959 | ctx->flag_underrun = false; |
da864809 TI |
1960 | ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; |
1961 | strcpy(card->driver, INTEL_HAD); | |
1962 | strcpy(card->shortname, INTEL_HAD); | |
1963 | ||
1964 | ctx->irq = -1; | |
1965 | ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5; | |
99b2ab9d | 1966 | INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq); |
da864809 TI |
1967 | ctx->state = hdmi_connector_status_disconnected; |
1968 | ||
1969 | card->private_free = hdmi_lpe_audio_free; | |
1970 | ||
1971 | /* assume pipe A as default */ | |
1972 | ctx->had_config_offset = AUDIO_HDMI_CONFIG_A; | |
1973 | ||
1974 | platform_set_drvdata(pdev, ctx); | |
1975 | ||
1976 | dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n", | |
1977 | __func__, (unsigned int)res_mmio->start, | |
1978 | (unsigned int)res_mmio->end); | |
1979 | ||
1980 | ctx->mmio_start = ioremap_nocache(res_mmio->start, | |
1981 | (size_t)(resource_size(res_mmio))); | |
1982 | if (!ctx->mmio_start) { | |
1983 | dev_err(&pdev->dev, "Could not get ioremap\n"); | |
1984 | ret = -EACCES; | |
1985 | goto err; | |
1986 | } | |
5dab11d8 | 1987 | |
da864809 TI |
1988 | /* setup interrupt handler */ |
1989 | ret = request_irq(irq, display_pipe_interrupt_handler, 0, | |
1990 | pdev->name, ctx); | |
1991 | if (ret < 0) { | |
1992 | dev_err(&pdev->dev, "request_irq failed\n"); | |
1993 | goto err; | |
1994 | } | |
5dab11d8 | 1995 | |
da864809 TI |
1996 | ctx->irq = irq; |
1997 | ||
1998 | ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS, | |
1999 | MAX_CAP_STREAMS, &pcm); | |
2000 | if (ret) | |
5dab11d8 JA |
2001 | goto err; |
2002 | ||
2003 | /* setup private data which can be retrieved when required */ | |
da864809 | 2004 | pcm->private_data = ctx; |
5dab11d8 JA |
2005 | pcm->info_flags = 0; |
2006 | strncpy(pcm->name, card->shortname, strlen(card->shortname)); | |
da864809 | 2007 | /* setup the ops for playabck */ |
5dab11d8 JA |
2008 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
2009 | &snd_intelhad_playback_ops); | |
2010 | /* allocate dma pages for ALSA stream operations | |
2011 | * memory allocated is based on size, not max value | |
2012 | * thus using same argument for max & size | |
2013 | */ | |
da864809 | 2014 | snd_pcm_lib_preallocate_pages_for_all(pcm, |
5dab11d8 JA |
2015 | SNDRV_DMA_TYPE_DEV, NULL, |
2016 | HAD_MAX_BUFFER, HAD_MAX_BUFFER); | |
5dab11d8 | 2017 | |
5dab11d8 | 2018 | /* IEC958 controls */ |
da864809 TI |
2019 | ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx)); |
2020 | if (ret < 0) | |
5dab11d8 | 2021 | goto err; |
da864809 TI |
2022 | ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx)); |
2023 | if (ret < 0) | |
5dab11d8 JA |
2024 | goto err; |
2025 | ||
2026 | init_channel_allocations(); | |
2027 | ||
2028 | /* Register channel map controls */ | |
da864809 TI |
2029 | ret = had_register_chmap_ctls(ctx, pcm); |
2030 | if (ret < 0) | |
5dab11d8 JA |
2031 | goto err; |
2032 | ||
da864809 TI |
2033 | ret = snd_card_register(card); |
2034 | if (ret) | |
36ec0d99 TI |
2035 | goto err; |
2036 | ||
da864809 TI |
2037 | spin_lock_irqsave(&pdata->lpe_audio_slock, flags); |
2038 | pdata->notify_audio_lpe = notify_audio_lpe; | |
99b2ab9d | 2039 | pdata->notify_pending = false; |
da864809 TI |
2040 | spin_unlock_irqrestore(&pdata->lpe_audio_slock, flags); |
2041 | ||
2042 | pm_runtime_set_active(&pdev->dev); | |
2043 | pm_runtime_enable(&pdev->dev); | |
2044 | ||
99b2ab9d | 2045 | dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__); |
da864809 | 2046 | schedule_work(&ctx->hdmi_audio_wq); |
5dab11d8 | 2047 | |
79dda75a | 2048 | return 0; |
5647aec2 | 2049 | |
5dab11d8 JA |
2050 | err: |
2051 | snd_card_free(card); | |
da864809 | 2052 | return ret; |
5dab11d8 JA |
2053 | } |
2054 | ||
79dda75a | 2055 | /* |
da864809 | 2056 | * hdmi_lpe_audio_remove - stop bridge with i915 |
5dab11d8 | 2057 | * |
2e52f5e5 | 2058 | * This function is called when the platform device is destroyed. |
5dab11d8 | 2059 | */ |
da864809 | 2060 | static int hdmi_lpe_audio_remove(struct platform_device *pdev) |
5dab11d8 | 2061 | { |
da864809 | 2062 | struct snd_intelhad *ctx = platform_get_drvdata(pdev); |
5dab11d8 | 2063 | |
da864809 TI |
2064 | if (ctx->drv_status != HAD_DRV_DISCONNECTED) |
2065 | snd_intelhad_enable_audio_int(ctx, false); | |
2066 | snd_card_free(ctx->card); | |
5dab11d8 JA |
2067 | return 0; |
2068 | } | |
2069 | ||
da864809 TI |
2070 | static struct platform_driver hdmi_lpe_audio_driver = { |
2071 | .driver = { | |
2072 | .name = "hdmi-lpe-audio", | |
2073 | }, | |
2074 | .probe = hdmi_lpe_audio_probe, | |
2075 | .remove = hdmi_lpe_audio_remove, | |
2076 | .suspend = hdmi_lpe_audio_suspend, | |
2077 | .resume = hdmi_lpe_audio_resume | |
2078 | }; | |
2079 | ||
2080 | module_platform_driver(hdmi_lpe_audio_driver); | |
2081 | MODULE_ALIAS("platform:hdmi_lpe_audio"); | |
2082 | ||
5dab11d8 JA |
2083 | MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>"); |
2084 | MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>"); | |
2085 | MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>"); | |
2086 | MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>"); | |
2087 | MODULE_DESCRIPTION("Intel HDMI Audio driver"); | |
2088 | MODULE_LICENSE("GPL v2"); | |
2089 | MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}"); |