Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Driver for CS4231 sound chips found on Sparcs. | |
3 | * Copyright (C) 2002 David S. Miller <davem@redhat.com> | |
4 | * | |
5 | * Based entirely upon drivers/sbus/audio/cs4231.c which is: | |
9e9abb4f | 6 | * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) |
1da177e4 | 7 | * and also sound/isa/cs423x/cs4231_lib.c which is: |
c1017a4c | 8 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/moduleparam.h> | |
9e9abb4f KH |
18 | #include <linux/irq.h> |
19 | #include <linux/io.h> | |
20 | ||
1da177e4 | 21 | |
1da177e4 LT |
22 | #include <sound/core.h> |
23 | #include <sound/pcm.h> | |
24 | #include <sound/info.h> | |
25 | #include <sound/control.h> | |
26 | #include <sound/timer.h> | |
27 | #include <sound/initval.h> | |
28 | #include <sound/pcm_params.h> | |
29 | ||
1da177e4 LT |
30 | #ifdef CONFIG_SBUS |
31 | #define SBUS_SUPPORT | |
1da177e4 LT |
32 | #include <asm/sbus.h> |
33 | #endif | |
34 | ||
35 | #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) | |
36 | #define EBUS_SUPPORT | |
1da177e4 LT |
37 | #include <linux/pci.h> |
38 | #include <asm/ebus.h> | |
39 | #endif | |
40 | ||
41 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
42 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
9e9abb4f KH |
43 | /* Enable this card */ |
44 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
1da177e4 LT |
45 | |
46 | module_param_array(index, int, NULL, 0444); | |
47 | MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); | |
48 | module_param_array(id, charp, NULL, 0444); | |
49 | MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); | |
50 | module_param_array(enable, bool, NULL, 0444); | |
51 | MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); | |
52 | MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); | |
53 | MODULE_DESCRIPTION("Sun CS4231"); | |
54 | MODULE_LICENSE("GPL"); | |
55 | MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}"); | |
56 | ||
5a820fa7 | 57 | #ifdef SBUS_SUPPORT |
be9b7e8c | 58 | struct sbus_dma_info { |
9e9abb4f KH |
59 | spinlock_t lock; /* DMA access lock */ |
60 | int dir; | |
61 | void __iomem *regs; | |
be9b7e8c | 62 | }; |
5a820fa7 GC |
63 | #endif |
64 | ||
4f3f2f6f | 65 | struct snd_cs4231; |
be9b7e8c | 66 | struct cs4231_dma_control { |
9e9abb4f KH |
67 | void (*prepare)(struct cs4231_dma_control *dma_cont, |
68 | int dir); | |
69 | void (*enable)(struct cs4231_dma_control *dma_cont, int on); | |
70 | int (*request)(struct cs4231_dma_control *dma_cont, | |
71 | dma_addr_t bus_addr, size_t len); | |
72 | unsigned int (*address)(struct cs4231_dma_control *dma_cont); | |
73 | void (*preallocate)(struct snd_cs4231 *chip, | |
74 | struct snd_pcm *pcm); | |
1da177e4 | 75 | #ifdef EBUS_SUPPORT |
b128254f | 76 | struct ebus_dma_info ebus_info; |
1da177e4 | 77 | #endif |
5a820fa7 | 78 | #ifdef SBUS_SUPPORT |
b128254f | 79 | struct sbus_dma_info sbus_info; |
5a820fa7 | 80 | #endif |
be9b7e8c | 81 | }; |
b128254f GC |
82 | |
83 | struct snd_cs4231 { | |
9e9abb4f | 84 | spinlock_t lock; /* registers access lock */ |
b128254f GC |
85 | void __iomem *port; |
86 | ||
be9b7e8c TI |
87 | struct cs4231_dma_control p_dma; |
88 | struct cs4231_dma_control c_dma; | |
5a820fa7 | 89 | |
1da177e4 LT |
90 | u32 flags; |
91 | #define CS4231_FLAG_EBUS 0x00000001 | |
92 | #define CS4231_FLAG_PLAYBACK 0x00000002 | |
93 | #define CS4231_FLAG_CAPTURE 0x00000004 | |
94 | ||
be9b7e8c TI |
95 | struct snd_card *card; |
96 | struct snd_pcm *pcm; | |
97 | struct snd_pcm_substream *playback_substream; | |
1da177e4 | 98 | unsigned int p_periods_sent; |
be9b7e8c | 99 | struct snd_pcm_substream *capture_substream; |
1da177e4 | 100 | unsigned int c_periods_sent; |
be9b7e8c | 101 | struct snd_timer *timer; |
1da177e4 LT |
102 | |
103 | unsigned short mode; | |
104 | #define CS4231_MODE_NONE 0x0000 | |
105 | #define CS4231_MODE_PLAY 0x0001 | |
106 | #define CS4231_MODE_RECORD 0x0002 | |
107 | #define CS4231_MODE_TIMER 0x0004 | |
9e9abb4f KH |
108 | #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ |
109 | CS4231_MODE_TIMER) | |
1da177e4 LT |
110 | |
111 | unsigned char image[32]; /* registers image */ | |
112 | int mce_bit; | |
113 | int calibrate_mute; | |
9e9abb4f KH |
114 | struct mutex mce_mutex; /* mutex for mce register */ |
115 | struct mutex open_mutex; /* mutex for ALSA open/close */ | |
1da177e4 LT |
116 | |
117 | union { | |
118 | #ifdef SBUS_SUPPORT | |
119 | struct sbus_dev *sdev; | |
120 | #endif | |
121 | #ifdef EBUS_SUPPORT | |
122 | struct pci_dev *pdev; | |
123 | #endif | |
124 | } dev_u; | |
125 | unsigned int irq[2]; | |
126 | unsigned int regs_size; | |
127 | struct snd_cs4231 *next; | |
b128254f | 128 | }; |
1da177e4 | 129 | |
be9b7e8c | 130 | static struct snd_cs4231 *cs4231_list; |
1da177e4 LT |
131 | |
132 | /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for | |
133 | * now.... -DaveM | |
134 | */ | |
135 | ||
136 | /* IO ports */ | |
7e52f3da | 137 | #include <sound/cs4231-regs.h> |
1da177e4 LT |
138 | |
139 | /* XXX offsets are different than PC ISA chips... */ | |
7e52f3da | 140 | #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) |
1da177e4 LT |
141 | |
142 | /* SBUS DMA register defines. */ | |
143 | ||
144 | #define APCCSR 0x10UL /* APC DMA CSR */ | |
145 | #define APCCVA 0x20UL /* APC Capture DMA Address */ | |
146 | #define APCCC 0x24UL /* APC Capture Count */ | |
147 | #define APCCNVA 0x28UL /* APC Capture DMA Next Address */ | |
148 | #define APCCNC 0x2cUL /* APC Capture Next Count */ | |
149 | #define APCPVA 0x30UL /* APC Play DMA Address */ | |
150 | #define APCPC 0x34UL /* APC Play Count */ | |
151 | #define APCPNVA 0x38UL /* APC Play DMA Next Address */ | |
152 | #define APCPNC 0x3cUL /* APC Play Next Count */ | |
153 | ||
5a820fa7 GC |
154 | /* Defines for SBUS DMA-routines */ |
155 | ||
156 | #define APCVA 0x0UL /* APC DMA Address */ | |
157 | #define APCC 0x4UL /* APC Count */ | |
158 | #define APCNVA 0x8UL /* APC DMA Next Address */ | |
159 | #define APCNC 0xcUL /* APC Next Count */ | |
160 | #define APC_PLAY 0x30UL /* Play registers start at 0x30 */ | |
161 | #define APC_RECORD 0x20UL /* Record registers start at 0x20 */ | |
162 | ||
1da177e4 LT |
163 | /* APCCSR bits */ |
164 | ||
165 | #define APC_INT_PENDING 0x800000 /* Interrupt Pending */ | |
166 | #define APC_PLAY_INT 0x400000 /* Playback interrupt */ | |
167 | #define APC_CAPT_INT 0x200000 /* Capture interrupt */ | |
168 | #define APC_GENL_INT 0x100000 /* General interrupt */ | |
169 | #define APC_XINT_ENA 0x80000 /* General ext int. enable */ | |
170 | #define APC_XINT_PLAY 0x40000 /* Playback ext intr */ | |
171 | #define APC_XINT_CAPT 0x20000 /* Capture ext intr */ | |
172 | #define APC_XINT_GENL 0x10000 /* Error ext intr */ | |
173 | #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ | |
174 | #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ | |
175 | #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ | |
176 | #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ | |
177 | #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ | |
178 | #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ | |
179 | #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ | |
180 | #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ | |
181 | #define APC_PPAUSE 0x80 /* Pause the play DMA */ | |
182 | #define APC_CPAUSE 0x40 /* Pause the capture DMA */ | |
183 | #define APC_CDC_RESET 0x20 /* CODEC RESET */ | |
184 | #define APC_PDMA_READY 0x08 /* Play DMA Go */ | |
185 | #define APC_CDMA_READY 0x04 /* Capture DMA Go */ | |
186 | #define APC_CHIP_RESET 0x01 /* Reset the chip */ | |
187 | ||
188 | /* EBUS DMA register offsets */ | |
189 | ||
190 | #define EBDMA_CSR 0x00UL /* Control/Status */ | |
191 | #define EBDMA_ADDR 0x04UL /* DMA Address */ | |
192 | #define EBDMA_COUNT 0x08UL /* DMA Count */ | |
193 | ||
194 | /* | |
195 | * Some variables | |
196 | */ | |
197 | ||
198 | static unsigned char freq_bits[14] = { | |
199 | /* 5510 */ 0x00 | CS4231_XTAL2, | |
200 | /* 6620 */ 0x0E | CS4231_XTAL2, | |
201 | /* 8000 */ 0x00 | CS4231_XTAL1, | |
202 | /* 9600 */ 0x0E | CS4231_XTAL1, | |
203 | /* 11025 */ 0x02 | CS4231_XTAL2, | |
204 | /* 16000 */ 0x02 | CS4231_XTAL1, | |
205 | /* 18900 */ 0x04 | CS4231_XTAL2, | |
206 | /* 22050 */ 0x06 | CS4231_XTAL2, | |
207 | /* 27042 */ 0x04 | CS4231_XTAL1, | |
208 | /* 32000 */ 0x06 | CS4231_XTAL1, | |
209 | /* 33075 */ 0x0C | CS4231_XTAL2, | |
210 | /* 37800 */ 0x08 | CS4231_XTAL2, | |
211 | /* 44100 */ 0x0A | CS4231_XTAL2, | |
212 | /* 48000 */ 0x0C | CS4231_XTAL1 | |
213 | }; | |
214 | ||
215 | static unsigned int rates[14] = { | |
216 | 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, | |
217 | 27042, 32000, 33075, 37800, 44100, 48000 | |
218 | }; | |
219 | ||
be9b7e8c | 220 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
c6c2d57b | 221 | .count = ARRAY_SIZE(rates), |
1da177e4 LT |
222 | .list = rates, |
223 | }; | |
224 | ||
be9b7e8c | 225 | static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) |
1da177e4 LT |
226 | { |
227 | return snd_pcm_hw_constraint_list(runtime, 0, | |
228 | SNDRV_PCM_HW_PARAM_RATE, | |
229 | &hw_constraints_rates); | |
230 | } | |
231 | ||
232 | static unsigned char snd_cs4231_original_image[32] = | |
233 | { | |
234 | 0x00, /* 00/00 - lic */ | |
235 | 0x00, /* 01/01 - ric */ | |
236 | 0x9f, /* 02/02 - la1ic */ | |
237 | 0x9f, /* 03/03 - ra1ic */ | |
238 | 0x9f, /* 04/04 - la2ic */ | |
239 | 0x9f, /* 05/05 - ra2ic */ | |
240 | 0xbf, /* 06/06 - loc */ | |
241 | 0xbf, /* 07/07 - roc */ | |
242 | 0x20, /* 08/08 - pdfr */ | |
243 | CS4231_AUTOCALIB, /* 09/09 - ic */ | |
244 | 0x00, /* 0a/10 - pc */ | |
245 | 0x00, /* 0b/11 - ti */ | |
246 | CS4231_MODE2, /* 0c/12 - mi */ | |
247 | 0x00, /* 0d/13 - lbc */ | |
248 | 0x00, /* 0e/14 - pbru */ | |
249 | 0x00, /* 0f/15 - pbrl */ | |
250 | 0x80, /* 10/16 - afei */ | |
251 | 0x01, /* 11/17 - afeii */ | |
252 | 0x9f, /* 12/18 - llic */ | |
253 | 0x9f, /* 13/19 - rlic */ | |
254 | 0x00, /* 14/20 - tlb */ | |
255 | 0x00, /* 15/21 - thb */ | |
256 | 0x00, /* 16/22 - la3mic/reserved */ | |
257 | 0x00, /* 17/23 - ra3mic/reserved */ | |
258 | 0x00, /* 18/24 - afs */ | |
259 | 0x00, /* 19/25 - lamoc/version */ | |
260 | 0x00, /* 1a/26 - mioc */ | |
261 | 0x00, /* 1b/27 - ramoc/reserved */ | |
262 | 0x20, /* 1c/28 - cdfr */ | |
263 | 0x00, /* 1d/29 - res4 */ | |
264 | 0x00, /* 1e/30 - cbru */ | |
265 | 0x00, /* 1f/31 - cbrl */ | |
266 | }; | |
267 | ||
be9b7e8c | 268 | static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) |
1da177e4 LT |
269 | { |
270 | #ifdef EBUS_SUPPORT | |
c6c2d57b | 271 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 272 | return readb(reg_addr); |
c6c2d57b | 273 | else |
1da177e4 LT |
274 | #endif |
275 | #ifdef SBUS_SUPPORT | |
276 | return sbus_readb(reg_addr); | |
277 | #endif | |
1da177e4 LT |
278 | } |
279 | ||
9e9abb4f KH |
280 | static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, |
281 | void __iomem *reg_addr) | |
1da177e4 LT |
282 | { |
283 | #ifdef EBUS_SUPPORT | |
c6c2d57b | 284 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 285 | return writeb(val, reg_addr); |
c6c2d57b | 286 | else |
1da177e4 LT |
287 | #endif |
288 | #ifdef SBUS_SUPPORT | |
289 | return sbus_writeb(val, reg_addr); | |
290 | #endif | |
1da177e4 LT |
291 | } |
292 | ||
293 | /* | |
294 | * Basic I/O functions | |
295 | */ | |
296 | ||
c6c2d57b | 297 | static void snd_cs4231_ready(struct snd_cs4231 *chip) |
1da177e4 LT |
298 | { |
299 | int timeout; | |
1da177e4 | 300 | |
7e52f3da KH |
301 | for (timeout = 250; timeout > 0; timeout--) { |
302 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
303 | if ((val & CS4231_INIT) == 0) | |
304 | break; | |
305 | udelay(100); | |
306 | } | |
1da177e4 LT |
307 | } |
308 | ||
9e9abb4f KH |
309 | static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, |
310 | unsigned char value) | |
1da177e4 | 311 | { |
c6c2d57b | 312 | snd_cs4231_ready(chip); |
a131430c | 313 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 314 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
315 | snd_printdd("out: auto calibration time out - reg = 0x%x, " |
316 | "value = 0x%x\n", | |
317 | reg, value); | |
a131430c | 318 | #endif |
7e52f3da | 319 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
c6c2d57b | 320 | wmb(); |
7e52f3da | 321 | __cs4231_writeb(chip, value, CS4231U(chip, REG)); |
1da177e4 LT |
322 | mb(); |
323 | } | |
324 | ||
c6c2d57b KH |
325 | static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, |
326 | unsigned char mask, unsigned char value) | |
1da177e4 | 327 | { |
c6c2d57b | 328 | unsigned char tmp = (chip->image[reg] & mask) | value; |
1da177e4 | 329 | |
c6c2d57b KH |
330 | chip->image[reg] = tmp; |
331 | if (!chip->calibrate_mute) | |
332 | snd_cs4231_dout(chip, reg, tmp); | |
333 | } | |
334 | ||
335 | static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, | |
336 | unsigned char value) | |
337 | { | |
338 | snd_cs4231_dout(chip, reg, value); | |
1da177e4 LT |
339 | chip->image[reg] = value; |
340 | mb(); | |
1da177e4 LT |
341 | } |
342 | ||
be9b7e8c | 343 | static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) |
1da177e4 | 344 | { |
c6c2d57b | 345 | snd_cs4231_ready(chip); |
1da177e4 | 346 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 347 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
348 | snd_printdd("in: auto calibration time out - reg = 0x%x\n", |
349 | reg); | |
1da177e4 | 350 | #endif |
7e52f3da | 351 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
1da177e4 | 352 | mb(); |
7e52f3da | 353 | return __cs4231_readb(chip, CS4231U(chip, REG)); |
1da177e4 LT |
354 | } |
355 | ||
1da177e4 LT |
356 | /* |
357 | * CS4231 detection / MCE routines | |
358 | */ | |
359 | ||
be9b7e8c | 360 | static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) |
1da177e4 LT |
361 | { |
362 | int timeout; | |
363 | ||
9e9abb4f | 364 | /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ |
1da177e4 | 365 | for (timeout = 5; timeout > 0; timeout--) |
7e52f3da | 366 | __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
a131430c | 367 | |
1da177e4 | 368 | /* end of cleanup sequence */ |
7e52f3da KH |
369 | for (timeout = 500; timeout > 0; timeout--) { |
370 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
371 | if ((val & CS4231_INIT) == 0) | |
372 | break; | |
c6c2d57b | 373 | msleep(1); |
7e52f3da | 374 | } |
1da177e4 LT |
375 | } |
376 | ||
be9b7e8c | 377 | static void snd_cs4231_mce_up(struct snd_cs4231 *chip) |
1da177e4 LT |
378 | { |
379 | unsigned long flags; | |
380 | int timeout; | |
381 | ||
382 | spin_lock_irqsave(&chip->lock, flags); | |
c6c2d57b | 383 | snd_cs4231_ready(chip); |
1da177e4 | 384 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 385 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
a131430c | 386 | snd_printdd("mce_up - auto calibration time out (0)\n"); |
1da177e4 LT |
387 | #endif |
388 | chip->mce_bit |= CS4231_MCE; | |
7e52f3da | 389 | timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
1da177e4 | 390 | if (timeout == 0x80) |
9e9abb4f KH |
391 | snd_printdd("mce_up [%p]: serious init problem - " |
392 | "codec still busy\n", | |
393 | chip->port); | |
1da177e4 | 394 | if (!(timeout & CS4231_MCE)) |
7e52f3da KH |
395 | __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), |
396 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
397 | spin_unlock_irqrestore(&chip->lock, flags); |
398 | } | |
399 | ||
be9b7e8c | 400 | static void snd_cs4231_mce_down(struct snd_cs4231 *chip) |
1da177e4 | 401 | { |
9823adf6 KH |
402 | unsigned long flags, timeout; |
403 | int reg; | |
1da177e4 | 404 | |
1da177e4 | 405 | snd_cs4231_busy_wait(chip); |
9823adf6 | 406 | spin_lock_irqsave(&chip->lock, flags); |
1da177e4 | 407 | #ifdef CONFIG_SND_DEBUG |
7e52f3da KH |
408 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
409 | snd_printdd("mce_down [%p] - auto calibration time out (0)\n", | |
410 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
411 | #endif |
412 | chip->mce_bit &= ~CS4231_MCE; | |
9823adf6 KH |
413 | reg = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
414 | __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f), | |
7e52f3da | 415 | CS4231U(chip, REGSEL)); |
9823adf6 KH |
416 | if (reg == 0x80) |
417 | snd_printdd("mce_down [%p]: serious init problem " | |
418 | "- codec still busy\n", chip->port); | |
419 | if ((reg & CS4231_MCE) == 0) { | |
1da177e4 LT |
420 | spin_unlock_irqrestore(&chip->lock, flags); |
421 | return; | |
422 | } | |
1da177e4 | 423 | |
56f91585 | 424 | /* |
9823adf6 | 425 | * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low. |
56f91585 | 426 | */ |
9823adf6 KH |
427 | timeout = jiffies + msecs_to_jiffies(250); |
428 | do { | |
1da177e4 | 429 | spin_unlock_irqrestore(&chip->lock, flags); |
b875d650 | 430 | msleep(1); |
1da177e4 | 431 | spin_lock_irqsave(&chip->lock, flags); |
9823adf6 KH |
432 | reg = snd_cs4231_in(chip, CS4231_TEST_INIT); |
433 | reg &= CS4231_CALIB_IN_PROGRESS; | |
434 | } while (reg && time_before(jiffies, timeout)); | |
1da177e4 | 435 | spin_unlock_irqrestore(&chip->lock, flags); |
9823adf6 KH |
436 | |
437 | if (reg) | |
438 | snd_printk(KERN_ERR | |
439 | "mce_down - auto calibration time out (2)\n"); | |
1da177e4 LT |
440 | } |
441 | ||
be9b7e8c TI |
442 | static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, |
443 | struct snd_pcm_substream *substream, | |
444 | unsigned int *periods_sent) | |
1da177e4 | 445 | { |
be9b7e8c | 446 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
447 | |
448 | while (1) { | |
a131430c CZ |
449 | unsigned int period_size = snd_pcm_lib_period_bytes(substream); |
450 | unsigned int offset = period_size * (*periods_sent); | |
1da177e4 | 451 | |
817dd6ee | 452 | BUG_ON(period_size >= (1 << 24)); |
1da177e4 | 453 | |
9e9abb4f KH |
454 | if (dma_cont->request(dma_cont, |
455 | runtime->dma_addr + offset, period_size)) | |
1da177e4 | 456 | return; |
1da177e4 LT |
457 | (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; |
458 | } | |
459 | } | |
a131430c | 460 | |
be9b7e8c TI |
461 | static void cs4231_dma_trigger(struct snd_pcm_substream *substream, |
462 | unsigned int what, int on) | |
1da177e4 | 463 | { |
be9b7e8c TI |
464 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
465 | struct cs4231_dma_control *dma_cont; | |
a131430c | 466 | |
5a820fa7 | 467 | if (what & CS4231_PLAYBACK_ENABLE) { |
b128254f | 468 | dma_cont = &chip->p_dma; |
a131430c | 469 | if (on) { |
b128254f GC |
470 | dma_cont->prepare(dma_cont, 0); |
471 | dma_cont->enable(dma_cont, 1); | |
472 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
473 | chip->playback_substream, |
474 | &chip->p_periods_sent); | |
a131430c | 475 | } else { |
b128254f | 476 | dma_cont->enable(dma_cont, 0); |
a131430c | 477 | } |
5a820fa7 GC |
478 | } |
479 | if (what & CS4231_RECORD_ENABLE) { | |
b128254f | 480 | dma_cont = &chip->c_dma; |
a131430c | 481 | if (on) { |
b128254f GC |
482 | dma_cont->prepare(dma_cont, 1); |
483 | dma_cont->enable(dma_cont, 1); | |
484 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
485 | chip->capture_substream, |
486 | &chip->c_periods_sent); | |
a131430c | 487 | } else { |
b128254f | 488 | dma_cont->enable(dma_cont, 0); |
a131430c | 489 | } |
a131430c | 490 | } |
1da177e4 LT |
491 | } |
492 | ||
be9b7e8c | 493 | static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 494 | { |
be9b7e8c | 495 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
496 | int result = 0; |
497 | ||
498 | switch (cmd) { | |
499 | case SNDRV_PCM_TRIGGER_START: | |
500 | case SNDRV_PCM_TRIGGER_STOP: | |
501 | { | |
502 | unsigned int what = 0; | |
be9b7e8c | 503 | struct snd_pcm_substream *s; |
1da177e4 LT |
504 | unsigned long flags; |
505 | ||
ef991b95 | 506 | snd_pcm_group_for_each_entry(s, substream) { |
1da177e4 LT |
507 | if (s == chip->playback_substream) { |
508 | what |= CS4231_PLAYBACK_ENABLE; | |
509 | snd_pcm_trigger_done(s, substream); | |
510 | } else if (s == chip->capture_substream) { | |
511 | what |= CS4231_RECORD_ENABLE; | |
512 | snd_pcm_trigger_done(s, substream); | |
513 | } | |
514 | } | |
515 | ||
1da177e4 LT |
516 | spin_lock_irqsave(&chip->lock, flags); |
517 | if (cmd == SNDRV_PCM_TRIGGER_START) { | |
a131430c | 518 | cs4231_dma_trigger(substream, what, 1); |
1da177e4 | 519 | chip->image[CS4231_IFACE_CTRL] |= what; |
1da177e4 | 520 | } else { |
a131430c | 521 | cs4231_dma_trigger(substream, what, 0); |
1da177e4 LT |
522 | chip->image[CS4231_IFACE_CTRL] &= ~what; |
523 | } | |
524 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, | |
525 | chip->image[CS4231_IFACE_CTRL]); | |
526 | spin_unlock_irqrestore(&chip->lock, flags); | |
527 | break; | |
528 | } | |
529 | default: | |
530 | result = -EINVAL; | |
531 | break; | |
532 | } | |
a131430c | 533 | |
1da177e4 LT |
534 | return result; |
535 | } | |
536 | ||
537 | /* | |
538 | * CODEC I/O | |
539 | */ | |
540 | ||
541 | static unsigned char snd_cs4231_get_rate(unsigned int rate) | |
542 | { | |
543 | int i; | |
544 | ||
545 | for (i = 0; i < 14; i++) | |
546 | if (rate == rates[i]) | |
547 | return freq_bits[i]; | |
9e9abb4f | 548 | |
1da177e4 LT |
549 | return freq_bits[13]; |
550 | } | |
551 | ||
9e9abb4f KH |
552 | static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, |
553 | int channels) | |
1da177e4 LT |
554 | { |
555 | unsigned char rformat; | |
556 | ||
557 | rformat = CS4231_LINEAR_8; | |
558 | switch (format) { | |
9e9abb4f KH |
559 | case SNDRV_PCM_FORMAT_MU_LAW: |
560 | rformat = CS4231_ULAW_8; | |
561 | break; | |
562 | case SNDRV_PCM_FORMAT_A_LAW: | |
563 | rformat = CS4231_ALAW_8; | |
564 | break; | |
565 | case SNDRV_PCM_FORMAT_S16_LE: | |
566 | rformat = CS4231_LINEAR_16; | |
567 | break; | |
568 | case SNDRV_PCM_FORMAT_S16_BE: | |
569 | rformat = CS4231_LINEAR_16_BIG; | |
570 | break; | |
571 | case SNDRV_PCM_FORMAT_IMA_ADPCM: | |
572 | rformat = CS4231_ADPCM_16; | |
573 | break; | |
1da177e4 LT |
574 | } |
575 | if (channels > 1) | |
576 | rformat |= CS4231_STEREO; | |
1da177e4 LT |
577 | return rformat; |
578 | } | |
579 | ||
be9b7e8c | 580 | static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) |
1da177e4 LT |
581 | { |
582 | unsigned long flags; | |
583 | ||
584 | mute = mute ? 1 : 0; | |
585 | spin_lock_irqsave(&chip->lock, flags); | |
586 | if (chip->calibrate_mute == mute) { | |
587 | spin_unlock_irqrestore(&chip->lock, flags); | |
588 | return; | |
589 | } | |
590 | if (!mute) { | |
591 | snd_cs4231_dout(chip, CS4231_LEFT_INPUT, | |
592 | chip->image[CS4231_LEFT_INPUT]); | |
593 | snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, | |
594 | chip->image[CS4231_RIGHT_INPUT]); | |
595 | snd_cs4231_dout(chip, CS4231_LOOPBACK, | |
596 | chip->image[CS4231_LOOPBACK]); | |
597 | } | |
598 | snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, | |
599 | mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); | |
600 | snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, | |
601 | mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); | |
602 | snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, | |
603 | mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); | |
604 | snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, | |
605 | mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); | |
606 | snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, | |
607 | mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); | |
608 | snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, | |
609 | mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); | |
610 | snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, | |
611 | mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); | |
612 | snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, | |
613 | mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); | |
614 | snd_cs4231_dout(chip, CS4231_MONO_CTRL, | |
615 | mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); | |
616 | chip->calibrate_mute = mute; | |
617 | spin_unlock_irqrestore(&chip->lock, flags); | |
618 | } | |
619 | ||
9e9abb4f KH |
620 | static void snd_cs4231_playback_format(struct snd_cs4231 *chip, |
621 | struct snd_pcm_hw_params *params, | |
1da177e4 LT |
622 | unsigned char pdfr) |
623 | { | |
624 | unsigned long flags; | |
625 | ||
12aa7579 | 626 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
627 | snd_cs4231_calibrate_mute(chip, 1); |
628 | ||
629 | snd_cs4231_mce_up(chip); | |
630 | ||
631 | spin_lock_irqsave(&chip->lock, flags); | |
632 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
633 | (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? | |
634 | (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : | |
635 | pdfr); | |
636 | spin_unlock_irqrestore(&chip->lock, flags); | |
637 | ||
638 | snd_cs4231_mce_down(chip); | |
639 | ||
640 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 641 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
642 | } |
643 | ||
9e9abb4f KH |
644 | static void snd_cs4231_capture_format(struct snd_cs4231 *chip, |
645 | struct snd_pcm_hw_params *params, | |
646 | unsigned char cdfr) | |
1da177e4 LT |
647 | { |
648 | unsigned long flags; | |
649 | ||
12aa7579 | 650 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
651 | snd_cs4231_calibrate_mute(chip, 1); |
652 | ||
653 | snd_cs4231_mce_up(chip); | |
654 | ||
655 | spin_lock_irqsave(&chip->lock, flags); | |
656 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { | |
657 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
658 | ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | | |
659 | (cdfr & 0x0f)); | |
660 | spin_unlock_irqrestore(&chip->lock, flags); | |
661 | snd_cs4231_mce_down(chip); | |
662 | snd_cs4231_mce_up(chip); | |
663 | spin_lock_irqsave(&chip->lock, flags); | |
664 | } | |
665 | snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); | |
666 | spin_unlock_irqrestore(&chip->lock, flags); | |
667 | ||
668 | snd_cs4231_mce_down(chip); | |
669 | ||
670 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 671 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
672 | } |
673 | ||
674 | /* | |
675 | * Timer interface | |
676 | */ | |
677 | ||
be9b7e8c | 678 | static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) |
1da177e4 | 679 | { |
be9b7e8c | 680 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
681 | |
682 | return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; | |
683 | } | |
684 | ||
be9b7e8c | 685 | static int snd_cs4231_timer_start(struct snd_timer *timer) |
1da177e4 LT |
686 | { |
687 | unsigned long flags; | |
688 | unsigned int ticks; | |
be9b7e8c | 689 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
690 | |
691 | spin_lock_irqsave(&chip->lock, flags); | |
692 | ticks = timer->sticks; | |
693 | if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || | |
694 | (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || | |
695 | (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { | |
696 | snd_cs4231_out(chip, CS4231_TIMER_HIGH, | |
697 | chip->image[CS4231_TIMER_HIGH] = | |
698 | (unsigned char) (ticks >> 8)); | |
699 | snd_cs4231_out(chip, CS4231_TIMER_LOW, | |
700 | chip->image[CS4231_TIMER_LOW] = | |
701 | (unsigned char) ticks); | |
702 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, | |
9e9abb4f KH |
703 | chip->image[CS4231_ALT_FEATURE_1] | |
704 | CS4231_TIMER_ENABLE); | |
1da177e4 LT |
705 | } |
706 | spin_unlock_irqrestore(&chip->lock, flags); | |
707 | ||
708 | return 0; | |
709 | } | |
710 | ||
be9b7e8c | 711 | static int snd_cs4231_timer_stop(struct snd_timer *timer) |
1da177e4 LT |
712 | { |
713 | unsigned long flags; | |
be9b7e8c | 714 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
715 | |
716 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f | 717 | chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; |
1da177e4 | 718 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
9e9abb4f | 719 | chip->image[CS4231_ALT_FEATURE_1]); |
1da177e4 LT |
720 | spin_unlock_irqrestore(&chip->lock, flags); |
721 | ||
722 | return 0; | |
723 | } | |
724 | ||
be9b7e8c | 725 | static void __init snd_cs4231_init(struct snd_cs4231 *chip) |
1da177e4 LT |
726 | { |
727 | unsigned long flags; | |
728 | ||
729 | snd_cs4231_mce_down(chip); | |
730 | ||
731 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 732 | snd_printdd("init: (1)\n"); |
1da177e4 LT |
733 | #endif |
734 | snd_cs4231_mce_up(chip); | |
735 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
736 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
737 | CS4231_PLAYBACK_PIO | | |
738 | CS4231_RECORD_ENABLE | | |
739 | CS4231_RECORD_PIO | | |
1da177e4 LT |
740 | CS4231_CALIB_MODE); |
741 | chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; | |
742 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); | |
743 | spin_unlock_irqrestore(&chip->lock, flags); | |
744 | snd_cs4231_mce_down(chip); | |
745 | ||
746 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 747 | snd_printdd("init: (2)\n"); |
1da177e4 LT |
748 | #endif |
749 | ||
750 | snd_cs4231_mce_up(chip); | |
751 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
752 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
753 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
754 | spin_unlock_irqrestore(&chip->lock, flags); |
755 | snd_cs4231_mce_down(chip); | |
756 | ||
757 | #ifdef SNDRV_DEBUG_MCE | |
9e9abb4f KH |
758 | snd_printdd("init: (3) - afei = 0x%x\n", |
759 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
760 | #endif |
761 | ||
762 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
763 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, |
764 | chip->image[CS4231_ALT_FEATURE_2]); | |
1da177e4 LT |
765 | spin_unlock_irqrestore(&chip->lock, flags); |
766 | ||
767 | snd_cs4231_mce_up(chip); | |
768 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
769 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, |
770 | chip->image[CS4231_PLAYBK_FORMAT]); | |
1da177e4 LT |
771 | spin_unlock_irqrestore(&chip->lock, flags); |
772 | snd_cs4231_mce_down(chip); | |
773 | ||
774 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 775 | snd_printdd("init: (4)\n"); |
1da177e4 LT |
776 | #endif |
777 | ||
778 | snd_cs4231_mce_up(chip); | |
779 | spin_lock_irqsave(&chip->lock, flags); | |
780 | snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); | |
781 | spin_unlock_irqrestore(&chip->lock, flags); | |
782 | snd_cs4231_mce_down(chip); | |
783 | ||
784 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 785 | snd_printdd("init: (5)\n"); |
1da177e4 LT |
786 | #endif |
787 | } | |
788 | ||
be9b7e8c | 789 | static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
790 | { |
791 | unsigned long flags; | |
792 | ||
12aa7579 | 793 | mutex_lock(&chip->open_mutex); |
1da177e4 | 794 | if ((chip->mode & mode)) { |
12aa7579 | 795 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
796 | return -EAGAIN; |
797 | } | |
798 | if (chip->mode & CS4231_MODE_OPEN) { | |
799 | chip->mode |= mode; | |
12aa7579 | 800 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
801 | return 0; |
802 | } | |
803 | /* ok. now enable and ack CODEC IRQ */ | |
804 | spin_lock_irqsave(&chip->lock, flags); | |
805 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
806 | CS4231_RECORD_IRQ | | |
807 | CS4231_TIMER_IRQ); | |
808 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
809 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
810 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
811 | |
812 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
813 | CS4231_RECORD_IRQ | | |
814 | CS4231_TIMER_IRQ); | |
815 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
a131430c | 816 | |
1da177e4 LT |
817 | spin_unlock_irqrestore(&chip->lock, flags); |
818 | ||
819 | chip->mode = mode; | |
12aa7579 | 820 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
821 | return 0; |
822 | } | |
823 | ||
be9b7e8c | 824 | static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
825 | { |
826 | unsigned long flags; | |
827 | ||
12aa7579 | 828 | mutex_lock(&chip->open_mutex); |
1da177e4 LT |
829 | chip->mode &= ~mode; |
830 | if (chip->mode & CS4231_MODE_OPEN) { | |
12aa7579 | 831 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
832 | return; |
833 | } | |
834 | snd_cs4231_calibrate_mute(chip, 1); | |
835 | ||
836 | /* disable IRQ */ | |
837 | spin_lock_irqsave(&chip->lock, flags); | |
838 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
839 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
840 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
841 | |
842 | /* now disable record & playback */ | |
843 | ||
844 | if (chip->image[CS4231_IFACE_CTRL] & | |
845 | (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
846 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { | |
847 | spin_unlock_irqrestore(&chip->lock, flags); | |
848 | snd_cs4231_mce_up(chip); | |
849 | spin_lock_irqsave(&chip->lock, flags); | |
850 | chip->image[CS4231_IFACE_CTRL] &= | |
851 | ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
852 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); | |
9e9abb4f KH |
853 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, |
854 | chip->image[CS4231_IFACE_CTRL]); | |
1da177e4 LT |
855 | spin_unlock_irqrestore(&chip->lock, flags); |
856 | snd_cs4231_mce_down(chip); | |
857 | spin_lock_irqsave(&chip->lock, flags); | |
858 | } | |
859 | ||
860 | /* clear IRQ again */ | |
861 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
862 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
863 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
864 | spin_unlock_irqrestore(&chip->lock, flags); |
865 | ||
866 | snd_cs4231_calibrate_mute(chip, 0); | |
867 | ||
868 | chip->mode = 0; | |
12aa7579 | 869 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
870 | } |
871 | ||
872 | /* | |
873 | * timer open/close | |
874 | */ | |
875 | ||
be9b7e8c | 876 | static int snd_cs4231_timer_open(struct snd_timer *timer) |
1da177e4 | 877 | { |
be9b7e8c | 878 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
879 | snd_cs4231_open(chip, CS4231_MODE_TIMER); |
880 | return 0; | |
881 | } | |
882 | ||
9e9abb4f | 883 | static int snd_cs4231_timer_close(struct snd_timer *timer) |
1da177e4 | 884 | { |
be9b7e8c | 885 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
886 | snd_cs4231_close(chip, CS4231_MODE_TIMER); |
887 | return 0; | |
888 | } | |
889 | ||
9e9abb4f | 890 | static struct snd_timer_hardware snd_cs4231_timer_table = { |
1da177e4 LT |
891 | .flags = SNDRV_TIMER_HW_AUTO, |
892 | .resolution = 9945, | |
893 | .ticks = 65535, | |
894 | .open = snd_cs4231_timer_open, | |
895 | .close = snd_cs4231_timer_close, | |
896 | .c_resolution = snd_cs4231_timer_resolution, | |
897 | .start = snd_cs4231_timer_start, | |
898 | .stop = snd_cs4231_timer_stop, | |
899 | }; | |
900 | ||
901 | /* | |
902 | * ok.. exported functions.. | |
903 | */ | |
904 | ||
be9b7e8c TI |
905 | static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, |
906 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 907 | { |
be9b7e8c | 908 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
909 | unsigned char new_pdfr; |
910 | int err; | |
911 | ||
9e9abb4f KH |
912 | err = snd_pcm_lib_malloc_pages(substream, |
913 | params_buffer_bytes(hw_params)); | |
914 | if (err < 0) | |
1da177e4 LT |
915 | return err; |
916 | new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
917 | params_channels(hw_params)) | | |
918 | snd_cs4231_get_rate(params_rate(hw_params)); | |
919 | snd_cs4231_playback_format(chip, hw_params, new_pdfr); | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
be9b7e8c | 924 | static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 925 | { |
be9b7e8c TI |
926 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
927 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
928 | unsigned long flags; |
929 | ||
930 | spin_lock_irqsave(&chip->lock, flags); | |
a131430c | 931 | |
1da177e4 LT |
932 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
933 | CS4231_PLAYBACK_PIO); | |
a131430c | 934 | |
817dd6ee | 935 | BUG_ON(runtime->period_size > 0xffff + 1); |
a131430c | 936 | |
a131430c | 937 | chip->p_periods_sent = 0; |
1da177e4 LT |
938 | spin_unlock_irqrestore(&chip->lock, flags); |
939 | ||
940 | return 0; | |
941 | } | |
942 | ||
be9b7e8c TI |
943 | static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, |
944 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 945 | { |
be9b7e8c | 946 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
947 | unsigned char new_cdfr; |
948 | int err; | |
949 | ||
9e9abb4f KH |
950 | err = snd_pcm_lib_malloc_pages(substream, |
951 | params_buffer_bytes(hw_params)); | |
952 | if (err < 0) | |
1da177e4 LT |
953 | return err; |
954 | new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
955 | params_channels(hw_params)) | | |
956 | snd_cs4231_get_rate(params_rate(hw_params)); | |
957 | snd_cs4231_capture_format(chip, hw_params, new_cdfr); | |
958 | ||
959 | return 0; | |
960 | } | |
961 | ||
be9b7e8c | 962 | static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 963 | { |
be9b7e8c | 964 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
965 | unsigned long flags; |
966 | ||
967 | spin_lock_irqsave(&chip->lock, flags); | |
968 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | | |
969 | CS4231_RECORD_PIO); | |
970 | ||
a131430c | 971 | |
5a820fa7 | 972 | chip->c_periods_sent = 0; |
1da177e4 LT |
973 | spin_unlock_irqrestore(&chip->lock, flags); |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
be9b7e8c | 978 | static void snd_cs4231_overrange(struct snd_cs4231 *chip) |
1da177e4 LT |
979 | { |
980 | unsigned long flags; | |
981 | unsigned char res; | |
982 | ||
983 | spin_lock_irqsave(&chip->lock, flags); | |
984 | res = snd_cs4231_in(chip, CS4231_TEST_INIT); | |
985 | spin_unlock_irqrestore(&chip->lock, flags); | |
986 | ||
9e9abb4f KH |
987 | /* detect overrange only above 0dB; may be user selectable? */ |
988 | if (res & (0x08 | 0x02)) | |
1da177e4 LT |
989 | chip->capture_substream->runtime->overrange++; |
990 | } | |
991 | ||
be9b7e8c | 992 | static void snd_cs4231_play_callback(struct snd_cs4231 *chip) |
1da177e4 | 993 | { |
1da177e4 LT |
994 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { |
995 | snd_pcm_period_elapsed(chip->playback_substream); | |
b128254f | 996 | snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, |
1da177e4 LT |
997 | &chip->p_periods_sent); |
998 | } | |
999 | } | |
1000 | ||
be9b7e8c | 1001 | static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) |
1da177e4 | 1002 | { |
1da177e4 LT |
1003 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { |
1004 | snd_pcm_period_elapsed(chip->capture_substream); | |
b128254f | 1005 | snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, |
1da177e4 LT |
1006 | &chip->c_periods_sent); |
1007 | } | |
1008 | } | |
1da177e4 | 1009 | |
9e9abb4f KH |
1010 | static snd_pcm_uframes_t snd_cs4231_playback_pointer( |
1011 | struct snd_pcm_substream *substream) | |
1da177e4 | 1012 | { |
be9b7e8c TI |
1013 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1014 | struct cs4231_dma_control *dma_cont = &chip->p_dma; | |
5a820fa7 | 1015 | size_t ptr; |
9e9abb4f | 1016 | |
1da177e4 LT |
1017 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) |
1018 | return 0; | |
b128254f GC |
1019 | ptr = dma_cont->address(dma_cont); |
1020 | if (ptr != 0) | |
1021 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1022 | |
1da177e4 LT |
1023 | return bytes_to_frames(substream->runtime, ptr); |
1024 | } | |
1025 | ||
9e9abb4f KH |
1026 | static snd_pcm_uframes_t snd_cs4231_capture_pointer( |
1027 | struct snd_pcm_substream *substream) | |
1da177e4 | 1028 | { |
be9b7e8c TI |
1029 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1030 | struct cs4231_dma_control *dma_cont = &chip->c_dma; | |
5a820fa7 | 1031 | size_t ptr; |
9e9abb4f | 1032 | |
1da177e4 LT |
1033 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) |
1034 | return 0; | |
b128254f GC |
1035 | ptr = dma_cont->address(dma_cont); |
1036 | if (ptr != 0) | |
1037 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1038 | |
1da177e4 LT |
1039 | return bytes_to_frames(substream->runtime, ptr); |
1040 | } | |
1041 | ||
be9b7e8c | 1042 | static int __init snd_cs4231_probe(struct snd_cs4231 *chip) |
1da177e4 LT |
1043 | { |
1044 | unsigned long flags; | |
9e9abb4f KH |
1045 | int i; |
1046 | int id = 0; | |
1047 | int vers = 0; | |
1da177e4 LT |
1048 | unsigned char *ptr; |
1049 | ||
1da177e4 LT |
1050 | for (i = 0; i < 50; i++) { |
1051 | mb(); | |
7e52f3da | 1052 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
9e9abb4f | 1053 | msleep(2); |
1da177e4 LT |
1054 | else { |
1055 | spin_lock_irqsave(&chip->lock, flags); | |
1056 | snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); | |
1057 | id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; | |
1058 | vers = snd_cs4231_in(chip, CS4231_VERSION); | |
1059 | spin_unlock_irqrestore(&chip->lock, flags); | |
1060 | if (id == 0x0a) | |
1061 | break; /* this is valid value */ | |
1062 | } | |
1063 | } | |
1064 | snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); | |
1065 | if (id != 0x0a) | |
1066 | return -ENODEV; /* no valid device found */ | |
1067 | ||
1068 | spin_lock_irqsave(&chip->lock, flags); | |
1069 | ||
7e52f3da KH |
1070 | /* clear any pendings IRQ */ |
1071 | __cs4231_readb(chip, CS4231U(chip, STATUS)); | |
1072 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); | |
1da177e4 LT |
1073 | mb(); |
1074 | ||
1075 | spin_unlock_irqrestore(&chip->lock, flags); | |
1076 | ||
1077 | chip->image[CS4231_MISC_INFO] = CS4231_MODE2; | |
1078 | chip->image[CS4231_IFACE_CTRL] = | |
1079 | chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; | |
1080 | chip->image[CS4231_ALT_FEATURE_1] = 0x80; | |
1081 | chip->image[CS4231_ALT_FEATURE_2] = 0x01; | |
1082 | if (vers & 0x20) | |
1083 | chip->image[CS4231_ALT_FEATURE_2] |= 0x02; | |
1084 | ||
1085 | ptr = (unsigned char *) &chip->image; | |
1086 | ||
1087 | snd_cs4231_mce_down(chip); | |
1088 | ||
1089 | spin_lock_irqsave(&chip->lock, flags); | |
1090 | ||
1091 | for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ | |
1092 | snd_cs4231_out(chip, i, *ptr++); | |
1093 | ||
1094 | spin_unlock_irqrestore(&chip->lock, flags); | |
1095 | ||
1096 | snd_cs4231_mce_up(chip); | |
1097 | ||
1098 | snd_cs4231_mce_down(chip); | |
1099 | ||
1100 | mdelay(2); | |
1101 | ||
1102 | return 0; /* all things are ok.. */ | |
1103 | } | |
1104 | ||
9e9abb4f KH |
1105 | static struct snd_pcm_hardware snd_cs4231_playback = { |
1106 | .info = SNDRV_PCM_INFO_MMAP | | |
1107 | SNDRV_PCM_INFO_INTERLEAVED | | |
1108 | SNDRV_PCM_INFO_MMAP_VALID | | |
1109 | SNDRV_PCM_INFO_SYNC_START, | |
1110 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1111 | SNDRV_PCM_FMTBIT_A_LAW | | |
1112 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1113 | SNDRV_PCM_FMTBIT_U8 | | |
1114 | SNDRV_PCM_FMTBIT_S16_LE | | |
1115 | SNDRV_PCM_FMTBIT_S16_BE, | |
1116 | .rates = SNDRV_PCM_RATE_KNOT | | |
1117 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1118 | .rate_min = 5510, |
1119 | .rate_max = 48000, | |
1120 | .channels_min = 1, | |
1121 | .channels_max = 2, | |
9e9abb4f | 1122 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1123 | .period_bytes_min = 64, |
9e9abb4f | 1124 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1125 | .periods_min = 1, |
1126 | .periods_max = 1024, | |
1127 | }; | |
1128 | ||
9e9abb4f KH |
1129 | static struct snd_pcm_hardware snd_cs4231_capture = { |
1130 | .info = SNDRV_PCM_INFO_MMAP | | |
1131 | SNDRV_PCM_INFO_INTERLEAVED | | |
1132 | SNDRV_PCM_INFO_MMAP_VALID | | |
1133 | SNDRV_PCM_INFO_SYNC_START, | |
1134 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1135 | SNDRV_PCM_FMTBIT_A_LAW | | |
1136 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1137 | SNDRV_PCM_FMTBIT_U8 | | |
1138 | SNDRV_PCM_FMTBIT_S16_LE | | |
1139 | SNDRV_PCM_FMTBIT_S16_BE, | |
1140 | .rates = SNDRV_PCM_RATE_KNOT | | |
1141 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1142 | .rate_min = 5510, |
1143 | .rate_max = 48000, | |
1144 | .channels_min = 1, | |
1145 | .channels_max = 2, | |
9e9abb4f | 1146 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1147 | .period_bytes_min = 64, |
9e9abb4f | 1148 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1149 | .periods_min = 1, |
1150 | .periods_max = 1024, | |
1151 | }; | |
1152 | ||
be9b7e8c | 1153 | static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1154 | { |
be9b7e8c TI |
1155 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1156 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1157 | int err; |
1158 | ||
1159 | runtime->hw = snd_cs4231_playback; | |
1160 | ||
9e9abb4f KH |
1161 | err = snd_cs4231_open(chip, CS4231_MODE_PLAY); |
1162 | if (err < 0) { | |
1da177e4 LT |
1163 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1164 | return err; | |
1165 | } | |
1166 | chip->playback_substream = substream; | |
1167 | chip->p_periods_sent = 0; | |
1168 | snd_pcm_set_sync(substream); | |
1169 | snd_cs4231_xrate(runtime); | |
1170 | ||
1171 | return 0; | |
1172 | } | |
1173 | ||
be9b7e8c | 1174 | static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1175 | { |
be9b7e8c TI |
1176 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1177 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1178 | int err; |
1179 | ||
1180 | runtime->hw = snd_cs4231_capture; | |
1181 | ||
9e9abb4f KH |
1182 | err = snd_cs4231_open(chip, CS4231_MODE_RECORD); |
1183 | if (err < 0) { | |
1da177e4 LT |
1184 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1185 | return err; | |
1186 | } | |
1187 | chip->capture_substream = substream; | |
1188 | chip->c_periods_sent = 0; | |
1189 | snd_pcm_set_sync(substream); | |
1190 | snd_cs4231_xrate(runtime); | |
1191 | ||
1192 | return 0; | |
1193 | } | |
1194 | ||
be9b7e8c | 1195 | static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1196 | { |
be9b7e8c | 1197 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1198 | |
1da177e4 | 1199 | snd_cs4231_close(chip, CS4231_MODE_PLAY); |
b128254f | 1200 | chip->playback_substream = NULL; |
1da177e4 LT |
1201 | |
1202 | return 0; | |
1203 | } | |
1204 | ||
be9b7e8c | 1205 | static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1206 | { |
be9b7e8c | 1207 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1208 | |
1da177e4 | 1209 | snd_cs4231_close(chip, CS4231_MODE_RECORD); |
b128254f | 1210 | chip->capture_substream = NULL; |
1da177e4 LT |
1211 | |
1212 | return 0; | |
1213 | } | |
1214 | ||
1215 | /* XXX We can do some power-management, in particular on EBUS using | |
1216 | * XXX the audio AUXIO register... | |
1217 | */ | |
1218 | ||
be9b7e8c | 1219 | static struct snd_pcm_ops snd_cs4231_playback_ops = { |
1da177e4 LT |
1220 | .open = snd_cs4231_playback_open, |
1221 | .close = snd_cs4231_playback_close, | |
1222 | .ioctl = snd_pcm_lib_ioctl, | |
1223 | .hw_params = snd_cs4231_playback_hw_params, | |
c6c2d57b | 1224 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1225 | .prepare = snd_cs4231_playback_prepare, |
1226 | .trigger = snd_cs4231_trigger, | |
1227 | .pointer = snd_cs4231_playback_pointer, | |
1228 | }; | |
1229 | ||
be9b7e8c | 1230 | static struct snd_pcm_ops snd_cs4231_capture_ops = { |
1da177e4 LT |
1231 | .open = snd_cs4231_capture_open, |
1232 | .close = snd_cs4231_capture_close, | |
1233 | .ioctl = snd_pcm_lib_ioctl, | |
1234 | .hw_params = snd_cs4231_capture_hw_params, | |
c6c2d57b | 1235 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1236 | .prepare = snd_cs4231_capture_prepare, |
1237 | .trigger = snd_cs4231_trigger, | |
1238 | .pointer = snd_cs4231_capture_pointer, | |
1239 | }; | |
1240 | ||
c6c2d57b | 1241 | static int __init snd_cs4231_pcm(struct snd_card *card) |
1da177e4 | 1242 | { |
c6c2d57b | 1243 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c | 1244 | struct snd_pcm *pcm; |
1da177e4 LT |
1245 | int err; |
1246 | ||
c6c2d57b KH |
1247 | err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); |
1248 | if (err < 0) | |
1da177e4 LT |
1249 | return err; |
1250 | ||
9e9abb4f KH |
1251 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1252 | &snd_cs4231_playback_ops); | |
1253 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
1254 | &snd_cs4231_capture_ops); | |
1255 | ||
1da177e4 LT |
1256 | /* global setup */ |
1257 | pcm->private_data = chip; | |
1da177e4 LT |
1258 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; |
1259 | strcpy(pcm->name, "CS4231"); | |
1260 | ||
b128254f | 1261 | chip->p_dma.preallocate(chip, pcm); |
1da177e4 LT |
1262 | |
1263 | chip->pcm = pcm; | |
1264 | ||
1265 | return 0; | |
1266 | } | |
1267 | ||
c6c2d57b | 1268 | static int __init snd_cs4231_timer(struct snd_card *card) |
1da177e4 | 1269 | { |
c6c2d57b | 1270 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c TI |
1271 | struct snd_timer *timer; |
1272 | struct snd_timer_id tid; | |
1da177e4 LT |
1273 | int err; |
1274 | ||
1275 | /* Timer initialization */ | |
1276 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1277 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
c6c2d57b | 1278 | tid.card = card->number; |
1da177e4 LT |
1279 | tid.device = 0; |
1280 | tid.subdevice = 0; | |
c6c2d57b KH |
1281 | err = snd_timer_new(card, "CS4231", &tid, &timer); |
1282 | if (err < 0) | |
1da177e4 LT |
1283 | return err; |
1284 | strcpy(timer->name, "CS4231"); | |
1285 | timer->private_data = chip; | |
1da177e4 LT |
1286 | timer->hw = snd_cs4231_timer_table; |
1287 | chip->timer = timer; | |
1288 | ||
1289 | return 0; | |
1290 | } | |
9e9abb4f | 1291 | |
1da177e4 LT |
1292 | /* |
1293 | * MIXER part | |
1294 | */ | |
1295 | ||
be9b7e8c TI |
1296 | static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, |
1297 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1298 | { |
1299 | static char *texts[4] = { | |
1300 | "Line", "CD", "Mic", "Mix" | |
1301 | }; | |
1da177e4 | 1302 | |
1da177e4 LT |
1303 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
1304 | uinfo->count = 2; | |
1305 | uinfo->value.enumerated.items = 4; | |
1306 | if (uinfo->value.enumerated.item > 3) | |
1307 | uinfo->value.enumerated.item = 3; | |
9e9abb4f KH |
1308 | strcpy(uinfo->value.enumerated.name, |
1309 | texts[uinfo->value.enumerated.item]); | |
1da177e4 LT |
1310 | |
1311 | return 0; | |
1312 | } | |
1313 | ||
be9b7e8c TI |
1314 | static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, |
1315 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1316 | { |
be9b7e8c | 1317 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1318 | unsigned long flags; |
9e9abb4f | 1319 | |
1da177e4 LT |
1320 | spin_lock_irqsave(&chip->lock, flags); |
1321 | ucontrol->value.enumerated.item[0] = | |
1322 | (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1323 | ucontrol->value.enumerated.item[1] = | |
1324 | (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1325 | spin_unlock_irqrestore(&chip->lock, flags); | |
1326 | ||
1327 | return 0; | |
1328 | } | |
1329 | ||
be9b7e8c TI |
1330 | static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, |
1331 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1332 | { |
be9b7e8c | 1333 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1334 | unsigned long flags; |
1335 | unsigned short left, right; | |
1336 | int change; | |
9e9abb4f | 1337 | |
1da177e4 LT |
1338 | if (ucontrol->value.enumerated.item[0] > 3 || |
1339 | ucontrol->value.enumerated.item[1] > 3) | |
1340 | return -EINVAL; | |
1341 | left = ucontrol->value.enumerated.item[0] << 6; | |
1342 | right = ucontrol->value.enumerated.item[1] << 6; | |
1343 | ||
1344 | spin_lock_irqsave(&chip->lock, flags); | |
1345 | ||
1346 | left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; | |
1347 | right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; | |
1348 | change = left != chip->image[CS4231_LEFT_INPUT] || | |
9e9abb4f | 1349 | right != chip->image[CS4231_RIGHT_INPUT]; |
1da177e4 LT |
1350 | snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); |
1351 | snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); | |
1352 | ||
1353 | spin_unlock_irqrestore(&chip->lock, flags); | |
1354 | ||
1355 | return change; | |
1356 | } | |
1357 | ||
be9b7e8c TI |
1358 | static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, |
1359 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1360 | { |
1361 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1362 | ||
1363 | uinfo->type = (mask == 1) ? | |
1364 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1365 | uinfo->count = 1; | |
1366 | uinfo->value.integer.min = 0; | |
1367 | uinfo->value.integer.max = mask; | |
1368 | ||
1369 | return 0; | |
1370 | } | |
1371 | ||
be9b7e8c TI |
1372 | static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, |
1373 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1374 | { |
be9b7e8c | 1375 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1376 | unsigned long flags; |
1377 | int reg = kcontrol->private_value & 0xff; | |
1378 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1379 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1380 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
9e9abb4f | 1381 | |
1da177e4 LT |
1382 | spin_lock_irqsave(&chip->lock, flags); |
1383 | ||
1384 | ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; | |
1385 | ||
1386 | spin_unlock_irqrestore(&chip->lock, flags); | |
1387 | ||
1388 | if (invert) | |
1389 | ucontrol->value.integer.value[0] = | |
1390 | (mask - ucontrol->value.integer.value[0]); | |
1391 | ||
1392 | return 0; | |
1393 | } | |
1394 | ||
be9b7e8c TI |
1395 | static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, |
1396 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1397 | { |
be9b7e8c | 1398 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1399 | unsigned long flags; |
1400 | int reg = kcontrol->private_value & 0xff; | |
1401 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1402 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1403 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1404 | int change; | |
1405 | unsigned short val; | |
9e9abb4f | 1406 | |
1da177e4 LT |
1407 | val = (ucontrol->value.integer.value[0] & mask); |
1408 | if (invert) | |
1409 | val = mask - val; | |
1410 | val <<= shift; | |
1411 | ||
1412 | spin_lock_irqsave(&chip->lock, flags); | |
1413 | ||
1414 | val = (chip->image[reg] & ~(mask << shift)) | val; | |
1415 | change = val != chip->image[reg]; | |
1416 | snd_cs4231_out(chip, reg, val); | |
1417 | ||
1418 | spin_unlock_irqrestore(&chip->lock, flags); | |
1419 | ||
1420 | return change; | |
1421 | } | |
1422 | ||
be9b7e8c TI |
1423 | static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, |
1424 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1425 | { |
1426 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1427 | ||
1428 | uinfo->type = mask == 1 ? | |
1429 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1430 | uinfo->count = 2; | |
1431 | uinfo->value.integer.min = 0; | |
1432 | uinfo->value.integer.max = mask; | |
1433 | ||
1434 | return 0; | |
1435 | } | |
1436 | ||
be9b7e8c TI |
1437 | static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, |
1438 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1439 | { |
be9b7e8c | 1440 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1441 | unsigned long flags; |
1442 | int left_reg = kcontrol->private_value & 0xff; | |
1443 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1444 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1445 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1446 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1447 | int invert = (kcontrol->private_value >> 22) & 1; | |
9e9abb4f | 1448 | |
1da177e4 LT |
1449 | spin_lock_irqsave(&chip->lock, flags); |
1450 | ||
9e9abb4f KH |
1451 | ucontrol->value.integer.value[0] = |
1452 | (chip->image[left_reg] >> shift_left) & mask; | |
1453 | ucontrol->value.integer.value[1] = | |
1454 | (chip->image[right_reg] >> shift_right) & mask; | |
1da177e4 LT |
1455 | |
1456 | spin_unlock_irqrestore(&chip->lock, flags); | |
1457 | ||
1458 | if (invert) { | |
1459 | ucontrol->value.integer.value[0] = | |
1460 | (mask - ucontrol->value.integer.value[0]); | |
1461 | ucontrol->value.integer.value[1] = | |
1462 | (mask - ucontrol->value.integer.value[1]); | |
1463 | } | |
1464 | ||
1465 | return 0; | |
1466 | } | |
1467 | ||
be9b7e8c TI |
1468 | static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, |
1469 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1470 | { |
be9b7e8c | 1471 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1472 | unsigned long flags; |
1473 | int left_reg = kcontrol->private_value & 0xff; | |
1474 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1475 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1476 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1477 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1478 | int invert = (kcontrol->private_value >> 22) & 1; | |
1479 | int change; | |
1480 | unsigned short val1, val2; | |
9e9abb4f | 1481 | |
1da177e4 LT |
1482 | val1 = ucontrol->value.integer.value[0] & mask; |
1483 | val2 = ucontrol->value.integer.value[1] & mask; | |
1484 | if (invert) { | |
1485 | val1 = mask - val1; | |
1486 | val2 = mask - val2; | |
1487 | } | |
1488 | val1 <<= shift_left; | |
1489 | val2 <<= shift_right; | |
1490 | ||
1491 | spin_lock_irqsave(&chip->lock, flags); | |
1492 | ||
1493 | val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; | |
1494 | val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; | |
9e9abb4f KH |
1495 | change = val1 != chip->image[left_reg]; |
1496 | change |= val2 != chip->image[right_reg]; | |
1da177e4 LT |
1497 | snd_cs4231_out(chip, left_reg, val1); |
1498 | snd_cs4231_out(chip, right_reg, val2); | |
1499 | ||
1500 | spin_unlock_irqrestore(&chip->lock, flags); | |
1501 | ||
1502 | return change; | |
1503 | } | |
1504 | ||
1505 | #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ | |
9e9abb4f KH |
1506 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ |
1507 | .info = snd_cs4231_info_single, \ | |
1508 | .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ | |
1509 | .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } | |
1510 | ||
1511 | #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ | |
1512 | shift_right, mask, invert) \ | |
1513 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ | |
1514 | .info = snd_cs4231_info_double, \ | |
1515 | .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ | |
1516 | .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ | |
1517 | ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } | |
1da177e4 | 1518 | |
be9b7e8c | 1519 | static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = { |
9e9abb4f KH |
1520 | CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, |
1521 | CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), | |
1522 | CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, | |
1523 | CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), | |
1524 | CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, | |
1525 | CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), | |
1526 | CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, | |
1527 | CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), | |
1528 | CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, | |
1529 | CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), | |
1530 | CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, | |
1531 | CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), | |
1532 | CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, | |
1533 | CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), | |
1534 | CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, | |
1535 | CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), | |
1da177e4 LT |
1536 | CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), |
1537 | CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), | |
1538 | CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), | |
1539 | CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), | |
9e9abb4f KH |
1540 | CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, |
1541 | 15, 0), | |
1da177e4 LT |
1542 | { |
1543 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1544 | .name = "Capture Source", | |
1545 | .info = snd_cs4231_info_mux, | |
1546 | .get = snd_cs4231_get_mux, | |
1547 | .put = snd_cs4231_put_mux, | |
1548 | }, | |
9e9abb4f KH |
1549 | CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, |
1550 | 1, 0), | |
1da177e4 LT |
1551 | CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), |
1552 | CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), | |
1553 | /* SPARC specific uses of XCTL{0,1} general purpose outputs. */ | |
1554 | CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), | |
1555 | CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) | |
1556 | }; | |
9e9abb4f | 1557 | |
c6c2d57b | 1558 | static int __init snd_cs4231_mixer(struct snd_card *card) |
1da177e4 | 1559 | { |
c6c2d57b | 1560 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1561 | int err, idx; |
1562 | ||
1563 | snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL); | |
1564 | ||
1da177e4 LT |
1565 | strcpy(card->mixername, chip->pcm->name); |
1566 | ||
1567 | for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { | |
c6c2d57b KH |
1568 | err = snd_ctl_add(card, |
1569 | snd_ctl_new1(&snd_cs4231_controls[idx], chip)); | |
1570 | if (err < 0) | |
1da177e4 LT |
1571 | return err; |
1572 | } | |
1573 | return 0; | |
1574 | } | |
1575 | ||
1576 | static int dev; | |
1577 | ||
be9b7e8c | 1578 | static int __init cs4231_attach_begin(struct snd_card **rcard) |
1da177e4 | 1579 | { |
be9b7e8c | 1580 | struct snd_card *card; |
c6c2d57b | 1581 | struct snd_cs4231 *chip; |
1da177e4 LT |
1582 | |
1583 | *rcard = NULL; | |
1584 | ||
1585 | if (dev >= SNDRV_CARDS) | |
1586 | return -ENODEV; | |
1587 | ||
1588 | if (!enable[dev]) { | |
1589 | dev++; | |
1590 | return -ENOENT; | |
1591 | } | |
1592 | ||
c6c2d57b KH |
1593 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, |
1594 | sizeof(struct snd_cs4231)); | |
1da177e4 LT |
1595 | if (card == NULL) |
1596 | return -ENOMEM; | |
1597 | ||
1598 | strcpy(card->driver, "CS4231"); | |
1599 | strcpy(card->shortname, "Sun CS4231"); | |
1600 | ||
c6c2d57b KH |
1601 | chip = card->private_data; |
1602 | chip->card = card; | |
1603 | ||
1da177e4 LT |
1604 | *rcard = card; |
1605 | return 0; | |
1606 | } | |
1607 | ||
c6c2d57b | 1608 | static int __init cs4231_attach_finish(struct snd_card *card) |
1da177e4 | 1609 | { |
c6c2d57b | 1610 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1611 | int err; |
1612 | ||
c6c2d57b KH |
1613 | err = snd_cs4231_pcm(card); |
1614 | if (err < 0) | |
1da177e4 LT |
1615 | goto out_err; |
1616 | ||
c6c2d57b KH |
1617 | err = snd_cs4231_mixer(card); |
1618 | if (err < 0) | |
1da177e4 LT |
1619 | goto out_err; |
1620 | ||
c6c2d57b KH |
1621 | err = snd_cs4231_timer(card); |
1622 | if (err < 0) | |
1da177e4 LT |
1623 | goto out_err; |
1624 | ||
c6c2d57b KH |
1625 | err = snd_card_register(card); |
1626 | if (err < 0) | |
1da177e4 LT |
1627 | goto out_err; |
1628 | ||
1629 | chip->next = cs4231_list; | |
1630 | cs4231_list = chip; | |
1631 | ||
1632 | dev++; | |
1633 | return 0; | |
1634 | ||
1635 | out_err: | |
1636 | snd_card_free(card); | |
1637 | return err; | |
1638 | } | |
1639 | ||
1640 | #ifdef SBUS_SUPPORT | |
b128254f | 1641 | |
7d12e780 | 1642 | static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) |
b128254f GC |
1643 | { |
1644 | unsigned long flags; | |
1645 | unsigned char status; | |
1646 | u32 csr; | |
be9b7e8c | 1647 | struct snd_cs4231 *chip = dev_id; |
b128254f GC |
1648 | |
1649 | /*This is IRQ is not raised by the cs4231*/ | |
7e52f3da | 1650 | if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) |
b128254f GC |
1651 | return IRQ_NONE; |
1652 | ||
1653 | /* ACK the APC interrupt. */ | |
1654 | csr = sbus_readl(chip->port + APCCSR); | |
1655 | ||
1656 | sbus_writel(csr, chip->port + APCCSR); | |
1657 | ||
9e9abb4f KH |
1658 | if ((csr & APC_PDMA_READY) && |
1659 | (csr & APC_PLAY_INT) && | |
b128254f GC |
1660 | (csr & APC_XINT_PNVA) && |
1661 | !(csr & APC_XINT_EMPT)) | |
1662 | snd_cs4231_play_callback(chip); | |
1663 | ||
9e9abb4f KH |
1664 | if ((csr & APC_CDMA_READY) && |
1665 | (csr & APC_CAPT_INT) && | |
b128254f GC |
1666 | (csr & APC_XINT_CNVA) && |
1667 | !(csr & APC_XINT_EMPT)) | |
1668 | snd_cs4231_capture_callback(chip); | |
9e9abb4f | 1669 | |
b128254f GC |
1670 | status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); |
1671 | ||
1672 | if (status & CS4231_TIMER_IRQ) { | |
1673 | if (chip->timer) | |
1674 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
9e9abb4f | 1675 | } |
b128254f GC |
1676 | |
1677 | if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) | |
1678 | snd_cs4231_overrange(chip); | |
1679 | ||
1680 | /* ACK the CS4231 interrupt. */ | |
1681 | spin_lock_irqsave(&chip->lock, flags); | |
1682 | snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); | |
1683 | spin_unlock_irqrestore(&chip->lock, flags); | |
1684 | ||
d35a1b9e | 1685 | return IRQ_HANDLED; |
b128254f GC |
1686 | } |
1687 | ||
1688 | /* | |
1689 | * SBUS DMA routines | |
1690 | */ | |
1691 | ||
9e9abb4f KH |
1692 | static int sbus_dma_request(struct cs4231_dma_control *dma_cont, |
1693 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1694 | { |
1695 | unsigned long flags; | |
1696 | u32 test, csr; | |
1697 | int err; | |
be9b7e8c | 1698 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
9e9abb4f | 1699 | |
b128254f GC |
1700 | if (len >= (1 << 24)) |
1701 | return -EINVAL; | |
1702 | spin_lock_irqsave(&base->lock, flags); | |
1703 | csr = sbus_readl(base->regs + APCCSR); | |
1704 | err = -EINVAL; | |
1705 | test = APC_CDMA_READY; | |
9e9abb4f | 1706 | if (base->dir == APC_PLAY) |
b128254f GC |
1707 | test = APC_PDMA_READY; |
1708 | if (!(csr & test)) | |
1709 | goto out; | |
1710 | err = -EBUSY; | |
b128254f | 1711 | test = APC_XINT_CNVA; |
9e9abb4f | 1712 | if (base->dir == APC_PLAY) |
b128254f GC |
1713 | test = APC_XINT_PNVA; |
1714 | if (!(csr & test)) | |
1715 | goto out; | |
1716 | err = 0; | |
1717 | sbus_writel(bus_addr, base->regs + base->dir + APCNVA); | |
1718 | sbus_writel(len, base->regs + base->dir + APCNC); | |
1719 | out: | |
1720 | spin_unlock_irqrestore(&base->lock, flags); | |
1721 | return err; | |
1722 | } | |
1723 | ||
be9b7e8c | 1724 | static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) |
b128254f GC |
1725 | { |
1726 | unsigned long flags; | |
1727 | u32 csr, test; | |
be9b7e8c | 1728 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1729 | |
1730 | spin_lock_irqsave(&base->lock, flags); | |
1731 | csr = sbus_readl(base->regs + APCCSR); | |
1732 | test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | | |
1733 | APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | | |
1734 | APC_XINT_PENA; | |
9e9abb4f | 1735 | if (base->dir == APC_RECORD) |
b128254f GC |
1736 | test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | |
1737 | APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; | |
1738 | csr |= test; | |
1739 | sbus_writel(csr, base->regs + APCCSR); | |
1740 | spin_unlock_irqrestore(&base->lock, flags); | |
1741 | } | |
1742 | ||
be9b7e8c | 1743 | static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1744 | { |
1745 | unsigned long flags; | |
1746 | u32 csr, shift; | |
be9b7e8c | 1747 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1748 | |
1749 | spin_lock_irqsave(&base->lock, flags); | |
1750 | if (!on) { | |
d35a1b9e GC |
1751 | sbus_writel(0, base->regs + base->dir + APCNC); |
1752 | sbus_writel(0, base->regs + base->dir + APCNVA); | |
9e9abb4f | 1753 | if (base->dir == APC_PLAY) { |
3daadf33 GC |
1754 | sbus_writel(0, base->regs + base->dir + APCC); |
1755 | sbus_writel(0, base->regs + base->dir + APCVA); | |
1756 | } | |
d35a1b9e | 1757 | |
3daadf33 | 1758 | udelay(1200); |
9e9abb4f | 1759 | } |
b128254f GC |
1760 | csr = sbus_readl(base->regs + APCCSR); |
1761 | shift = 0; | |
9e9abb4f | 1762 | if (base->dir == APC_PLAY) |
b128254f GC |
1763 | shift = 1; |
1764 | if (on) | |
1765 | csr &= ~(APC_CPAUSE << shift); | |
1766 | else | |
9e9abb4f | 1767 | csr |= (APC_CPAUSE << shift); |
b128254f GC |
1768 | sbus_writel(csr, base->regs + APCCSR); |
1769 | if (on) | |
1770 | csr |= (APC_CDMA_READY << shift); | |
1771 | else | |
1772 | csr &= ~(APC_CDMA_READY << shift); | |
1773 | sbus_writel(csr, base->regs + APCCSR); | |
9e9abb4f | 1774 | |
b128254f GC |
1775 | spin_unlock_irqrestore(&base->lock, flags); |
1776 | } | |
1777 | ||
be9b7e8c | 1778 | static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f | 1779 | { |
be9b7e8c | 1780 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f | 1781 | |
9e9abb4f | 1782 | return sbus_readl(base->regs + base->dir + APCVA); |
b128254f GC |
1783 | } |
1784 | ||
be9b7e8c | 1785 | static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm) |
b128254f GC |
1786 | { |
1787 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS, | |
9e9abb4f KH |
1788 | snd_dma_sbus_data(chip->dev_u.sdev), |
1789 | 64 * 1024, 128 * 1024); | |
b128254f GC |
1790 | } |
1791 | ||
1792 | /* | |
1793 | * Init and exit routines | |
1794 | */ | |
1795 | ||
be9b7e8c | 1796 | static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) |
1da177e4 LT |
1797 | { |
1798 | if (chip->irq[0]) | |
1799 | free_irq(chip->irq[0], chip); | |
1800 | ||
1801 | if (chip->port) | |
1802 | sbus_iounmap(chip->port, chip->regs_size); | |
1803 | ||
1da177e4 LT |
1804 | return 0; |
1805 | } | |
1806 | ||
be9b7e8c | 1807 | static int snd_cs4231_sbus_dev_free(struct snd_device *device) |
1da177e4 | 1808 | { |
be9b7e8c | 1809 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
1810 | |
1811 | return snd_cs4231_sbus_free(cp); | |
1812 | } | |
1813 | ||
be9b7e8c | 1814 | static struct snd_device_ops snd_cs4231_sbus_dev_ops = { |
1da177e4 LT |
1815 | .dev_free = snd_cs4231_sbus_dev_free, |
1816 | }; | |
1817 | ||
be9b7e8c | 1818 | static int __init snd_cs4231_sbus_create(struct snd_card *card, |
1da177e4 | 1819 | struct sbus_dev *sdev, |
c6c2d57b | 1820 | int dev) |
1da177e4 | 1821 | { |
c6c2d57b | 1822 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1823 | int err; |
1824 | ||
1da177e4 | 1825 | spin_lock_init(&chip->lock); |
b128254f GC |
1826 | spin_lock_init(&chip->c_dma.sbus_info.lock); |
1827 | spin_lock_init(&chip->p_dma.sbus_info.lock); | |
12aa7579 IM |
1828 | mutex_init(&chip->mce_mutex); |
1829 | mutex_init(&chip->open_mutex); | |
1da177e4 LT |
1830 | chip->dev_u.sdev = sdev; |
1831 | chip->regs_size = sdev->reg_addrs[0].reg_size; | |
1832 | memcpy(&chip->image, &snd_cs4231_original_image, | |
1833 | sizeof(snd_cs4231_original_image)); | |
1834 | ||
1835 | chip->port = sbus_ioremap(&sdev->resource[0], 0, | |
1836 | chip->regs_size, "cs4231"); | |
1837 | if (!chip->port) { | |
a131430c | 1838 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
1839 | return -EIO; |
1840 | } | |
1841 | ||
b128254f GC |
1842 | chip->c_dma.sbus_info.regs = chip->port; |
1843 | chip->p_dma.sbus_info.regs = chip->port; | |
1844 | chip->c_dma.sbus_info.dir = APC_RECORD; | |
1845 | chip->p_dma.sbus_info.dir = APC_PLAY; | |
1846 | ||
1847 | chip->p_dma.prepare = sbus_dma_prepare; | |
1848 | chip->p_dma.enable = sbus_dma_enable; | |
1849 | chip->p_dma.request = sbus_dma_request; | |
1850 | chip->p_dma.address = sbus_dma_addr; | |
b128254f GC |
1851 | chip->p_dma.preallocate = sbus_dma_preallocate; |
1852 | ||
1853 | chip->c_dma.prepare = sbus_dma_prepare; | |
1854 | chip->c_dma.enable = sbus_dma_enable; | |
1855 | chip->c_dma.request = sbus_dma_request; | |
1856 | chip->c_dma.address = sbus_dma_addr; | |
b128254f | 1857 | chip->c_dma.preallocate = sbus_dma_preallocate; |
5a820fa7 | 1858 | |
1da177e4 | 1859 | if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt, |
65ca68b3 | 1860 | IRQF_SHARED, "cs4231", chip)) { |
c6387a48 DM |
1861 | snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", |
1862 | dev, sdev->irqs[0]); | |
1da177e4 LT |
1863 | snd_cs4231_sbus_free(chip); |
1864 | return -EBUSY; | |
1865 | } | |
1866 | chip->irq[0] = sdev->irqs[0]; | |
1867 | ||
1868 | if (snd_cs4231_probe(chip) < 0) { | |
1869 | snd_cs4231_sbus_free(chip); | |
1870 | return -ENODEV; | |
1871 | } | |
1872 | snd_cs4231_init(chip); | |
1873 | ||
1874 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
1875 | chip, &snd_cs4231_sbus_dev_ops)) < 0) { | |
1876 | snd_cs4231_sbus_free(chip); | |
1877 | return err; | |
1878 | } | |
1879 | ||
1da177e4 LT |
1880 | return 0; |
1881 | } | |
1882 | ||
be9b7e8c | 1883 | static int __init cs4231_sbus_attach(struct sbus_dev *sdev) |
1da177e4 LT |
1884 | { |
1885 | struct resource *rp = &sdev->resource[0]; | |
be9b7e8c | 1886 | struct snd_card *card; |
1da177e4 LT |
1887 | int err; |
1888 | ||
1889 | err = cs4231_attach_begin(&card); | |
1890 | if (err) | |
1891 | return err; | |
1892 | ||
5863aa65 | 1893 | sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", |
1da177e4 LT |
1894 | card->shortname, |
1895 | rp->flags & 0xffL, | |
aa0a2ddc | 1896 | (unsigned long long)rp->start, |
c6387a48 | 1897 | sdev->irqs[0]); |
1da177e4 | 1898 | |
c6c2d57b KH |
1899 | err = snd_cs4231_sbus_create(card, sdev, dev); |
1900 | if (err < 0) { | |
1da177e4 LT |
1901 | snd_card_free(card); |
1902 | return err; | |
1903 | } | |
1904 | ||
c6c2d57b | 1905 | return cs4231_attach_finish(card); |
1da177e4 LT |
1906 | } |
1907 | #endif | |
1908 | ||
1909 | #ifdef EBUS_SUPPORT | |
b128254f | 1910 | |
9e9abb4f KH |
1911 | static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, |
1912 | void *cookie) | |
b128254f | 1913 | { |
be9b7e8c | 1914 | struct snd_cs4231 *chip = cookie; |
9e9abb4f | 1915 | |
b128254f GC |
1916 | snd_cs4231_play_callback(chip); |
1917 | } | |
1918 | ||
9e9abb4f KH |
1919 | static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, |
1920 | int event, void *cookie) | |
b128254f | 1921 | { |
be9b7e8c | 1922 | struct snd_cs4231 *chip = cookie; |
b128254f GC |
1923 | |
1924 | snd_cs4231_capture_callback(chip); | |
1925 | } | |
1926 | ||
1927 | /* | |
1928 | * EBUS DMA wrappers | |
1929 | */ | |
1930 | ||
9e9abb4f KH |
1931 | static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, |
1932 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1933 | { |
1934 | return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); | |
1935 | } | |
1936 | ||
be9b7e8c | 1937 | static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1938 | { |
1939 | ebus_dma_enable(&dma_cont->ebus_info, on); | |
1940 | } | |
1941 | ||
be9b7e8c | 1942 | static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) |
b128254f GC |
1943 | { |
1944 | ebus_dma_prepare(&dma_cont->ebus_info, dir); | |
1945 | } | |
1946 | ||
be9b7e8c | 1947 | static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f GC |
1948 | { |
1949 | return ebus_dma_addr(&dma_cont->ebus_info); | |
1950 | } | |
1951 | ||
be9b7e8c | 1952 | static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm) |
b128254f GC |
1953 | { |
1954 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1955 | snd_dma_pci_data(chip->dev_u.pdev), | |
1956 | 64*1024, 128*1024); | |
1957 | } | |
1958 | ||
1959 | /* | |
1960 | * Init and exit routines | |
1961 | */ | |
1962 | ||
be9b7e8c | 1963 | static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) |
1da177e4 | 1964 | { |
b128254f GC |
1965 | if (chip->c_dma.ebus_info.regs) { |
1966 | ebus_dma_unregister(&chip->c_dma.ebus_info); | |
1967 | iounmap(chip->c_dma.ebus_info.regs); | |
1da177e4 | 1968 | } |
b128254f GC |
1969 | if (chip->p_dma.ebus_info.regs) { |
1970 | ebus_dma_unregister(&chip->p_dma.ebus_info); | |
1971 | iounmap(chip->p_dma.ebus_info.regs); | |
1da177e4 LT |
1972 | } |
1973 | ||
1974 | if (chip->port) | |
1975 | iounmap(chip->port); | |
1da177e4 | 1976 | |
1da177e4 LT |
1977 | return 0; |
1978 | } | |
1979 | ||
be9b7e8c | 1980 | static int snd_cs4231_ebus_dev_free(struct snd_device *device) |
1da177e4 | 1981 | { |
be9b7e8c | 1982 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
1983 | |
1984 | return snd_cs4231_ebus_free(cp); | |
1985 | } | |
1986 | ||
be9b7e8c | 1987 | static struct snd_device_ops snd_cs4231_ebus_dev_ops = { |
1da177e4 LT |
1988 | .dev_free = snd_cs4231_ebus_dev_free, |
1989 | }; | |
1990 | ||
be9b7e8c | 1991 | static int __init snd_cs4231_ebus_create(struct snd_card *card, |
1da177e4 | 1992 | struct linux_ebus_device *edev, |
c6c2d57b | 1993 | int dev) |
1da177e4 | 1994 | { |
c6c2d57b | 1995 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1996 | int err; |
1997 | ||
1da177e4 | 1998 | spin_lock_init(&chip->lock); |
b128254f GC |
1999 | spin_lock_init(&chip->c_dma.ebus_info.lock); |
2000 | spin_lock_init(&chip->p_dma.ebus_info.lock); | |
12aa7579 IM |
2001 | mutex_init(&chip->mce_mutex); |
2002 | mutex_init(&chip->open_mutex); | |
1da177e4 | 2003 | chip->flags |= CS4231_FLAG_EBUS; |
1da177e4 LT |
2004 | chip->dev_u.pdev = edev->bus->self; |
2005 | memcpy(&chip->image, &snd_cs4231_original_image, | |
2006 | sizeof(snd_cs4231_original_image)); | |
b128254f GC |
2007 | strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); |
2008 | chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
2009 | chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; | |
2010 | chip->c_dma.ebus_info.client_cookie = chip; | |
2011 | chip->c_dma.ebus_info.irq = edev->irqs[0]; | |
2012 | strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); | |
2013 | chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
2014 | chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; | |
2015 | chip->p_dma.ebus_info.client_cookie = chip; | |
2016 | chip->p_dma.ebus_info.irq = edev->irqs[1]; | |
2017 | ||
2018 | chip->p_dma.prepare = _ebus_dma_prepare; | |
2019 | chip->p_dma.enable = _ebus_dma_enable; | |
2020 | chip->p_dma.request = _ebus_dma_request; | |
2021 | chip->p_dma.address = _ebus_dma_addr; | |
b128254f GC |
2022 | chip->p_dma.preallocate = _ebus_dma_preallocate; |
2023 | ||
2024 | chip->c_dma.prepare = _ebus_dma_prepare; | |
2025 | chip->c_dma.enable = _ebus_dma_enable; | |
2026 | chip->c_dma.request = _ebus_dma_request; | |
2027 | chip->c_dma.address = _ebus_dma_addr; | |
b128254f | 2028 | chip->c_dma.preallocate = _ebus_dma_preallocate; |
1da177e4 LT |
2029 | |
2030 | chip->port = ioremap(edev->resource[0].start, 0x10); | |
b128254f GC |
2031 | chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10); |
2032 | chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10); | |
9e9abb4f KH |
2033 | if (!chip->port || !chip->p_dma.ebus_info.regs || |
2034 | !chip->c_dma.ebus_info.regs) { | |
1da177e4 | 2035 | snd_cs4231_ebus_free(chip); |
a131430c | 2036 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
2037 | return -EIO; |
2038 | } | |
2039 | ||
b128254f | 2040 | if (ebus_dma_register(&chip->c_dma.ebus_info)) { |
1da177e4 | 2041 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2042 | snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", |
2043 | dev); | |
1da177e4 LT |
2044 | return -EBUSY; |
2045 | } | |
b128254f | 2046 | if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { |
1da177e4 | 2047 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2048 | snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", |
2049 | dev); | |
1da177e4 LT |
2050 | return -EBUSY; |
2051 | } | |
2052 | ||
b128254f | 2053 | if (ebus_dma_register(&chip->p_dma.ebus_info)) { |
1da177e4 | 2054 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2055 | snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", |
2056 | dev); | |
1da177e4 LT |
2057 | return -EBUSY; |
2058 | } | |
b128254f | 2059 | if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { |
1da177e4 | 2060 | snd_cs4231_ebus_free(chip); |
a131430c | 2061 | snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev); |
1da177e4 LT |
2062 | return -EBUSY; |
2063 | } | |
2064 | ||
2065 | if (snd_cs4231_probe(chip) < 0) { | |
2066 | snd_cs4231_ebus_free(chip); | |
2067 | return -ENODEV; | |
2068 | } | |
2069 | snd_cs4231_init(chip); | |
2070 | ||
2071 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
2072 | chip, &snd_cs4231_ebus_dev_ops)) < 0) { | |
2073 | snd_cs4231_ebus_free(chip); | |
2074 | return err; | |
2075 | } | |
2076 | ||
1da177e4 LT |
2077 | return 0; |
2078 | } | |
2079 | ||
be9b7e8c | 2080 | static int __init cs4231_ebus_attach(struct linux_ebus_device *edev) |
1da177e4 | 2081 | { |
be9b7e8c | 2082 | struct snd_card *card; |
1da177e4 LT |
2083 | int err; |
2084 | ||
2085 | err = cs4231_attach_begin(&card); | |
2086 | if (err) | |
2087 | return err; | |
2088 | ||
c6387a48 | 2089 | sprintf(card->longname, "%s at 0x%lx, irq %d", |
1da177e4 LT |
2090 | card->shortname, |
2091 | edev->resource[0].start, | |
c6387a48 | 2092 | edev->irqs[0]); |
1da177e4 | 2093 | |
c6c2d57b KH |
2094 | err = snd_cs4231_ebus_create(card, edev, dev); |
2095 | if (err < 0) { | |
1da177e4 LT |
2096 | snd_card_free(card); |
2097 | return err; | |
2098 | } | |
2099 | ||
c6c2d57b | 2100 | return cs4231_attach_finish(card); |
1da177e4 LT |
2101 | } |
2102 | #endif | |
2103 | ||
2104 | static int __init cs4231_init(void) | |
2105 | { | |
2106 | #ifdef SBUS_SUPPORT | |
2107 | struct sbus_bus *sbus; | |
2108 | struct sbus_dev *sdev; | |
2109 | #endif | |
2110 | #ifdef EBUS_SUPPORT | |
2111 | struct linux_ebus *ebus; | |
2112 | struct linux_ebus_device *edev; | |
2113 | #endif | |
2114 | int found; | |
2115 | ||
2116 | found = 0; | |
2117 | ||
2118 | #ifdef SBUS_SUPPORT | |
2119 | for_all_sbusdev(sdev, sbus) { | |
2120 | if (!strcmp(sdev->prom_name, "SUNW,CS4231")) { | |
2121 | if (cs4231_sbus_attach(sdev) == 0) | |
2122 | found++; | |
2123 | } | |
2124 | } | |
2125 | #endif | |
2126 | #ifdef EBUS_SUPPORT | |
2127 | for_each_ebus(ebus) { | |
2128 | for_each_ebusdev(edev, ebus) { | |
2129 | int match = 0; | |
2130 | ||
690c8fd3 | 2131 | if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) { |
1da177e4 | 2132 | match = 1; |
690c8fd3 | 2133 | } else if (!strcmp(edev->prom_node->name, "audio")) { |
3198514d | 2134 | const char *compat; |
1da177e4 | 2135 | |
690c8fd3 DM |
2136 | compat = of_get_property(edev->prom_node, |
2137 | "compatible", NULL); | |
2138 | if (compat && !strcmp(compat, "SUNW,CS4231")) | |
1da177e4 LT |
2139 | match = 1; |
2140 | } | |
2141 | ||
2142 | if (match && | |
2143 | cs4231_ebus_attach(edev) == 0) | |
2144 | found++; | |
2145 | } | |
2146 | } | |
2147 | #endif | |
2148 | ||
2149 | ||
2150 | return (found > 0) ? 0 : -EIO; | |
2151 | } | |
2152 | ||
2153 | static void __exit cs4231_exit(void) | |
2154 | { | |
be9b7e8c | 2155 | struct snd_cs4231 *p = cs4231_list; |
1da177e4 LT |
2156 | |
2157 | while (p != NULL) { | |
be9b7e8c | 2158 | struct snd_cs4231 *next = p->next; |
1da177e4 LT |
2159 | |
2160 | snd_card_free(p->card); | |
2161 | ||
2162 | p = next; | |
2163 | } | |
2164 | ||
2165 | cs4231_list = NULL; | |
2166 | } | |
2167 | ||
2168 | module_init(cs4231_init); | |
2169 | module_exit(cs4231_exit); |