[linux-2.6-block.git] / sound / soc / txx9 / txx9aclc.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Generic TXx9 ACLC platform driver
 *
 * Copyright (C) 2009 Atsushi Nemoto
 *
 * Based on RBTX49xx patch from CELF patch archive.
 * (C) Copyright TOSHIBA CORPORATION 2004-2006
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <linux/dmaengine.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include "txx9aclc.h"

#define DRV_NAME "txx9aclc"

static struct txx9aclc_soc_device {
	struct txx9aclc_dmadata dmadata[2];
} txx9aclc_soc_device;

/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;

static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
			     struct txx9aclc_dmadata *dmadata);

static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
	/*
	 * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
	 * needs more works for noncoherent MIPS.
	 */
	.info		  = SNDRV_PCM_INFO_INTERLEAVED |
			    SNDRV_PCM_INFO_BATCH |
			    SNDRV_PCM_INFO_PAUSE,
	.period_bytes_min = 1024,
	.period_bytes_max = 8 * 1024,
	.periods_min	  = 2,
	.periods_max	  = 4096,
	.buffer_bytes_max = 32 * 1024,
};

static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
				  struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
	struct txx9aclc_dmadata *dmadata = runtime->private_data;
	int ret;

	ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
	if (ret < 0)
		return ret;

	dev_dbg(component->dev,
		"runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
		"runtime->min_align %ld\n",
		(unsigned long)runtime->dma_area,
		(unsigned long)runtime->dma_addr, runtime->dma_bytes,
		runtime->min_align);
	dev_dbg(component->dev,
		"periods %d period_bytes %d stream %d\n",
		params_periods(params), params_period_bytes(params),
		substream->stream);

	dmadata->substream = substream;
	dmadata->pos = 0;
	return 0;
}

static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
{
	return snd_pcm_lib_free_pages(substream);
}

static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct txx9aclc_dmadata *dmadata = runtime->private_data;

	dmadata->dma_addr = runtime->dma_addr;
	dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
	dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);

	if (dmadata->buffer_bytes == dmadata->period_bytes) {
		dmadata->frag_bytes = dmadata->period_bytes >> 1;
		dmadata->frags = 2;
	} else {
		dmadata->frag_bytes = dmadata->period_bytes;
		dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
	}
	dmadata->frag_count = 0;
	dmadata->pos = 0;
	return 0;
}

static void txx9aclc_dma_complete(void *arg)
{
	struct txx9aclc_dmadata *dmadata = arg;
	unsigned long flags;

	/* dma completion handler cannot submit new operations */
	spin_lock_irqsave(&dmadata->dma_lock, flags);
	if (dmadata->frag_count >= 0) {
		dmadata->dmacount--;
		if (!WARN_ON(dmadata->dmacount < 0))
			tasklet_schedule(&dmadata->tasklet);
	}
	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
}

static struct dma_async_tx_descriptor *
txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
{
	struct dma_chan *chan = dmadata->dma_chan;
	struct dma_async_tx_descriptor *desc;
	struct scatterlist sg;

	sg_init_table(&sg, 1);
	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
		    dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
	sg_dma_address(&sg) = buf_dma_addr;
	desc = dmaengine_prep_slave_sg(chan, &sg, 1,
		dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
		DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
		DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		dev_err(&chan->dev->device, "cannot prepare slave dma\n");
		return NULL;
	}
	desc->callback = txx9aclc_dma_complete;
	desc->callback_param = dmadata;
	dmaengine_submit(desc);
	return desc;
}

#define NR_DMA_CHAIN		2

static void txx9aclc_dma_tasklet(unsigned long data)
{
	struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
	struct dma_chan *chan = dmadata->dma_chan;
	struct dma_async_tx_descriptor *desc;
	struct snd_pcm_substream *substream = dmadata->substream;
	u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
		ACCTL_AUDODMA : ACCTL_AUDIDMA;
	int i;
	unsigned long flags;

	spin_lock_irqsave(&dmadata->dma_lock, flags);
	if (dmadata->frag_count < 0) {
		struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
		void __iomem *base = drvdata->base;

		spin_unlock_irqrestore(&dmadata->dma_lock, flags);
		dmaengine_terminate_all(chan);
		/* first time */
		for (i = 0; i < NR_DMA_CHAIN; i++) {
			desc = txx9aclc_dma_submit(dmadata,
				dmadata->dma_addr + i * dmadata->frag_bytes);
			if (!desc)
				return;
		}
		dmadata->dmacount = NR_DMA_CHAIN;
		dma_async_issue_pending(chan);
		spin_lock_irqsave(&dmadata->dma_lock, flags);
		__raw_writel(ctlbit, base + ACCTLEN);
		dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
		spin_unlock_irqrestore(&dmadata->dma_lock, flags);
		return;
	}
	if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
		spin_unlock_irqrestore(&dmadata->dma_lock, flags);
		return;
	}
	while (dmadata->dmacount < NR_DMA_CHAIN) {
		dmadata->dmacount++;
		spin_unlock_irqrestore(&dmadata->dma_lock, flags);
		desc = txx9aclc_dma_submit(dmadata,
			dmadata->dma_addr +
			dmadata->frag_count * dmadata->frag_bytes);
		if (!desc)
			return;
		dma_async_issue_pending(chan);

		spin_lock_irqsave(&dmadata->dma_lock, flags);
		dmadata->frag_count++;
		dmadata->frag_count %= dmadata->frags;
		dmadata->pos += dmadata->frag_bytes;
		dmadata->pos %= dmadata->buffer_bytes;
		if ((dmadata->frag_count * dmadata->frag_bytes) %
		    dmadata->period_bytes == 0)
			snd_pcm_period_elapsed(substream);
	}
	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
}

static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
	void __iomem *base = drvdata->base;
	unsigned long flags;
	int ret = 0;
	u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
		ACCTL_AUDODMA : ACCTL_AUDIDMA;

	spin_lock_irqsave(&dmadata->dma_lock, flags);
	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
		dmadata->frag_count = -1;
		tasklet_schedule(&dmadata->tasklet);
		break;
	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	case SNDRV_PCM_TRIGGER_SUSPEND:
		__raw_writel(ctlbit, base + ACCTLDIS);
		break;
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	case SNDRV_PCM_TRIGGER_RESUME:
		__raw_writel(ctlbit, base + ACCTLEN);
		break;
	default:
		ret = -EINVAL;
	}
	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	return ret;
}

static snd_pcm_uframes_t
txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
{
	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;

	return bytes_to_frames(substream->runtime, dmadata->pos);
}

static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
{
	struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
	struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
	int ret;

	ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
	if (ret)
		return ret;
	/* ensure that buffer size is a multiple of period size */
	ret = snd_pcm_hw_constraint_integer(substream->runtime,
					    SNDRV_PCM_HW_PARAM_PERIODS);
	if (ret < 0)
		return ret;
	substream->runtime->private_data = dmadata;
	return 0;
}

static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
{
	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
	struct dma_chan *chan = dmadata->dma_chan;

	dmadata->frag_count = -1;
	dmaengine_terminate_all(chan);
	return 0;
}

static const struct snd_pcm_ops txx9aclc_pcm_ops = {
	.open		= txx9aclc_pcm_open,
	.close		= txx9aclc_pcm_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= txx9aclc_pcm_hw_params,
	.hw_free	= txx9aclc_pcm_hw_free,
	.prepare	= txx9aclc_pcm_prepare,
	.trigger	= txx9aclc_pcm_trigger,
	.pointer	= txx9aclc_pcm_pointer,
};

static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_card *card = rtd->card->snd_card;
	struct snd_soc_dai *dai = rtd->cpu_dai;
	struct snd_pcm *pcm = rtd->pcm;
	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
	struct platform_device *pdev = to_platform_device(component->dev);
	struct txx9aclc_soc_device *dev;
	struct resource *r;
	int i;
	int ret;

	/* at this point onwards the AC97 component has probed and this will be valid */
	dev = snd_soc_dai_get_drvdata(dai);

	dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
	dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
	for (i = 0; i < 2; i++) {
		r = platform_get_resource(pdev, IORESOURCE_DMA, i);
		if (!r) {
			ret = -EBUSY;
			goto exit;
		}
		dev->dmadata[i].dma_res = r;
		ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
		if (ret)
			goto exit;
	}

	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
		card->dev, 64 * 1024, 4 * 1024 * 1024);
	return 0;

exit:
	for (i = 0; i < 2; i++) {
		if (dev->dmadata[i].dma_chan)
			dma_release_channel(dev->dmadata[i].dma_chan);
		dev->dmadata[i].dma_chan = NULL;
	}
	return ret;
}

static bool filter(struct dma_chan *chan, void *param)
{
	struct txx9aclc_dmadata *dmadata = param;
	char *devname;
	bool found = false;

	devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
		(int)dmadata->dma_res->start);
	if (strcmp(dev_name(chan->device->dev), devname) == 0) {
		chan->private = &dmadata->dma_slave;
		found = true;
	}
	kfree(devname);
	return found;
}

static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
			     struct txx9aclc_dmadata *dmadata)
{
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
	struct txx9dmac_slave *ds = &dmadata->dma_slave;
	dma_cap_mask_t mask;

	spin_lock_init(&dmadata->dma_lock);

	ds->reg_width = sizeof(u32);
	if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		ds->tx_reg = drvdata->physbase + ACAUDODAT;
		ds->rx_reg = 0;
	} else {
		ds->tx_reg = 0;
		ds->rx_reg = drvdata->physbase + ACAUDIDAT;
	}

	/* Try to grab a DMA channel */
	dma_cap_zero(mask);
	dma_cap_set(DMA_SLAVE, mask);
	dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
	if (!dmadata->dma_chan) {
		printk(KERN_ERR
			"DMA channel for %s is not available\n",
			dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
			"playback" : "capture");
		return -EBUSY;
	}
	tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
		     (unsigned long)dmadata);
	return 0;
}

static int txx9aclc_pcm_probe(struct snd_soc_component *component)
{
	snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
	return 0;
}

static void txx9aclc_pcm_remove(struct snd_soc_component *component)
{
	struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
	void __iomem *base = drvdata->base;
	int i;

	/* disable all FIFO DMAs */
	__raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
	/* dummy R/W to clear pending DMAREQ if any */
	__raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);

	for (i = 0; i < 2; i++) {
		struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
		struct dma_chan *chan = dmadata->dma_chan;

		if (chan) {
			dmadata->frag_count = -1;
			dmaengine_terminate_all(chan);
			dma_release_channel(chan);
		}
		dev->dmadata[i].dma_chan = NULL;
	}
}

static const struct snd_soc_component_driver txx9aclc_soc_component = {
	.name		= DRV_NAME,
	.probe		= txx9aclc_pcm_probe,
	.remove		= txx9aclc_pcm_remove,
	.ops		= &txx9aclc_pcm_ops,
	.pcm_new	= txx9aclc_pcm_new,
};

static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
{
	return devm_snd_soc_register_component(&pdev->dev,
					&txx9aclc_soc_component, NULL, 0);
}

static struct platform_driver txx9aclc_pcm_driver = {
	.driver = {
			.name = "txx9aclc-pcm-audio",
	},

	.probe = txx9aclc_soc_platform_probe,
};

module_platform_driver(txx9aclc_pcm_driver);

MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
e24805dd AN	2	/*
	3	* Generic TXx9 ACLC platform driver
	4	*
	5	* Copyright (C) 2009 Atsushi Nemoto
	6	*
	7	* Based on RBTX49xx patch from CELF patch archive.
	8	* (C) Copyright TOSHIBA CORPORATION 2004-2006
e24805dd AN	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/scatterlist.h>
5a0e3ad6	15	#include <linux/slab.h>
ff495d3a	16	#include <linux/dmaengine.h>
e24805dd AN	17	#include <sound/core.h>
	18	#include <sound/pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/soc.h>
	21	#include "txx9aclc.h"
	22
e049cf4e KM	23	#define DRV_NAME "txx9aclc"
e049cf4e KM	24
f0fba2ad LG	25	static struct txx9aclc_soc_device {
	26	struct txx9aclc_dmadata dmadata[2];
	27	} txx9aclc_soc_device;
	28
	29	/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
	30	static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
	31
	32	static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
	33	struct txx9aclc_dmadata *dmadata);
	34
e24805dd AN	35	static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
	36	/*
	37	* REVISIT: SNDRV_PCM_INFO_MMAP \| SNDRV_PCM_INFO_MMAP_VALID
	38	* needs more works for noncoherent MIPS.
	39	*/
	40	.info = SNDRV_PCM_INFO_INTERLEAVED \|
	41	SNDRV_PCM_INFO_BATCH \|
	42	SNDRV_PCM_INFO_PAUSE,
e24805dd AN	43	.period_bytes_min = 1024,
	44	.period_bytes_max = 8 * 1024,
	45	.periods_min = 2,
	46	.periods_max = 4096,
	47	.buffer_bytes_max = 32 * 1024,
	48	};
	49
	50	static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
	51	struct snd_pcm_hw_params *params)
	52	{
	53	struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
e24805dd	54	struct snd_pcm_runtime *runtime = substream->runtime;
e049cf4e	55	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
e24805dd AN	56	struct txx9aclc_dmadata *dmadata = runtime->private_data;
	57	int ret;
	58
	59	ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
	60	if (ret < 0)
	61	return ret;
	62
e049cf4e	63	dev_dbg(component->dev,
e24805dd AN	64	"runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
	65	"runtime->min_align %ld\n",
	66	(unsigned long)runtime->dma_area,
	67	(unsigned long)runtime->dma_addr, runtime->dma_bytes,
	68	runtime->min_align);
e049cf4e	69	dev_dbg(component->dev,
e24805dd AN	70	"periods %d period_bytes %d stream %d\n",
	71	params_periods(params), params_period_bytes(params),
	72	substream->stream);
	73
	74	dmadata->substream = substream;
	75	dmadata->pos = 0;
	76	return 0;
	77	}
	78
	79	static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
	80	{
	81	return snd_pcm_lib_free_pages(substream);
	82	}
	83
	84	static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
	85	{
	86	struct snd_pcm_runtime *runtime = substream->runtime;
	87	struct txx9aclc_dmadata *dmadata = runtime->private_data;
	88
	89	dmadata->dma_addr = runtime->dma_addr;
	90	dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
	91	dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
	92
	93	if (dmadata->buffer_bytes == dmadata->period_bytes) {
	94	dmadata->frag_bytes = dmadata->period_bytes >> 1;
	95	dmadata->frags = 2;
	96	} else {
	97	dmadata->frag_bytes = dmadata->period_bytes;
	98	dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
	99	}
	100	dmadata->frag_count = 0;
	101	dmadata->pos = 0;
	102	return 0;
	103	}
	104
	105	static void txx9aclc_dma_complete(void *arg)
	106	{
	107	struct txx9aclc_dmadata *dmadata = arg;
	108	unsigned long flags;
	109
	110	/* dma completion handler cannot submit new operations */
	111	spin_lock_irqsave(&dmadata->dma_lock, flags);
	112	if (dmadata->frag_count >= 0) {
	113	dmadata->dmacount--;
cb1b1026 TI	114	if (!WARN_ON(dmadata->dmacount < 0))
cb1b1026 TI	115	tasklet_schedule(&dmadata->tasklet);
e24805dd AN	116	}
	117	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	118	}
	119
	120	static struct dma_async_tx_descriptor *
	121	txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
	122	{
	123	struct dma_chan *chan = dmadata->dma_chan;
	124	struct dma_async_tx_descriptor *desc;
	125	struct scatterlist sg;
	126
	127	sg_init_table(&sg, 1);
	128	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
	129	dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
	130	sg_dma_address(&sg) = buf_dma_addr;
16052827	131	desc = dmaengine_prep_slave_sg(chan, &sg, 1,
e24805dd	132	dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
35e16581	133	DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
e24805dd AN	134	DMA_PREP_INTERRUPT \| DMA_CTRL_ACK);
	135	if (!desc) {
	136	dev_err(&chan->dev->device, "cannot prepare slave dma\n");
	137	return NULL;
	138	}
	139	desc->callback = txx9aclc_dma_complete;
	140	desc->callback_param = dmadata;
ff495d3a	141	dmaengine_submit(desc);
e24805dd AN	142	return desc;
	143	}
	144
	145	#define NR_DMA_CHAIN 2
	146
	147	static void txx9aclc_dma_tasklet(unsigned long data)
	148	{
	149	struct txx9aclc_dmadata dmadata = (struct txx9aclc_dmadata )data;
	150	struct dma_chan *chan = dmadata->dma_chan;
	151	struct dma_async_tx_descriptor *desc;
	152	struct snd_pcm_substream *substream = dmadata->substream;
	153	u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
	154	ACCTL_AUDODMA : ACCTL_AUDIDMA;
	155	int i;
	156	unsigned long flags;
	157
	158	spin_lock_irqsave(&dmadata->dma_lock, flags);
	159	if (dmadata->frag_count < 0) {
f0fba2ad	160	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
e24805dd AN	161	void __iomem *base = drvdata->base;
	162
	163	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
ff495d3a	164	dmaengine_terminate_all(chan);
e24805dd AN	165	/* first time */
	166	for (i = 0; i < NR_DMA_CHAIN; i++) {
	167	desc = txx9aclc_dma_submit(dmadata,
	168	dmadata->dma_addr + i * dmadata->frag_bytes);
	169	if (!desc)
	170	return;
	171	}
	172	dmadata->dmacount = NR_DMA_CHAIN;
ff495d3a	173	dma_async_issue_pending(chan);
e24805dd AN	174	spin_lock_irqsave(&dmadata->dma_lock, flags);
	175	__raw_writel(ctlbit, base + ACCTLEN);
	176	dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
	177	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	178	return;
	179	}
cb1b1026 TI	180	if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
	181	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	182	return;
	183	}
e24805dd AN	184	while (dmadata->dmacount < NR_DMA_CHAIN) {
	185	dmadata->dmacount++;
	186	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	187	desc = txx9aclc_dma_submit(dmadata,
	188	dmadata->dma_addr +
	189	dmadata->frag_count * dmadata->frag_bytes);
	190	if (!desc)
	191	return;
ff495d3a	192	dma_async_issue_pending(chan);
e24805dd AN	193
	194	spin_lock_irqsave(&dmadata->dma_lock, flags);
	195	dmadata->frag_count++;
	196	dmadata->frag_count %= dmadata->frags;
	197	dmadata->pos += dmadata->frag_bytes;
	198	dmadata->pos %= dmadata->buffer_bytes;
	199	if ((dmadata->frag_count * dmadata->frag_bytes) %
	200	dmadata->period_bytes == 0)
	201	snd_pcm_period_elapsed(substream);
	202	}
	203	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	204	}
	205
	206	static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
	207	{
	208	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
84052652	209	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
e24805dd AN	210	void __iomem *base = drvdata->base;
	211	unsigned long flags;
	212	int ret = 0;
	213	u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
	214	ACCTL_AUDODMA : ACCTL_AUDIDMA;
	215
	216	spin_lock_irqsave(&dmadata->dma_lock, flags);
	217	switch (cmd) {
	218	case SNDRV_PCM_TRIGGER_START:
	219	dmadata->frag_count = -1;
	220	tasklet_schedule(&dmadata->tasklet);
	221	break;
	222	case SNDRV_PCM_TRIGGER_STOP:
	223	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	224	case SNDRV_PCM_TRIGGER_SUSPEND:
	225	__raw_writel(ctlbit, base + ACCTLDIS);
	226	break;
	227	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	228	case SNDRV_PCM_TRIGGER_RESUME:
	229	__raw_writel(ctlbit, base + ACCTLEN);
	230	break;
	231	default:
	232	ret = -EINVAL;
	233	}
	234	spin_unlock_irqrestore(&dmadata->dma_lock, flags);
	235	return ret;
	236	}
	237
	238	static snd_pcm_uframes_t
	239	txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
	240	{
	241	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
	242
	243	return bytes_to_frames(substream->runtime, dmadata->pos);
	244	}
	245
	246	static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
	247	{
f0fba2ad	248	struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
e24805dd AN	249	struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
	250	int ret;
	251
	252	ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
	253	if (ret)
	254	return ret;
	255	/* ensure that buffer size is a multiple of period size */
	256	ret = snd_pcm_hw_constraint_integer(substream->runtime,
	257	SNDRV_PCM_HW_PARAM_PERIODS);
	258	if (ret < 0)
	259	return ret;
	260	substream->runtime->private_data = dmadata;
	261	return 0;
	262	}
	263
	264	static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
	265	{
	266	struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
	267	struct dma_chan *chan = dmadata->dma_chan;
	268
	269	dmadata->frag_count = -1;
ff495d3a	270	dmaengine_terminate_all(chan);
e24805dd AN	271	return 0;
	272	}
	273
5144468e	274	static const struct snd_pcm_ops txx9aclc_pcm_ops = {
e24805dd AN	275	.open = txx9aclc_pcm_open,
	276	.close = txx9aclc_pcm_close,
	277	.ioctl = snd_pcm_lib_ioctl,
	278	.hw_params = txx9aclc_pcm_hw_params,
	279	.hw_free = txx9aclc_pcm_hw_free,
	280	.prepare = txx9aclc_pcm_prepare,
	281	.trigger = txx9aclc_pcm_trigger,
	282	.pointer = txx9aclc_pcm_pointer,
	283	};
	284
552d1ef6	285	static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
e24805dd	286	{
06132fdf	287	struct snd_card *card = rtd->card->snd_card;
552d1ef6 LG	288	struct snd_soc_dai *dai = rtd->cpu_dai;
552d1ef6 LG	289	struct snd_pcm *pcm = rtd->pcm;
e049cf4e KM	290	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
e049cf4e KM	291	struct platform_device *pdev = to_platform_device(component->dev);
f0fba2ad LG	292	struct txx9aclc_soc_device *dev;
	293	struct resource *r;
	294	int i;
	295	int ret;
	296
	297	/* at this point onwards the AC97 component has probed and this will be valid */
	298	dev = snd_soc_dai_get_drvdata(dai);
	299
	300	dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
	301	dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
	302	for (i = 0; i < 2; i++) {
	303	r = platform_get_resource(pdev, IORESOURCE_DMA, i);
	304	if (!r) {
	305	ret = -EBUSY;
	306	goto exit;
	307	}
	308	dev->dmadata[i].dma_res = r;
	309	ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
	310	if (ret)
	311	goto exit;
	312	}
4f39e4c9 TI	313
4f39e4c9 TI	314	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
e24805dd	315	card->dev, 64 * 1024, 4 * 1024 * 1024);
4f39e4c9	316	return 0;
f0fba2ad LG	317
	318	exit:
	319	for (i = 0; i < 2; i++) {
	320	if (dev->dmadata[i].dma_chan)
	321	dma_release_channel(dev->dmadata[i].dma_chan);
	322	dev->dmadata[i].dma_chan = NULL;
	323	}
	324	return ret;
e24805dd AN	325	}
	326
	327	static bool filter(struct dma_chan chan, void param)
	328	{
	329	struct txx9aclc_dmadata *dmadata = param;
647613e9 AN	330	char *devname;
647613e9 AN	331	bool found = false;
e24805dd	332
647613e9	333	devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
e24805dd AN	334	(int)dmadata->dma_res->start);
	335	if (strcmp(dev_name(chan->device->dev), devname) == 0) {
	336	chan->private = &dmadata->dma_slave;
647613e9	337	found = true;
e24805dd	338	}
647613e9 AN	339	kfree(devname);
647613e9 AN	340	return found;
e24805dd AN	341	}
	342
	343	static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
	344	struct txx9aclc_dmadata *dmadata)
	345	{
84052652	346	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
e24805dd AN	347	struct txx9dmac_slave *ds = &dmadata->dma_slave;
	348	dma_cap_mask_t mask;
	349
	350	spin_lock_init(&dmadata->dma_lock);
	351
	352	ds->reg_width = sizeof(u32);
	353	if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
	354	ds->tx_reg = drvdata->physbase + ACAUDODAT;
	355	ds->rx_reg = 0;
	356	} else {
	357	ds->tx_reg = 0;
	358	ds->rx_reg = drvdata->physbase + ACAUDIDAT;
	359	}
	360
	361	/* Try to grab a DMA channel */
	362	dma_cap_zero(mask);
	363	dma_cap_set(DMA_SLAVE, mask);
	364	dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
	365	if (!dmadata->dma_chan) {
f0fba2ad	366	printk(KERN_ERR
e24805dd AN	367	"DMA channel for %s is not available\n",
	368	dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
	369	"playback" : "capture");
	370	return -EBUSY;
	371	}
	372	tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
	373	(unsigned long)dmadata);
	374	return 0;
	375	}
	376
e049cf4e	377	static int txx9aclc_pcm_probe(struct snd_soc_component *component)
e24805dd	378	{
e049cf4e	379	snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
e24805dd	380	return 0;
e24805dd AN	381	}
e24805dd AN	382
e049cf4e	383	static void txx9aclc_pcm_remove(struct snd_soc_component *component)
e24805dd	384	{
e049cf4e	385	struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
f0fba2ad	386	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
e24805dd AN	387	void __iomem *base = drvdata->base;
	388	int i;
	389
	390	/* disable all FIFO DMAs */
	391	__raw_writel(ACCTL_AUDODMA \| ACCTL_AUDIDMA, base + ACCTLDIS);
	392	/* dummy R/W to clear pending DMAREQ if any */
	393	__raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
	394
	395	for (i = 0; i < 2; i++) {
	396	struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
	397	struct dma_chan *chan = dmadata->dma_chan;
c2dcce36	398
e24805dd AN	399	if (chan) {
e24805dd AN	400	dmadata->frag_count = -1;
ff495d3a	401	dmaengine_terminate_all(chan);
e24805dd AN	402	dma_release_channel(chan);
	403	}
	404	dev->dmadata[i].dma_chan = NULL;
	405	}
e24805dd AN	406	}
e24805dd AN	407
e049cf4e KM	408	static const struct snd_soc_component_driver txx9aclc_soc_component = {
e049cf4e KM	409	.name = DRV_NAME,
e24805dd AN	410	.probe = txx9aclc_pcm_probe,
e24805dd AN	411	.remove = txx9aclc_pcm_remove,
f0fba2ad	412	.ops = &txx9aclc_pcm_ops,
e24805dd	413	.pcm_new = txx9aclc_pcm_new,
e24805dd	414	};
e24805dd	415
d8628d1c	416	static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
e24805dd	417	{
e049cf4e KM	418	return devm_snd_soc_register_component(&pdev->dev,
e049cf4e KM	419	&txx9aclc_soc_component, NULL, 0);
e24805dd AN	420	}
e24805dd AN	421
f0fba2ad LG	422	static struct platform_driver txx9aclc_pcm_driver = {
	423	.driver = {
	424	.name = "txx9aclc-pcm-audio",
f0fba2ad LG	425	},
	426
	427	.probe = txx9aclc_soc_platform_probe,
f0fba2ad LG	428	};
f0fba2ad LG	429
33d316cd	430	module_platform_driver(txx9aclc_pcm_driver);
e24805dd AN	431
	432	MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
	433	MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
	434	MODULE_LICENSE("GPL");