[linux-2.6-block.git] / sound / soc / txx9 / txx9aclc-ac97.c

/*
 * TXx9 ACLC AC97 driver
 *
 * Copyright (C) 2009 Atsushi Nemoto
 *
 * Based on RBTX49xx patch from CELF patch archive.
 * (C) Copyright TOSHIBA CORPORATION 2004-2006
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/gfp.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include "txx9aclc.h"

#define AC97_DIR	\
	(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)

#define AC97_RATES	\
	SNDRV_PCM_RATE_8000_48000

#ifdef __BIG_ENDIAN
#define AC97_FMTS	SNDRV_PCM_FMTBIT_S16_BE
#else
#define AC97_FMTS	SNDRV_PCM_FMTBIT_S16_LE
#endif

static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);

/* REVISIT: How to find txx9aclc_soc_device from snd_ac97? */
static struct txx9aclc_soc_device *txx9aclc_soc_dev;

static int txx9aclc_regready(struct txx9aclc_soc_device *dev)
{
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);

	return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
}

/* AC97 controller reads codec register */
static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
					 unsigned short reg)
{
	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
	void __iomem *base = drvdata->base;
	u32 dat;

	if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
		return 0xffff;
	reg |= ac97->num << 7;
	dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
	__raw_writel(dat, base + ACREGACC);
	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
		__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
		dev_err(dev->soc_dev.dev, "ac97 read timeout (reg %#x)\n", reg);
		dat = 0xffff;
		goto done;
	}
	dat = __raw_readl(base + ACREGACC);
	if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
		dev_err(dev->soc_dev.dev, "reg mismatch %x with %x\n",
			dat, reg);
		dat = 0xffff;
		goto done;
	}
	dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
done:
	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
	return dat;
}

/* AC97 controller writes to codec register */
static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
				unsigned short val)
{
	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
	void __iomem *base = drvdata->base;

	__raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
		     (val << ACREGACC_DAT_SHIFT),
		     base + ACREGACC);
	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
		dev_err(dev->soc_dev.dev,
			"ac97 write timeout (reg %#x)\n", reg);
	}
	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
}

static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
{
	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
	void __iomem *base = drvdata->base;
	u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;

	__raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
	mmiowb();
	udelay(1);
	__raw_writel(ACCTL_ENLINK, base + ACCTLEN);
	/* wait for primary codec ready status */
	__raw_writel(ready, base + ACINTEN);
	if (!wait_event_timeout(ac97_waitq,
				(__raw_readl(base + ACINTSTS) & ready) == ready,
				HZ)) {
		dev_err(&ac97->dev, "primary codec is not ready "
			"(status %#x)\n",
			__raw_readl(base + ACINTSTS));
	}
	__raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
	__raw_writel(ready, base + ACINTDIS);
}

/* AC97 controller operations */
struct snd_ac97_bus_ops soc_ac97_ops = {
	.read		= txx9aclc_ac97_read,
	.write		= txx9aclc_ac97_write,
	.reset		= txx9aclc_ac97_cold_reset,
};
EXPORT_SYMBOL_GPL(soc_ac97_ops);

static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
{
	struct txx9aclc_plat_drvdata *drvdata = dev_id;
	void __iomem *base = drvdata->base;

	__raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
	wake_up(&ac97_waitq);
	return IRQ_HANDLED;
}

static int txx9aclc_ac97_probe(struct platform_device *pdev,
			       struct snd_soc_dai *dai)
{
	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
	struct txx9aclc_soc_device *dev =
		container_of(socdev, struct txx9aclc_soc_device, soc_dev);

	dev->aclc_pdev = to_platform_device(dai->dev);
	txx9aclc_soc_dev = dev;
	return 0;
}

static void txx9aclc_ac97_remove(struct platform_device *pdev,
				 struct snd_soc_dai *dai)
{
	struct platform_device *aclc_pdev = to_platform_device(dai->dev);
	struct txx9aclc_plat_drvdata *drvdata = platform_get_drvdata(aclc_pdev);

	/* disable AC-link */
	__raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
	txx9aclc_soc_dev = NULL;
}

struct snd_soc_dai txx9aclc_ac97_dai = {
	.name			= "txx9aclc_ac97",
	.ac97_control		= 1,
	.probe			= txx9aclc_ac97_probe,
	.remove			= txx9aclc_ac97_remove,
	.playback = {
		.rates		= AC97_RATES,
		.formats	= AC97_FMTS,
		.channels_min	= 2,
		.channels_max	= 2,
	},
	.capture = {
		.rates		= AC97_RATES,
		.formats	= AC97_FMTS,
		.channels_min	= 2,
		.channels_max	= 2,
	},
};
EXPORT_SYMBOL_GPL(txx9aclc_ac97_dai);

static int __devinit txx9aclc_ac97_dev_probe(struct platform_device *pdev)
{
	struct txx9aclc_plat_drvdata *drvdata;
	struct resource *r;
	int err;
	int irq;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;
	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!r)
		return -EBUSY;

	if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
				     dev_name(&pdev->dev)))
		return -EBUSY;

	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
	if (!drvdata)
		return -ENOMEM;
	platform_set_drvdata(pdev, drvdata);
	drvdata->physbase = r->start;
	if (sizeof(drvdata->physbase) > sizeof(r->start) &&
	    r->start >= TXX9_DIRECTMAP_BASE &&
	    r->start < TXX9_DIRECTMAP_BASE + 0x400000)
		drvdata->physbase |= 0xf00000000ull;
	drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
	if (!drvdata->base)
		return -EBUSY;
	err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
			       IRQF_DISABLED, dev_name(&pdev->dev), drvdata);
	if (err < 0)
		return err;

	txx9aclc_ac97_dai.dev = &pdev->dev;
	return snd_soc_register_dai(&txx9aclc_ac97_dai);
}

static int __devexit txx9aclc_ac97_dev_remove(struct platform_device *pdev)
{
	snd_soc_unregister_dai(&txx9aclc_ac97_dai);
	return 0;
}

static struct platform_driver txx9aclc_ac97_driver = {
	.probe		= txx9aclc_ac97_dev_probe,
	.remove		= __devexit_p(txx9aclc_ac97_dev_remove),
	.driver		= {
		.name	= "txx9aclc-ac97",
		.owner	= THIS_MODULE,
	},
};

static int __init txx9aclc_ac97_init(void)
{
	return platform_driver_register(&txx9aclc_ac97_driver);
}

static void __exit txx9aclc_ac97_exit(void)
{
	platform_driver_unregister(&txx9aclc_ac97_driver);
}

module_init(txx9aclc_ac97_init);
module_exit(txx9aclc_ac97_exit);

MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
e24805dd AN	1	/*
	2	* TXx9 ACLC AC97 driver
	3	*
	4	* Copyright (C) 2009 Atsushi Nemoto
	5	*
	6	* Based on RBTX49xx patch from CELF patch archive.
	7	* (C) Copyright TOSHIBA CORPORATION 2004-2006
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/init.h>
	15	#include <linux/module.h>
	16	#include <linux/delay.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/io.h>
5a0e3ad6	19	#include <linux/gfp.h>
e24805dd AN	20	#include <sound/core.h>
	21	#include <sound/pcm.h>
	22	#include <sound/soc.h>
	23	#include "txx9aclc.h"
	24
	25	#define AC97_DIR \
	26	(SND_SOC_DAIDIR_PLAYBACK \| SND_SOC_DAIDIR_CAPTURE)
	27
	28	#define AC97_RATES \
	29	SNDRV_PCM_RATE_8000_48000
	30
	31	#ifdef __BIG_ENDIAN
	32	#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_BE
	33	#else
	34	#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_LE
	35	#endif
	36
	37	static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
	38
	39	/* REVISIT: How to find txx9aclc_soc_device from snd_ac97? */
	40	static struct txx9aclc_soc_device *txx9aclc_soc_dev;
	41
	42	static int txx9aclc_regready(struct txx9aclc_soc_device *dev)
	43	{
	44	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
	45
	46	return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
	47	}
	48
	49	/* AC97 controller reads codec register */
	50	static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
	51	unsigned short reg)
	52	{
	53	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
	54	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
	55	void __iomem *base = drvdata->base;
	56	u32 dat;
	57
	58	if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
	59	return 0xffff;
	60	reg \|= ac97->num << 7;
	61	dat = (reg << ACREGACC_REG_SHIFT) \| ACREGACC_READ;
	62	__raw_writel(dat, base + ACREGACC);
	63	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
	64	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
	65	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
	66	dev_err(dev->soc_dev.dev, "ac97 read timeout (reg %#x)\n", reg);
	67	dat = 0xffff;
	68	goto done;
	69	}
	70	dat = __raw_readl(base + ACREGACC);
	71	if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
	72	dev_err(dev->soc_dev.dev, "reg mismatch %x with %x\n",
	73	dat, reg);
	74	dat = 0xffff;
	75	goto done;
	76	}
	77	dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
	78	done:
	79	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
	80	return dat;
	81	}
	82
	83	/* AC97 controller writes to codec register */
84	static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
85	unsigned short val)
86	{
87	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
88	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
89	void __iomem *base = drvdata->base;
90
91	__raw_writel(((reg \| (ac97->num << 7)) << ACREGACC_REG_SHIFT) \|
92	(val << ACREGACC_DAT_SHIFT),
93	base + ACREGACC);
94	__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
95	if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
96	dev_err(dev->soc_dev.dev,
97	"ac97 write timeout (reg %#x)\n", reg);
98	}
99	__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
100	}
101
102	static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
103	{
104	struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
105	struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
106	void __iomem *base = drvdata->base;
107	u32 ready = ACINT_CODECRDY(ac97->num) \| ACINT_REGACCRDY;
108
109	__raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
110	mmiowb();
111	udelay(1);
112	__raw_writel(ACCTL_ENLINK, base + ACCTLEN);
113	/* wait for primary codec ready status */
114	__raw_writel(ready, base + ACINTEN);
115	if (!wait_event_timeout(ac97_waitq,
116	(__raw_readl(base + ACINTSTS) & ready) == ready,
117	HZ)) {
118	dev_err(&ac97->dev, "primary codec is not ready "
119	"(status %#x)\n",
120	__raw_readl(base + ACINTSTS));
121	}
122	__raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
123	__raw_writel(ready, base + ACINTDIS);
124	}
125
126	/* AC97 controller operations */
127	struct snd_ac97_bus_ops soc_ac97_ops = {
128	.read = txx9aclc_ac97_read,
129	.write = txx9aclc_ac97_write,
130	.reset = txx9aclc_ac97_cold_reset,
131	};
132	EXPORT_SYMBOL_GPL(soc_ac97_ops);
133
134	static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
135	{
136	struct txx9aclc_plat_drvdata *drvdata = dev_id;
137	void __iomem *base = drvdata->base;
138
139	__raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
140	wake_up(&ac97_waitq);
141	return IRQ_HANDLED;
142	}
143
144	static int txx9aclc_ac97_probe(struct platform_device *pdev,
145	struct snd_soc_dai *dai)
146	{
147	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
148	struct txx9aclc_soc_device *dev =
149	container_of(socdev, struct txx9aclc_soc_device, soc_dev);
150
151	dev->aclc_pdev = to_platform_device(dai->dev);
152	txx9aclc_soc_dev = dev;
153	return 0;
154	}
155
156	static void txx9aclc_ac97_remove(struct platform_device *pdev,
157	struct snd_soc_dai *dai)
158	{
159	struct platform_device *aclc_pdev = to_platform_device(dai->dev);
160	struct txx9aclc_plat_drvdata *drvdata = platform_get_drvdata(aclc_pdev);
161
162	/* disable AC-link */
163	__raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
164	txx9aclc_soc_dev = NULL;
165	}
166
167	struct snd_soc_dai txx9aclc_ac97_dai = {
168	.name = "txx9aclc_ac97",
169	.ac97_control = 1,
170	.probe = txx9aclc_ac97_probe,
171	.remove = txx9aclc_ac97_remove,
172	.playback = {
173	.rates = AC97_RATES,
174	.formats = AC97_FMTS,
175	.channels_min = 2,
176	.channels_max = 2,
177	},
178	.capture = {
179	.rates = AC97_RATES,
180	.formats = AC97_FMTS,
181	.channels_min = 2,
182	.channels_max = 2,
183	},
184	};
185	EXPORT_SYMBOL_GPL(txx9aclc_ac97_dai);
186
187	static int __devinit txx9aclc_ac97_dev_probe(struct platform_device *pdev)
188	{
189	struct txx9aclc_plat_drvdata *drvdata;
190	struct resource *r;
191	int err;
192	int irq;
193
194	irq = platform_get_irq(pdev, 0);
195	if (irq < 0)
196	return irq;
197	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
198	if (!r)
199	return -EBUSY;
200
201	if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
202	dev_name(&pdev->dev)))
203	return -EBUSY;
204
205	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
206	if (!drvdata)
207	return -ENOMEM;
208	platform_set_drvdata(pdev, drvdata);
209	drvdata->physbase = r->start;
210	if (sizeof(drvdata->physbase) > sizeof(r->start) &&
211	r->start >= TXX9_DIRECTMAP_BASE &&
212	r->start < TXX9_DIRECTMAP_BASE + 0x400000)
213	drvdata->physbase \|= 0xf00000000ull;
214	drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
215	if (!drvdata->base)
216	return -EBUSY;
217	err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
218	IRQF_DISABLED, dev_name(&pdev->dev), drvdata);
219	if (err < 0)
220	return err;
221
222	txx9aclc_ac97_dai.dev = &pdev->dev;
223	return snd_soc_register_dai(&txx9aclc_ac97_dai);
224	}
225
226	static int __devexit txx9aclc_ac97_dev_remove(struct platform_device *pdev)
227	{
228	snd_soc_unregister_dai(&txx9aclc_ac97_dai);
229	return 0;
230	}
231
232	static struct platform_driver txx9aclc_ac97_driver = {
233	.probe = txx9aclc_ac97_dev_probe,
234	.remove = __devexit_p(txx9aclc_ac97_dev_remove),
235	.driver = {
236	.name = "txx9aclc-ac97",
237	.owner = THIS_MODULE,
238	},
239	};
240
241	static int __init txx9aclc_ac97_init(void)
242	{
243	return platform_driver_register(&txx9aclc_ac97_driver);
244	}
245
246	static void __exit txx9aclc_ac97_exit(void)
247	{
248	platform_driver_unregister(&txx9aclc_ac97_driver);
249	}
250
251	module_init(txx9aclc_ac97_init);
252	module_exit(txx9aclc_ac97_exit);
253
254	MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
255	MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
256	MODULE_LICENSE("GPL");