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e149ca29 | 1 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
8920153c LG |
2 | // |
3 | // This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | // redistributing this file, you may do so under either license. | |
5 | // | |
6 | // Copyright(c) 2018 Intel Corporation. All rights reserved. | |
7 | // | |
8 | // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> | |
9 | // | |
10 | ||
11 | #include "ops.h" | |
12 | #include "sof-priv.h" | |
ee1e79b7 | 13 | #include "sof-audio.h" |
8920153c | 14 | |
700d1677 RS |
15 | /* |
16 | * Helper function to determine the target DSP state during | |
17 | * system suspend. This function only cares about the device | |
18 | * D-states. Platform-specific substates, if any, should be | |
19 | * handled by the platform-specific parts. | |
20 | */ | |
21 | static u32 snd_sof_dsp_power_target(struct snd_sof_dev *sdev) | |
22 | { | |
23 | u32 target_dsp_state; | |
24 | ||
25 | switch (sdev->system_suspend_target) { | |
26 | case SOF_SUSPEND_S3: | |
27 | /* DSP should be in D3 if the system is suspending to S3 */ | |
28 | target_dsp_state = SOF_DSP_PM_D3; | |
29 | break; | |
30 | case SOF_SUSPEND_S0IX: | |
31 | /* | |
32 | * Currently, the only criterion for retaining the DSP in D0 | |
33 | * is that there are streams that ignored the suspend trigger. | |
34 | * Additional criteria such Soundwire clock-stop mode and | |
35 | * device suspend latency considerations will be added later. | |
36 | */ | |
37 | if (snd_sof_stream_suspend_ignored(sdev)) | |
38 | target_dsp_state = SOF_DSP_PM_D0; | |
39 | else | |
40 | target_dsp_state = SOF_DSP_PM_D3; | |
41 | break; | |
42 | default: | |
43 | /* This case would be during runtime suspend */ | |
44 | target_dsp_state = SOF_DSP_PM_D3; | |
45 | break; | |
46 | } | |
47 | ||
48 | return target_dsp_state; | |
49 | } | |
50 | ||
8920153c LG |
51 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) |
52 | static void sof_cache_debugfs(struct snd_sof_dev *sdev) | |
53 | { | |
54 | struct snd_sof_dfsentry *dfse; | |
55 | ||
56 | list_for_each_entry(dfse, &sdev->dfsentry_list, list) { | |
57 | ||
58 | /* nothing to do if debugfs buffer is not IO mem */ | |
59 | if (dfse->type == SOF_DFSENTRY_TYPE_BUF) | |
60 | continue; | |
61 | ||
62 | /* cache memory that is only accessible in D0 */ | |
63 | if (dfse->access_type == SOF_DEBUGFS_ACCESS_D0_ONLY) | |
64 | memcpy_fromio(dfse->cache_buf, dfse->io_mem, | |
65 | dfse->size); | |
66 | } | |
67 | } | |
68 | #endif | |
69 | ||
70 | static int sof_resume(struct device *dev, bool runtime_resume) | |
71 | { | |
72 | struct snd_sof_dev *sdev = dev_get_drvdata(dev); | |
657774ac | 73 | const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; |
31cd6e46 | 74 | const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; |
61e285ca | 75 | u32 old_state = sdev->dsp_power_state.state; |
8920153c LG |
76 | int ret; |
77 | ||
78 | /* do nothing if dsp resume callbacks are not set */ | |
c26fde3b DB |
79 | if (!runtime_resume && !sof_ops(sdev)->resume) |
80 | return 0; | |
81 | ||
82 | if (runtime_resume && !sof_ops(sdev)->runtime_resume) | |
8920153c LG |
83 | return 0; |
84 | ||
410e5e55 PLB |
85 | /* DSP was never successfully started, nothing to resume */ |
86 | if (sdev->first_boot) | |
87 | return 0; | |
88 | ||
8920153c LG |
89 | /* |
90 | * if the runtime_resume flag is set, call the runtime_resume routine | |
91 | * or else call the system resume routine | |
92 | */ | |
93 | if (runtime_resume) | |
94 | ret = snd_sof_dsp_runtime_resume(sdev); | |
95 | else | |
96 | ret = snd_sof_dsp_resume(sdev); | |
97 | if (ret < 0) { | |
98 | dev_err(sdev->dev, | |
99 | "error: failed to power up DSP after resume\n"); | |
100 | return ret; | |
101 | } | |
102 | ||
fc907cc5 RS |
103 | /* |
104 | * Nothing further to be done for platforms that support the low power | |
249ee180 LY |
105 | * D0 substate. Resume trace and return when resuming from |
106 | * low-power D0 substate | |
fc907cc5 RS |
107 | */ |
108 | if (!runtime_resume && sof_ops(sdev)->set_power_state && | |
249ee180 | 109 | old_state == SOF_DSP_PM_D0) { |
1dedbe4f | 110 | ret = sof_fw_trace_resume(sdev); |
249ee180 LY |
111 | if (ret < 0) |
112 | /* non fatal */ | |
113 | dev_warn(sdev->dev, | |
114 | "failed to enable trace after resume %d\n", ret); | |
fb9a8119 | 115 | return 0; |
249ee180 | 116 | } |
fb9a8119 | 117 | |
58a5c9a4 | 118 | sof_set_fw_state(sdev, SOF_FW_BOOT_PREPARE); |
6ca5cecb | 119 | |
8920153c LG |
120 | /* load the firmware */ |
121 | ret = snd_sof_load_firmware(sdev); | |
122 | if (ret < 0) { | |
123 | dev_err(sdev->dev, | |
124 | "error: failed to load DSP firmware after resume %d\n", | |
125 | ret); | |
e2406275 | 126 | sof_set_fw_state(sdev, SOF_FW_BOOT_FAILED); |
8920153c LG |
127 | return ret; |
128 | } | |
129 | ||
58a5c9a4 | 130 | sof_set_fw_state(sdev, SOF_FW_BOOT_IN_PROGRESS); |
6ca5cecb RS |
131 | |
132 | /* | |
133 | * Boot the firmware. The FW boot status will be modified | |
134 | * in snd_sof_run_firmware() depending on the outcome. | |
135 | */ | |
8920153c LG |
136 | ret = snd_sof_run_firmware(sdev); |
137 | if (ret < 0) { | |
138 | dev_err(sdev->dev, | |
139 | "error: failed to boot DSP firmware after resume %d\n", | |
140 | ret); | |
e2406275 | 141 | sof_set_fw_state(sdev, SOF_FW_BOOT_FAILED); |
8920153c LG |
142 | return ret; |
143 | } | |
144 | ||
758f24d4 | 145 | /* resume DMA trace */ |
1dedbe4f | 146 | ret = sof_fw_trace_resume(sdev); |
8920153c LG |
147 | if (ret < 0) { |
148 | /* non fatal */ | |
149 | dev_warn(sdev->dev, | |
150 | "warning: failed to init trace after resume %d\n", | |
151 | ret); | |
152 | } | |
153 | ||
154 | /* restore pipelines */ | |
31cd6e46 RS |
155 | if (tplg_ops->set_up_all_pipelines) { |
156 | ret = tplg_ops->set_up_all_pipelines(sdev, false); | |
157 | if (ret < 0) { | |
158 | dev_err(sdev->dev, "Failed to restore pipeline after resume %d\n", ret); | |
159 | return ret; | |
160 | } | |
8920153c LG |
161 | } |
162 | ||
1069967a PU |
163 | /* Notify clients not managed by pm framework about core resume */ |
164 | sof_resume_clients(sdev); | |
165 | ||
8920153c | 166 | /* notify DSP of system resume */ |
657774ac RS |
167 | if (pm_ops && pm_ops->ctx_restore) { |
168 | ret = pm_ops->ctx_restore(sdev); | |
169 | if (ret < 0) | |
170 | dev_err(sdev->dev, "ctx_restore IPC error during resume: %d\n", ret); | |
171 | } | |
8920153c LG |
172 | |
173 | return ret; | |
174 | } | |
175 | ||
176 | static int sof_suspend(struct device *dev, bool runtime_suspend) | |
177 | { | |
178 | struct snd_sof_dev *sdev = dev_get_drvdata(dev); | |
657774ac | 179 | const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; |
31cd6e46 | 180 | const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; |
1069967a | 181 | pm_message_t pm_state; |
61e285ca | 182 | u32 target_state = 0; |
8920153c LG |
183 | int ret; |
184 | ||
185 | /* do nothing if dsp suspend callback is not set */ | |
c26fde3b DB |
186 | if (!runtime_suspend && !sof_ops(sdev)->suspend) |
187 | return 0; | |
188 | ||
189 | if (runtime_suspend && !sof_ops(sdev)->runtime_suspend) | |
8920153c LG |
190 | return 0; |
191 | ||
6ca5cecb | 192 | if (sdev->fw_state != SOF_FW_BOOT_COMPLETE) |
fb9a8119 | 193 | goto suspend; |
8920153c | 194 | |
a1ce6e43 | 195 | /* prepare for streams to be resumed properly upon resume */ |
7077a07a | 196 | if (!runtime_suspend) { |
8e84b6a4 | 197 | ret = snd_sof_dsp_hw_params_upon_resume(sdev); |
7077a07a RS |
198 | if (ret < 0) { |
199 | dev_err(sdev->dev, | |
200 | "error: setting hw_params flag during suspend %d\n", | |
201 | ret); | |
202 | return ret; | |
203 | } | |
204 | } | |
8920153c | 205 | |
61e285ca | 206 | target_state = snd_sof_dsp_power_target(sdev); |
1069967a | 207 | pm_state.event = target_state; |
fb9a8119 | 208 | |
61e285ca | 209 | /* Skip to platform-specific suspend if DSP is entering D0 */ |
1069967a | 210 | if (target_state == SOF_DSP_PM_D0) { |
1dedbe4f | 211 | sof_fw_trace_suspend(sdev, pm_state); |
1069967a PU |
212 | /* Notify clients not managed by pm framework about core suspend */ |
213 | sof_suspend_clients(sdev, pm_state); | |
fb9a8119 | 214 | goto suspend; |
1069967a | 215 | } |
fb9a8119 | 216 | |
31cd6e46 RS |
217 | if (tplg_ops->tear_down_all_pipelines) |
218 | tplg_ops->tear_down_all_pipelines(sdev, false); | |
0a2dea1f | 219 | |
758f24d4 | 220 | /* suspend DMA trace */ |
1dedbe4f | 221 | sof_fw_trace_suspend(sdev, pm_state); |
fb9a8119 | 222 | |
1069967a PU |
223 | /* Notify clients not managed by pm framework about core suspend */ |
224 | sof_suspend_clients(sdev, pm_state); | |
225 | ||
8920153c LG |
226 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) |
227 | /* cache debugfs contents during runtime suspend */ | |
228 | if (runtime_suspend) | |
229 | sof_cache_debugfs(sdev); | |
230 | #endif | |
231 | /* notify DSP of upcoming power down */ | |
657774ac RS |
232 | if (pm_ops && pm_ops->ctx_save) { |
233 | ret = pm_ops->ctx_save(sdev); | |
234 | if (ret == -EBUSY || ret == -EAGAIN) { | |
235 | /* | |
236 | * runtime PM has logic to handle -EBUSY/-EAGAIN so | |
237 | * pass these errors up | |
238 | */ | |
239 | dev_err(sdev->dev, "ctx_save IPC error during suspend: %d\n", ret); | |
240 | return ret; | |
241 | } else if (ret < 0) { | |
242 | /* FW in unexpected state, continue to power down */ | |
243 | dev_warn(sdev->dev, "ctx_save IPC error: %d, proceeding with suspend\n", | |
244 | ret); | |
245 | } | |
8920153c LG |
246 | } |
247 | ||
fb9a8119 | 248 | suspend: |
6ca5cecb RS |
249 | |
250 | /* return if the DSP was not probed successfully */ | |
251 | if (sdev->fw_state == SOF_FW_BOOT_NOT_STARTED) | |
252 | return 0; | |
253 | ||
fb9a8119 | 254 | /* platform-specific suspend */ |
8920153c | 255 | if (runtime_suspend) |
1c38c922 | 256 | ret = snd_sof_dsp_runtime_suspend(sdev); |
8920153c | 257 | else |
61e285ca | 258 | ret = snd_sof_dsp_suspend(sdev, target_state); |
8920153c LG |
259 | if (ret < 0) |
260 | dev_err(sdev->dev, | |
261 | "error: failed to power down DSP during suspend %d\n", | |
262 | ret); | |
263 | ||
61e285ca RS |
264 | /* Do not reset FW state if DSP is in D0 */ |
265 | if (target_state == SOF_DSP_PM_D0) | |
fb9a8119 RS |
266 | return ret; |
267 | ||
6ca5cecb | 268 | /* reset FW state */ |
58a5c9a4 | 269 | sof_set_fw_state(sdev, SOF_FW_BOOT_NOT_STARTED); |
b640e8a4 | 270 | sdev->enabled_cores_mask = 0; |
6ca5cecb | 271 | |
8920153c LG |
272 | return ret; |
273 | } | |
274 | ||
3541aef1 MR |
275 | int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev) |
276 | { | |
657774ac RS |
277 | const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; |
278 | ||
3541aef1 | 279 | /* Notify DSP of upcoming power down */ |
657774ac RS |
280 | if (sof_ops(sdev)->remove && pm_ops && pm_ops->ctx_save) |
281 | return pm_ops->ctx_save(sdev); | |
3541aef1 MR |
282 | |
283 | return 0; | |
284 | } | |
285 | ||
8920153c LG |
286 | int snd_sof_runtime_suspend(struct device *dev) |
287 | { | |
288 | return sof_suspend(dev, true); | |
289 | } | |
290 | EXPORT_SYMBOL(snd_sof_runtime_suspend); | |
291 | ||
62fde977 KV |
292 | int snd_sof_runtime_idle(struct device *dev) |
293 | { | |
294 | struct snd_sof_dev *sdev = dev_get_drvdata(dev); | |
295 | ||
296 | return snd_sof_dsp_runtime_idle(sdev); | |
297 | } | |
298 | EXPORT_SYMBOL(snd_sof_runtime_idle); | |
299 | ||
8920153c LG |
300 | int snd_sof_runtime_resume(struct device *dev) |
301 | { | |
302 | return sof_resume(dev, true); | |
303 | } | |
304 | EXPORT_SYMBOL(snd_sof_runtime_resume); | |
305 | ||
306 | int snd_sof_resume(struct device *dev) | |
307 | { | |
308 | return sof_resume(dev, false); | |
309 | } | |
310 | EXPORT_SYMBOL(snd_sof_resume); | |
311 | ||
312 | int snd_sof_suspend(struct device *dev) | |
313 | { | |
314 | return sof_suspend(dev, false); | |
315 | } | |
316 | EXPORT_SYMBOL(snd_sof_suspend); | |
0b50b3b1 KJ |
317 | |
318 | int snd_sof_prepare(struct device *dev) | |
319 | { | |
320 | struct snd_sof_dev *sdev = dev_get_drvdata(dev); | |
43437d04 DB |
321 | const struct sof_dev_desc *desc = sdev->pdata->desc; |
322 | ||
323 | /* will suspend to S3 by default */ | |
324 | sdev->system_suspend_target = SOF_SUSPEND_S3; | |
325 | ||
4e1f8648 | 326 | /* |
b54b3a4e PU |
327 | * if the firmware is crashed or boot failed then we try to aim for S3 |
328 | * to reboot the firmware | |
4e1f8648 | 329 | */ |
b54b3a4e PU |
330 | if (sdev->fw_state == SOF_FW_CRASHED || |
331 | sdev->fw_state == SOF_FW_BOOT_FAILED) | |
4e1f8648 PU |
332 | return 0; |
333 | ||
43437d04 DB |
334 | if (!desc->use_acpi_target_states) |
335 | return 0; | |
0b50b3b1 KJ |
336 | |
337 | #if defined(CONFIG_ACPI) | |
043ae13b RS |
338 | if (acpi_target_system_state() == ACPI_STATE_S0) |
339 | sdev->system_suspend_target = SOF_SUSPEND_S0IX; | |
0b50b3b1 KJ |
340 | #endif |
341 | ||
342 | return 0; | |
343 | } | |
344 | EXPORT_SYMBOL(snd_sof_prepare); | |
345 | ||
346 | void snd_sof_complete(struct device *dev) | |
347 | { | |
348 | struct snd_sof_dev *sdev = dev_get_drvdata(dev); | |
349 | ||
043ae13b | 350 | sdev->system_suspend_target = SOF_SUSPEND_NONE; |
0b50b3b1 KJ |
351 | } |
352 | EXPORT_SYMBOL(snd_sof_complete); |