Commit | Line | Data |
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e149ca29 | 1 | // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
c6be710f LG |
2 | // |
3 | // This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | // redistributing this file, you may do so under either license. | |
5 | // | |
6 | // Copyright(c) 2018 Intel Corporation. All rights reserved. | |
7 | // | |
8 | // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> | |
9 | // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> | |
10 | // Rander Wang <rander.wang@intel.com> | |
11 | // Keyon Jie <yang.jie@linux.intel.com> | |
12 | // | |
13 | ||
14 | /* | |
15 | * Hardware interface for generic Intel audio DSP HDA IP | |
16 | */ | |
17 | ||
246dd428 | 18 | #include <linux/moduleparam.h> |
c6be710f LG |
19 | #include <sound/hda_register.h> |
20 | #include <sound/pcm_params.h> | |
d272b657 | 21 | #include <trace/events/sof_intel.h> |
ee1e79b7 | 22 | #include "../sof-audio.h" |
c6be710f LG |
23 | #include "../ops.h" |
24 | #include "hda.h" | |
25 | ||
26 | #define SDnFMT_BASE(x) ((x) << 14) | |
27 | #define SDnFMT_MULT(x) (((x) - 1) << 11) | |
28 | #define SDnFMT_DIV(x) (((x) - 1) << 8) | |
29 | #define SDnFMT_BITS(x) ((x) << 4) | |
30 | #define SDnFMT_CHAN(x) ((x) << 0) | |
31 | ||
246dd428 PLB |
32 | static bool hda_always_enable_dmi_l1; |
33 | module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444); | |
34 | MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1"); | |
35 | ||
6c26b505 RS |
36 | static bool hda_disable_rewinds = IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_DISABLE_REWINDS); |
37 | module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444); | |
38 | MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds"); | |
39 | ||
49d7948e | 40 | u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) |
c6be710f LG |
41 | { |
42 | switch (rate) { | |
43 | case 8000: | |
44 | return SDnFMT_DIV(6); | |
45 | case 9600: | |
46 | return SDnFMT_DIV(5); | |
47 | case 11025: | |
48 | return SDnFMT_BASE(1) | SDnFMT_DIV(4); | |
49 | case 16000: | |
50 | return SDnFMT_DIV(3); | |
51 | case 22050: | |
52 | return SDnFMT_BASE(1) | SDnFMT_DIV(2); | |
53 | case 32000: | |
54 | return SDnFMT_DIV(3) | SDnFMT_MULT(2); | |
55 | case 44100: | |
56 | return SDnFMT_BASE(1); | |
57 | case 48000: | |
58 | return 0; | |
59 | case 88200: | |
60 | return SDnFMT_BASE(1) | SDnFMT_MULT(2); | |
61 | case 96000: | |
62 | return SDnFMT_MULT(2); | |
63 | case 176400: | |
64 | return SDnFMT_BASE(1) | SDnFMT_MULT(4); | |
65 | case 192000: | |
66 | return SDnFMT_MULT(4); | |
67 | default: | |
68 | dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", | |
69 | rate); | |
70 | return 0; /* use 48KHz if not found */ | |
71 | } | |
72 | }; | |
73 | ||
49d7948e | 74 | u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) |
c6be710f LG |
75 | { |
76 | switch (sample_bits) { | |
77 | case 8: | |
78 | return SDnFMT_BITS(0); | |
79 | case 16: | |
80 | return SDnFMT_BITS(1); | |
81 | case 20: | |
82 | return SDnFMT_BITS(2); | |
83 | case 24: | |
84 | return SDnFMT_BITS(3); | |
85 | case 32: | |
86 | return SDnFMT_BITS(4); | |
87 | default: | |
88 | dev_warn(sdev->dev, "can't find %d bits using 16bit\n", | |
89 | sample_bits); | |
90 | return SDnFMT_BITS(1); /* use 16bits format if not found */ | |
91 | } | |
92 | }; | |
93 | ||
94 | int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, | |
95 | struct snd_pcm_substream *substream, | |
96 | struct snd_pcm_hw_params *params, | |
31f60a0c | 97 | struct snd_sof_platform_stream_params *platform_params) |
c6be710f LG |
98 | { |
99 | struct hdac_stream *hstream = substream->runtime->private_data; | |
7d88b960 | 100 | struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); |
c6be710f LG |
101 | struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; |
102 | struct snd_dma_buffer *dmab; | |
103 | int ret; | |
c6be710f LG |
104 | |
105 | hstream->substream = substream; | |
106 | ||
107 | dmab = substream->runtime->dma_buffer_p; | |
108 | ||
1f7b5d52 PU |
109 | /* |
110 | * Use the codec required format val (which is link_bps adjusted) when | |
111 | * the DSP is not in use | |
112 | */ | |
113 | if (!sdev->dspless_mode_selected) { | |
114 | u32 rate = hda_dsp_get_mult_div(sdev, params_rate(params)); | |
115 | u32 bits = hda_dsp_get_bits(sdev, params_width(params)); | |
116 | ||
117 | hstream->format_val = rate | bits | (params_channels(params) - 1); | |
118 | } | |
119 | ||
120 | hstream->bufsize = params_buffer_bytes(params); | |
c6be710f LG |
121 | hstream->period_bytes = params_period_bytes(params); |
122 | hstream->no_period_wakeup = | |
123 | (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && | |
124 | (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); | |
125 | ||
7d88b960 | 126 | ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, params); |
c6be710f | 127 | if (ret < 0) { |
ce1f55ba | 128 | dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); |
c6be710f LG |
129 | return ret; |
130 | } | |
131 | ||
6c26b505 RS |
132 | /* enable SPIB when rewinds are disabled */ |
133 | if (hda_disable_rewinds) | |
7d88b960 | 134 | hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, 0); |
6c26b505 | 135 | else |
7d88b960 | 136 | hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0); |
c6be710f | 137 | |
31f60a0c PU |
138 | if (hda) |
139 | platform_params->no_ipc_position = hda->no_ipc_position; | |
c6be710f | 140 | |
31f60a0c | 141 | platform_params->stream_tag = hstream->stream_tag; |
c6be710f LG |
142 | |
143 | return 0; | |
144 | } | |
145 | ||
6c26b505 RS |
146 | /* update SPIB register with appl position */ |
147 | int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) | |
148 | { | |
149 | struct hdac_stream *hstream = substream->runtime->private_data; | |
6c26b505 RS |
150 | struct snd_pcm_runtime *runtime = substream->runtime; |
151 | ssize_t appl_pos, buf_size; | |
152 | u32 spib; | |
153 | ||
154 | appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr); | |
155 | buf_size = frames_to_bytes(runtime, runtime->buffer_size); | |
156 | ||
157 | spib = appl_pos % buf_size; | |
158 | ||
159 | /* Allowable value for SPIB is 1 byte to max buffer size */ | |
160 | if (!spib) | |
161 | spib = buf_size; | |
162 | ||
62582341 | 163 | sof_io_write(sdev, hstream->spib_addr, spib); |
6c26b505 RS |
164 | |
165 | return 0; | |
166 | } | |
167 | ||
c6be710f LG |
168 | int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, |
169 | struct snd_pcm_substream *substream, int cmd) | |
170 | { | |
171 | struct hdac_stream *hstream = substream->runtime->private_data; | |
7d88b960 | 172 | struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); |
c6be710f | 173 | |
7d88b960 | 174 | return hda_dsp_stream_trigger(sdev, hext_stream, cmd); |
c6be710f LG |
175 | } |
176 | ||
177 | snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, | |
178 | struct snd_pcm_substream *substream) | |
179 | { | |
1205300a | 180 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
ee1e79b7 | 181 | struct snd_soc_component *scomp = sdev->component; |
c6be710f LG |
182 | struct hdac_stream *hstream = substream->runtime->private_data; |
183 | struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; | |
184 | struct snd_sof_pcm *spcm; | |
185 | snd_pcm_uframes_t pos; | |
186 | ||
ee1e79b7 | 187 | spcm = snd_sof_find_spcm_dai(scomp, rtd); |
c6be710f LG |
188 | if (!spcm) { |
189 | dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", | |
190 | rtd->dai_link->id); | |
191 | return 0; | |
192 | } | |
193 | ||
194 | if (hda && !hda->no_ipc_position) { | |
195 | /* read position from IPC position */ | |
196 | pos = spcm->stream[substream->stream].posn.host_posn; | |
197 | goto found; | |
198 | } | |
199 | ||
ca7ab1dc | 200 | pos = hda_dsp_stream_get_position(hstream, substream->stream, true); |
c6be710f LG |
201 | found: |
202 | pos = bytes_to_frames(substream->runtime, pos); | |
203 | ||
d272b657 | 204 | trace_sof_intel_hda_dsp_pcm(sdev, hstream, substream, pos); |
c6be710f LG |
205 | return pos; |
206 | } | |
207 | ||
208 | int hda_dsp_pcm_open(struct snd_sof_dev *sdev, | |
209 | struct snd_pcm_substream *substream) | |
210 | { | |
89a400bd | 211 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
246dd428 | 212 | struct snd_pcm_runtime *runtime = substream->runtime; |
89a400bd | 213 | struct snd_soc_component *scomp = sdev->component; |
c6be710f | 214 | struct hdac_ext_stream *dsp_stream; |
89a400bd | 215 | struct snd_sof_pcm *spcm; |
c6be710f | 216 | int direction = substream->stream; |
89a400bd RS |
217 | u32 flags = 0; |
218 | ||
219 | spcm = snd_sof_find_spcm_dai(scomp, rtd); | |
220 | if (!spcm) { | |
221 | dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id); | |
222 | return -EINVAL; | |
223 | } | |
c6be710f | 224 | |
6c26b505 RS |
225 | /* |
226 | * if we want the .ack to work, we need to prevent the control from being mapped. | |
227 | * The status can still be mapped. | |
228 | */ | |
229 | if (hda_disable_rewinds) | |
230 | runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR; | |
231 | ||
246dd428 PLB |
232 | /* |
233 | * All playback streams are DMI L1 capable, capture streams need | |
234 | * pause push/release to be disabled | |
235 | */ | |
236 | if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE) | |
237 | runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; | |
238 | ||
239 | if (hda_always_enable_dmi_l1 || | |
a174e72e | 240 | direction == SNDRV_PCM_STREAM_PLAYBACK || |
89a400bd RS |
241 | spcm->stream[substream->stream].d0i3_compatible) |
242 | flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE; | |
c6be710f | 243 | |
89a400bd | 244 | dsp_stream = hda_dsp_stream_get(sdev, direction, flags); |
c6be710f LG |
245 | if (!dsp_stream) { |
246 | dev_err(sdev->dev, "error: no stream available\n"); | |
247 | return -ENODEV; | |
248 | } | |
249 | ||
caebea04 KV |
250 | /* minimum as per HDA spec */ |
251 | snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); | |
252 | ||
253 | /* avoid circular buffer wrap in middle of period */ | |
254 | snd_pcm_hw_constraint_integer(substream->runtime, | |
255 | SNDRV_PCM_HW_PARAM_PERIODS); | |
256 | ||
1f7b5d52 PU |
257 | /* Only S16 and S32 supported by HDA hardware when used without DSP */ |
258 | if (sdev->dspless_mode_selected) | |
259 | snd_pcm_hw_constraint_mask64(substream->runtime, SNDRV_PCM_HW_PARAM_FORMAT, | |
260 | SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S32); | |
261 | ||
c6be710f LG |
262 | /* binding pcm substream to hda stream */ |
263 | substream->runtime->private_data = &dsp_stream->hstream; | |
264 | return 0; | |
265 | } | |
266 | ||
267 | int hda_dsp_pcm_close(struct snd_sof_dev *sdev, | |
268 | struct snd_pcm_substream *substream) | |
269 | { | |
270 | struct hdac_stream *hstream = substream->runtime->private_data; | |
271 | int direction = substream->stream; | |
272 | int ret; | |
273 | ||
274 | ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); | |
275 | ||
276 | if (ret) { | |
277 | dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); | |
278 | return -ENODEV; | |
279 | } | |
280 | ||
281 | /* unbinding pcm substream to hda stream */ | |
282 | substream->runtime->private_data = NULL; | |
283 | return 0; | |
284 | } |