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1356a607 KM |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // Copyright (C) 2013, Analog Devices Inc. | |
4 | // Author: Lars-Peter Clausen <lars@metafoo.de> | |
5 | ||
28c4468b LPC |
6 | #include <linux/module.h> |
7 | #include <linux/init.h> | |
8 | #include <linux/dmaengine.h> | |
9 | #include <linux/slab.h> | |
10 | #include <sound/pcm.h> | |
11 | #include <sound/pcm_params.h> | |
12 | #include <sound/soc.h> | |
13 | #include <linux/dma-mapping.h> | |
14 | #include <linux/of.h> | |
28c4468b LPC |
15 | |
16 | #include <sound/dmaengine_pcm.h> | |
17 | ||
b0e3b0a7 SZ |
18 | static unsigned int prealloc_buffer_size_kbytes = 512; |
19 | module_param(prealloc_buffer_size_kbytes, uint, 0444); | |
20 | MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB)."); | |
21 | ||
acde50a7 LPC |
22 | /* |
23 | * The platforms dmaengine driver does not support reporting the amount of | |
24 | * bytes that are still left to transfer. | |
25 | */ | |
26 | #define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31) | |
27 | ||
c0de42bf LPC |
28 | static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, |
29 | struct snd_pcm_substream *substream) | |
30 | { | |
31 | if (!pcm->chan[substream->stream]) | |
32 | return NULL; | |
33 | ||
34 | return pcm->chan[substream->stream]->device->dev; | |
35 | } | |
36 | ||
28c4468b LPC |
37 | /** |
38 | * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback | |
39 | * @substream: PCM substream | |
40 | * @params: hw_params | |
41 | * @slave_config: DMA slave config to prepare | |
42 | * | |
43 | * This function can be used as a generic prepare_slave_config callback for | |
44 | * platforms which make use of the snd_dmaengine_dai_dma_data struct for their | |
45 | * DAI DMA data. Internally the function will first call | |
46 | * snd_hwparams_to_dma_slave_config to fill in the slave config based on the | |
e52dca72 MR |
47 | * hw_params, followed by snd_dmaengine_pcm_set_config_from_dai_data to fill in |
48 | * the remaining fields based on the DAI DMA data. | |
28c4468b LPC |
49 | */ |
50 | int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, | |
51 | struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config) | |
52 | { | |
0ceef681 | 53 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
28c4468b LPC |
54 | struct snd_dmaengine_dai_dma_data *dma_data; |
55 | int ret; | |
56 | ||
3989ade2 | 57 | if (rtd->dai_link->num_cpus > 1) { |
6e1276a5 BL |
58 | dev_err(rtd->dev, |
59 | "%s doesn't support Multi CPU yet\n", __func__); | |
60 | return -EINVAL; | |
61 | } | |
62 | ||
c2233a26 | 63 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
28c4468b LPC |
64 | |
65 | ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config); | |
66 | if (ret) | |
67 | return ret; | |
68 | ||
69 | snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data, | |
70 | slave_config); | |
71 | ||
72 | return 0; | |
73 | } | |
74 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config); | |
75 | ||
ece23171 KM |
76 | static int dmaengine_pcm_hw_params(struct snd_soc_component *component, |
77 | struct snd_pcm_substream *substream, | |
78 | struct snd_pcm_hw_params *params) | |
28c4468b | 79 | { |
be7ee5f3 | 80 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
28c4468b LPC |
81 | struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); |
82 | struct dma_slave_config slave_config; | |
43556516 | 83 | int ret; |
28c4468b | 84 | |
43556516 SH |
85 | if (!pcm->config->prepare_slave_config) |
86 | return 0; | |
fa654e08 | 87 | |
43556516 | 88 | memset(&slave_config, 0, sizeof(slave_config)); |
28c4468b | 89 | |
43556516 SH |
90 | ret = pcm->config->prepare_slave_config(substream, params, &slave_config); |
91 | if (ret) | |
92 | return ret; | |
28c4468b | 93 | |
43556516 | 94 | return dmaengine_slave_config(chan, &slave_config); |
28c4468b LPC |
95 | } |
96 | ||
ece23171 KM |
97 | static int |
98 | dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component, | |
99 | struct snd_pcm_substream *substream) | |
28c4468b | 100 | { |
0ceef681 | 101 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
be7ee5f3 | 102 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
c0de42bf | 103 | struct device *dma_dev = dmaengine_dma_dev(pcm, substream); |
28c4468b | 104 | struct dma_chan *chan = pcm->chan[substream->stream]; |
c0de42bf | 105 | struct snd_dmaengine_dai_dma_data *dma_data; |
c0de42bf | 106 | struct snd_pcm_hardware hw; |
28c4468b | 107 | |
3989ade2 | 108 | if (rtd->dai_link->num_cpus > 1) { |
6e1276a5 BL |
109 | dev_err(rtd->dev, |
110 | "%s doesn't support Multi CPU yet\n", __func__); | |
111 | return -EINVAL; | |
112 | } | |
113 | ||
43556516 | 114 | if (pcm->config->pcm_hardware) |
c0de42bf | 115 | return snd_soc_set_runtime_hwparams(substream, |
28c4468b | 116 | pcm->config->pcm_hardware); |
28c4468b | 117 | |
c2233a26 | 118 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
c0de42bf LPC |
119 | |
120 | memset(&hw, 0, sizeof(hw)); | |
121 | hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | |
122 | SNDRV_PCM_INFO_INTERLEAVED; | |
123 | hw.periods_min = 2; | |
124 | hw.periods_max = UINT_MAX; | |
300689fb SH |
125 | hw.period_bytes_min = dma_data->maxburst * DMA_SLAVE_BUSWIDTH_8_BYTES; |
126 | if (!hw.period_bytes_min) | |
127 | hw.period_bytes_min = 256; | |
c0de42bf LPC |
128 | hw.period_bytes_max = dma_get_max_seg_size(dma_dev); |
129 | hw.buffer_bytes_max = SIZE_MAX; | |
130 | hw.fifo_size = dma_data->fifo_size; | |
131 | ||
a22f33b0 LPC |
132 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) |
133 | hw.info |= SNDRV_PCM_INFO_BATCH; | |
134 | ||
13012809 SW |
135 | /** |
136 | * FIXME: Remove the return value check to align with the code | |
137 | * before adding snd_dmaengine_pcm_refine_runtime_hwparams | |
138 | * function. | |
139 | */ | |
140 | snd_dmaengine_pcm_refine_runtime_hwparams(substream, | |
141 | dma_data, | |
142 | &hw, | |
143 | chan); | |
c0de42bf LPC |
144 | |
145 | return snd_soc_set_runtime_hwparams(substream, &hw); | |
28c4468b LPC |
146 | } |
147 | ||
ece23171 KM |
148 | static int dmaengine_pcm_open(struct snd_soc_component *component, |
149 | struct snd_pcm_substream *substream) | |
28c4468b | 150 | { |
be7ee5f3 | 151 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
c0de42bf LPC |
152 | struct dma_chan *chan = pcm->chan[substream->stream]; |
153 | int ret; | |
28c4468b | 154 | |
ece23171 | 155 | ret = dmaengine_pcm_set_runtime_hwparams(component, substream); |
c0de42bf LPC |
156 | if (ret) |
157 | return ret; | |
158 | ||
159 | return snd_dmaengine_pcm_open(substream, chan); | |
28c4468b LPC |
160 | } |
161 | ||
ece23171 KM |
162 | static int dmaengine_pcm_close(struct snd_soc_component *component, |
163 | struct snd_pcm_substream *substream) | |
164 | { | |
165 | return snd_dmaengine_pcm_close(substream); | |
166 | } | |
167 | ||
ece23171 KM |
168 | static int dmaengine_pcm_trigger(struct snd_soc_component *component, |
169 | struct snd_pcm_substream *substream, int cmd) | |
170 | { | |
171 | return snd_dmaengine_pcm_trigger(substream, cmd); | |
172 | } | |
173 | ||
c999836d | 174 | static struct dma_chan *dmaengine_pcm_compat_request_channel( |
ece23171 | 175 | struct snd_soc_component *component, |
c999836d LPC |
176 | struct snd_soc_pcm_runtime *rtd, |
177 | struct snd_pcm_substream *substream) | |
178 | { | |
be7ee5f3 | 179 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
90130d2e MB |
180 | struct snd_dmaengine_dai_dma_data *dma_data; |
181 | ||
3989ade2 | 182 | if (rtd->dai_link->num_cpus > 1) { |
6e1276a5 BL |
183 | dev_err(rtd->dev, |
184 | "%s doesn't support Multi CPU yet\n", __func__); | |
185 | return NULL; | |
186 | } | |
187 | ||
c2233a26 | 188 | dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); |
c999836d | 189 | |
d1e1406c LPC |
190 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0]) |
191 | return pcm->chan[0]; | |
192 | ||
43556516 | 193 | if (pcm->config->compat_request_channel) |
c999836d LPC |
194 | return pcm->config->compat_request_channel(rtd, substream); |
195 | ||
43556516 SH |
196 | return snd_dmaengine_pcm_request_channel(pcm->config->compat_filter_fn, |
197 | dma_data->filter_data); | |
c999836d LPC |
198 | } |
199 | ||
acde50a7 LPC |
200 | static bool dmaengine_pcm_can_report_residue(struct device *dev, |
201 | struct dma_chan *chan) | |
478028e0 LPC |
202 | { |
203 | struct dma_slave_caps dma_caps; | |
204 | int ret; | |
205 | ||
206 | ret = dma_get_slave_caps(chan, &dma_caps); | |
acde50a7 LPC |
207 | if (ret != 0) { |
208 | dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n", | |
209 | ret); | |
210 | return false; | |
211 | } | |
478028e0 LPC |
212 | |
213 | if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) | |
214 | return false; | |
215 | ||
216 | return true; | |
217 | } | |
218 | ||
ece23171 KM |
219 | static int dmaengine_pcm_new(struct snd_soc_component *component, |
220 | struct snd_soc_pcm_runtime *rtd) | |
28c4468b | 221 | { |
be7ee5f3 | 222 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
28c4468b | 223 | const struct snd_dmaengine_pcm_config *config = pcm->config; |
be7ee5f3 | 224 | struct device *dev = component->dev; |
fa654e08 LPC |
225 | size_t prealloc_buffer_size; |
226 | size_t max_buffer_size; | |
28c4468b | 227 | unsigned int i; |
28c4468b | 228 | |
43556516 | 229 | if (config->prealloc_buffer_size) |
fa654e08 | 230 | prealloc_buffer_size = config->prealloc_buffer_size; |
88c62b16 | 231 | else |
b0e3b0a7 | 232 | prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024; |
88c62b16 | 233 | |
43556516 | 234 | if (config->pcm_hardware && config->pcm_hardware->buffer_bytes_max) |
88c62b16 SW |
235 | max_buffer_size = config->pcm_hardware->buffer_bytes_max; |
236 | else | |
fa654e08 | 237 | max_buffer_size = SIZE_MAX; |
fa654e08 | 238 | |
ee10fbe1 | 239 | for_each_pcm_streams(i) { |
9cec66fa | 240 | struct snd_pcm_substream *substream = rtd->pcm->streams[i].substream; |
28c4468b LPC |
241 | if (!substream) |
242 | continue; | |
243 | ||
43556516 | 244 | if (!pcm->chan[i] && config->chan_names[i]) |
9bfa24e9 | 245 | pcm->chan[i] = dma_request_slave_channel(dev, |
76d9c68b | 246 | config->chan_names[i]); |
9bfa24e9 | 247 | |
d1e1406c | 248 | if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { |
ece23171 KM |
249 | pcm->chan[i] = dmaengine_pcm_compat_request_channel( |
250 | component, rtd, substream); | |
c999836d LPC |
251 | } |
252 | ||
28c4468b | 253 | if (!pcm->chan[i]) { |
be7ee5f3 | 254 | dev_err(component->dev, |
28c4468b | 255 | "Missing dma channel for stream: %d\n", i); |
de7621e8 | 256 | return -EINVAL; |
28c4468b LPC |
257 | } |
258 | ||
d708c2b3 | 259 | snd_pcm_set_managed_buffer(substream, |
ca2b0295 | 260 | SNDRV_DMA_TYPE_DEV_IRAM, |
28c4468b | 261 | dmaengine_dma_dev(pcm, substream), |
fa654e08 LPC |
262 | prealloc_buffer_size, |
263 | max_buffer_size); | |
478028e0 | 264 | |
acde50a7 | 265 | if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i])) |
478028e0 | 266 | pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE; |
2ec42f31 PU |
267 | |
268 | if (rtd->pcm->streams[i].pcm->name[0] == '\0') { | |
48118a93 PU |
269 | strscpy_pad(rtd->pcm->streams[i].pcm->name, |
270 | rtd->pcm->streams[i].pcm->id, | |
271 | sizeof(rtd->pcm->streams[i].pcm->name)); | |
2ec42f31 | 272 | } |
28c4468b LPC |
273 | } |
274 | ||
275 | return 0; | |
28c4468b LPC |
276 | } |
277 | ||
93b943ed | 278 | static snd_pcm_uframes_t dmaengine_pcm_pointer( |
ece23171 | 279 | struct snd_soc_component *component, |
93b943ed LPC |
280 | struct snd_pcm_substream *substream) |
281 | { | |
be7ee5f3 | 282 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); |
93b943ed LPC |
283 | |
284 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) | |
285 | return snd_dmaengine_pcm_pointer_no_residue(substream); | |
286 | else | |
287 | return snd_dmaengine_pcm_pointer(substream); | |
288 | } | |
289 | ||
56b00d10 TI |
290 | static int dmaengine_copy(struct snd_soc_component *component, |
291 | struct snd_pcm_substream *substream, | |
292 | int channel, unsigned long hwoff, | |
ef98a488 | 293 | struct iov_iter *iter, unsigned long bytes) |
78648092 | 294 | { |
78648092 OM |
295 | struct snd_pcm_runtime *runtime = substream->runtime; |
296 | struct dmaengine_pcm *pcm = soc_component_to_pcm(component); | |
297 | int (*process)(struct snd_pcm_substream *substream, | |
298 | int channel, unsigned long hwoff, | |
69d0fd34 | 299 | unsigned long bytes) = pcm->config->process; |
78648092 OM |
300 | bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
301 | void *dma_ptr = runtime->dma_area + hwoff + | |
302 | channel * (runtime->dma_bytes / runtime->channels); | |
78648092 OM |
303 | |
304 | if (is_playback) | |
ef98a488 | 305 | if (copy_from_iter(dma_ptr, bytes, iter) != bytes) |
78648092 OM |
306 | return -EFAULT; |
307 | ||
308 | if (process) { | |
69d0fd34 | 309 | int ret = process(substream, channel, hwoff, bytes); |
78648092 OM |
310 | if (ret < 0) |
311 | return ret; | |
312 | } | |
313 | ||
314 | if (!is_playback) | |
ef98a488 | 315 | if (copy_to_iter(dma_ptr, bytes, iter) != bytes) |
78648092 OM |
316 | return -EFAULT; |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
ece23171 KM |
321 | static const struct snd_soc_component_driver dmaengine_pcm_component = { |
322 | .name = SND_DMAENGINE_PCM_DRV_NAME, | |
323 | .probe_order = SND_SOC_COMP_ORDER_LATE, | |
28c4468b | 324 | .open = dmaengine_pcm_open, |
ece23171 | 325 | .close = dmaengine_pcm_close, |
28c4468b | 326 | .hw_params = dmaengine_pcm_hw_params, |
ece23171 | 327 | .trigger = dmaengine_pcm_trigger, |
93b943ed | 328 | .pointer = dmaengine_pcm_pointer, |
ece23171 | 329 | .pcm_construct = dmaengine_pcm_new, |
28c4468b LPC |
330 | }; |
331 | ||
ece23171 KM |
332 | static const struct snd_soc_component_driver dmaengine_pcm_component_process = { |
333 | .name = SND_DMAENGINE_PCM_DRV_NAME, | |
334 | .probe_order = SND_SOC_COMP_ORDER_LATE, | |
78648092 | 335 | .open = dmaengine_pcm_open, |
ece23171 | 336 | .close = dmaengine_pcm_close, |
78648092 | 337 | .hw_params = dmaengine_pcm_hw_params, |
ece23171 | 338 | .trigger = dmaengine_pcm_trigger, |
78648092 | 339 | .pointer = dmaengine_pcm_pointer, |
56b00d10 | 340 | .copy = dmaengine_copy, |
ece23171 | 341 | .pcm_construct = dmaengine_pcm_new, |
78648092 OM |
342 | }; |
343 | ||
28c4468b LPC |
344 | static const char * const dmaengine_pcm_dma_channel_names[] = { |
345 | [SNDRV_PCM_STREAM_PLAYBACK] = "tx", | |
346 | [SNDRV_PCM_STREAM_CAPTURE] = "rx", | |
347 | }; | |
348 | ||
5eda87b8 | 349 | static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, |
194c7dea | 350 | struct device *dev, const struct snd_dmaengine_pcm_config *config) |
d1e1406c LPC |
351 | { |
352 | unsigned int i; | |
11b3a7ad | 353 | const char *name; |
5eda87b8 | 354 | struct dma_chan *chan; |
d1e1406c | 355 | |
76d9c68b | 356 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node && |
43556516 | 357 | !(config->dma_dev && config->dma_dev->of_node))) |
5eda87b8 | 358 | return 0; |
d1e1406c | 359 | |
43556516 | 360 | if (config->dma_dev) { |
194c7dea SW |
361 | /* |
362 | * If this warning is seen, it probably means that your Linux | |
363 | * device structure does not match your HW device structure. | |
364 | * It would be best to refactor the Linux device structure to | |
365 | * correctly match the HW structure. | |
366 | */ | |
367 | dev_warn(dev, "DMA channels sourced from device %s", | |
368 | dev_name(config->dma_dev)); | |
369 | dev = config->dma_dev; | |
370 | } | |
371 | ||
ee10fbe1 | 372 | for_each_pcm_streams(i) { |
11b3a7ad SW |
373 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) |
374 | name = "rx-tx"; | |
375 | else | |
376 | name = dmaengine_pcm_dma_channel_names[i]; | |
43556516 | 377 | if (config->chan_names[i]) |
194c7dea | 378 | name = config->chan_names[i]; |
de8cf952 | 379 | chan = dma_request_chan(dev, name); |
5eda87b8 | 380 | if (IS_ERR(chan)) { |
86f29c74 MB |
381 | /* |
382 | * Only report probe deferral errors, channels | |
383 | * might not be present for devices that | |
384 | * support only TX or only RX. | |
385 | */ | |
e9036c2a | 386 | if (PTR_ERR(chan) == -EPROBE_DEFER) |
5eda87b8 SW |
387 | return -EPROBE_DEFER; |
388 | pcm->chan[i] = NULL; | |
389 | } else { | |
390 | pcm->chan[i] = chan; | |
391 | } | |
11b3a7ad SW |
392 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) |
393 | break; | |
d1e1406c | 394 | } |
11b3a7ad SW |
395 | |
396 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | |
397 | pcm->chan[1] = pcm->chan[0]; | |
5eda87b8 SW |
398 | |
399 | return 0; | |
d1e1406c LPC |
400 | } |
401 | ||
6b9f3e65 SW |
402 | static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm) |
403 | { | |
404 | unsigned int i; | |
405 | ||
ee10fbe1 | 406 | for_each_pcm_streams(i) { |
6b9f3e65 SW |
407 | if (!pcm->chan[i]) |
408 | continue; | |
409 | dma_release_channel(pcm->chan[i]); | |
410 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) | |
411 | break; | |
412 | } | |
413 | } | |
414 | ||
43556516 SH |
415 | static const struct snd_dmaengine_pcm_config snd_dmaengine_pcm_default_config = { |
416 | .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, | |
417 | }; | |
418 | ||
28c4468b LPC |
419 | /** |
420 | * snd_dmaengine_pcm_register - Register a dmaengine based PCM device | |
421 | * @dev: The parent device for the PCM device | |
422 | * @config: Platform specific PCM configuration | |
423 | * @flags: Platform specific quirks | |
424 | */ | |
425 | int snd_dmaengine_pcm_register(struct device *dev, | |
426 | const struct snd_dmaengine_pcm_config *config, unsigned int flags) | |
427 | { | |
ea029dd8 | 428 | const struct snd_soc_component_driver *driver; |
28c4468b | 429 | struct dmaengine_pcm *pcm; |
6b9f3e65 | 430 | int ret; |
28c4468b | 431 | |
28c4468b LPC |
432 | pcm = kzalloc(sizeof(*pcm), GFP_KERNEL); |
433 | if (!pcm) | |
434 | return -ENOMEM; | |
435 | ||
f0b3bdbd FE |
436 | #ifdef CONFIG_DEBUG_FS |
437 | pcm->component.debugfs_prefix = "dma"; | |
438 | #endif | |
43556516 SH |
439 | if (!config) |
440 | config = &snd_dmaengine_pcm_default_config; | |
28c4468b | 441 | pcm->config = config; |
d1e1406c | 442 | pcm->flags = flags; |
28c4468b | 443 | |
5eda87b8 SW |
444 | ret = dmaengine_pcm_request_chan_of(pcm, dev, config); |
445 | if (ret) | |
b84acf44 | 446 | goto err_free_dma; |
28c4468b | 447 | |
43556516 | 448 | if (config->process) |
ea029dd8 | 449 | driver = &dmaengine_pcm_component_process; |
78648092 | 450 | else |
ea029dd8 CR |
451 | driver = &dmaengine_pcm_component; |
452 | ||
453 | ret = snd_soc_component_initialize(&pcm->component, driver, dev); | |
454 | if (ret) | |
455 | goto err_free_dma; | |
456 | ||
457 | ret = snd_soc_add_component(&pcm->component, NULL, 0); | |
6b9f3e65 SW |
458 | if (ret) |
459 | goto err_free_dma; | |
460 | ||
461 | return 0; | |
462 | ||
463 | err_free_dma: | |
464 | dmaengine_pcm_release_chan(pcm); | |
465 | kfree(pcm); | |
466 | return ret; | |
28c4468b LPC |
467 | } |
468 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register); | |
469 | ||
470 | /** | |
471 | * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device | |
472 | * @dev: Parent device the PCM was register with | |
473 | * | |
474 | * Removes a dmaengine based PCM device previously registered with | |
475 | * snd_dmaengine_pcm_register. | |
476 | */ | |
477 | void snd_dmaengine_pcm_unregister(struct device *dev) | |
478 | { | |
be7ee5f3 | 479 | struct snd_soc_component *component; |
28c4468b | 480 | struct dmaengine_pcm *pcm; |
28c4468b | 481 | |
be7ee5f3 KM |
482 | component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME); |
483 | if (!component) | |
28c4468b LPC |
484 | return; |
485 | ||
be7ee5f3 | 486 | pcm = soc_component_to_pcm(component); |
28c4468b | 487 | |
58f30150 | 488 | snd_soc_unregister_component_by_driver(dev, component->driver); |
6b9f3e65 | 489 | dmaengine_pcm_release_chan(pcm); |
28c4468b LPC |
490 | kfree(pcm); |
491 | } | |
492 | EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister); | |
493 | ||
494 | MODULE_LICENSE("GPL"); |