[linux-2.6-block.git] / sound / soc / soc-generic-dmaengine-pcm.c

// SPDX-License-Identifier: GPL-2.0+
//
//  Copyright (C) 2013, Analog Devices Inc.
//	Author: Lars-Peter Clausen <lars@metafoo.de>

#include <linux/module.h>
#include <linux/init.h>
#include <linux/dmaengine.h>
#include <linux/slab.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <linux/dma-mapping.h>
#include <linux/of.h>

#include <sound/dmaengine_pcm.h>

static unsigned int prealloc_buffer_size_kbytes = 512;
module_param(prealloc_buffer_size_kbytes, uint, 0444);
MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB).");

/*
 * The platforms dmaengine driver does not support reporting the amount of
 * bytes that are still left to transfer.
 */
#define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)

static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
	struct snd_pcm_substream *substream)
{
	if (!pcm->chan[substream->stream])
		return NULL;

	return pcm->chan[substream->stream]->device->dev;
}

/**
 * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
 * @substream: PCM substream
 * @params: hw_params
 * @slave_config: DMA slave config to prepare
 *
 * This function can be used as a generic prepare_slave_config callback for
 * platforms which make use of the snd_dmaengine_dai_dma_data struct for their
 * DAI DMA data. Internally the function will first call
 * snd_hwparams_to_dma_slave_config to fill in the slave config based on the
 * hw_params, followed by snd_dmaengine_pcm_set_config_from_dai_data to fill in
 * the remaining fields based on the DAI DMA data.
 */
int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
	struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
{
	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
	struct snd_dmaengine_dai_dma_data *dma_data;
	int ret;

	if (rtd->dai_link->num_cpus > 1) {
		dev_err(rtd->dev,
			"%s doesn't support Multi CPU yet\n", __func__);
		return -EINVAL;
	}

	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);

	ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
	if (ret)
		return ret;

	snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
		slave_config);

	return 0;
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config);

static int dmaengine_pcm_hw_params(struct snd_soc_component *component,
				   struct snd_pcm_substream *substream,
				   struct snd_pcm_hw_params *params)
{
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
	struct dma_slave_config slave_config;
	int ret;

	if (!pcm->config->prepare_slave_config)
		return 0;

	memset(&slave_config, 0, sizeof(slave_config));

	ret = pcm->config->prepare_slave_config(substream, params, &slave_config);
	if (ret)
		return ret;

	return dmaengine_slave_config(chan, &slave_config);
}

static int
dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component,
				   struct snd_pcm_substream *substream)
{
	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
	struct dma_chan *chan = pcm->chan[substream->stream];
	struct snd_dmaengine_dai_dma_data *dma_data;
	struct snd_pcm_hardware hw;

	if (rtd->dai_link->num_cpus > 1) {
		dev_err(rtd->dev,
			"%s doesn't support Multi CPU yet\n", __func__);
		return -EINVAL;
	}

	if (pcm->config->pcm_hardware)
		return snd_soc_set_runtime_hwparams(substream,
				pcm->config->pcm_hardware);

	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);

	memset(&hw, 0, sizeof(hw));
	hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
			SNDRV_PCM_INFO_INTERLEAVED;
	hw.periods_min = 2;
	hw.periods_max = UINT_MAX;
	hw.period_bytes_min = dma_data->maxburst * DMA_SLAVE_BUSWIDTH_8_BYTES;
	if (!hw.period_bytes_min)
		hw.period_bytes_min = 256;
	hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
	hw.buffer_bytes_max = SIZE_MAX;
	hw.fifo_size = dma_data->fifo_size;

	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
		hw.info |= SNDRV_PCM_INFO_BATCH;

	/**
	 * FIXME: Remove the return value check to align with the code
	 * before adding snd_dmaengine_pcm_refine_runtime_hwparams
	 * function.
	 */
	snd_dmaengine_pcm_refine_runtime_hwparams(substream,
						  dma_data,
						  &hw,
						  chan);

	return snd_soc_set_runtime_hwparams(substream, &hw);
}

static int dmaengine_pcm_open(struct snd_soc_component *component,
			      struct snd_pcm_substream *substream)
{
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	struct dma_chan *chan = pcm->chan[substream->stream];
	int ret;

	ret = dmaengine_pcm_set_runtime_hwparams(component, substream);
	if (ret)
		return ret;

	return snd_dmaengine_pcm_open(substream, chan);
}

static int dmaengine_pcm_close(struct snd_soc_component *component,
			       struct snd_pcm_substream *substream)
{
	return snd_dmaengine_pcm_close(substream);
}

static int dmaengine_pcm_trigger(struct snd_soc_component *component,
				 struct snd_pcm_substream *substream, int cmd)
{
	return snd_dmaengine_pcm_trigger(substream, cmd);
}

static struct dma_chan *dmaengine_pcm_compat_request_channel(
	struct snd_soc_component *component,
	struct snd_soc_pcm_runtime *rtd,
	struct snd_pcm_substream *substream)
{
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	struct snd_dmaengine_dai_dma_data *dma_data;

	if (rtd->dai_link->num_cpus > 1) {
		dev_err(rtd->dev,
			"%s doesn't support Multi CPU yet\n", __func__);
		return NULL;
	}

	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);

	if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0])
		return pcm->chan[0];

	if (pcm->config->compat_request_channel)
		return pcm->config->compat_request_channel(rtd, substream);

	return snd_dmaengine_pcm_request_channel(pcm->config->compat_filter_fn,
						 dma_data->filter_data);
}

static bool dmaengine_pcm_can_report_residue(struct device *dev,
	struct dma_chan *chan)
{
	struct dma_slave_caps dma_caps;
	int ret;

	ret = dma_get_slave_caps(chan, &dma_caps);
	if (ret != 0) {
		dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n",
			 ret);
		return false;
	}

	if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR)
		return false;

	return true;
}

static int dmaengine_pcm_new(struct snd_soc_component *component,
			     struct snd_soc_pcm_runtime *rtd)
{
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	const struct snd_dmaengine_pcm_config *config = pcm->config;
	struct device *dev = component->dev;
	size_t prealloc_buffer_size;
	size_t max_buffer_size;
	unsigned int i;

	if (config->prealloc_buffer_size)
		prealloc_buffer_size = config->prealloc_buffer_size;
	else
		prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024;

	if (config->pcm_hardware && config->pcm_hardware->buffer_bytes_max)
		max_buffer_size = config->pcm_hardware->buffer_bytes_max;
	else
		max_buffer_size = SIZE_MAX;

	for_each_pcm_streams(i) {
		struct snd_pcm_substream *substream = rtd->pcm->streams[i].substream;
		if (!substream)
			continue;

		if (!pcm->chan[i] && config->chan_names[i])
			pcm->chan[i] = dma_request_slave_channel(dev,
				config->chan_names[i]);

		if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) {
			pcm->chan[i] = dmaengine_pcm_compat_request_channel(
				component, rtd, substream);
		}

		if (!pcm->chan[i]) {
			dev_err(component->dev,
				"Missing dma channel for stream: %d\n", i);
			return -EINVAL;
		}

		snd_pcm_set_managed_buffer(substream,
				SNDRV_DMA_TYPE_DEV_IRAM,
				dmaengine_dma_dev(pcm, substream),
				prealloc_buffer_size,
				max_buffer_size);

		if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i]))
			pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE;

		if (rtd->pcm->streams[i].pcm->name[0] == '\0') {
			strscpy_pad(rtd->pcm->streams[i].pcm->name,
				    rtd->pcm->streams[i].pcm->id,
				    sizeof(rtd->pcm->streams[i].pcm->name));
		}
	}

	return 0;
}

static snd_pcm_uframes_t dmaengine_pcm_pointer(
	struct snd_soc_component *component,
	struct snd_pcm_substream *substream)
{
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);

	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
		return snd_dmaengine_pcm_pointer_no_residue(substream);
	else
		return snd_dmaengine_pcm_pointer(substream);
}

static int dmaengine_copy(struct snd_soc_component *component,
			  struct snd_pcm_substream *substream,
			  int channel, unsigned long hwoff,
			  struct iov_iter *iter, unsigned long bytes)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	int (*process)(struct snd_pcm_substream *substream,
		       int channel, unsigned long hwoff,
		       unsigned long bytes) = pcm->config->process;
	bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	void *dma_ptr = runtime->dma_area + hwoff +
			channel * (runtime->dma_bytes / runtime->channels);

	if (is_playback)
		if (copy_from_iter(dma_ptr, bytes, iter) != bytes)
			return -EFAULT;

	if (process) {
		int ret = process(substream, channel, hwoff, bytes);
		if (ret < 0)
			return ret;
	}

	if (!is_playback)
		if (copy_to_iter(dma_ptr, bytes, iter) != bytes)
			return -EFAULT;

	return 0;
}

static int dmaengine_pcm_sync_stop(struct snd_soc_component *component,
				   struct snd_pcm_substream *substream)
{
	return snd_dmaengine_pcm_sync_stop(substream);
}

static const struct snd_soc_component_driver dmaengine_pcm_component = {
	.name		= SND_DMAENGINE_PCM_DRV_NAME,
	.probe_order	= SND_SOC_COMP_ORDER_LATE,
	.open		= dmaengine_pcm_open,
	.close		= dmaengine_pcm_close,
	.hw_params	= dmaengine_pcm_hw_params,
	.trigger	= dmaengine_pcm_trigger,
	.pointer	= dmaengine_pcm_pointer,
	.pcm_construct	= dmaengine_pcm_new,
	.sync_stop	= dmaengine_pcm_sync_stop,
};

static const struct snd_soc_component_driver dmaengine_pcm_component_process = {
	.name		= SND_DMAENGINE_PCM_DRV_NAME,
	.probe_order	= SND_SOC_COMP_ORDER_LATE,
	.open		= dmaengine_pcm_open,
	.close		= dmaengine_pcm_close,
	.hw_params	= dmaengine_pcm_hw_params,
	.trigger	= dmaengine_pcm_trigger,
	.pointer	= dmaengine_pcm_pointer,
	.copy		= dmaengine_copy,
	.pcm_construct	= dmaengine_pcm_new,
	.sync_stop	= dmaengine_pcm_sync_stop,
};

static const char * const dmaengine_pcm_dma_channel_names[] = {
	[SNDRV_PCM_STREAM_PLAYBACK] = "tx",
	[SNDRV_PCM_STREAM_CAPTURE] = "rx",
};

static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
	struct device *dev, const struct snd_dmaengine_pcm_config *config)
{
	unsigned int i;
	const char *name;
	struct dma_chan *chan;

	if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node &&
	    !(config->dma_dev && config->dma_dev->of_node)))
		return 0;

	if (config->dma_dev) {
		/*
		 * If this warning is seen, it probably means that your Linux
		 * device structure does not match your HW device structure.
		 * It would be best to refactor the Linux device structure to
		 * correctly match the HW structure.
		 */
		dev_warn(dev, "DMA channels sourced from device %s",
			 dev_name(config->dma_dev));
		dev = config->dma_dev;
	}

	for_each_pcm_streams(i) {
		if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
			name = "rx-tx";
		else
			name = dmaengine_pcm_dma_channel_names[i];
		if (config->chan_names[i])
			name = config->chan_names[i];
		chan = dma_request_chan(dev, name);
		if (IS_ERR(chan)) {
			/*
			 * Only report probe deferral errors, channels
			 * might not be present for devices that
			 * support only TX or only RX.
			 */
			if (PTR_ERR(chan) == -EPROBE_DEFER)
				return -EPROBE_DEFER;
			pcm->chan[i] = NULL;
		} else {
			pcm->chan[i] = chan;
		}
		if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
			break;
	}

	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
		pcm->chan[1] = pcm->chan[0];

	return 0;
}

static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
{
	unsigned int i;

	for_each_pcm_streams(i) {
		if (!pcm->chan[i])
			continue;
		dma_release_channel(pcm->chan[i]);
		if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
			break;
	}
}

static const struct snd_dmaengine_pcm_config snd_dmaengine_pcm_default_config = {
	.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
};

/**
 * snd_dmaengine_pcm_register - Register a dmaengine based PCM device
 * @dev: The parent device for the PCM device
 * @config: Platform specific PCM configuration
 * @flags: Platform specific quirks
 */
int snd_dmaengine_pcm_register(struct device *dev,
	const struct snd_dmaengine_pcm_config *config, unsigned int flags)
{
	const struct snd_soc_component_driver *driver;
	struct dmaengine_pcm *pcm;
	int ret;

	pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
	if (!pcm)
		return -ENOMEM;

#ifdef CONFIG_DEBUG_FS
	pcm->component.debugfs_prefix = "dma";
#endif
	if (!config)
		config = &snd_dmaengine_pcm_default_config;
	pcm->config = config;
	pcm->flags = flags;

	if (config->name)
		pcm->component.name = config->name;

	ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
	if (ret)
		goto err_free_dma;

	if (config->process)
		driver = &dmaengine_pcm_component_process;
	else
		driver = &dmaengine_pcm_component;

	ret = snd_soc_component_initialize(&pcm->component, driver, dev);
	if (ret)
		goto err_free_dma;

	ret = snd_soc_add_component(&pcm->component, NULL, 0);
	if (ret)
		goto err_free_dma;

	return 0;

err_free_dma:
	dmaengine_pcm_release_chan(pcm);
	kfree(pcm);
	return ret;
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);

/**
 * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device
 * @dev: Parent device the PCM was register with
 *
 * Removes a dmaengine based PCM device previously registered with
 * snd_dmaengine_pcm_register.
 */
void snd_dmaengine_pcm_unregister(struct device *dev)
{
	struct snd_soc_component *component;
	struct dmaengine_pcm *pcm;

	component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME);
	if (!component)
		return;

	pcm = soc_component_to_pcm(component);

	snd_soc_unregister_component_by_driver(dev, component->driver);
	dmaengine_pcm_release_chan(pcm);
	kfree(pcm);
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);

MODULE_DESCRIPTION("ASoC helpers for generic PCM dmaengine API");
MODULE_LICENSE("GPL");
Commit	Line	Data
1356a607 KM	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// Copyright (C) 2013, Analog Devices Inc.
	4	// Author: Lars-Peter Clausen <lars@metafoo.de>
	5
28c4468b LPC	6	#include <linux/module.h>
	7	#include <linux/init.h>
	8	#include <linux/dmaengine.h>
	9	#include <linux/slab.h>
	10	#include <sound/pcm.h>
	11	#include <sound/pcm_params.h>
	12	#include <sound/soc.h>
	13	#include <linux/dma-mapping.h>
	14	#include <linux/of.h>
28c4468b LPC	15
	16	#include <sound/dmaengine_pcm.h>
	17
b0e3b0a7 SZ	18	static unsigned int prealloc_buffer_size_kbytes = 512;
	19	module_param(prealloc_buffer_size_kbytes, uint, 0444);
	20	MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB).");
	21
acde50a7 LPC	22	/*
	23	* The platforms dmaengine driver does not support reporting the amount of
	24	* bytes that are still left to transfer.
	25	*/
	26	#define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)
	27
c0de42bf LPC	28	static struct device dmaengine_dma_dev(struct dmaengine_pcm pcm,
	29	struct snd_pcm_substream *substream)
	30	{
	31	if (!pcm->chan[substream->stream])
	32	return NULL;
	33
	34	return pcm->chan[substream->stream]->device->dev;
	35	}
	36
28c4468b LPC	37	/**
	38	* snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
	39	* @substream: PCM substream
	40	* @params: hw_params
	41	* @slave_config: DMA slave config to prepare
	42	*
	43	* This function can be used as a generic prepare_slave_config callback for
	44	* platforms which make use of the snd_dmaengine_dai_dma_data struct for their
	45	* DAI DMA data. Internally the function will first call
	46	* snd_hwparams_to_dma_slave_config to fill in the slave config based on the
e52dca72 MR	47	* hw_params, followed by snd_dmaengine_pcm_set_config_from_dai_data to fill in
e52dca72 MR	48	* the remaining fields based on the DAI DMA data.
28c4468b LPC	49	*/
	50	int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
	51	struct snd_pcm_hw_params params, struct dma_slave_config slave_config)
	52	{
c067b1f8	53	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
28c4468b LPC	54	struct snd_dmaengine_dai_dma_data *dma_data;
	55	int ret;
	56
3989ade2	57	if (rtd->dai_link->num_cpus > 1) {
6e1276a5 BL	58	dev_err(rtd->dev,
	59	"%s doesn't support Multi CPU yet\n", __func__);
	60	return -EINVAL;
	61	}
	62
c067b1f8	63	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);
28c4468b LPC	64
	65	ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
	66	if (ret)
	67	return ret;
	68
	69	snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
	70	slave_config);
	71
	72	return 0;
	73	}
	74	EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config);
	75
ece23171 KM	76	static int dmaengine_pcm_hw_params(struct snd_soc_component *component,
	77	struct snd_pcm_substream *substream,
	78	struct snd_pcm_hw_params *params)
28c4468b	79	{
be7ee5f3	80	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b LPC	81	struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
28c4468b LPC	82	struct dma_slave_config slave_config;
43556516	83	int ret;
28c4468b	84
43556516 SH	85	if (!pcm->config->prepare_slave_config)
43556516 SH	86	return 0;
fa654e08	87
43556516	88	memset(&slave_config, 0, sizeof(slave_config));
28c4468b	89
43556516 SH	90	ret = pcm->config->prepare_slave_config(substream, params, &slave_config);
	91	if (ret)
	92	return ret;
28c4468b	93
43556516	94	return dmaengine_slave_config(chan, &slave_config);
28c4468b LPC	95	}
28c4468b LPC	96
ece23171 KM	97	static int
	98	dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component,
	99	struct snd_pcm_substream *substream)
28c4468b	100	{
c067b1f8	101	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
be7ee5f3	102	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf	103	struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
28c4468b	104	struct dma_chan *chan = pcm->chan[substream->stream];
c0de42bf	105	struct snd_dmaengine_dai_dma_data *dma_data;
c0de42bf	106	struct snd_pcm_hardware hw;
28c4468b	107
3989ade2	108	if (rtd->dai_link->num_cpus > 1) {
6e1276a5 BL	109	dev_err(rtd->dev,
	110	"%s doesn't support Multi CPU yet\n", __func__);
	111	return -EINVAL;
	112	}
	113
43556516	114	if (pcm->config->pcm_hardware)
c0de42bf	115	return snd_soc_set_runtime_hwparams(substream,
28c4468b	116	pcm->config->pcm_hardware);
28c4468b	117
c067b1f8	118	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);
c0de42bf LPC	119
	120	memset(&hw, 0, sizeof(hw));
	121	hw.info = SNDRV_PCM_INFO_MMAP \| SNDRV_PCM_INFO_MMAP_VALID \|
	122	SNDRV_PCM_INFO_INTERLEAVED;
	123	hw.periods_min = 2;
	124	hw.periods_max = UINT_MAX;
300689fb SH	125	hw.period_bytes_min = dma_data->maxburst * DMA_SLAVE_BUSWIDTH_8_BYTES;
	126	if (!hw.period_bytes_min)
	127	hw.period_bytes_min = 256;
c0de42bf LPC	128	hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
	129	hw.buffer_bytes_max = SIZE_MAX;
	130	hw.fifo_size = dma_data->fifo_size;
	131
a22f33b0 LPC	132	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
	133	hw.info \|= SNDRV_PCM_INFO_BATCH;
	134
13012809 SW	135	/**
	136	* FIXME: Remove the return value check to align with the code
	137	* before adding snd_dmaengine_pcm_refine_runtime_hwparams
	138	* function.
	139	*/
	140	snd_dmaengine_pcm_refine_runtime_hwparams(substream,
	141	dma_data,
	142	&hw,
	143	chan);
c0de42bf LPC	144
c0de42bf LPC	145	return snd_soc_set_runtime_hwparams(substream, &hw);
28c4468b LPC	146	}
28c4468b LPC	147
ece23171 KM	148	static int dmaengine_pcm_open(struct snd_soc_component *component,
ece23171 KM	149	struct snd_pcm_substream *substream)
28c4468b	150	{
be7ee5f3	151	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf LPC	152	struct dma_chan *chan = pcm->chan[substream->stream];
c0de42bf LPC	153	int ret;
28c4468b	154
ece23171	155	ret = dmaengine_pcm_set_runtime_hwparams(component, substream);
c0de42bf LPC	156	if (ret)
	157	return ret;
	158
	159	return snd_dmaengine_pcm_open(substream, chan);
28c4468b LPC	160	}
28c4468b LPC	161
ece23171 KM	162	static int dmaengine_pcm_close(struct snd_soc_component *component,
	163	struct snd_pcm_substream *substream)
	164	{
	165	return snd_dmaengine_pcm_close(substream);
	166	}
	167
ece23171 KM	168	static int dmaengine_pcm_trigger(struct snd_soc_component *component,
	169	struct snd_pcm_substream *substream, int cmd)
	170	{
	171	return snd_dmaengine_pcm_trigger(substream, cmd);
	172	}
	173
c999836d	174	static struct dma_chan *dmaengine_pcm_compat_request_channel(
ece23171	175	struct snd_soc_component *component,
c999836d LPC	176	struct snd_soc_pcm_runtime *rtd,
	177	struct snd_pcm_substream *substream)
	178	{
be7ee5f3	179	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
90130d2e MB	180	struct snd_dmaengine_dai_dma_data *dma_data;
90130d2e MB	181
3989ade2	182	if (rtd->dai_link->num_cpus > 1) {
6e1276a5 BL	183	dev_err(rtd->dev,
	184	"%s doesn't support Multi CPU yet\n", __func__);
	185	return NULL;
	186	}
	187
c067b1f8	188	dma_data = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);
c999836d	189
d1e1406c LPC	190	if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0])
	191	return pcm->chan[0];
	192
43556516	193	if (pcm->config->compat_request_channel)
c999836d LPC	194	return pcm->config->compat_request_channel(rtd, substream);
c999836d LPC	195
43556516 SH	196	return snd_dmaengine_pcm_request_channel(pcm->config->compat_filter_fn,
43556516 SH	197	dma_data->filter_data);
c999836d LPC	198	}
c999836d LPC	199
acde50a7 LPC	200	static bool dmaengine_pcm_can_report_residue(struct device *dev,
acde50a7 LPC	201	struct dma_chan *chan)
478028e0 LPC	202	{
	203	struct dma_slave_caps dma_caps;
	204	int ret;
	205
	206	ret = dma_get_slave_caps(chan, &dma_caps);
acde50a7 LPC	207	if (ret != 0) {
	208	dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n",
	209	ret);
	210	return false;
	211	}
478028e0 LPC	212
	213	if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR)
	214	return false;
	215
	216	return true;
	217	}
	218
ece23171 KM	219	static int dmaengine_pcm_new(struct snd_soc_component *component,
ece23171 KM	220	struct snd_soc_pcm_runtime *rtd)
28c4468b	221	{
be7ee5f3	222	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b	223	const struct snd_dmaengine_pcm_config *config = pcm->config;
be7ee5f3	224	struct device *dev = component->dev;
fa654e08 LPC	225	size_t prealloc_buffer_size;
fa654e08 LPC	226	size_t max_buffer_size;
28c4468b	227	unsigned int i;
28c4468b	228
43556516	229	if (config->prealloc_buffer_size)
fa654e08	230	prealloc_buffer_size = config->prealloc_buffer_size;
88c62b16	231	else
b0e3b0a7	232	prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024;
88c62b16	233
43556516	234	if (config->pcm_hardware && config->pcm_hardware->buffer_bytes_max)
88c62b16 SW	235	max_buffer_size = config->pcm_hardware->buffer_bytes_max;
88c62b16 SW	236	else
fa654e08	237	max_buffer_size = SIZE_MAX;
fa654e08	238
ee10fbe1	239	for_each_pcm_streams(i) {
9cec66fa	240	struct snd_pcm_substream *substream = rtd->pcm->streams[i].substream;
28c4468b LPC	241	if (!substream)
	242	continue;
	243
43556516	244	if (!pcm->chan[i] && config->chan_names[i])
9bfa24e9	245	pcm->chan[i] = dma_request_slave_channel(dev,
76d9c68b	246	config->chan_names[i]);
9bfa24e9	247
d1e1406c	248	if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) {
ece23171 KM	249	pcm->chan[i] = dmaengine_pcm_compat_request_channel(
ece23171 KM	250	component, rtd, substream);
c999836d LPC	251	}
c999836d LPC	252
28c4468b	253	if (!pcm->chan[i]) {
be7ee5f3	254	dev_err(component->dev,
28c4468b	255	"Missing dma channel for stream: %d\n", i);
de7621e8	256	return -EINVAL;
28c4468b LPC	257	}
28c4468b LPC	258
d708c2b3	259	snd_pcm_set_managed_buffer(substream,
ca2b0295	260	SNDRV_DMA_TYPE_DEV_IRAM,
28c4468b	261	dmaengine_dma_dev(pcm, substream),
fa654e08 LPC	262	prealloc_buffer_size,
fa654e08 LPC	263	max_buffer_size);
478028e0	264
acde50a7	265	if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i]))
478028e0	266	pcm->flags \|= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE;
2ec42f31 PU	267
2ec42f31 PU	268	if (rtd->pcm->streams[i].pcm->name[0] == '\0') {
48118a93 PU	269	strscpy_pad(rtd->pcm->streams[i].pcm->name,
	270	rtd->pcm->streams[i].pcm->id,
	271	sizeof(rtd->pcm->streams[i].pcm->name));
2ec42f31	272	}
28c4468b LPC	273	}
	274
	275	return 0;
28c4468b LPC	276	}
28c4468b LPC	277
93b943ed	278	static snd_pcm_uframes_t dmaengine_pcm_pointer(
ece23171	279	struct snd_soc_component *component,
93b943ed LPC	280	struct snd_pcm_substream *substream)
93b943ed LPC	281	{
be7ee5f3	282	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
93b943ed LPC	283
	284	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
	285	return snd_dmaengine_pcm_pointer_no_residue(substream);
	286	else
	287	return snd_dmaengine_pcm_pointer(substream);
	288	}
	289
56b00d10 TI	290	static int dmaengine_copy(struct snd_soc_component *component,
	291	struct snd_pcm_substream *substream,
	292	int channel, unsigned long hwoff,
ef98a488	293	struct iov_iter *iter, unsigned long bytes)
78648092	294	{
78648092 OM	295	struct snd_pcm_runtime *runtime = substream->runtime;
	296	struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
	297	int (process)(struct snd_pcm_substream substream,
	298	int channel, unsigned long hwoff,
69d0fd34	299	unsigned long bytes) = pcm->config->process;
78648092 OM	300	bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	301	void *dma_ptr = runtime->dma_area + hwoff +
	302	channel * (runtime->dma_bytes / runtime->channels);
78648092 OM	303
78648092 OM	304	if (is_playback)
ef98a488	305	if (copy_from_iter(dma_ptr, bytes, iter) != bytes)
78648092 OM	306	return -EFAULT;
	307
	308	if (process) {
69d0fd34	309	int ret = process(substream, channel, hwoff, bytes);
78648092 OM	310	if (ret < 0)
	311	return ret;
	312	}
	313
	314	if (!is_playback)
ef98a488	315	if (copy_to_iter(dma_ptr, bytes, iter) != bytes)
78648092 OM	316	return -EFAULT;
	317
	318	return 0;
	319	}
	320
e8343410 JL	321	static int dmaengine_pcm_sync_stop(struct snd_soc_component *component,
	322	struct snd_pcm_substream *substream)
	323	{
	324	return snd_dmaengine_pcm_sync_stop(substream);
	325	}
	326
ece23171 KM	327	static const struct snd_soc_component_driver dmaengine_pcm_component = {
	328	.name = SND_DMAENGINE_PCM_DRV_NAME,
	329	.probe_order = SND_SOC_COMP_ORDER_LATE,
28c4468b	330	.open = dmaengine_pcm_open,
ece23171	331	.close = dmaengine_pcm_close,
28c4468b	332	.hw_params = dmaengine_pcm_hw_params,
ece23171	333	.trigger = dmaengine_pcm_trigger,
93b943ed	334	.pointer = dmaengine_pcm_pointer,
ece23171	335	.pcm_construct = dmaengine_pcm_new,
e8343410	336	.sync_stop = dmaengine_pcm_sync_stop,
28c4468b LPC	337	};
28c4468b LPC	338
ece23171 KM	339	static const struct snd_soc_component_driver dmaengine_pcm_component_process = {
	340	.name = SND_DMAENGINE_PCM_DRV_NAME,
	341	.probe_order = SND_SOC_COMP_ORDER_LATE,
78648092	342	.open = dmaengine_pcm_open,
ece23171	343	.close = dmaengine_pcm_close,
78648092	344	.hw_params = dmaengine_pcm_hw_params,
ece23171	345	.trigger = dmaengine_pcm_trigger,
78648092	346	.pointer = dmaengine_pcm_pointer,
56b00d10	347	.copy = dmaengine_copy,
ece23171	348	.pcm_construct = dmaengine_pcm_new,
e8343410	349	.sync_stop = dmaengine_pcm_sync_stop,
78648092 OM	350	};
78648092 OM	351
28c4468b LPC	352	static const char * const dmaengine_pcm_dma_channel_names[] = {
	353	[SNDRV_PCM_STREAM_PLAYBACK] = "tx",
	354	[SNDRV_PCM_STREAM_CAPTURE] = "rx",
	355	};
	356
5eda87b8	357	static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
194c7dea	358	struct device dev, const struct snd_dmaengine_pcm_config config)
d1e1406c LPC	359	{
d1e1406c LPC	360	unsigned int i;
11b3a7ad	361	const char *name;
5eda87b8	362	struct dma_chan *chan;
d1e1406c	363
76d9c68b	364	if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) \|\| (!dev->of_node &&
43556516	365	!(config->dma_dev && config->dma_dev->of_node)))
5eda87b8	366	return 0;
d1e1406c	367
43556516	368	if (config->dma_dev) {
194c7dea SW	369	/*
	370	* If this warning is seen, it probably means that your Linux
	371	* device structure does not match your HW device structure.
	372	* It would be best to refactor the Linux device structure to
	373	* correctly match the HW structure.
	374	*/
	375	dev_warn(dev, "DMA channels sourced from device %s",
	376	dev_name(config->dma_dev));
	377	dev = config->dma_dev;
	378	}
	379
ee10fbe1	380	for_each_pcm_streams(i) {
11b3a7ad SW	381	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
	382	name = "rx-tx";
	383	else
	384	name = dmaengine_pcm_dma_channel_names[i];
43556516	385	if (config->chan_names[i])
194c7dea	386	name = config->chan_names[i];
de8cf952	387	chan = dma_request_chan(dev, name);
5eda87b8	388	if (IS_ERR(chan)) {
86f29c74 MB	389	/*
	390	* Only report probe deferral errors, channels
	391	* might not be present for devices that
	392	* support only TX or only RX.
	393	*/
e9036c2a	394	if (PTR_ERR(chan) == -EPROBE_DEFER)
5eda87b8 SW	395	return -EPROBE_DEFER;
	396	pcm->chan[i] = NULL;
	397	} else {
	398	pcm->chan[i] = chan;
	399	}
11b3a7ad SW	400	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
11b3a7ad SW	401	break;
d1e1406c	402	}
11b3a7ad SW	403
	404	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
	405	pcm->chan[1] = pcm->chan[0];
5eda87b8 SW	406
5eda87b8 SW	407	return 0;
d1e1406c LPC	408	}
d1e1406c LPC	409
6b9f3e65 SW	410	static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
	411	{
	412	unsigned int i;
	413
ee10fbe1	414	for_each_pcm_streams(i) {
6b9f3e65 SW	415	if (!pcm->chan[i])
	416	continue;
	417	dma_release_channel(pcm->chan[i]);
	418	if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
	419	break;
	420	}
	421	}
	422
43556516 SH	423	static const struct snd_dmaengine_pcm_config snd_dmaengine_pcm_default_config = {
	424	.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
	425	};
	426
28c4468b LPC	427	/**
	428	* snd_dmaengine_pcm_register - Register a dmaengine based PCM device
	429	* @dev: The parent device for the PCM device
	430	* @config: Platform specific PCM configuration
	431	* @flags: Platform specific quirks
	432	*/
	433	int snd_dmaengine_pcm_register(struct device *dev,
	434	const struct snd_dmaengine_pcm_config *config, unsigned int flags)
	435	{
ea029dd8	436	const struct snd_soc_component_driver *driver;
28c4468b	437	struct dmaengine_pcm *pcm;
6b9f3e65	438	int ret;
28c4468b	439
28c4468b LPC	440	pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
	441	if (!pcm)
	442	return -ENOMEM;
	443
f0b3bdbd FE	444	#ifdef CONFIG_DEBUG_FS
	445	pcm->component.debugfs_prefix = "dma";
	446	#endif
43556516 SH	447	if (!config)
43556516 SH	448	config = &snd_dmaengine_pcm_default_config;
28c4468b	449	pcm->config = config;
d1e1406c	450	pcm->flags = flags;
28c4468b	451
cee28113 TV	452	if (config->name)
	453	pcm->component.name = config->name;
	454
5eda87b8 SW	455	ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
5eda87b8 SW	456	if (ret)
b84acf44	457	goto err_free_dma;
28c4468b	458
43556516	459	if (config->process)
ea029dd8	460	driver = &dmaengine_pcm_component_process;
78648092	461	else
ea029dd8 CR	462	driver = &dmaengine_pcm_component;
	463
	464	ret = snd_soc_component_initialize(&pcm->component, driver, dev);
	465	if (ret)
	466	goto err_free_dma;
	467
	468	ret = snd_soc_add_component(&pcm->component, NULL, 0);
6b9f3e65 SW	469	if (ret)
	470	goto err_free_dma;
	471
	472	return 0;
	473
	474	err_free_dma:
	475	dmaengine_pcm_release_chan(pcm);
	476	kfree(pcm);
	477	return ret;
28c4468b LPC	478	}
	479	EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);
	480
	481	/**
	482	* snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device
	483	* @dev: Parent device the PCM was register with
	484	*
	485	* Removes a dmaengine based PCM device previously registered with
	486	* snd_dmaengine_pcm_register.
	487	*/
	488	void snd_dmaengine_pcm_unregister(struct device *dev)
	489	{
be7ee5f3	490	struct snd_soc_component *component;
28c4468b	491	struct dmaengine_pcm *pcm;
28c4468b	492
be7ee5f3 KM	493	component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME);
be7ee5f3 KM	494	if (!component)
28c4468b LPC	495	return;
28c4468b LPC	496
be7ee5f3	497	pcm = soc_component_to_pcm(component);
28c4468b	498
58f30150	499	snd_soc_unregister_component_by_driver(dev, component->driver);
6b9f3e65	500	dmaengine_pcm_release_chan(pcm);
28c4468b LPC	501	kfree(pcm);
	502	}
	503	EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
	504
2c846d7c	505	MODULE_DESCRIPTION("ASoC helpers for generic PCM dmaengine API");
28c4468b	506	MODULE_LICENSE("GPL");