Merge tag 'gvt-fixes-2019-08-13' of https://github.com/intel/gvt-linux into drm-intel...
[linux-2.6-block.git] / sound / soc / soc-generic-dmaengine-pcm.c
CommitLineData
1356a607
KM
1// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright (C) 2013, Analog Devices Inc.
4// Author: Lars-Peter Clausen <lars@metafoo.de>
5
28c4468b
LPC
6#include <linux/module.h>
7#include <linux/init.h>
8#include <linux/dmaengine.h>
9#include <linux/slab.h>
10#include <sound/pcm.h>
11#include <sound/pcm_params.h>
12#include <sound/soc.h>
13#include <linux/dma-mapping.h>
14#include <linux/of.h>
28c4468b
LPC
15
16#include <sound/dmaengine_pcm.h>
17
acde50a7
LPC
18/*
19 * The platforms dmaengine driver does not support reporting the amount of
20 * bytes that are still left to transfer.
21 */
22#define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)
23
28c4468b 24struct dmaengine_pcm {
f82bf8e2 25 struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
28c4468b 26 const struct snd_dmaengine_pcm_config *config;
be7ee5f3 27 struct snd_soc_component component;
d1e1406c 28 unsigned int flags;
28c4468b
LPC
29};
30
be7ee5f3 31static struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p)
28c4468b 32{
be7ee5f3 33 return container_of(p, struct dmaengine_pcm, component);
28c4468b
LPC
34}
35
c0de42bf
LPC
36static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
37 struct snd_pcm_substream *substream)
38{
39 if (!pcm->chan[substream->stream])
40 return NULL;
41
42 return pcm->chan[substream->stream]->device->dev;
43}
44
28c4468b
LPC
45/**
46 * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
47 * @substream: PCM substream
48 * @params: hw_params
49 * @slave_config: DMA slave config to prepare
50 *
51 * This function can be used as a generic prepare_slave_config callback for
52 * platforms which make use of the snd_dmaengine_dai_dma_data struct for their
53 * DAI DMA data. Internally the function will first call
54 * snd_hwparams_to_dma_slave_config to fill in the slave config based on the
55 * hw_params, followed by snd_dmaengine_set_config_from_dai_data to fill in the
56 * remaining fields based on the DAI DMA data.
57 */
58int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
59 struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
60{
61 struct snd_soc_pcm_runtime *rtd = substream->private_data;
62 struct snd_dmaengine_dai_dma_data *dma_data;
63 int ret;
64
65 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
66
67 ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
68 if (ret)
69 return ret;
70
71 snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
72 slave_config);
73
74 return 0;
75}
76EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config);
77
78static int dmaengine_pcm_hw_params(struct snd_pcm_substream *substream,
79 struct snd_pcm_hw_params *params)
80{
81 struct snd_soc_pcm_runtime *rtd = substream->private_data;
be7ee5f3
KM
82 struct snd_soc_component *component =
83 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
84 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b 85 struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
fa654e08
LPC
86 int (*prepare_slave_config)(struct snd_pcm_substream *substream,
87 struct snd_pcm_hw_params *params,
88 struct dma_slave_config *slave_config);
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LPC
89 struct dma_slave_config slave_config;
90 int ret;
91
a894bd7f
LJ
92 memset(&slave_config, 0, sizeof(slave_config));
93
fa654e08
LPC
94 if (!pcm->config)
95 prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config;
96 else
97 prepare_slave_config = pcm->config->prepare_slave_config;
98
99 if (prepare_slave_config) {
100 ret = prepare_slave_config(substream, params, &slave_config);
28c4468b
LPC
101 if (ret)
102 return ret;
103
104 ret = dmaengine_slave_config(chan, &slave_config);
105 if (ret)
106 return ret;
107 }
108
109 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
110}
111
c0de42bf 112static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substream)
28c4468b
LPC
113{
114 struct snd_soc_pcm_runtime *rtd = substream->private_data;
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KM
115 struct snd_soc_component *component =
116 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
117 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf 118 struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
28c4468b 119 struct dma_chan *chan = pcm->chan[substream->stream];
c0de42bf
LPC
120 struct snd_dmaengine_dai_dma_data *dma_data;
121 struct dma_slave_caps dma_caps;
122 struct snd_pcm_hardware hw;
2d38df12
PU
123 u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
124 BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
125 BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
7ed310bd
FE
126 snd_pcm_format_t i;
127 int ret;
28c4468b 128
fa654e08 129 if (pcm->config && pcm->config->pcm_hardware)
c0de42bf 130 return snd_soc_set_runtime_hwparams(substream,
28c4468b 131 pcm->config->pcm_hardware);
28c4468b 132
c0de42bf
LPC
133 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
134
135 memset(&hw, 0, sizeof(hw));
136 hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
137 SNDRV_PCM_INFO_INTERLEAVED;
138 hw.periods_min = 2;
139 hw.periods_max = UINT_MAX;
140 hw.period_bytes_min = 256;
141 hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
142 hw.buffer_bytes_max = SIZE_MAX;
143 hw.fifo_size = dma_data->fifo_size;
144
a22f33b0
LPC
145 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
146 hw.info |= SNDRV_PCM_INFO_BATCH;
147
c0de42bf
LPC
148 ret = dma_get_slave_caps(chan, &dma_caps);
149 if (ret == 0) {
d8095f94 150 if (dma_caps.cmd_pause && dma_caps.cmd_resume)
c0de42bf 151 hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
478028e0
LPC
152 if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT)
153 hw.info |= SNDRV_PCM_INFO_BATCH;
2d38df12
PU
154
155 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
ceacbdbf 156 addr_widths = dma_caps.dst_addr_widths;
2d38df12
PU
157 else
158 addr_widths = dma_caps.src_addr_widths;
159 }
160
161 /*
73fe01cf
MR
162 * If SND_DMAENGINE_PCM_DAI_FLAG_PACK is set keep
163 * hw.formats set to 0, meaning no restrictions are in place.
164 * In this case it's the responsibility of the DAI driver to
165 * provide the supported format information.
2d38df12 166 */
73fe01cf
MR
167 if (!(dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK))
168 /*
169 * Prepare formats mask for valid/allowed sample types. If the
170 * dma does not have support for the given physical word size,
171 * it needs to be masked out so user space can not use the
172 * format which produces corrupted audio.
173 * In case the dma driver does not implement the slave_caps the
174 * default assumption is that it supports 1, 2 and 4 bytes
175 * widths.
176 */
7ed310bd 177 for (i = SNDRV_PCM_FORMAT_FIRST; i <= SNDRV_PCM_FORMAT_LAST; i++) {
73fe01cf
MR
178 int bits = snd_pcm_format_physical_width(i);
179
180 /*
181 * Enable only samples with DMA supported physical
182 * widths
183 */
184 switch (bits) {
185 case 8:
186 case 16:
187 case 24:
188 case 32:
189 case 64:
190 if (addr_widths & (1 << (bits / 8)))
8adf3df4 191 hw.formats |= pcm_format_to_bits(i);
73fe01cf
MR
192 break;
193 default:
194 /* Unsupported types */
195 break;
196 }
2d38df12 197 }
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LPC
198
199 return snd_soc_set_runtime_hwparams(substream, &hw);
28c4468b
LPC
200}
201
c0de42bf 202static int dmaengine_pcm_open(struct snd_pcm_substream *substream)
28c4468b 203{
c0de42bf 204 struct snd_soc_pcm_runtime *rtd = substream->private_data;
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KM
205 struct snd_soc_component *component =
206 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
207 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
c0de42bf
LPC
208 struct dma_chan *chan = pcm->chan[substream->stream];
209 int ret;
28c4468b 210
c0de42bf
LPC
211 ret = dmaengine_pcm_set_runtime_hwparams(substream);
212 if (ret)
213 return ret;
214
215 return snd_dmaengine_pcm_open(substream, chan);
28c4468b
LPC
216}
217
c999836d
LPC
218static struct dma_chan *dmaengine_pcm_compat_request_channel(
219 struct snd_soc_pcm_runtime *rtd,
220 struct snd_pcm_substream *substream)
221{
be7ee5f3
KM
222 struct snd_soc_component *component =
223 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
224 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
90130d2e 225 struct snd_dmaengine_dai_dma_data *dma_data;
ec4f2857 226 dma_filter_fn fn = NULL;
90130d2e
MB
227
228 dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
c999836d 229
d1e1406c
LPC
230 if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0])
231 return pcm->chan[0];
232
ec4f2857 233 if (pcm->config && pcm->config->compat_request_channel)
c999836d
LPC
234 return pcm->config->compat_request_channel(rtd, substream);
235
ec4f2857
XL
236 if (pcm->config)
237 fn = pcm->config->compat_filter_fn;
238
239 return snd_dmaengine_pcm_request_channel(fn, dma_data->filter_data);
c999836d
LPC
240}
241
acde50a7
LPC
242static bool dmaengine_pcm_can_report_residue(struct device *dev,
243 struct dma_chan *chan)
478028e0
LPC
244{
245 struct dma_slave_caps dma_caps;
246 int ret;
247
248 ret = dma_get_slave_caps(chan, &dma_caps);
acde50a7
LPC
249 if (ret != 0) {
250 dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n",
251 ret);
252 return false;
253 }
478028e0
LPC
254
255 if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR)
256 return false;
257
258 return true;
259}
260
28c4468b
LPC
261static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd)
262{
be7ee5f3
KM
263 struct snd_soc_component *component =
264 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
265 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
28c4468b 266 const struct snd_dmaengine_pcm_config *config = pcm->config;
be7ee5f3 267 struct device *dev = component->dev;
28c4468b 268 struct snd_pcm_substream *substream;
fa654e08
LPC
269 size_t prealloc_buffer_size;
270 size_t max_buffer_size;
28c4468b 271 unsigned int i;
28c4468b 272
fa654e08
LPC
273 if (config && config->prealloc_buffer_size) {
274 prealloc_buffer_size = config->prealloc_buffer_size;
275 max_buffer_size = config->pcm_hardware->buffer_bytes_max;
276 } else {
277 prealloc_buffer_size = 512 * 1024;
278 max_buffer_size = SIZE_MAX;
279 }
280
28c4468b
LPC
281 for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) {
282 substream = rtd->pcm->streams[i].substream;
283 if (!substream)
284 continue;
285
76d9c68b 286 if (!pcm->chan[i] && config && config->chan_names[i])
9bfa24e9 287 pcm->chan[i] = dma_request_slave_channel(dev,
76d9c68b 288 config->chan_names[i]);
9bfa24e9 289
d1e1406c 290 if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) {
c999836d
LPC
291 pcm->chan[i] = dmaengine_pcm_compat_request_channel(rtd,
292 substream);
293 }
294
28c4468b 295 if (!pcm->chan[i]) {
be7ee5f3 296 dev_err(component->dev,
28c4468b 297 "Missing dma channel for stream: %d\n", i);
de7621e8 298 return -EINVAL;
28c4468b
LPC
299 }
300
6c422436 301 snd_pcm_lib_preallocate_pages(substream,
ca2b0295 302 SNDRV_DMA_TYPE_DEV_IRAM,
28c4468b 303 dmaengine_dma_dev(pcm, substream),
fa654e08
LPC
304 prealloc_buffer_size,
305 max_buffer_size);
478028e0 306
acde50a7 307 if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i]))
478028e0 308 pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE;
28c4468b
LPC
309 }
310
311 return 0;
28c4468b
LPC
312}
313
93b943ed
LPC
314static snd_pcm_uframes_t dmaengine_pcm_pointer(
315 struct snd_pcm_substream *substream)
316{
317 struct snd_soc_pcm_runtime *rtd = substream->private_data;
be7ee5f3
KM
318 struct snd_soc_component *component =
319 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
320 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
93b943ed
LPC
321
322 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
323 return snd_dmaengine_pcm_pointer_no_residue(substream);
324 else
325 return snd_dmaengine_pcm_pointer(substream);
326}
327
78648092
OM
328static int dmaengine_copy_user(struct snd_pcm_substream *substream,
329 int channel, unsigned long hwoff,
40d1299f 330 void __user *buf, unsigned long bytes)
78648092
OM
331{
332 struct snd_soc_pcm_runtime *rtd = substream->private_data;
333 struct snd_soc_component *component =
334 snd_soc_rtdcom_lookup(rtd, SND_DMAENGINE_PCM_DRV_NAME);
335 struct snd_pcm_runtime *runtime = substream->runtime;
336 struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
337 int (*process)(struct snd_pcm_substream *substream,
338 int channel, unsigned long hwoff,
339 void *buf, unsigned long bytes) = pcm->config->process;
340 bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
341 void *dma_ptr = runtime->dma_area + hwoff +
342 channel * (runtime->dma_bytes / runtime->channels);
343 int ret;
344
345 if (is_playback)
40d1299f 346 if (copy_from_user(dma_ptr, buf, bytes))
78648092
OM
347 return -EFAULT;
348
349 if (process) {
40d1299f 350 ret = process(substream, channel, hwoff, (__force void *)buf, bytes);
78648092
OM
351 if (ret < 0)
352 return ret;
353 }
354
355 if (!is_playback)
40d1299f 356 if (copy_to_user(buf, dma_ptr, bytes))
78648092
OM
357 return -EFAULT;
358
359 return 0;
360}
361
28c4468b
LPC
362static const struct snd_pcm_ops dmaengine_pcm_ops = {
363 .open = dmaengine_pcm_open,
364 .close = snd_dmaengine_pcm_close,
365 .ioctl = snd_pcm_lib_ioctl,
366 .hw_params = dmaengine_pcm_hw_params,
367 .hw_free = snd_pcm_lib_free_pages,
368 .trigger = snd_dmaengine_pcm_trigger,
93b943ed 369 .pointer = dmaengine_pcm_pointer,
28c4468b
LPC
370};
371
78648092
OM
372static const struct snd_pcm_ops dmaengine_pcm_process_ops = {
373 .open = dmaengine_pcm_open,
374 .close = snd_dmaengine_pcm_close,
375 .ioctl = snd_pcm_lib_ioctl,
376 .hw_params = dmaengine_pcm_hw_params,
377 .hw_free = snd_pcm_lib_free_pages,
378 .trigger = snd_dmaengine_pcm_trigger,
379 .pointer = dmaengine_pcm_pointer,
380 .copy_user = dmaengine_copy_user,
381};
382
be7ee5f3
KM
383static const struct snd_soc_component_driver dmaengine_pcm_component = {
384 .name = SND_DMAENGINE_PCM_DRV_NAME,
385 .probe_order = SND_SOC_COMP_ORDER_LATE,
28c4468b
LPC
386 .ops = &dmaengine_pcm_ops,
387 .pcm_new = dmaengine_pcm_new,
28c4468b
LPC
388};
389
78648092
OM
390static const struct snd_soc_component_driver dmaengine_pcm_component_process = {
391 .name = SND_DMAENGINE_PCM_DRV_NAME,
392 .probe_order = SND_SOC_COMP_ORDER_LATE,
393 .ops = &dmaengine_pcm_process_ops,
394 .pcm_new = dmaengine_pcm_new,
395};
396
28c4468b
LPC
397static const char * const dmaengine_pcm_dma_channel_names[] = {
398 [SNDRV_PCM_STREAM_PLAYBACK] = "tx",
399 [SNDRV_PCM_STREAM_CAPTURE] = "rx",
400};
401
5eda87b8 402static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
194c7dea 403 struct device *dev, const struct snd_dmaengine_pcm_config *config)
d1e1406c
LPC
404{
405 unsigned int i;
11b3a7ad 406 const char *name;
5eda87b8 407 struct dma_chan *chan;
d1e1406c 408
76d9c68b
SN
409 if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node &&
410 !(config && config->dma_dev && config->dma_dev->of_node)))
5eda87b8 411 return 0;
d1e1406c 412
2b67f8ba 413 if (config && config->dma_dev) {
194c7dea
SW
414 /*
415 * If this warning is seen, it probably means that your Linux
416 * device structure does not match your HW device structure.
417 * It would be best to refactor the Linux device structure to
418 * correctly match the HW structure.
419 */
420 dev_warn(dev, "DMA channels sourced from device %s",
421 dev_name(config->dma_dev));
422 dev = config->dma_dev;
423 }
424
11b3a7ad
SW
425 for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE;
426 i++) {
427 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
428 name = "rx-tx";
429 else
430 name = dmaengine_pcm_dma_channel_names[i];
2b67f8ba 431 if (config && config->chan_names[i])
194c7dea 432 name = config->chan_names[i];
5eda87b8
SW
433 chan = dma_request_slave_channel_reason(dev, name);
434 if (IS_ERR(chan)) {
e9036c2a 435 if (PTR_ERR(chan) == -EPROBE_DEFER)
5eda87b8
SW
436 return -EPROBE_DEFER;
437 pcm->chan[i] = NULL;
438 } else {
439 pcm->chan[i] = chan;
440 }
11b3a7ad
SW
441 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
442 break;
d1e1406c 443 }
11b3a7ad
SW
444
445 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
446 pcm->chan[1] = pcm->chan[0];
5eda87b8
SW
447
448 return 0;
d1e1406c
LPC
449}
450
6b9f3e65
SW
451static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
452{
453 unsigned int i;
454
455 for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE;
456 i++) {
457 if (!pcm->chan[i])
458 continue;
459 dma_release_channel(pcm->chan[i]);
460 if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
461 break;
462 }
463}
464
28c4468b
LPC
465/**
466 * snd_dmaengine_pcm_register - Register a dmaengine based PCM device
467 * @dev: The parent device for the PCM device
468 * @config: Platform specific PCM configuration
469 * @flags: Platform specific quirks
470 */
471int snd_dmaengine_pcm_register(struct device *dev,
472 const struct snd_dmaengine_pcm_config *config, unsigned int flags)
473{
474 struct dmaengine_pcm *pcm;
6b9f3e65 475 int ret;
28c4468b 476
28c4468b
LPC
477 pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
478 if (!pcm)
479 return -ENOMEM;
480
f0b3bdbd
FE
481#ifdef CONFIG_DEBUG_FS
482 pcm->component.debugfs_prefix = "dma";
483#endif
28c4468b 484 pcm->config = config;
d1e1406c 485 pcm->flags = flags;
28c4468b 486
5eda87b8
SW
487 ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
488 if (ret)
b84acf44 489 goto err_free_dma;
28c4468b 490
78648092
OM
491 if (config && config->process)
492 ret = snd_soc_add_component(dev, &pcm->component,
493 &dmaengine_pcm_component_process,
494 NULL, 0);
495 else
496 ret = snd_soc_add_component(dev, &pcm->component,
497 &dmaengine_pcm_component, NULL, 0);
6b9f3e65
SW
498 if (ret)
499 goto err_free_dma;
500
501 return 0;
502
503err_free_dma:
504 dmaengine_pcm_release_chan(pcm);
505 kfree(pcm);
506 return ret;
28c4468b
LPC
507}
508EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);
509
510/**
511 * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device
512 * @dev: Parent device the PCM was register with
513 *
514 * Removes a dmaengine based PCM device previously registered with
515 * snd_dmaengine_pcm_register.
516 */
517void snd_dmaengine_pcm_unregister(struct device *dev)
518{
be7ee5f3 519 struct snd_soc_component *component;
28c4468b 520 struct dmaengine_pcm *pcm;
28c4468b 521
be7ee5f3
KM
522 component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME);
523 if (!component)
28c4468b
LPC
524 return;
525
be7ee5f3 526 pcm = soc_component_to_pcm(component);
28c4468b 527
be7ee5f3 528 snd_soc_unregister_component(dev);
6b9f3e65 529 dmaengine_pcm_release_chan(pcm);
28c4468b
LPC
530 kfree(pcm);
531}
532EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
533
534MODULE_LICENSE("GPL");