[linux-2.6-block.git] / sound / soc / sh / siu_pcm.c

// SPDX-License-Identifier: GPL-2.0+
//
// siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
//
// Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
// Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>

#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/platform_device.h>

#include <sound/control.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

#include <asm/siu.h>

#include "siu.h"

#define DRV_NAME "siu-i2s"
#define GET_MAX_PERIODS(buf_bytes, period_bytes) \
				((buf_bytes) / (period_bytes))
#define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
				((buf_addr) + ((period_num) * (period_bytes)))

#define RWF_STM_RD		0x01		/* Read in progress */
#define RWF_STM_WT		0x02		/* Write in progress */

struct siu_port *siu_ports[SIU_PORT_NUM];

/* transfersize is number of u32 dma transfers per period */
static int siu_pcm_stmwrite_stop(struct siu_port *port_info)
{
	struct siu_info *info = siu_i2s_data;
	u32 __iomem *base = info->reg;
	struct siu_stream *siu_stream = &port_info->playback;
	u32 stfifo;

	if (!siu_stream->rw_flg)
		return -EPERM;

	/* output FIFO disable */
	stfifo = siu_read32(base + SIU_STFIFO);
	siu_write32(base + SIU_STFIFO, stfifo & ~0x0c180c18);
	pr_debug("%s: STFIFO %x -> %x\n", __func__,
		 stfifo, stfifo & ~0x0c180c18);

	/* during stmwrite clear */
	siu_stream->rw_flg = 0;

	return 0;
}

static int siu_pcm_stmwrite_start(struct siu_port *port_info)
{
	struct siu_stream *siu_stream = &port_info->playback;

	if (siu_stream->rw_flg)
		return -EPERM;

	/* Current period in buffer */
	port_info->playback.cur_period = 0;

	/* during stmwrite flag set */
	siu_stream->rw_flg = RWF_STM_WT;

	/* DMA transfer start */
	tasklet_schedule(&siu_stream->tasklet);

	return 0;
}

static void siu_dma_tx_complete(void *arg)
{
	struct siu_stream *siu_stream = arg;

	if (!siu_stream->rw_flg)
		return;

	/* Update completed period count */
	if (++siu_stream->cur_period >=
	    GET_MAX_PERIODS(siu_stream->buf_bytes,
			    siu_stream->period_bytes))
		siu_stream->cur_period = 0;

	pr_debug("%s: done period #%d (%u/%u bytes), cookie %d\n",
		__func__, siu_stream->cur_period,
		siu_stream->cur_period * siu_stream->period_bytes,
		siu_stream->buf_bytes, siu_stream->cookie);

	tasklet_schedule(&siu_stream->tasklet);

	/* Notify alsa: a period is done */
	snd_pcm_period_elapsed(siu_stream->substream);
}

static int siu_pcm_wr_set(struct siu_port *port_info,
			  dma_addr_t buff, u32 size)
{
	struct siu_info *info = siu_i2s_data;
	u32 __iomem *base = info->reg;
	struct siu_stream *siu_stream = &port_info->playback;
	struct snd_pcm_substream *substream = siu_stream->substream;
	struct device *dev = substream->pcm->card->dev;
	struct dma_async_tx_descriptor *desc;
	dma_cookie_t cookie;
	struct scatterlist sg;
	u32 stfifo;

	sg_init_table(&sg, 1);
	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
		    size, offset_in_page(buff));
	sg_dma_len(&sg) = size;
	sg_dma_address(&sg) = buff;

	desc = dmaengine_prep_slave_sg(siu_stream->chan,
		&sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		dev_err(dev, "Failed to allocate a dma descriptor\n");
		return -ENOMEM;
	}

	desc->callback = siu_dma_tx_complete;
	desc->callback_param = siu_stream;
	cookie = dmaengine_submit(desc);
	if (cookie < 0) {
		dev_err(dev, "Failed to submit a dma transfer\n");
		return cookie;
	}

	siu_stream->tx_desc = desc;
	siu_stream->cookie = cookie;

	dma_async_issue_pending(siu_stream->chan);

	/* only output FIFO enable */
	stfifo = siu_read32(base + SIU_STFIFO);
	siu_write32(base + SIU_STFIFO, stfifo | (port_info->stfifo & 0x0c180c18));
	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
		stfifo, stfifo | (port_info->stfifo & 0x0c180c18));

	return 0;
}

static int siu_pcm_rd_set(struct siu_port *port_info,
			  dma_addr_t buff, size_t size)
{
	struct siu_info *info = siu_i2s_data;
	u32 __iomem *base = info->reg;
	struct siu_stream *siu_stream = &port_info->capture;
	struct snd_pcm_substream *substream = siu_stream->substream;
	struct device *dev = substream->pcm->card->dev;
	struct dma_async_tx_descriptor *desc;
	dma_cookie_t cookie;
	struct scatterlist sg;
	u32 stfifo;

	dev_dbg(dev, "%s: %u@%llx\n", __func__, size, (unsigned long long)buff);

	sg_init_table(&sg, 1);
	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
		    size, offset_in_page(buff));
	sg_dma_len(&sg) = size;
	sg_dma_address(&sg) = buff;

	desc = dmaengine_prep_slave_sg(siu_stream->chan,
		&sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		dev_err(dev, "Failed to allocate dma descriptor\n");
		return -ENOMEM;
	}

	desc->callback = siu_dma_tx_complete;
	desc->callback_param = siu_stream;
	cookie = dmaengine_submit(desc);
	if (cookie < 0) {
		dev_err(dev, "Failed to submit dma descriptor\n");
		return cookie;
	}

	siu_stream->tx_desc = desc;
	siu_stream->cookie = cookie;

	dma_async_issue_pending(siu_stream->chan);

	/* only input FIFO enable */
	stfifo = siu_read32(base + SIU_STFIFO);
	siu_write32(base + SIU_STFIFO, siu_read32(base + SIU_STFIFO) |
		    (port_info->stfifo & 0x13071307));
	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
		stfifo, stfifo | (port_info->stfifo & 0x13071307));

	return 0;
}

static void siu_io_tasklet(unsigned long data)
{
	struct siu_stream *siu_stream = (struct siu_stream *)data;
	struct snd_pcm_substream *substream = siu_stream->substream;
	struct device *dev = substream->pcm->card->dev;
	struct snd_pcm_runtime *rt = substream->runtime;
	struct siu_port *port_info = siu_port_info(substream);

	dev_dbg(dev, "%s: flags %x\n", __func__, siu_stream->rw_flg);

	if (!siu_stream->rw_flg) {
		dev_dbg(dev, "%s: stream inactive\n", __func__);
		return;
	}

	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
		dma_addr_t buff;
		size_t count;
		u8 *virt;

		buff = (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
						siu_stream->cur_period,
						siu_stream->period_bytes);
		virt = PERIOD_OFFSET(rt->dma_area,
				     siu_stream->cur_period,
				     siu_stream->period_bytes);
		count = siu_stream->period_bytes;

		/* DMA transfer start */
		siu_pcm_rd_set(port_info, buff, count);
	} else {
		siu_pcm_wr_set(port_info,
			       (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
						siu_stream->cur_period,
						siu_stream->period_bytes),
			       siu_stream->period_bytes);
	}
}

/* Capture */
static int siu_pcm_stmread_start(struct siu_port *port_info)
{
	struct siu_stream *siu_stream = &port_info->capture;

	if (siu_stream->xfer_cnt > 0x1000000)
		return -EINVAL;
	if (siu_stream->rw_flg)
		return -EPERM;

	/* Current period in buffer */
	siu_stream->cur_period = 0;

	/* during stmread flag set */
	siu_stream->rw_flg = RWF_STM_RD;

	tasklet_schedule(&siu_stream->tasklet);

	return 0;
}

static int siu_pcm_stmread_stop(struct siu_port *port_info)
{
	struct siu_info *info = siu_i2s_data;
	u32 __iomem *base = info->reg;
	struct siu_stream *siu_stream = &port_info->capture;
	struct device *dev = siu_stream->substream->pcm->card->dev;
	u32 stfifo;

	if (!siu_stream->rw_flg)
		return -EPERM;

	/* input FIFO disable */
	stfifo = siu_read32(base + SIU_STFIFO);
	siu_write32(base + SIU_STFIFO, stfifo & ~0x13071307);
	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
		stfifo, stfifo & ~0x13071307);

	/* during stmread flag clear */
	siu_stream->rw_flg = 0;

	return 0;
}

static int siu_pcm_hw_params(struct snd_pcm_substream *ss,
			     struct snd_pcm_hw_params *hw_params)
{
	struct siu_info *info = siu_i2s_data;
	struct device *dev = ss->pcm->card->dev;
	int ret;

	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);

	ret = snd_pcm_lib_malloc_pages(ss, params_buffer_bytes(hw_params));
	if (ret < 0)
		dev_err(dev, "snd_pcm_lib_malloc_pages() failed\n");

	return ret;
}

static int siu_pcm_hw_free(struct snd_pcm_substream *ss)
{
	struct siu_info *info = siu_i2s_data;
	struct siu_port	*port_info = siu_port_info(ss);
	struct device *dev = ss->pcm->card->dev;
	struct siu_stream *siu_stream;

	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
		siu_stream = &port_info->playback;
	else
		siu_stream = &port_info->capture;

	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);

	return snd_pcm_lib_free_pages(ss);
}

static bool filter(struct dma_chan *chan, void *slave)
{
	struct sh_dmae_slave *param = slave;

	pr_debug("%s: slave ID %d\n", __func__, param->shdma_slave.slave_id);

	chan->private = &param->shdma_slave;
	return true;
}

static int siu_pcm_open(struct snd_pcm_substream *ss)
{
	/* Playback / Capture */
	struct snd_soc_pcm_runtime *rtd = ss->private_data;
	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
	struct siu_platform *pdata = component->dev->platform_data;
	struct siu_info *info = siu_i2s_data;
	struct siu_port *port_info = siu_port_info(ss);
	struct siu_stream *siu_stream;
	u32 port = info->port_id;
	struct device *dev = ss->pcm->card->dev;
	dma_cap_mask_t mask;
	struct sh_dmae_slave *param;

	dma_cap_zero(mask);
	dma_cap_set(DMA_SLAVE, mask);

	dev_dbg(dev, "%s, port=%d@%p\n", __func__, port, port_info);

	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		siu_stream = &port_info->playback;
		param = &siu_stream->param;
		param->shdma_slave.slave_id = port ? pdata->dma_slave_tx_b :
			pdata->dma_slave_tx_a;
	} else {
		siu_stream = &port_info->capture;
		param = &siu_stream->param;
		param->shdma_slave.slave_id = port ? pdata->dma_slave_rx_b :
			pdata->dma_slave_rx_a;
	}

	/* Get DMA channel */
	siu_stream->chan = dma_request_channel(mask, filter, param);
	if (!siu_stream->chan) {
		dev_err(dev, "DMA channel allocation failed!\n");
		return -EBUSY;
	}

	siu_stream->substream = ss;

	return 0;
}

static int siu_pcm_close(struct snd_pcm_substream *ss)
{
	struct siu_info *info = siu_i2s_data;
	struct device *dev = ss->pcm->card->dev;
	struct siu_port *port_info = siu_port_info(ss);
	struct siu_stream *siu_stream;

	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);

	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
		siu_stream = &port_info->playback;
	else
		siu_stream = &port_info->capture;

	dma_release_channel(siu_stream->chan);
	siu_stream->chan = NULL;

	siu_stream->substream = NULL;

	return 0;
}

static int siu_pcm_prepare(struct snd_pcm_substream *ss)
{
	struct siu_info *info = siu_i2s_data;
	struct siu_port *port_info = siu_port_info(ss);
	struct device *dev = ss->pcm->card->dev;
	struct snd_pcm_runtime 	*rt = ss->runtime;
	struct siu_stream *siu_stream;
	snd_pcm_sframes_t xfer_cnt;

	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
		siu_stream = &port_info->playback;
	else
		siu_stream = &port_info->capture;

	rt = siu_stream->substream->runtime;

	siu_stream->buf_bytes = snd_pcm_lib_buffer_bytes(ss);
	siu_stream->period_bytes = snd_pcm_lib_period_bytes(ss);

	dev_dbg(dev, "%s: port=%d, %d channels, period=%u bytes\n", __func__,
		info->port_id, rt->channels, siu_stream->period_bytes);

	/* We only support buffers that are multiples of the period */
	if (siu_stream->buf_bytes % siu_stream->period_bytes) {
		dev_err(dev, "%s() - buffer=%d not multiple of period=%d\n",
		       __func__, siu_stream->buf_bytes,
		       siu_stream->period_bytes);
		return -EINVAL;
	}

	xfer_cnt = bytes_to_frames(rt, siu_stream->period_bytes);
	if (!xfer_cnt || xfer_cnt > 0x1000000)
		return -EINVAL;

	siu_stream->format = rt->format;
	siu_stream->xfer_cnt = xfer_cnt;

	dev_dbg(dev, "port=%d buf=%lx buf_bytes=%d period_bytes=%d "
		"format=%d channels=%d xfer_cnt=%d\n", info->port_id,
		(unsigned long)rt->dma_addr, siu_stream->buf_bytes,
		siu_stream->period_bytes,
		siu_stream->format, rt->channels, (int)xfer_cnt);

	return 0;
}

static int siu_pcm_trigger(struct snd_pcm_substream *ss, int cmd)
{
	struct siu_info *info = siu_i2s_data;
	struct device *dev = ss->pcm->card->dev;
	struct siu_port *port_info = siu_port_info(ss);
	int ret;

	dev_dbg(dev, "%s: port=%d@%p, cmd=%d\n", __func__,
		info->port_id, port_info, cmd);

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
		if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
			ret = siu_pcm_stmwrite_start(port_info);
		else
			ret = siu_pcm_stmread_start(port_info);

		if (ret < 0)
			dev_warn(dev, "%s: start failed on port=%d\n",
				 __func__, info->port_id);

		break;
	case SNDRV_PCM_TRIGGER_STOP:
		if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
			siu_pcm_stmwrite_stop(port_info);
		else
			siu_pcm_stmread_stop(port_info);
		ret = 0;

		break;
	default:
		dev_err(dev, "%s() unsupported cmd=%d\n", __func__, cmd);
		ret = -EINVAL;
	}

	return ret;
}

/*
 * So far only resolution of one period is supported, subject to extending the
 * dmangine API
 */
static snd_pcm_uframes_t siu_pcm_pointer_dma(struct snd_pcm_substream *ss)
{
	struct device *dev = ss->pcm->card->dev;
	struct siu_info *info = siu_i2s_data;
	u32 __iomem *base = info->reg;
	struct siu_port *port_info = siu_port_info(ss);
	struct snd_pcm_runtime *rt = ss->runtime;
	size_t ptr;
	struct siu_stream *siu_stream;

	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
		siu_stream = &port_info->playback;
	else
		siu_stream = &port_info->capture;

	/*
	 * ptr is the offset into the buffer where the dma is currently at. We
	 * check if the dma buffer has just wrapped.
	 */
	ptr = PERIOD_OFFSET(rt->dma_addr,
			    siu_stream->cur_period,
			    siu_stream->period_bytes) - rt->dma_addr;

	dev_dbg(dev,
		"%s: port=%d, events %x, FSTS %x, xferred %u/%u, cookie %d\n",
		__func__, info->port_id, siu_read32(base + SIU_EVNTC),
		siu_read32(base + SIU_SBFSTS), ptr, siu_stream->buf_bytes,
		siu_stream->cookie);

	if (ptr >= siu_stream->buf_bytes)
		ptr = 0;

	return bytes_to_frames(ss->runtime, ptr);
}

static int siu_pcm_new(struct snd_soc_pcm_runtime *rtd)
{
	/* card->dev == socdev->dev, see snd_soc_new_pcms() */
	struct snd_card *card = rtd->card->snd_card;
	struct snd_pcm *pcm = rtd->pcm;
	struct siu_info *info = siu_i2s_data;
	struct platform_device *pdev = to_platform_device(card->dev);
	int ret;
	int i;

	/* pdev->id selects between SIUA and SIUB */
	if (pdev->id < 0 || pdev->id >= SIU_PORT_NUM)
		return -EINVAL;

	info->port_id = pdev->id;

	/*
	 * While the siu has 2 ports, only one port can be on at a time (only 1
	 * SPB). So far all the boards using the siu had only one of the ports
	 * wired to a codec. To simplify things, we only register one port with
	 * alsa. In case both ports are needed, it should be changed here
	 */
	for (i = pdev->id; i < pdev->id + 1; i++) {
		struct siu_port **port_info = &siu_ports[i];

		ret = siu_init_port(i, port_info, card);
		if (ret < 0)
			return ret;

		snd_pcm_lib_preallocate_pages_for_all(pcm,
				SNDRV_DMA_TYPE_DEV, card->dev,
				SIU_BUFFER_BYTES_MAX, SIU_BUFFER_BYTES_MAX);

		(*port_info)->pcm = pcm;

		/* IO tasklets */
		tasklet_init(&(*port_info)->playback.tasklet, siu_io_tasklet,
			     (unsigned long)&(*port_info)->playback);
		tasklet_init(&(*port_info)->capture.tasklet, siu_io_tasklet,
			     (unsigned long)&(*port_info)->capture);
	}

	dev_info(card->dev, "SuperH SIU driver initialized.\n");
	return 0;
}

static void siu_pcm_free(struct snd_pcm *pcm)
{
	struct platform_device *pdev = to_platform_device(pcm->card->dev);
	struct siu_port *port_info = siu_ports[pdev->id];

	tasklet_kill(&port_info->capture.tasklet);
	tasklet_kill(&port_info->playback.tasklet);

	siu_free_port(port_info);

	dev_dbg(pcm->card->dev, "%s\n", __func__);
}

static const struct snd_pcm_ops siu_pcm_ops = {
	.open		= siu_pcm_open,
	.close		= siu_pcm_close,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= siu_pcm_hw_params,
	.hw_free	= siu_pcm_hw_free,
	.prepare	= siu_pcm_prepare,
	.trigger	= siu_pcm_trigger,
	.pointer	= siu_pcm_pointer_dma,
};

struct snd_soc_component_driver siu_component = {
	.name		= DRV_NAME,
	.ops			= &siu_pcm_ops,
	.pcm_new	= siu_pcm_new,
	.pcm_free	= siu_pcm_free,
};
EXPORT_SYMBOL_GPL(siu_component);
Commit	Line	Data
4e6fdaf1 KM	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
	4	//
	5	// Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
	6	// Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
	7
895d4509 GL	8	#include <linux/delay.h>
	9	#include <linux/dma-mapping.h>
	10	#include <linux/dmaengine.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/module.h>
	13	#include <linux/platform_device.h>
895d4509 GL	14
	15	#include <sound/control.h>
	16	#include <sound/core.h>
	17	#include <sound/pcm.h>
	18	#include <sound/pcm_params.h>
0d911bae	19	#include <sound/soc.h>
895d4509	20
895d4509 GL	21	#include <asm/siu.h>
	22
	23	#include "siu.h"
	24
be3eabe9	25	#define DRV_NAME "siu-i2s"
895d4509 GL	26	#define GET_MAX_PERIODS(buf_bytes, period_bytes) \
	27	((buf_bytes) / (period_bytes))
	28	#define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
	29	((buf_addr) + ((period_num) * (period_bytes)))
	30
	31	#define RWF_STM_RD 0x01 /* Read in progress */
	32	#define RWF_STM_WT 0x02 /* Write in progress */
	33
	34	struct siu_port *siu_ports[SIU_PORT_NUM];
	35
	36	/* transfersize is number of u32 dma transfers per period */
	37	static int siu_pcm_stmwrite_stop(struct siu_port *port_info)
	38	{
f0fba2ad	39	struct siu_info *info = siu_i2s_data;
895d4509 GL	40	u32 __iomem *base = info->reg;
	41	struct siu_stream *siu_stream = &port_info->playback;
	42	u32 stfifo;
	43
	44	if (!siu_stream->rw_flg)
	45	return -EPERM;
	46
	47	/* output FIFO disable */
	48	stfifo = siu_read32(base + SIU_STFIFO);
	49	siu_write32(base + SIU_STFIFO, stfifo & ~0x0c180c18);
	50	pr_debug("%s: STFIFO %x -> %x\n", __func__,
	51	stfifo, stfifo & ~0x0c180c18);
	52
	53	/* during stmwrite clear */
	54	siu_stream->rw_flg = 0;
	55
	56	return 0;
	57	}
	58
	59	static int siu_pcm_stmwrite_start(struct siu_port *port_info)
	60	{
	61	struct siu_stream *siu_stream = &port_info->playback;
	62
	63	if (siu_stream->rw_flg)
	64	return -EPERM;
	65
	66	/* Current period in buffer */
	67	port_info->playback.cur_period = 0;
	68
	69	/* during stmwrite flag set */
	70	siu_stream->rw_flg = RWF_STM_WT;
	71
	72	/* DMA transfer start */
	73	tasklet_schedule(&siu_stream->tasklet);
	74
	75	return 0;
	76	}
	77
	78	static void siu_dma_tx_complete(void *arg)
	79	{
	80	struct siu_stream *siu_stream = arg;
	81
	82	if (!siu_stream->rw_flg)
	83	return;
	84
	85	/* Update completed period count */
	86	if (++siu_stream->cur_period >=
	87	GET_MAX_PERIODS(siu_stream->buf_bytes,
	88	siu_stream->period_bytes))
	89	siu_stream->cur_period = 0;
	90
	91	pr_debug("%s: done period #%d (%u/%u bytes), cookie %d\n",
	92	__func__, siu_stream->cur_period,
	93	siu_stream->cur_period * siu_stream->period_bytes,
	94	siu_stream->buf_bytes, siu_stream->cookie);
	95
	96	tasklet_schedule(&siu_stream->tasklet);
	97
	98	/* Notify alsa: a period is done */
	99	snd_pcm_period_elapsed(siu_stream->substream);
	100	}
	101
	102	static int siu_pcm_wr_set(struct siu_port *port_info,
	103	dma_addr_t buff, u32 size)
104	{
f0fba2ad	105	struct siu_info *info = siu_i2s_data;
895d4509 GL	106	u32 __iomem *base = info->reg;
	107	struct siu_stream *siu_stream = &port_info->playback;
	108	struct snd_pcm_substream *substream = siu_stream->substream;
	109	struct device *dev = substream->pcm->card->dev;
	110	struct dma_async_tx_descriptor *desc;
	111	dma_cookie_t cookie;
	112	struct scatterlist sg;
	113	u32 stfifo;
	114
	115	sg_init_table(&sg, 1);
	116	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
	117	size, offset_in_page(buff));
7b42176a	118	sg_dma_len(&sg) = size;
895d4509 GL	119	sg_dma_address(&sg) = buff;
895d4509 GL	120
16052827	121	desc = dmaengine_prep_slave_sg(siu_stream->chan,
35e16581	122	&sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT \| DMA_CTRL_ACK);
895d4509 GL	123	if (!desc) {
	124	dev_err(dev, "Failed to allocate a dma descriptor\n");
	125	return -ENOMEM;
	126	}
	127
	128	desc->callback = siu_dma_tx_complete;
	129	desc->callback_param = siu_stream;
5d0ecb0e	130	cookie = dmaengine_submit(desc);
895d4509 GL	131	if (cookie < 0) {
	132	dev_err(dev, "Failed to submit a dma transfer\n");
	133	return cookie;
	134	}
	135
	136	siu_stream->tx_desc = desc;
	137	siu_stream->cookie = cookie;
	138
	139	dma_async_issue_pending(siu_stream->chan);
	140
	141	/* only output FIFO enable */
	142	stfifo = siu_read32(base + SIU_STFIFO);
	143	siu_write32(base + SIU_STFIFO, stfifo \| (port_info->stfifo & 0x0c180c18));
	144	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
	145	stfifo, stfifo \| (port_info->stfifo & 0x0c180c18));
	146
	147	return 0;
	148	}
	149
	150	static int siu_pcm_rd_set(struct siu_port *port_info,
	151	dma_addr_t buff, size_t size)
	152	{
f0fba2ad	153	struct siu_info *info = siu_i2s_data;
895d4509 GL	154	u32 __iomem *base = info->reg;
	155	struct siu_stream *siu_stream = &port_info->capture;
	156	struct snd_pcm_substream *substream = siu_stream->substream;
	157	struct device *dev = substream->pcm->card->dev;
	158	struct dma_async_tx_descriptor *desc;
	159	dma_cookie_t cookie;
	160	struct scatterlist sg;
	161	u32 stfifo;
	162
	163	dev_dbg(dev, "%s: %u@%llx\n", __func__, size, (unsigned long long)buff);
	164
	165	sg_init_table(&sg, 1);
	166	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
	167	size, offset_in_page(buff));
7b42176a	168	sg_dma_len(&sg) = size;
895d4509 GL	169	sg_dma_address(&sg) = buff;
895d4509 GL	170
16052827	171	desc = dmaengine_prep_slave_sg(siu_stream->chan,
35e16581	172	&sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT \| DMA_CTRL_ACK);
895d4509 GL	173	if (!desc) {
	174	dev_err(dev, "Failed to allocate dma descriptor\n");
	175	return -ENOMEM;
	176	}
	177
	178	desc->callback = siu_dma_tx_complete;
	179	desc->callback_param = siu_stream;
5d0ecb0e	180	cookie = dmaengine_submit(desc);
895d4509 GL	181	if (cookie < 0) {
	182	dev_err(dev, "Failed to submit dma descriptor\n");
	183	return cookie;
	184	}
	185
	186	siu_stream->tx_desc = desc;
	187	siu_stream->cookie = cookie;
	188
	189	dma_async_issue_pending(siu_stream->chan);
	190
	191	/* only input FIFO enable */
	192	stfifo = siu_read32(base + SIU_STFIFO);
	193	siu_write32(base + SIU_STFIFO, siu_read32(base + SIU_STFIFO) \|
	194	(port_info->stfifo & 0x13071307));
	195	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
	196	stfifo, stfifo \| (port_info->stfifo & 0x13071307));
	197
	198	return 0;
	199	}
	200
	201	static void siu_io_tasklet(unsigned long data)
	202	{
	203	struct siu_stream siu_stream = (struct siu_stream )data;
	204	struct snd_pcm_substream *substream = siu_stream->substream;
	205	struct device *dev = substream->pcm->card->dev;
	206	struct snd_pcm_runtime *rt = substream->runtime;
	207	struct siu_port *port_info = siu_port_info(substream);
	208
	209	dev_dbg(dev, "%s: flags %x\n", __func__, siu_stream->rw_flg);
	210
	211	if (!siu_stream->rw_flg) {
	212	dev_dbg(dev, "%s: stream inactive\n", __func__);
	213	return;
	214	}
	215
	216	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
	217	dma_addr_t buff;
	218	size_t count;
	219	u8 *virt;
	220
	221	buff = (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
	222	siu_stream->cur_period,
	223	siu_stream->period_bytes);
	224	virt = PERIOD_OFFSET(rt->dma_area,
	225	siu_stream->cur_period,
	226	siu_stream->period_bytes);
	227	count = siu_stream->period_bytes;
	228
	229	/* DMA transfer start */
	230	siu_pcm_rd_set(port_info, buff, count);
	231	} else {
	232	siu_pcm_wr_set(port_info,
	233	(dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
	234	siu_stream->cur_period,
	235	siu_stream->period_bytes),
	236	siu_stream->period_bytes);
	237	}
	238	}
	239
	240	/* Capture */
	241	static int siu_pcm_stmread_start(struct siu_port *port_info)
	242	{
	243	struct siu_stream *siu_stream = &port_info->capture;
	244
245	if (siu_stream->xfer_cnt > 0x1000000)
246	return -EINVAL;
247	if (siu_stream->rw_flg)
248	return -EPERM;
249
250	/* Current period in buffer */
251	siu_stream->cur_period = 0;
252
253	/* during stmread flag set */
254	siu_stream->rw_flg = RWF_STM_RD;
255
256	tasklet_schedule(&siu_stream->tasklet);
257
258	return 0;
259	}
260
261	static int siu_pcm_stmread_stop(struct siu_port *port_info)
262	{
f0fba2ad	263	struct siu_info *info = siu_i2s_data;
895d4509 GL	264	u32 __iomem *base = info->reg;
	265	struct siu_stream *siu_stream = &port_info->capture;
	266	struct device *dev = siu_stream->substream->pcm->card->dev;
	267	u32 stfifo;
	268
	269	if (!siu_stream->rw_flg)
	270	return -EPERM;
	271
	272	/* input FIFO disable */
	273	stfifo = siu_read32(base + SIU_STFIFO);
	274	siu_write32(base + SIU_STFIFO, stfifo & ~0x13071307);
	275	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
	276	stfifo, stfifo & ~0x13071307);
	277
	278	/* during stmread flag clear */
	279	siu_stream->rw_flg = 0;
	280
	281	return 0;
	282	}
	283
	284	static int siu_pcm_hw_params(struct snd_pcm_substream *ss,
	285	struct snd_pcm_hw_params *hw_params)
	286	{
f0fba2ad	287	struct siu_info *info = siu_i2s_data;
895d4509 GL	288	struct device *dev = ss->pcm->card->dev;
	289	int ret;
	290
	291	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
	292
	293	ret = snd_pcm_lib_malloc_pages(ss, params_buffer_bytes(hw_params));
	294	if (ret < 0)
	295	dev_err(dev, "snd_pcm_lib_malloc_pages() failed\n");
	296
	297	return ret;
	298	}
	299
	300	static int siu_pcm_hw_free(struct snd_pcm_substream *ss)
	301	{
f0fba2ad	302	struct siu_info *info = siu_i2s_data;
895d4509 GL	303	struct siu_port *port_info = siu_port_info(ss);
	304	struct device *dev = ss->pcm->card->dev;
	305	struct siu_stream *siu_stream;
	306
	307	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	308	siu_stream = &port_info->playback;
	309	else
	310	siu_stream = &port_info->capture;
	311
	312	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
	313
	314	return snd_pcm_lib_free_pages(ss);
	315	}
	316
	317	static bool filter(struct dma_chan chan, void slave)
	318	{
	319	struct sh_dmae_slave *param = slave;
	320
6f3de8bf	321	pr_debug("%s: slave ID %d\n", __func__, param->shdma_slave.slave_id);
895d4509	322
6f3de8bf	323	chan->private = &param->shdma_slave;
895d4509 GL	324	return true;
	325	}
	326
	327	static int siu_pcm_open(struct snd_pcm_substream *ss)
	328	{
	329	/* Playback / Capture */
f0fba2ad	330	struct snd_soc_pcm_runtime *rtd = ss->private_data;
be3eabe9 KM	331	struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
be3eabe9 KM	332	struct siu_platform *pdata = component->dev->platform_data;
f0fba2ad	333	struct siu_info *info = siu_i2s_data;
895d4509 GL	334	struct siu_port *port_info = siu_port_info(ss);
	335	struct siu_stream *siu_stream;
	336	u32 port = info->port_id;
895d4509 GL	337	struct device *dev = ss->pcm->card->dev;
	338	dma_cap_mask_t mask;
	339	struct sh_dmae_slave *param;
	340
	341	dma_cap_zero(mask);
	342	dma_cap_set(DMA_SLAVE, mask);
	343
	344	dev_dbg(dev, "%s, port=%d@%p\n", __func__, port, port_info);
	345
	346	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) {
	347	siu_stream = &port_info->playback;
	348	param = &siu_stream->param;
6f3de8bf	349	param->shdma_slave.slave_id = port ? pdata->dma_slave_tx_b :
10440af1	350	pdata->dma_slave_tx_a;
895d4509 GL	351	} else {
	352	siu_stream = &port_info->capture;
	353	param = &siu_stream->param;
6f3de8bf	354	param->shdma_slave.slave_id = port ? pdata->dma_slave_rx_b :
10440af1	355	pdata->dma_slave_rx_a;
895d4509 GL	356	}
895d4509 GL	357
895d4509 GL	358	/* Get DMA channel */
	359	siu_stream->chan = dma_request_channel(mask, filter, param);
	360	if (!siu_stream->chan) {
	361	dev_err(dev, "DMA channel allocation failed!\n");
	362	return -EBUSY;
	363	}
	364
	365	siu_stream->substream = ss;
	366
	367	return 0;
	368	}
	369
	370	static int siu_pcm_close(struct snd_pcm_substream *ss)
	371	{
f0fba2ad	372	struct siu_info *info = siu_i2s_data;
895d4509 GL	373	struct device *dev = ss->pcm->card->dev;
	374	struct siu_port *port_info = siu_port_info(ss);
	375	struct siu_stream *siu_stream;
	376
	377	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
	378
	379	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	380	siu_stream = &port_info->playback;
	381	else
	382	siu_stream = &port_info->capture;
	383
	384	dma_release_channel(siu_stream->chan);
	385	siu_stream->chan = NULL;
	386
	387	siu_stream->substream = NULL;
	388
	389	return 0;
	390	}
	391
	392	static int siu_pcm_prepare(struct snd_pcm_substream *ss)
	393	{
f0fba2ad	394	struct siu_info *info = siu_i2s_data;
895d4509 GL	395	struct siu_port *port_info = siu_port_info(ss);
	396	struct device *dev = ss->pcm->card->dev;
	397	struct snd_pcm_runtime *rt = ss->runtime;
	398	struct siu_stream *siu_stream;
	399	snd_pcm_sframes_t xfer_cnt;
	400
	401	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	402	siu_stream = &port_info->playback;
	403	else
	404	siu_stream = &port_info->capture;
	405
	406	rt = siu_stream->substream->runtime;
	407
	408	siu_stream->buf_bytes = snd_pcm_lib_buffer_bytes(ss);
	409	siu_stream->period_bytes = snd_pcm_lib_period_bytes(ss);
	410
	411	dev_dbg(dev, "%s: port=%d, %d channels, period=%u bytes\n", __func__,
	412	info->port_id, rt->channels, siu_stream->period_bytes);
	413
	414	/* We only support buffers that are multiples of the period */
	415	if (siu_stream->buf_bytes % siu_stream->period_bytes) {
	416	dev_err(dev, "%s() - buffer=%d not multiple of period=%d\n",
	417	__func__, siu_stream->buf_bytes,
	418	siu_stream->period_bytes);
	419	return -EINVAL;
	420	}
	421
	422	xfer_cnt = bytes_to_frames(rt, siu_stream->period_bytes);
	423	if (!xfer_cnt \|\| xfer_cnt > 0x1000000)
	424	return -EINVAL;
	425
	426	siu_stream->format = rt->format;
	427	siu_stream->xfer_cnt = xfer_cnt;
	428
	429	dev_dbg(dev, "port=%d buf=%lx buf_bytes=%d period_bytes=%d "
	430	"format=%d channels=%d xfer_cnt=%d\n", info->port_id,
	431	(unsigned long)rt->dma_addr, siu_stream->buf_bytes,
	432	siu_stream->period_bytes,
	433	siu_stream->format, rt->channels, (int)xfer_cnt);
	434
	435	return 0;
	436	}
	437
	438	static int siu_pcm_trigger(struct snd_pcm_substream *ss, int cmd)
	439	{
f0fba2ad	440	struct siu_info *info = siu_i2s_data;
895d4509 GL	441	struct device *dev = ss->pcm->card->dev;
	442	struct siu_port *port_info = siu_port_info(ss);
	443	int ret;
	444
	445	dev_dbg(dev, "%s: port=%d@%p, cmd=%d\n", __func__,
	446	info->port_id, port_info, cmd);
	447
	448	switch (cmd) {
	449	case SNDRV_PCM_TRIGGER_START:
	450	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	451	ret = siu_pcm_stmwrite_start(port_info);
	452	else
	453	ret = siu_pcm_stmread_start(port_info);
	454
	455	if (ret < 0)
	456	dev_warn(dev, "%s: start failed on port=%d\n",
	457	__func__, info->port_id);
	458
	459	break;
	460	case SNDRV_PCM_TRIGGER_STOP:
	461	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	462	siu_pcm_stmwrite_stop(port_info);
	463	else
	464	siu_pcm_stmread_stop(port_info);
	465	ret = 0;
	466
	467	break;
	468	default:
	469	dev_err(dev, "%s() unsupported cmd=%d\n", __func__, cmd);
	470	ret = -EINVAL;
	471	}
	472
	473	return ret;
	474	}
	475
	476	/*
	477	* So far only resolution of one period is supported, subject to extending the
	478	* dmangine API
	479	*/
	480	static snd_pcm_uframes_t siu_pcm_pointer_dma(struct snd_pcm_substream *ss)
	481	{
	482	struct device *dev = ss->pcm->card->dev;
f0fba2ad	483	struct siu_info *info = siu_i2s_data;
895d4509 GL	484	u32 __iomem *base = info->reg;
	485	struct siu_port *port_info = siu_port_info(ss);
	486	struct snd_pcm_runtime *rt = ss->runtime;
	487	size_t ptr;
	488	struct siu_stream *siu_stream;
	489
	490	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
	491	siu_stream = &port_info->playback;
	492	else
	493	siu_stream = &port_info->capture;
	494
	495	/*
	496	* ptr is the offset into the buffer where the dma is currently at. We
	497	* check if the dma buffer has just wrapped.
	498	*/
	499	ptr = PERIOD_OFFSET(rt->dma_addr,
	500	siu_stream->cur_period,
	501	siu_stream->period_bytes) - rt->dma_addr;
	502
	503	dev_dbg(dev,
	504	"%s: port=%d, events %x, FSTS %x, xferred %u/%u, cookie %d\n",
	505	__func__, info->port_id, siu_read32(base + SIU_EVNTC),
	506	siu_read32(base + SIU_SBFSTS), ptr, siu_stream->buf_bytes,
	507	siu_stream->cookie);
	508
	509	if (ptr >= siu_stream->buf_bytes)
	510	ptr = 0;
	511
	512	return bytes_to_frames(ss->runtime, ptr);
	513	}
	514
552d1ef6	515	static int siu_pcm_new(struct snd_soc_pcm_runtime *rtd)
895d4509 GL	516	{
895d4509 GL	517	/* card->dev == socdev->dev, see snd_soc_new_pcms() */
552d1ef6 LG	518	struct snd_card *card = rtd->card->snd_card;
552d1ef6 LG	519	struct snd_pcm *pcm = rtd->pcm;
f0fba2ad	520	struct siu_info *info = siu_i2s_data;
895d4509 GL	521	struct platform_device *pdev = to_platform_device(card->dev);
	522	int ret;
	523	int i;
	524
	525	/* pdev->id selects between SIUA and SIUB */
	526	if (pdev->id < 0 \|\| pdev->id >= SIU_PORT_NUM)
	527	return -EINVAL;
	528
	529	info->port_id = pdev->id;
	530
	531	/*
	532	* While the siu has 2 ports, only one port can be on at a time (only 1
	533	* SPB). So far all the boards using the siu had only one of the ports
	534	* wired to a codec. To simplify things, we only register one port with
	535	* alsa. In case both ports are needed, it should be changed here
	536	*/
	537	for (i = pdev->id; i < pdev->id + 1; i++) {
	538	struct siu_port **port_info = &siu_ports[i];
	539
	540	ret = siu_init_port(i, port_info, card);
	541	if (ret < 0)
	542	return ret;
	543
b76c7fe6	544	snd_pcm_lib_preallocate_pages_for_all(pcm,
8f74ae39	545	SNDRV_DMA_TYPE_DEV, card->dev,
895d4509	546	SIU_BUFFER_BYTES_MAX, SIU_BUFFER_BYTES_MAX);
895d4509 GL	547
	548	(*port_info)->pcm = pcm;
	549
	550	/* IO tasklets */
	551	tasklet_init(&(*port_info)->playback.tasklet, siu_io_tasklet,
	552	(unsigned long)&(*port_info)->playback);
	553	tasklet_init(&(*port_info)->capture.tasklet, siu_io_tasklet,
	554	(unsigned long)&(*port_info)->capture);
	555	}
	556
	557	dev_info(card->dev, "SuperH SIU driver initialized.\n");
	558	return 0;
895d4509 GL	559	}
	560
	561	static void siu_pcm_free(struct snd_pcm *pcm)
	562	{
	563	struct platform_device *pdev = to_platform_device(pcm->card->dev);
	564	struct siu_port *port_info = siu_ports[pdev->id];
	565
	566	tasklet_kill(&port_info->capture.tasklet);
	567	tasklet_kill(&port_info->playback.tasklet);
	568
	569	siu_free_port(port_info);
895d4509 GL	570
	571	dev_dbg(pcm->card->dev, "%s\n", __func__);
	572	}
	573
b23bd34c	574	static const struct snd_pcm_ops siu_pcm_ops = {
895d4509 GL	575	.open = siu_pcm_open,
	576	.close = siu_pcm_close,
	577	.ioctl = snd_pcm_lib_ioctl,
	578	.hw_params = siu_pcm_hw_params,
	579	.hw_free = siu_pcm_hw_free,
	580	.prepare = siu_pcm_prepare,
	581	.trigger = siu_pcm_trigger,
	582	.pointer = siu_pcm_pointer_dma,
	583	};
	584
be3eabe9 KM	585	struct snd_soc_component_driver siu_component = {
be3eabe9 KM	586	.name = DRV_NAME,
f0fba2ad	587	.ops = &siu_pcm_ops,
895d4509 GL	588	.pcm_new = siu_pcm_new,
	589	.pcm_free = siu_pcm_free,
	590	};
be3eabe9	591	EXPORT_SYMBOL_GPL(siu_component);