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521cc68e | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
61c66c60 | 2 | /* |
dc98e414 KK |
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> |
4 | * http://www.simtec.co.uk/products/SWLINUX/ | |
5 | * | |
dc98e414 | 6 | * S3C2410 IIS register definition |
521cc68e | 7 | */ |
dc98e414 | 8 | |
61c66c60 SK |
9 | #ifndef __SAMSUNG_REGS_IIS_H__ |
10 | #define __SAMSUNG_REGS_IIS_H__ | |
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11 | |
12 | #define S3C2410_IISCON (0x00) | |
13 | ||
14 | #define S3C2410_IISCON_LRINDEX (1 << 8) | |
15 | #define S3C2410_IISCON_TXFIFORDY (1 << 7) | |
16 | #define S3C2410_IISCON_RXFIFORDY (1 << 6) | |
17 | #define S3C2410_IISCON_TXDMAEN (1 << 5) | |
18 | #define S3C2410_IISCON_RXDMAEN (1 << 4) | |
19 | #define S3C2410_IISCON_TXIDLE (1 << 3) | |
20 | #define S3C2410_IISCON_RXIDLE (1 << 2) | |
21 | #define S3C2410_IISCON_PSCEN (1 << 1) | |
22 | #define S3C2410_IISCON_IISEN (1 << 0) | |
23 | ||
24 | #define S3C2410_IISMOD (0x04) | |
25 | ||
26 | #define S3C2440_IISMOD_MPLL (1 << 9) | |
27 | #define S3C2410_IISMOD_SLAVE (1 << 8) | |
28 | #define S3C2410_IISMOD_NOXFER (0 << 6) | |
29 | #define S3C2410_IISMOD_RXMODE (1 << 6) | |
30 | #define S3C2410_IISMOD_TXMODE (2 << 6) | |
31 | #define S3C2410_IISMOD_TXRXMODE (3 << 6) | |
32 | #define S3C2410_IISMOD_LR_LLOW (0 << 5) | |
33 | #define S3C2410_IISMOD_LR_RLOW (1 << 5) | |
34 | #define S3C2410_IISMOD_IIS (0 << 4) | |
35 | #define S3C2410_IISMOD_MSB (1 << 4) | |
36 | #define S3C2410_IISMOD_8BIT (0 << 3) | |
37 | #define S3C2410_IISMOD_16BIT (1 << 3) | |
38 | #define S3C2410_IISMOD_BITMASK (1 << 3) | |
39 | #define S3C2410_IISMOD_256FS (0 << 2) | |
40 | #define S3C2410_IISMOD_384FS (1 << 2) | |
41 | #define S3C2410_IISMOD_16FS (0 << 0) | |
42 | #define S3C2410_IISMOD_32FS (1 << 0) | |
43 | #define S3C2410_IISMOD_48FS (2 << 0) | |
44 | #define S3C2410_IISMOD_FS_MASK (3 << 0) | |
45 | ||
46 | #define S3C2410_IISPSR (0x08) | |
47 | ||
48 | #define S3C2410_IISPSR_INTMASK (31 << 5) | |
49 | #define S3C2410_IISPSR_INTSHIFT (5) | |
50 | #define S3C2410_IISPSR_EXTMASK (31 << 0) | |
51 | #define S3C2410_IISPSR_EXTSHFIT (0) | |
52 | ||
53 | #define S3C2410_IISFCON (0x0c) | |
54 | ||
55 | #define S3C2410_IISFCON_TXDMA (1 << 15) | |
56 | #define S3C2410_IISFCON_RXDMA (1 << 14) | |
57 | #define S3C2410_IISFCON_TXENABLE (1 << 13) | |
58 | #define S3C2410_IISFCON_RXENABLE (1 << 12) | |
59 | #define S3C2410_IISFCON_TXMASK (0x3f << 6) | |
60 | #define S3C2410_IISFCON_TXSHIFT (6) | |
61 | #define S3C2410_IISFCON_RXMASK (0x3f) | |
62 | #define S3C2410_IISFCON_RXSHIFT (0) | |
63 | ||
64 | #define S3C2410_IISFIFO (0x10) | |
65 | ||
61c66c60 | 66 | #endif /* __SAMSUNG_REGS_IIS_H__ */ |