[linux-block.git] / sound / soc / samsung / bells.c

// SPDX-License-Identifier: GPL-2.0+
//
// Bells audio support
//
// Copyright 2012 Wolfson Microelectronics

#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/jack.h>
#include <linux/gpio.h>
#include <linux/module.h>

#include "../codecs/wm5102.h"
#include "../codecs/wm9081.h"

/* BCLK2 is fixed at this currently */
#define BCLK2_RATE (64 * 8000)

/*
 * Expect a 24.576MHz crystal if one is fitted (the driver will function
 * if this is not fitted).
 */
#define MCLK_RATE 24576000

#define SYS_AUDIO_RATE 44100
#define SYS_MCLK_RATE  (SYS_AUDIO_RATE * 512)

#define DAI_AP_DSP    0
#define DAI_DSP_CODEC 1
#define DAI_CODEC_CP  2
#define DAI_CODEC_SUB 3

struct bells_drvdata {
	int sysclk_rate;
	int asyncclk_rate;
};

static struct bells_drvdata wm2200_drvdata = {
	.sysclk_rate = 22579200,
};

static struct bells_drvdata wm5102_drvdata = {
	.sysclk_rate = 45158400,
	.asyncclk_rate = 49152000,
};

static struct bells_drvdata wm5110_drvdata = {
	.sysclk_rate = 135475200,
	.asyncclk_rate = 147456000,
};

static int bells_set_bias_level(struct snd_soc_card *card,
				struct snd_soc_dapm_context *dapm,
				enum snd_soc_bias_level level)
{
	struct snd_soc_pcm_runtime *rtd;
	struct snd_soc_dai *codec_dai;
	struct snd_soc_component *component;
	struct bells_drvdata *bells = card->drvdata;
	int ret;

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
	codec_dai = asoc_rtd_to_codec(rtd, 0);
	component = codec_dai->component;

	if (dapm->dev != codec_dai->dev)
		return 0;

	switch (level) {
	case SND_SOC_BIAS_PREPARE:
		if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
			break;

		ret = snd_soc_component_set_pll(component, WM5102_FLL1,
					    ARIZONA_FLL_SRC_MCLK1,
					    MCLK_RATE,
					    bells->sysclk_rate);
		if (ret < 0)
			pr_err("Failed to start FLL: %d\n", ret);

		if (bells->asyncclk_rate) {
			ret = snd_soc_component_set_pll(component, WM5102_FLL2,
						    ARIZONA_FLL_SRC_AIF2BCLK,
						    BCLK2_RATE,
						    bells->asyncclk_rate);
			if (ret < 0)
				pr_err("Failed to start FLL: %d\n", ret);
		}
		break;

	default:
		break;
	}

	return 0;
}

static int bells_set_bias_level_post(struct snd_soc_card *card,
				     struct snd_soc_dapm_context *dapm,
				     enum snd_soc_bias_level level)
{
	struct snd_soc_pcm_runtime *rtd;
	struct snd_soc_dai *codec_dai;
	struct snd_soc_component *component;
	struct bells_drvdata *bells = card->drvdata;
	int ret;

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
	codec_dai = asoc_rtd_to_codec(rtd, 0);
	component = codec_dai->component;

	if (dapm->dev != codec_dai->dev)
		return 0;

	switch (level) {
	case SND_SOC_BIAS_STANDBY:
		ret = snd_soc_component_set_pll(component, WM5102_FLL1, 0, 0, 0);
		if (ret < 0) {
			pr_err("Failed to stop FLL: %d\n", ret);
			return ret;
		}

		if (bells->asyncclk_rate) {
			ret = snd_soc_component_set_pll(component, WM5102_FLL2,
						    0, 0, 0);
			if (ret < 0) {
				pr_err("Failed to stop FLL: %d\n", ret);
				return ret;
			}
		}
		break;

	default:
		break;
	}

	dapm->bias_level = level;

	return 0;
}

static int bells_late_probe(struct snd_soc_card *card)
{
	struct bells_drvdata *bells = card->drvdata;
	struct snd_soc_pcm_runtime *rtd;
	struct snd_soc_component *wm0010;
	struct snd_soc_component *component;
	struct snd_soc_dai *aif1_dai;
	struct snd_soc_dai *aif2_dai;
	struct snd_soc_dai *aif3_dai;
	struct snd_soc_dai *wm9081_dai;
	int ret;

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_AP_DSP]);
	wm0010 = asoc_rtd_to_codec(rtd, 0)->component;

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
	component = asoc_rtd_to_codec(rtd, 0)->component;
	aif1_dai = asoc_rtd_to_codec(rtd, 0);

	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_SYSCLK,
				       ARIZONA_CLK_SRC_FLL1,
				       bells->sysclk_rate,
				       SND_SOC_CLOCK_IN);
	if (ret != 0) {
		dev_err(component->dev, "Failed to set SYSCLK: %d\n", ret);
		return ret;
	}

	ret = snd_soc_component_set_sysclk(wm0010, 0, 0, SYS_MCLK_RATE, 0);
	if (ret != 0) {
		dev_err(wm0010->dev, "Failed to set WM0010 clock: %d\n", ret);
		return ret;
	}

	ret = snd_soc_dai_set_sysclk(aif1_dai, ARIZONA_CLK_SYSCLK, 0, 0);
	if (ret != 0)
		dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);

	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_OPCLK, 0,
				       SYS_MCLK_RATE, SND_SOC_CLOCK_OUT);
	if (ret != 0)
		dev_err(component->dev, "Failed to set OPCLK: %d\n", ret);

	if (card->num_rtd == DAI_CODEC_CP)
		return 0;

	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_ASYNCCLK,
				       ARIZONA_CLK_SRC_FLL2,
				       bells->asyncclk_rate,
				       SND_SOC_CLOCK_IN);
	if (ret != 0) {
		dev_err(component->dev, "Failed to set ASYNCCLK: %d\n", ret);
		return ret;
	}

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_CP]);
	aif2_dai = asoc_rtd_to_cpu(rtd, 0);

	ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0);
	if (ret != 0) {
		dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret);
		return ret;
	}

	if (card->num_rtd == DAI_CODEC_SUB)
		return 0;

	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_SUB]);
	aif3_dai = asoc_rtd_to_cpu(rtd, 0);
	wm9081_dai = asoc_rtd_to_codec(rtd, 0);

	ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0);
	if (ret != 0) {
		dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
		return ret;
	}

	ret = snd_soc_component_set_sysclk(wm9081_dai->component, WM9081_SYSCLK_MCLK,
				       0, SYS_MCLK_RATE, 0);
	if (ret != 0) {
		dev_err(wm9081_dai->dev, "Failed to set MCLK: %d\n", ret);
		return ret;
	}

	return 0;
}

static const struct snd_soc_pcm_stream baseband_params = {
	.formats = SNDRV_PCM_FMTBIT_S32_LE,
	.rate_min = 8000,
	.rate_max = 8000,
	.channels_min = 2,
	.channels_max = 2,
};

static const struct snd_soc_pcm_stream sub_params = {
	.formats = SNDRV_PCM_FMTBIT_S32_LE,
	.rate_min = SYS_AUDIO_RATE,
	.rate_max = SYS_AUDIO_RATE,
	.channels_min = 2,
	.channels_max = 2,
};

SND_SOC_DAILINK_DEFS(wm2200_cpu_dsp,
	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));

SND_SOC_DAILINK_DEFS(wm2200_dsp_codec,
	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm2200.1-003a", "wm2200")));

static struct snd_soc_dai_link bells_dai_wm2200[] = {
	{
		.name = "CPU-DSP",
		.stream_name = "CPU-DSP",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		SND_SOC_DAILINK_REG(wm2200_cpu_dsp),
	},
	{
		.name = "DSP-CODEC",
		.stream_name = "DSP-CODEC",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		.c2c_params = &sub_params,
		.num_c2c_params = 1,
		.ignore_suspend = 1,
		SND_SOC_DAILINK_REG(wm2200_dsp_codec),
	},
};

SND_SOC_DAILINK_DEFS(wm5102_cpu_dsp,
	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));

SND_SOC_DAILINK_DEFS(wm5102_dsp_codec,
	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm5102-codec", "wm5102-aif1")));

SND_SOC_DAILINK_DEFS(wm5102_baseband,
	DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif2")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));

SND_SOC_DAILINK_DEFS(wm5102_sub,
	DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif3")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));

static struct snd_soc_dai_link bells_dai_wm5102[] = {
	{
		.name = "CPU-DSP",
		.stream_name = "CPU-DSP",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		SND_SOC_DAILINK_REG(wm5102_cpu_dsp),
	},
	{
		.name = "DSP-CODEC",
		.stream_name = "DSP-CODEC",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		.c2c_params = &sub_params,
		.num_c2c_params = 1,
		.ignore_suspend = 1,
		SND_SOC_DAILINK_REG(wm5102_dsp_codec),
	},
	{
		.name = "Baseband",
		.stream_name = "Baseband",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		.ignore_suspend = 1,
		.c2c_params = &baseband_params,
		.num_c2c_params = 1,
		SND_SOC_DAILINK_REG(wm5102_baseband),
	},
	{
		.name = "Sub",
		.stream_name = "Sub",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBS_CFS,
		.ignore_suspend = 1,
		.c2c_params = &sub_params,
		.num_c2c_params = 1,
		SND_SOC_DAILINK_REG(wm5102_sub),
	},
};

SND_SOC_DAILINK_DEFS(wm5110_cpu_dsp,
	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));

SND_SOC_DAILINK_DEFS(wm5110_dsp_codec,
	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm5110-codec", "wm5110-aif1")));

SND_SOC_DAILINK_DEFS(wm5110_baseband,
	DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif2")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));


SND_SOC_DAILINK_DEFS(wm5110_sub,
	DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif3")),
	DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));

static struct snd_soc_dai_link bells_dai_wm5110[] = {
	{
		.name = "CPU-DSP",
		.stream_name = "CPU-DSP",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		SND_SOC_DAILINK_REG(wm5110_cpu_dsp),
	},
	{
		.name = "DSP-CODEC",
		.stream_name = "DSP-CODEC",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		.c2c_params = &sub_params,
		.num_c2c_params = 1,
		.ignore_suspend = 1,
		SND_SOC_DAILINK_REG(wm5110_dsp_codec),
	},
	{
		.name = "Baseband",
		.stream_name = "Baseband",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBM_CFM,
		.ignore_suspend = 1,
		.c2c_params = &baseband_params,
		.num_c2c_params = 1,
		SND_SOC_DAILINK_REG(wm5110_baseband),
	},
	{
		.name = "Sub",
		.stream_name = "Sub",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
				| SND_SOC_DAIFMT_CBS_CFS,
		.ignore_suspend = 1,
		.c2c_params = &sub_params,
		.num_c2c_params = 1,
		SND_SOC_DAILINK_REG(wm5110_sub),
	},
};

static struct snd_soc_codec_conf bells_codec_conf[] = {
	{
		.dlc = COMP_CODEC_CONF("wm9081.1-006c"),
		.name_prefix = "Sub",
	},
};

static const struct snd_soc_dapm_widget bells_widgets[] = {
	SND_SOC_DAPM_MIC("DMIC", NULL),
};

static const struct snd_soc_dapm_route bells_routes[] = {
	{ "Sub CLK_SYS", NULL, "OPCLK" },
	{ "CLKIN", NULL, "OPCLK" },

	{ "DMIC", NULL, "MICBIAS2" },
	{ "IN2L", NULL, "DMIC" },
	{ "IN2R", NULL, "DMIC" },
};

static struct snd_soc_card bells_cards[] = {
	{
		.name = "Bells WM2200",
		.owner = THIS_MODULE,
		.dai_link = bells_dai_wm2200,
		.num_links = ARRAY_SIZE(bells_dai_wm2200),
		.codec_conf = bells_codec_conf,
		.num_configs = ARRAY_SIZE(bells_codec_conf),

		.late_probe = bells_late_probe,

		.dapm_widgets = bells_widgets,
		.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
		.dapm_routes = bells_routes,
		.num_dapm_routes = ARRAY_SIZE(bells_routes),

		.set_bias_level = bells_set_bias_level,
		.set_bias_level_post = bells_set_bias_level_post,

		.drvdata = &wm2200_drvdata,
	},
	{
		.name = "Bells WM5102",
		.owner = THIS_MODULE,
		.dai_link = bells_dai_wm5102,
		.num_links = ARRAY_SIZE(bells_dai_wm5102),
		.codec_conf = bells_codec_conf,
		.num_configs = ARRAY_SIZE(bells_codec_conf),

		.late_probe = bells_late_probe,

		.dapm_widgets = bells_widgets,
		.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
		.dapm_routes = bells_routes,
		.num_dapm_routes = ARRAY_SIZE(bells_routes),

		.set_bias_level = bells_set_bias_level,
		.set_bias_level_post = bells_set_bias_level_post,

		.drvdata = &wm5102_drvdata,
	},
	{
		.name = "Bells WM5110",
		.owner = THIS_MODULE,
		.dai_link = bells_dai_wm5110,
		.num_links = ARRAY_SIZE(bells_dai_wm5110),
		.codec_conf = bells_codec_conf,
		.num_configs = ARRAY_SIZE(bells_codec_conf),

		.late_probe = bells_late_probe,

		.dapm_widgets = bells_widgets,
		.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
		.dapm_routes = bells_routes,
		.num_dapm_routes = ARRAY_SIZE(bells_routes),

		.set_bias_level = bells_set_bias_level,
		.set_bias_level_post = bells_set_bias_level_post,

		.drvdata = &wm5110_drvdata,
	},
};

static int bells_probe(struct platform_device *pdev)
{
	int ret;

	bells_cards[pdev->id].dev = &pdev->dev;

	ret = devm_snd_soc_register_card(&pdev->dev, &bells_cards[pdev->id]);
	if (ret)
		dev_err(&pdev->dev,
			"snd_soc_register_card(%s) failed: %d\n",
			bells_cards[pdev->id].name, ret);

	return ret;
}

static struct platform_driver bells_driver = {
	.driver = {
		.name = "bells",
		.pm = &snd_soc_pm_ops,
	},
	.probe = bells_probe,
};

module_platform_driver(bells_driver);

MODULE_DESCRIPTION("Bells audio support");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:bells");
Commit	Line	Data
41ce2ac0 SN	1	// SPDX-License-Identifier: GPL-2.0+
	2	//
	3	// Bells audio support
	4	//
	5	// Copyright 2012 Wolfson Microelectronics
b545dd92 MB	6
	7	#include <sound/soc.h>
	8	#include <sound/soc-dapm.h>
	9	#include <sound/jack.h>
	10	#include <linux/gpio.h>
	11	#include <linux/module.h>
	12
	13	#include "../codecs/wm5102.h"
	14	#include "../codecs/wm9081.h"
	15
b545dd92 MB	16	/* BCLK2 is fixed at this currently */
	17	#define BCLK2_RATE (64 * 8000)
	18
	19	/*
	20	* Expect a 24.576MHz crystal if one is fitted (the driver will function
	21	* if this is not fitted).
	22	*/
	23	#define MCLK_RATE 24576000
	24
344c5ede	25	#define SYS_AUDIO_RATE 44100
208229ec	26	#define SYS_MCLK_RATE (SYS_AUDIO_RATE * 512)
344c5ede MB	27
	28	#define DAI_AP_DSP 0
	29	#define DAI_DSP_CODEC 1
	30	#define DAI_CODEC_CP 2
	31	#define DAI_CODEC_SUB 3
b545dd92	32
b1387078 MB	33	struct bells_drvdata {
	34	int sysclk_rate;
	35	int asyncclk_rate;
	36	};
	37
8d47e8a5 MB	38	static struct bells_drvdata wm2200_drvdata = {
	39	.sysclk_rate = 22579200,
	40	};
	41
b1387078 MB	42	static struct bells_drvdata wm5102_drvdata = {
	43	.sysclk_rate = 45158400,
	44	.asyncclk_rate = 49152000,
	45	};
	46
	47	static struct bells_drvdata wm5110_drvdata = {
	48	.sysclk_rate = 135475200,
	49	.asyncclk_rate = 147456000,
	50	};
	51
b545dd92 MB	52	static int bells_set_bias_level(struct snd_soc_card *card,
	53	struct snd_soc_dapm_context *dapm,
	54	enum snd_soc_bias_level level)
	55	{
5015920a ML	56	struct snd_soc_pcm_runtime *rtd;
5015920a ML	57	struct snd_soc_dai *codec_dai;
f4a2be1c	58	struct snd_soc_component *component;
b1387078	59	struct bells_drvdata *bells = card->drvdata;
b545dd92 MB	60	int ret;
b545dd92 MB	61
4468189f	62	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
7de6b6bc	63	codec_dai = asoc_rtd_to_codec(rtd, 0);
f4a2be1c	64	component = codec_dai->component;
5015920a	65
b545dd92 MB	66	if (dapm->dev != codec_dai->dev)
	67	return 0;
	68
	69	switch (level) {
	70	case SND_SOC_BIAS_PREPARE:
b1387078 MB	71	if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
b1387078 MB	72	break;
b545dd92	73
f4a2be1c	74	ret = snd_soc_component_set_pll(component, WM5102_FLL1,
b1387078 MB	75	ARIZONA_FLL_SRC_MCLK1,
	76	MCLK_RATE,
	77	bells->sysclk_rate);
	78	if (ret < 0)
	79	pr_err("Failed to start FLL: %d\n", ret);
	80
	81	if (bells->asyncclk_rate) {
f4a2be1c	82	ret = snd_soc_component_set_pll(component, WM5102_FLL2,
b545dd92 MB	83	ARIZONA_FLL_SRC_AIF2BCLK,
b545dd92 MB	84	BCLK2_RATE,
b1387078	85	bells->asyncclk_rate);
b545dd92 MB	86	if (ret < 0)
	87	pr_err("Failed to start FLL: %d\n", ret);
	88	}
	89	break;
	90
	91	default:
	92	break;
	93	}
	94
	95	return 0;
	96	}
	97
	98	static int bells_set_bias_level_post(struct snd_soc_card *card,
	99	struct snd_soc_dapm_context *dapm,
	100	enum snd_soc_bias_level level)
	101	{
5015920a ML	102	struct snd_soc_pcm_runtime *rtd;
5015920a ML	103	struct snd_soc_dai *codec_dai;
f4a2be1c	104	struct snd_soc_component *component;
b1387078	105	struct bells_drvdata *bells = card->drvdata;
b545dd92 MB	106	int ret;
b545dd92 MB	107
4468189f	108	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
7de6b6bc	109	codec_dai = asoc_rtd_to_codec(rtd, 0);
f4a2be1c	110	component = codec_dai->component;
5015920a	111
b545dd92 MB	112	if (dapm->dev != codec_dai->dev)
	113	return 0;
	114
	115	switch (level) {
	116	case SND_SOC_BIAS_STANDBY:
f4a2be1c	117	ret = snd_soc_component_set_pll(component, WM5102_FLL1, 0, 0, 0);
b545dd92 MB	118	if (ret < 0) {
	119	pr_err("Failed to stop FLL: %d\n", ret);
	120	return ret;
	121	}
	122
b1387078	123	if (bells->asyncclk_rate) {
f4a2be1c	124	ret = snd_soc_component_set_pll(component, WM5102_FLL2,
b1387078 MB	125	0, 0, 0);
	126	if (ret < 0) {
	127	pr_err("Failed to stop FLL: %d\n", ret);
	128	return ret;
	129	}
b545dd92 MB	130	}
	131	break;
	132
	133	default:
	134	break;
	135	}
	136
	137	dapm->bias_level = level;
	138
	139	return 0;
	140	}
	141
	142	static int bells_late_probe(struct snd_soc_card *card)
	143	{
b1387078	144	struct bells_drvdata *bells = card->drvdata;
5015920a	145	struct snd_soc_pcm_runtime *rtd;
f4a2be1c KM	146	struct snd_soc_component *wm0010;
f4a2be1c KM	147	struct snd_soc_component *component;
5015920a	148	struct snd_soc_dai *aif1_dai;
b1387078 MB	149	struct snd_soc_dai *aif2_dai;
	150	struct snd_soc_dai *aif3_dai;
	151	struct snd_soc_dai *wm9081_dai;
b545dd92 MB	152	int ret;
b545dd92 MB	153
4468189f	154	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_AP_DSP]);
7de6b6bc	155	wm0010 = asoc_rtd_to_codec(rtd, 0)->component;
5015920a	156
4468189f	157	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
7de6b6bc KM	158	component = asoc_rtd_to_codec(rtd, 0)->component;
7de6b6bc KM	159	aif1_dai = asoc_rtd_to_codec(rtd, 0);
5015920a	160
f4a2be1c	161	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_SYSCLK,
b1387078 MB	162	ARIZONA_CLK_SRC_FLL1,
	163	bells->sysclk_rate,
	164	SND_SOC_CLOCK_IN);
	165	if (ret != 0) {
f4a2be1c	166	dev_err(component->dev, "Failed to set SYSCLK: %d\n", ret);
b1387078 MB	167	return ret;
	168	}
	169
f4a2be1c	170	ret = snd_soc_component_set_sysclk(wm0010, 0, 0, SYS_MCLK_RATE, 0);
344c5ede MB	171	if (ret != 0) {
	172	dev_err(wm0010->dev, "Failed to set WM0010 clock: %d\n", ret);
	173	return ret;
	174	}
	175
b545dd92	176	ret = snd_soc_dai_set_sysclk(aif1_dai, ARIZONA_CLK_SYSCLK, 0, 0);
b1387078	177	if (ret != 0)
b545dd92	178	dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
b545dd92	179
f4a2be1c	180	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_OPCLK, 0,
b1387078 MB	181	SYS_MCLK_RATE, SND_SOC_CLOCK_OUT);
b1387078 MB	182	if (ret != 0)
f4a2be1c	183	dev_err(component->dev, "Failed to set OPCLK: %d\n", ret);
b545dd92	184
b1387078 MB	185	if (card->num_rtd == DAI_CODEC_CP)
b1387078 MB	186	return 0;
b545dd92	187
f4a2be1c	188	ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_ASYNCCLK,
b1387078 MB	189	ARIZONA_CLK_SRC_FLL2,
b1387078 MB	190	bells->asyncclk_rate,
b545dd92 MB	191	SND_SOC_CLOCK_IN);
b545dd92 MB	192	if (ret != 0) {
f4a2be1c	193	dev_err(component->dev, "Failed to set ASYNCCLK: %d\n", ret);
b545dd92 MB	194	return ret;
	195	}
	196
4468189f	197	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_CP]);
7de6b6bc	198	aif2_dai = asoc_rtd_to_cpu(rtd, 0);
b1387078 MB	199
b1387078 MB	200	ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0);
b545dd92	201	if (ret != 0) {
b1387078	202	dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret);
b545dd92 MB	203	return ret;
	204	}
	205
b1387078 MB	206	if (card->num_rtd == DAI_CODEC_SUB)
	207	return 0;
	208
4468189f	209	rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_SUB]);
7de6b6bc KM	210	aif3_dai = asoc_rtd_to_cpu(rtd, 0);
7de6b6bc KM	211	wm9081_dai = asoc_rtd_to_codec(rtd, 0);
b1387078 MB	212
b1387078 MB	213	ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0);
b545dd92	214	if (ret != 0) {
b1387078	215	dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
b545dd92 MB	216	return ret;
	217	}
	218
f4a2be1c	219	ret = snd_soc_component_set_sysclk(wm9081_dai->component, WM9081_SYSCLK_MCLK,
344c5ede	220	0, SYS_MCLK_RATE, 0);
b545dd92 MB	221	if (ret != 0) {
	222	dev_err(wm9081_dai->dev, "Failed to set MCLK: %d\n", ret);
	223	return ret;
	224	}
	225
	226	return 0;
	227	}
	228
	229	static const struct snd_soc_pcm_stream baseband_params = {
	230	.formats = SNDRV_PCM_FMTBIT_S32_LE,
	231	.rate_min = 8000,
	232	.rate_max = 8000,
	233	.channels_min = 2,
	234	.channels_max = 2,
	235	};
	236
	237	static const struct snd_soc_pcm_stream sub_params = {
	238	.formats = SNDRV_PCM_FMTBIT_S32_LE,
344c5ede MB	239	.rate_min = SYS_AUDIO_RATE,
344c5ede MB	240	.rate_max = SYS_AUDIO_RATE,
b545dd92 MB	241	.channels_min = 2,
	242	.channels_max = 2,
	243	};
	244
5af5e760 KM	245	SND_SOC_DAILINK_DEFS(wm2200_cpu_dsp,
	246	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	247	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	248	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
	249
	250	SND_SOC_DAILINK_DEFS(wm2200_dsp_codec,
	251	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	252	DAILINK_COMP_ARRAY(COMP_CODEC("wm2200.1-003a", "wm2200")));
	253
8d47e8a5 MB	254	static struct snd_soc_dai_link bells_dai_wm2200[] = {
	255	{
	256	.name = "CPU-DSP",
	257	.stream_name = "CPU-DSP",
8d47e8a5 MB	258	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
8d47e8a5 MB	259	\| SND_SOC_DAIFMT_CBM_CFM,
5af5e760	260	SND_SOC_DAILINK_REG(wm2200_cpu_dsp),
8d47e8a5 MB	261	},
	262	{
	263	.name = "DSP-CODEC",
	264	.stream_name = "DSP-CODEC",
8d47e8a5 MB	265	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
8d47e8a5 MB	266	\| SND_SOC_DAIFMT_CBM_CFM,
e7a73b05 KM	267	.c2c_params = &sub_params,
e7a73b05 KM	268	.num_c2c_params = 1,
8d47e8a5	269	.ignore_suspend = 1,
5af5e760	270	SND_SOC_DAILINK_REG(wm2200_dsp_codec),
8d47e8a5 MB	271	},
	272	};
	273
5af5e760 KM	274	SND_SOC_DAILINK_DEFS(wm5102_cpu_dsp,
	275	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	276	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	277	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
	278
	279	SND_SOC_DAILINK_DEFS(wm5102_dsp_codec,
	280	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	281	DAILINK_COMP_ARRAY(COMP_CODEC("wm5102-codec", "wm5102-aif1")));
	282
	283	SND_SOC_DAILINK_DEFS(wm5102_baseband,
	284	DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif2")),
	285	DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
	286
	287	SND_SOC_DAILINK_DEFS(wm5102_sub,
	288	DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif3")),
	289	DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
	290
b545dd92 MB	291	static struct snd_soc_dai_link bells_dai_wm5102[] = {
b545dd92 MB	292	{
344c5ede MB	293	.name = "CPU-DSP",
344c5ede MB	294	.stream_name = "CPU-DSP",
344c5ede MB	295	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
344c5ede MB	296	\| SND_SOC_DAIFMT_CBM_CFM,
5af5e760	297	SND_SOC_DAILINK_REG(wm5102_cpu_dsp),
344c5ede MB	298	},
	299	{
	300	.name = "DSP-CODEC",
	301	.stream_name = "DSP-CODEC",
b545dd92 MB	302	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
b545dd92 MB	303	\| SND_SOC_DAIFMT_CBM_CFM,
e7a73b05 KM	304	.c2c_params = &sub_params,
e7a73b05 KM	305	.num_c2c_params = 1,
344c5ede	306	.ignore_suspend = 1,
5af5e760	307	SND_SOC_DAILINK_REG(wm5102_dsp_codec),
b545dd92 MB	308	},
	309	{
	310	.name = "Baseband",
	311	.stream_name = "Baseband",
b545dd92 MB	312	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
	313	\| SND_SOC_DAIFMT_CBM_CFM,
	314	.ignore_suspend = 1,
e7a73b05 KM	315	.c2c_params = &baseband_params,
e7a73b05 KM	316	.num_c2c_params = 1,
5af5e760	317	SND_SOC_DAILINK_REG(wm5102_baseband),
b545dd92 MB	318	},
	319	{
	320	.name = "Sub",
	321	.stream_name = "Sub",
b545dd92 MB	322	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
	323	\| SND_SOC_DAIFMT_CBS_CFS,
	324	.ignore_suspend = 1,
e7a73b05 KM	325	.c2c_params = &sub_params,
e7a73b05 KM	326	.num_c2c_params = 1,
5af5e760	327	SND_SOC_DAILINK_REG(wm5102_sub),
b545dd92 MB	328	},
	329	};
	330
5af5e760 KM	331	SND_SOC_DAILINK_DEFS(wm5110_cpu_dsp,
	332	DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
	333	DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
	334	DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
	335
	336	SND_SOC_DAILINK_DEFS(wm5110_dsp_codec,
	337	DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
	338	DAILINK_COMP_ARRAY(COMP_CODEC("wm5110-codec", "wm5110-aif1")));
	339
	340	SND_SOC_DAILINK_DEFS(wm5110_baseband,
	341	DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif2")),
	342	DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
	343
	344
	345	SND_SOC_DAILINK_DEFS(wm5110_sub,
	346	DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif3")),
	347	DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
	348
b545dd92 MB	349	static struct snd_soc_dai_link bells_dai_wm5110[] = {
b545dd92 MB	350	{
344c5ede MB	351	.name = "CPU-DSP",
344c5ede MB	352	.stream_name = "CPU-DSP",
344c5ede MB	353	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
344c5ede MB	354	\| SND_SOC_DAIFMT_CBM_CFM,
5af5e760	355	SND_SOC_DAILINK_REG(wm5110_cpu_dsp),
344c5ede MB	356	},
	357	{
	358	.name = "DSP-CODEC",
	359	.stream_name = "DSP-CODEC",
b545dd92 MB	360	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
b545dd92 MB	361	\| SND_SOC_DAIFMT_CBM_CFM,
e7a73b05 KM	362	.c2c_params = &sub_params,
e7a73b05 KM	363	.num_c2c_params = 1,
344c5ede	364	.ignore_suspend = 1,
5af5e760	365	SND_SOC_DAILINK_REG(wm5110_dsp_codec),
b545dd92 MB	366	},
	367	{
	368	.name = "Baseband",
	369	.stream_name = "Baseband",
b545dd92 MB	370	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
	371	\| SND_SOC_DAIFMT_CBM_CFM,
	372	.ignore_suspend = 1,
e7a73b05 KM	373	.c2c_params = &baseband_params,
e7a73b05 KM	374	.num_c2c_params = 1,
5af5e760	375	SND_SOC_DAILINK_REG(wm5110_baseband),
b545dd92 MB	376	},
	377	{
	378	.name = "Sub",
	379	.stream_name = "Sub",
b545dd92 MB	380	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF
	381	\| SND_SOC_DAIFMT_CBS_CFS,
	382	.ignore_suspend = 1,
e7a73b05 KM	383	.c2c_params = &sub_params,
e7a73b05 KM	384	.num_c2c_params = 1,
5af5e760	385	SND_SOC_DAILINK_REG(wm5110_sub),
b545dd92 MB	386	},
	387	};
	388
	389	static struct snd_soc_codec_conf bells_codec_conf[] = {
	390	{
3874b215	391	.dlc = COMP_CODEC_CONF("wm9081.1-006c"),
b545dd92 MB	392	.name_prefix = "Sub",
	393	},
	394	};
	395
5449fd7b	396	static const struct snd_soc_dapm_widget bells_widgets[] = {
939d3c6a CK	397	SND_SOC_DAPM_MIC("DMIC", NULL),
	398	};
	399
5449fd7b	400	static const struct snd_soc_dapm_route bells_routes[] = {
b545dd92	401	{ "Sub CLK_SYS", NULL, "OPCLK" },
b3a6006e	402	{ "CLKIN", NULL, "OPCLK" },
939d3c6a CK	403
	404	{ "DMIC", NULL, "MICBIAS2" },
	405	{ "IN2L", NULL, "DMIC" },
	406	{ "IN2R", NULL, "DMIC" },
b545dd92 MB	407	};
	408
	409	static struct snd_soc_card bells_cards[] = {
8d47e8a5 MB	410	{
	411	.name = "Bells WM2200",
	412	.owner = THIS_MODULE,
	413	.dai_link = bells_dai_wm2200,
	414	.num_links = ARRAY_SIZE(bells_dai_wm2200),
	415	.codec_conf = bells_codec_conf,
	416	.num_configs = ARRAY_SIZE(bells_codec_conf),
	417
	418	.late_probe = bells_late_probe,
	419
939d3c6a CK	420	.dapm_widgets = bells_widgets,
939d3c6a CK	421	.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
8d47e8a5 MB	422	.dapm_routes = bells_routes,
	423	.num_dapm_routes = ARRAY_SIZE(bells_routes),
	424
	425	.set_bias_level = bells_set_bias_level,
	426	.set_bias_level_post = bells_set_bias_level_post,
	427
	428	.drvdata = &wm2200_drvdata,
	429	},
b545dd92 MB	430	{
	431	.name = "Bells WM5102",
	432	.owner = THIS_MODULE,
	433	.dai_link = bells_dai_wm5102,
	434	.num_links = ARRAY_SIZE(bells_dai_wm5102),
	435	.codec_conf = bells_codec_conf,
	436	.num_configs = ARRAY_SIZE(bells_codec_conf),
	437
	438	.late_probe = bells_late_probe,
	439
939d3c6a CK	440	.dapm_widgets = bells_widgets,
939d3c6a CK	441	.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
b545dd92 MB	442	.dapm_routes = bells_routes,
	443	.num_dapm_routes = ARRAY_SIZE(bells_routes),
	444
	445	.set_bias_level = bells_set_bias_level,
	446	.set_bias_level_post = bells_set_bias_level_post,
b1387078 MB	447
b1387078 MB	448	.drvdata = &wm5102_drvdata,
b545dd92 MB	449	},
	450	{
	451	.name = "Bells WM5110",
	452	.owner = THIS_MODULE,
	453	.dai_link = bells_dai_wm5110,
	454	.num_links = ARRAY_SIZE(bells_dai_wm5110),
	455	.codec_conf = bells_codec_conf,
	456	.num_configs = ARRAY_SIZE(bells_codec_conf),
	457
	458	.late_probe = bells_late_probe,
	459
939d3c6a CK	460	.dapm_widgets = bells_widgets,
939d3c6a CK	461	.num_dapm_widgets = ARRAY_SIZE(bells_widgets),
b545dd92 MB	462	.dapm_routes = bells_routes,
	463	.num_dapm_routes = ARRAY_SIZE(bells_routes),
	464
	465	.set_bias_level = bells_set_bias_level,
	466	.set_bias_level_post = bells_set_bias_level_post,
b1387078 MB	467
b1387078 MB	468	.drvdata = &wm5110_drvdata,
b545dd92 MB	469	},
	470	};
	471
fdca21ad	472	static int bells_probe(struct platform_device *pdev)
b545dd92 MB	473	{
	474	int ret;
	475
	476	bells_cards[pdev->id].dev = &pdev->dev;
	477
c583883e TB	478	ret = devm_snd_soc_register_card(&pdev->dev, &bells_cards[pdev->id]);
c583883e TB	479	if (ret)
b545dd92 MB	480	dev_err(&pdev->dev,
	481	"snd_soc_register_card(%s) failed: %d\n",
	482	bells_cards[pdev->id].name, ret);
b545dd92	483
c583883e	484	return ret;
b545dd92 MB	485	}
	486
	487	static struct platform_driver bells_driver = {
	488	.driver = {
	489	.name = "bells",
b545dd92 MB	490	.pm = &snd_soc_pm_ops,
	491	},
	492	.probe = bells_probe,
b545dd92 MB	493	};
	494
	495	module_platform_driver(bells_driver);
	496
	497	MODULE_DESCRIPTION("Bells audio support");
	498	MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
	499	MODULE_LICENSE("GPL");
	500	MODULE_ALIAS("platform:bells");