projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 158a7828 | 1 | /* sound/soc/s3c24xx/pcm.h |
| 357a1db9 JB |
2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify | |
| 4 | * it under the terms of the GNU General Public License version 2 as | |
| 5 | * published by the Free Software Foundation. | |
| 6 | * | |
| 7 | */ | |
| 8 | ||
| 9 | #ifndef __S3C_PCM_H | |
| 10 | #define __S3C_PCM_H __FILE__ | |
| 11 | ||
| 12 | /*Register Offsets */ | |
| 13 | #define S3C_PCM_CTL (0x00) | |
| 14 | #define S3C_PCM_CLKCTL (0x04) | |
| 15 | #define S3C_PCM_TXFIFO (0x08) | |
| 16 | #define S3C_PCM_RXFIFO (0x0C) | |
| 17 | #define S3C_PCM_IRQCTL (0x10) | |
| 18 | #define S3C_PCM_IRQSTAT (0x14) | |
| 19 | #define S3C_PCM_FIFOSTAT (0x18) | |
| 20 | #define S3C_PCM_CLRINT (0x20) | |
| 21 | ||
| 22 | /* PCM_CTL Bit-Fields */ | |
| 23 | #define S3C_PCM_CTL_TXDIPSTICK_MASK (0x3f) | |
| 24 | #define S3C_PCM_CTL_TXDIPSTICK_SHIFT (13) | |
| 0cca9012 SY |
25 | #define S3C_PCM_CTL_RXDIPSTICK_MASK (0x3f) |
| 26 | #define S3C_PCM_CTL_RXDIPSTICK_SHIFT (7) | |
| 357a1db9 JB |
27 | #define S3C_PCM_CTL_TXDMA_EN (0x1<<6) |
| 28 | #define S3C_PCM_CTL_RXDMA_EN (0x1<<5) | |
| 29 | #define S3C_PCM_CTL_TXMSB_AFTER_FSYNC (0x1<<4) | |
| 30 | #define S3C_PCM_CTL_RXMSB_AFTER_FSYNC (0x1<<3) | |
| 31 | #define S3C_PCM_CTL_TXFIFO_EN (0x1<<2) | |
| 32 | #define S3C_PCM_CTL_RXFIFO_EN (0x1<<1) | |
| 33 | #define S3C_PCM_CTL_ENABLE (0x1<<0) | |
| 34 | ||
| 35 | /* PCM_CLKCTL Bit-Fields */ | |
| 36 | #define S3C_PCM_CLKCTL_SERCLK_EN (0x1<<19) | |
| 37 | #define S3C_PCM_CLKCTL_SERCLKSEL_PCLK (0x1<<18) | |
| 38 | #define S3C_PCM_CLKCTL_SCLKDIV_MASK (0x1ff) | |
| 39 | #define S3C_PCM_CLKCTL_SYNCDIV_MASK (0x1ff) | |
| 40 | #define S3C_PCM_CLKCTL_SCLKDIV_SHIFT (9) | |
| 41 | #define S3C_PCM_CLKCTL_SYNCDIV_SHIFT (0) | |
| 42 | ||
| 43 | /* PCM_TXFIFO Bit-Fields */ | |
| 44 | #define S3C_PCM_TXFIFO_DVALID (0x1<<16) | |
| 45 | #define S3C_PCM_TXFIFO_DATA_MSK (0xffff<<0) | |
| 46 | ||
| 47 | /* PCM_RXFIFO Bit-Fields */ | |
| 48 | #define S3C_PCM_RXFIFO_DVALID (0x1<<16) | |
| 49 | #define S3C_PCM_RXFIFO_DATA_MSK (0xffff<<0) | |
| 50 | ||
| 51 | /* PCM_IRQCTL Bit-Fields */ | |
| 52 | #define S3C_PCM_IRQCTL_IRQEN (0x1<<14) | |
| 53 | #define S3C_PCM_IRQCTL_WRDEN (0x1<<12) | |
| 54 | #define S3C_PCM_IRQCTL_TXEMPTYEN (0x1<<11) | |
| 55 | #define S3C_PCM_IRQCTL_TXALMSTEMPTYEN (0x1<<10) | |
| 56 | #define S3C_PCM_IRQCTL_TXFULLEN (0x1<<9) | |
| 57 | #define S3C_PCM_IRQCTL_TXALMSTFULLEN (0x1<<8) | |
| 58 | #define S3C_PCM_IRQCTL_TXSTARVEN (0x1<<7) | |
| 59 | #define S3C_PCM_IRQCTL_TXERROVRFLEN (0x1<<6) | |
| 60 | #define S3C_PCM_IRQCTL_RXEMPTEN (0x1<<5) | |
| 61 | #define S3C_PCM_IRQCTL_RXALMSTEMPTEN (0x1<<4) | |
| 62 | #define S3C_PCM_IRQCTL_RXFULLEN (0x1<<3) | |
| 63 | #define S3C_PCM_IRQCTL_RXALMSTFULLEN (0x1<<2) | |
| 64 | #define S3C_PCM_IRQCTL_RXSTARVEN (0x1<<1) | |
| 65 | #define S3C_PCM_IRQCTL_RXERROVRFLEN (0x1<<0) | |
| 66 | ||
| 67 | /* PCM_IRQSTAT Bit-Fields */ | |
| 68 | #define S3C_PCM_IRQSTAT_IRQPND (0x1<<13) | |
| 69 | #define S3C_PCM_IRQSTAT_WRD_XFER (0x1<<12) | |
| 70 | #define S3C_PCM_IRQSTAT_TXEMPTY (0x1<<11) | |
| 71 | #define S3C_PCM_IRQSTAT_TXALMSTEMPTY (0x1<<10) | |
| 72 | #define S3C_PCM_IRQSTAT_TXFULL (0x1<<9) | |
| 73 | #define S3C_PCM_IRQSTAT_TXALMSTFULL (0x1<<8) | |
| 74 | #define S3C_PCM_IRQSTAT_TXSTARV (0x1<<7) | |
| 75 | #define S3C_PCM_IRQSTAT_TXERROVRFL (0x1<<6) | |
| 76 | #define S3C_PCM_IRQSTAT_RXEMPT (0x1<<5) | |
| 77 | #define S3C_PCM_IRQSTAT_RXALMSTEMPT (0x1<<4) | |
| 78 | #define S3C_PCM_IRQSTAT_RXFULL (0x1<<3) | |
| 79 | #define S3C_PCM_IRQSTAT_RXALMSTFULL (0x1<<2) | |
| 80 | #define S3C_PCM_IRQSTAT_RXSTARV (0x1<<1) | |
| 81 | #define S3C_PCM_IRQSTAT_RXERROVRFL (0x1<<0) | |
| 82 | ||
| 83 | /* PCM_FIFOSTAT Bit-Fields */ | |
| 84 | #define S3C_PCM_FIFOSTAT_TXCNT_MSK (0x3f<<14) | |
| 85 | #define S3C_PCM_FIFOSTAT_TXFIFOEMPTY (0x1<<13) | |
| 86 | #define S3C_PCM_FIFOSTAT_TXFIFOALMSTEMPTY (0x1<<12) | |
| 87 | #define S3C_PCM_FIFOSTAT_TXFIFOFULL (0x1<<11) | |
| 88 | #define S3C_PCM_FIFOSTAT_TXFIFOALMSTFULL (0x1<<10) | |
| 89 | #define S3C_PCM_FIFOSTAT_RXCNT_MSK (0x3f<<4) | |
| 90 | #define S3C_PCM_FIFOSTAT_RXFIFOEMPTY (0x1<<3) | |
| 91 | #define S3C_PCM_FIFOSTAT_RXFIFOALMSTEMPTY (0x1<<2) | |
| 92 | #define S3C_PCM_FIFOSTAT_RXFIFOFULL (0x1<<1) | |
| 93 | #define S3C_PCM_FIFOSTAT_RXFIFOALMSTFULL (0x1<<0) | |
| 94 | ||
| 95 | #define S3C_PCM_CLKSRC_PCLK 0 | |
| 96 | #define S3C_PCM_CLKSRC_MUX 1 | |
| 97 | ||
| 98 | #define S3C_PCM_SCLK_PER_FS 0 | |
| 99 | ||
| 100 | /** | |
| 101 | * struct s3c_pcm_info - S3C PCM Controller information | |
| 102 | * @dev: The parent device passed to use from the probe. | |
| 103 | * @regs: The pointer to the device register block. | |
| 104 | * @dma_playback: DMA information for playback channel. | |
| 105 | * @dma_capture: DMA information for capture channel. | |
| 106 | */ | |
| 107 | struct s3c_pcm_info { | |
| 108 | spinlock_t lock; | |
| 109 | struct device *dev; | |
| 110 | void __iomem *regs; | |
| 111 | ||
| 112 | unsigned int sclk_per_fs; | |
| 113 | ||
| 114 | /* Whether to keep PCMSCLK enabled even when idle(no active xfer) */ | |
| 115 | unsigned int idleclk; | |
| 116 | ||
| 117 | struct clk *pclk; | |
| 118 | struct clk *cclk; | |
| 119 | ||
| 120 | struct s3c_dma_params *dma_playback; | |
| 121 | struct s3c_dma_params *dma_capture; | |
| 122 | }; | |
| 123 | ||
| 124 | #endif /* __S3C_PCM_H */ |