[linux-2.6-block.git] / sound / soc / qcom / lpass-apq8016.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
 *
 * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
 */


#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dai.h>

#include <dt-bindings/sound/apq8016-lpass.h>
#include "lpass-lpaif-reg.h"
#include "lpass.h"

static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
	[MI2S_PRIMARY] =  {
		.id = MI2S_PRIMARY,
		.name = "Primary MI2S",
		.playback = {
			.stream_name	= "Primary Playback",
			.formats	= SNDRV_PCM_FMTBIT_S16 |
						SNDRV_PCM_FMTBIT_S24 |
						SNDRV_PCM_FMTBIT_S32,
			.rates		= SNDRV_PCM_RATE_8000 |
						SNDRV_PCM_RATE_16000 |
						SNDRV_PCM_RATE_32000 |
						SNDRV_PCM_RATE_48000 |
						SNDRV_PCM_RATE_96000,
			.rate_min	= 8000,
			.rate_max	= 96000,
			.channels_min	= 1,
			.channels_max	= 8,
		},
		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
	},
	[MI2S_SECONDARY] =  {
		.id = MI2S_SECONDARY,
		.name = "Secondary MI2S",
		.playback = {
			.stream_name	= "Secondary Playback",
			.formats	= SNDRV_PCM_FMTBIT_S16 |
						SNDRV_PCM_FMTBIT_S24 |
						SNDRV_PCM_FMTBIT_S32,
			.rates		= SNDRV_PCM_RATE_8000 |
						SNDRV_PCM_RATE_16000 |
						SNDRV_PCM_RATE_32000 |
						SNDRV_PCM_RATE_48000 |
						SNDRV_PCM_RATE_96000,
			.rate_min	= 8000,
			.rate_max	= 96000,
			.channels_min	= 1,
			.channels_max	= 8,
		},
		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
	},
	[MI2S_TERTIARY] =  {
		.id = MI2S_TERTIARY,
		.name = "Tertiary MI2S",
		.capture = {
			.stream_name	= "Tertiary Capture",
			.formats	= SNDRV_PCM_FMTBIT_S16 |
						SNDRV_PCM_FMTBIT_S24 |
						SNDRV_PCM_FMTBIT_S32,
			.rates		= SNDRV_PCM_RATE_8000 |
						SNDRV_PCM_RATE_16000 |
						SNDRV_PCM_RATE_32000 |
						SNDRV_PCM_RATE_48000 |
						SNDRV_PCM_RATE_96000,
			.rate_min	= 8000,
			.rate_max	= 96000,
			.channels_min	= 1,
			.channels_max	= 8,
		},
		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
	},
	[MI2S_QUATERNARY] =  {
		.id = MI2S_QUATERNARY,
		.name = "Quatenary MI2S",
		.playback = {
			.stream_name	= "Quatenary Playback",
			.formats	= SNDRV_PCM_FMTBIT_S16 |
						SNDRV_PCM_FMTBIT_S24 |
						SNDRV_PCM_FMTBIT_S32,
			.rates		= SNDRV_PCM_RATE_8000 |
						SNDRV_PCM_RATE_16000 |
						SNDRV_PCM_RATE_32000 |
						SNDRV_PCM_RATE_48000 |
						SNDRV_PCM_RATE_96000,
			.rate_min	= 8000,
			.rate_max	= 96000,
			.channels_min	= 1,
			.channels_max	= 8,
		},
		.capture = {
			.stream_name	= "Quatenary Capture",
			.formats	= SNDRV_PCM_FMTBIT_S16 |
						SNDRV_PCM_FMTBIT_S24 |
						SNDRV_PCM_FMTBIT_S32,
			.rates		= SNDRV_PCM_RATE_8000 |
						SNDRV_PCM_RATE_16000 |
						SNDRV_PCM_RATE_32000 |
						SNDRV_PCM_RATE_48000 |
						SNDRV_PCM_RATE_96000,
			.rate_min	= 8000,
			.rate_max	= 96000,
			.channels_min	= 1,
			.channels_max	= 8,
		},
		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
	},
};

static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
					   int direction)
{
	struct lpass_variant *v = drvdata->variant;
	int chan = 0;

	if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
		chan = find_first_zero_bit(&drvdata->dma_ch_bit_map,
					v->rdma_channels);

		if (chan >= v->rdma_channels)
			return -EBUSY;
	} else {
		chan = find_next_zero_bit(&drvdata->dma_ch_bit_map,
					v->wrdma_channel_start +
					v->wrdma_channels,
					v->wrdma_channel_start);

		if (chan >=  v->wrdma_channel_start + v->wrdma_channels)
			return -EBUSY;
	}

	set_bit(chan, &drvdata->dma_ch_bit_map);

	return chan;
}

static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
{
	clear_bit(chan, &drvdata->dma_ch_bit_map);

	return 0;
}

static int apq8016_lpass_init(struct platform_device *pdev)
{
	struct lpass_data *drvdata = platform_get_drvdata(pdev);
	struct device *dev = &pdev->dev;
	int ret;

	drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
	if (IS_ERR(drvdata->pcnoc_mport_clk)) {
		dev_err(&pdev->dev, "error getting pcnoc-mport-clk: %ld\n",
			PTR_ERR(drvdata->pcnoc_mport_clk));
		return PTR_ERR(drvdata->pcnoc_mport_clk);
	}

	ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
	if (ret) {
		dev_err(&pdev->dev, "Error enabling pcnoc-mport-clk: %d\n",
			ret);
		return ret;
	}

	drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
	if (IS_ERR(drvdata->pcnoc_sway_clk)) {
		dev_err(&pdev->dev, "error getting pcnoc-sway-clk: %ld\n",
			PTR_ERR(drvdata->pcnoc_sway_clk));
		return PTR_ERR(drvdata->pcnoc_sway_clk);
	}

	ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
	if (ret) {
		dev_err(&pdev->dev, "Error enabling pcnoc_sway_clk: %d\n", ret);
		return ret;
	}

	return 0;
}

static int apq8016_lpass_exit(struct platform_device *pdev)
{
	struct lpass_data *drvdata = platform_get_drvdata(pdev);

	clk_disable_unprepare(drvdata->pcnoc_mport_clk);
	clk_disable_unprepare(drvdata->pcnoc_sway_clk);

	return 0;
}


static struct lpass_variant apq8016_data = {
	.i2sctrl_reg_base	= 0x1000,
	.i2sctrl_reg_stride	= 0x1000,
	.i2s_ports		= 4,
	.irq_reg_base		= 0x6000,
	.irq_reg_stride		= 0x1000,
	.irq_ports		= 3,
	.rdma_reg_base		= 0x8400,
	.rdma_reg_stride	= 0x1000,
	.rdma_channels		= 2,
	.dmactl_audif_start	= 1,
	.wrdma_reg_base		= 0xB000,
	.wrdma_reg_stride	= 0x1000,
	.wrdma_channel_start	= 5,
	.wrdma_channels		= 2,
	.dai_driver		= apq8016_lpass_cpu_dai_driver,
	.num_dai		= ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
	.dai_osr_clk_names	= (const char *[]) {
				"mi2s-osr-clk0",
				"mi2s-osr-clk1",
				"mi2s-osr-clk2",
				"mi2s-osr-clk3",
				},
	.dai_bit_clk_names	= (const char *[]) {
				"mi2s-bit-clk0",
				"mi2s-bit-clk1",
				"mi2s-bit-clk2",
				"mi2s-bit-clk3",
				},
	.init			= apq8016_lpass_init,
	.exit			= apq8016_lpass_exit,
	.alloc_dma_channel	= apq8016_lpass_alloc_dma_channel,
	.free_dma_channel	= apq8016_lpass_free_dma_channel,
};

static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
	{ .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
	{}
};
MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);

static struct platform_driver apq8016_lpass_cpu_platform_driver = {
	.driver	= {
		.name		= "apq8016-lpass-cpu",
		.of_match_table	= of_match_ptr(apq8016_lpass_cpu_device_id),
	},
	.probe	= asoc_qcom_lpass_cpu_platform_probe,
	.remove	= asoc_qcom_lpass_cpu_platform_remove,
};
module_platform_driver(apq8016_lpass_cpu_platform_driver);

MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
97fb5e8d	1	// SPDX-License-Identifier: GPL-2.0-only
dc1ebd18 SK	2	/*
	3	* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
	4	*
dc1ebd18	5	* lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
dc1ebd18 SK	6	*/
	7
	8
	9	#include <linux/clk.h>
	10	#include <linux/device.h>
	11	#include <linux/err.h>
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/of.h>
	15	#include <linux/platform_device.h>
	16	#include <sound/pcm.h>
	17	#include <sound/pcm_params.h>
	18	#include <sound/soc.h>
	19	#include <sound/soc-dai.h>
	20
	21	#include <dt-bindings/sound/apq8016-lpass.h>
	22	#include "lpass-lpaif-reg.h"
	23	#include "lpass.h"
	24
	25	static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
	26	[MI2S_PRIMARY] = {
	27	.id = MI2S_PRIMARY,
	28	.name = "Primary MI2S",
	29	.playback = {
	30	.stream_name = "Primary Playback",
	31	.formats = SNDRV_PCM_FMTBIT_S16 \|
	32	SNDRV_PCM_FMTBIT_S24 \|
	33	SNDRV_PCM_FMTBIT_S32,
	34	.rates = SNDRV_PCM_RATE_8000 \|
	35	SNDRV_PCM_RATE_16000 \|
	36	SNDRV_PCM_RATE_32000 \|
	37	SNDRV_PCM_RATE_48000 \|
	38	SNDRV_PCM_RATE_96000,
	39	.rate_min = 8000,
	40	.rate_max = 96000,
	41	.channels_min = 1,
	42	.channels_max = 8,
	43	},
	44	.probe = &asoc_qcom_lpass_cpu_dai_probe,
	45	.ops = &asoc_qcom_lpass_cpu_dai_ops,
	46	},
	47	[MI2S_SECONDARY] = {
	48	.id = MI2S_SECONDARY,
	49	.name = "Secondary MI2S",
	50	.playback = {
	51	.stream_name = "Secondary Playback",
	52	.formats = SNDRV_PCM_FMTBIT_S16 \|
	53	SNDRV_PCM_FMTBIT_S24 \|
	54	SNDRV_PCM_FMTBIT_S32,
	55	.rates = SNDRV_PCM_RATE_8000 \|
	56	SNDRV_PCM_RATE_16000 \|
	57	SNDRV_PCM_RATE_32000 \|
	58	SNDRV_PCM_RATE_48000 \|
	59	SNDRV_PCM_RATE_96000,
	60	.rate_min = 8000,
	61	.rate_max = 96000,
	62	.channels_min = 1,
	63	.channels_max = 8,
	64	},
	65	.probe = &asoc_qcom_lpass_cpu_dai_probe,
	66	.ops = &asoc_qcom_lpass_cpu_dai_ops,
	67	},
	68	[MI2S_TERTIARY] = {
	69	.id = MI2S_TERTIARY,
70	.name = "Tertiary MI2S",
71	.capture = {
72	.stream_name = "Tertiary Capture",
73	.formats = SNDRV_PCM_FMTBIT_S16 \|
74	SNDRV_PCM_FMTBIT_S24 \|
75	SNDRV_PCM_FMTBIT_S32,
76	.rates = SNDRV_PCM_RATE_8000 \|
77	SNDRV_PCM_RATE_16000 \|
78	SNDRV_PCM_RATE_32000 \|
79	SNDRV_PCM_RATE_48000 \|
80	SNDRV_PCM_RATE_96000,
81	.rate_min = 8000,
82	.rate_max = 96000,
83	.channels_min = 1,
84	.channels_max = 8,
85	},
86	.probe = &asoc_qcom_lpass_cpu_dai_probe,
87	.ops = &asoc_qcom_lpass_cpu_dai_ops,
88	},
89	[MI2S_QUATERNARY] = {
90	.id = MI2S_QUATERNARY,
91	.name = "Quatenary MI2S",
92	.playback = {
93	.stream_name = "Quatenary Playback",
94	.formats = SNDRV_PCM_FMTBIT_S16 \|
95	SNDRV_PCM_FMTBIT_S24 \|
96	SNDRV_PCM_FMTBIT_S32,
97	.rates = SNDRV_PCM_RATE_8000 \|
98	SNDRV_PCM_RATE_16000 \|
99	SNDRV_PCM_RATE_32000 \|
100	SNDRV_PCM_RATE_48000 \|
101	SNDRV_PCM_RATE_96000,
102	.rate_min = 8000,
103	.rate_max = 96000,
104	.channels_min = 1,
105	.channels_max = 8,
106	},
107	.capture = {
108	.stream_name = "Quatenary Capture",
109	.formats = SNDRV_PCM_FMTBIT_S16 \|
110	SNDRV_PCM_FMTBIT_S24 \|
111	SNDRV_PCM_FMTBIT_S32,
112	.rates = SNDRV_PCM_RATE_8000 \|
113	SNDRV_PCM_RATE_16000 \|
114	SNDRV_PCM_RATE_32000 \|
115	SNDRV_PCM_RATE_48000 \|
116	SNDRV_PCM_RATE_96000,
117	.rate_min = 8000,
118	.rate_max = 96000,
119	.channels_min = 1,
120	.channels_max = 8,
121	},
122	.probe = &asoc_qcom_lpass_cpu_dai_probe,
123	.ops = &asoc_qcom_lpass_cpu_dai_ops,
124	},
125	};
126
73c847b6 SK	127	static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
73c847b6 SK	128	int direction)
dc1ebd18 SK	129	{
dc1ebd18 SK	130	struct lpass_variant *v = drvdata->variant;
6a9364ca SK	131	int chan = 0;
	132
	133	if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
	134	chan = find_first_zero_bit(&drvdata->dma_ch_bit_map,
dc1ebd18 SK	135	v->rdma_channels);
dc1ebd18 SK	136
6a9364ca SK	137	if (chan >= v->rdma_channels)
	138	return -EBUSY;
	139	} else {
	140	chan = find_next_zero_bit(&drvdata->dma_ch_bit_map,
	141	v->wrdma_channel_start +
	142	v->wrdma_channels,
	143	v->wrdma_channel_start);
	144
	145	if (chan >= v->wrdma_channel_start + v->wrdma_channels)
	146	return -EBUSY;
	147	}
dc1ebd18	148
4d809fb1	149	set_bit(chan, &drvdata->dma_ch_bit_map);
dc1ebd18 SK	150
	151	return chan;
	152	}
	153
	154	static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
	155	{
4d809fb1	156	clear_bit(chan, &drvdata->dma_ch_bit_map);
dc1ebd18 SK	157
	158	return 0;
	159	}
	160
	161	static int apq8016_lpass_init(struct platform_device *pdev)
	162	{
	163	struct lpass_data *drvdata = platform_get_drvdata(pdev);
	164	struct device *dev = &pdev->dev;
	165	int ret;
	166
	167	drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
	168	if (IS_ERR(drvdata->pcnoc_mport_clk)) {
b6e643ad BA	169	dev_err(&pdev->dev, "error getting pcnoc-mport-clk: %ld\n",
b6e643ad BA	170	PTR_ERR(drvdata->pcnoc_mport_clk));
dc1ebd18 SK	171	return PTR_ERR(drvdata->pcnoc_mport_clk);
	172	}
	173
	174	ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
	175	if (ret) {
b6e643ad BA	176	dev_err(&pdev->dev, "Error enabling pcnoc-mport-clk: %d\n",
b6e643ad BA	177	ret);
dc1ebd18 SK	178	return ret;
	179	}
	180
	181	drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
	182	if (IS_ERR(drvdata->pcnoc_sway_clk)) {
b6e643ad BA	183	dev_err(&pdev->dev, "error getting pcnoc-sway-clk: %ld\n",
b6e643ad BA	184	PTR_ERR(drvdata->pcnoc_sway_clk));
dc1ebd18 SK	185	return PTR_ERR(drvdata->pcnoc_sway_clk);
	186	}
	187
	188	ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
	189	if (ret) {
b6e643ad	190	dev_err(&pdev->dev, "Error enabling pcnoc_sway_clk: %d\n", ret);
dc1ebd18 SK	191	return ret;
	192	}
	193
	194	return 0;
	195	}
	196
	197	static int apq8016_lpass_exit(struct platform_device *pdev)
	198	{
	199	struct lpass_data *drvdata = platform_get_drvdata(pdev);
	200
	201	clk_disable_unprepare(drvdata->pcnoc_mport_clk);
	202	clk_disable_unprepare(drvdata->pcnoc_sway_clk);
	203
	204	return 0;
	205	}
	206
	207
	208	static struct lpass_variant apq8016_data = {
	209	.i2sctrl_reg_base = 0x1000,
	210	.i2sctrl_reg_stride = 0x1000,
	211	.i2s_ports = 4,
	212	.irq_reg_base = 0x6000,
	213	.irq_reg_stride = 0x1000,
	214	.irq_ports = 3,
	215	.rdma_reg_base = 0x8400,
	216	.rdma_reg_stride = 0x1000,
	217	.rdma_channels = 2,
ec5b8287	218	.dmactl_audif_start = 1,
6a9364ca SK	219	.wrdma_reg_base = 0xB000,
	220	.wrdma_reg_stride = 0x1000,
	221	.wrdma_channel_start = 5,
	222	.wrdma_channels = 2,
dc1ebd18 SK	223	.dai_driver = apq8016_lpass_cpu_dai_driver,
dc1ebd18 SK	224	.num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
97c52eb9 LW	225	.dai_osr_clk_names = (const char *[]) {
	226	"mi2s-osr-clk0",
	227	"mi2s-osr-clk1",
	228	"mi2s-osr-clk2",
	229	"mi2s-osr-clk3",
	230	},
	231	.dai_bit_clk_names = (const char *[]) {
	232	"mi2s-bit-clk0",
	233	"mi2s-bit-clk1",
	234	"mi2s-bit-clk2",
	235	"mi2s-bit-clk3",
	236	},
dc1ebd18 SK	237	.init = apq8016_lpass_init,
	238	.exit = apq8016_lpass_exit,
	239	.alloc_dma_channel = apq8016_lpass_alloc_dma_channel,
	240	.free_dma_channel = apq8016_lpass_free_dma_channel,
	241	};
	242
	243	static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
	244	{ .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
	245	{}
	246	};
	247	MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);
	248
	249	static struct platform_driver apq8016_lpass_cpu_platform_driver = {
	250	.driver = {
	251	.name = "apq8016-lpass-cpu",
	252	.of_match_table = of_match_ptr(apq8016_lpass_cpu_device_id),
	253	},
	254	.probe = asoc_qcom_lpass_cpu_platform_probe,
	255	.remove = asoc_qcom_lpass_cpu_platform_remove,
	256	};
	257	module_platform_driver(apq8016_lpass_cpu_platform_driver);
	258
	259	MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
	260	MODULE_LICENSE("GPL v2");
	261