[linux-2.6-block.git] / sound / soc / pxa / mmp-sspa.c

/*
 * linux/sound/soc/pxa/mmp-sspa.c
 * Base on pxa2xx-ssp.c
 *
 * Copyright (C) 2011 Marvell International Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/pxa2xx_ssp.h>
#include <linux/io.h>
#include <linux/dmaengine.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/initval.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/pxa2xx-lib.h>
#include <sound/dmaengine_pcm.h>
#include "mmp-sspa.h"

/*
 * SSPA audio private data
 */
struct sspa_priv {
	struct ssp_device *sspa;
	struct snd_dmaengine_dai_dma_data *dma_params;
	struct clk *audio_clk;
	struct clk *sysclk;
	int dai_fmt;
	int running_cnt;
};

static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
{
	__raw_writel(val, sspa->mmio_base + reg);
}

static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
{
	return __raw_readl(sspa->mmio_base + reg);
}

static void mmp_sspa_tx_enable(struct ssp_device *sspa)
{
	unsigned int sspa_sp;

	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
	sspa_sp |= SSPA_SP_S_EN;
	sspa_sp |= SSPA_SP_WEN;
	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
}

static void mmp_sspa_tx_disable(struct ssp_device *sspa)
{
	unsigned int sspa_sp;

	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
	sspa_sp &= ~SSPA_SP_S_EN;
	sspa_sp |= SSPA_SP_WEN;
	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
}

static void mmp_sspa_rx_enable(struct ssp_device *sspa)
{
	unsigned int sspa_sp;

	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
	sspa_sp |= SSPA_SP_S_EN;
	sspa_sp |= SSPA_SP_WEN;
	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
}

static void mmp_sspa_rx_disable(struct ssp_device *sspa)
{
	unsigned int sspa_sp;

	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
	sspa_sp &= ~SSPA_SP_S_EN;
	sspa_sp |= SSPA_SP_WEN;
	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
}

static int mmp_sspa_startup(struct snd_pcm_substream *substream,
	struct snd_soc_dai *dai)
{
	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);

	clk_enable(priv->sysclk);
	clk_enable(priv->sspa->clk);

	return 0;
}

static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
	struct snd_soc_dai *dai)
{
	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);

	clk_disable(priv->sspa->clk);
	clk_disable(priv->sysclk);

}

/*
 * Set the SSP ports SYSCLK.
 */
static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
				    int clk_id, unsigned int freq, int dir)
{
	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
	int ret = 0;

	switch (clk_id) {
	case MMP_SSPA_CLK_AUDIO:
		ret = clk_set_rate(priv->audio_clk, freq);
		if (ret)
			return ret;
		break;
	case MMP_SSPA_CLK_PLL:
	case MMP_SSPA_CLK_VCXO:
		/* not support yet */
		return -EINVAL;
	default:
		return -EINVAL;
	}

	return 0;
}

static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
				 int source, unsigned int freq_in,
				 unsigned int freq_out)
{
	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
	int ret = 0;

	switch (pll_id) {
	case MMP_SYSCLK:
		ret = clk_set_rate(priv->sysclk, freq_out);
		if (ret)
			return ret;
		break;
	case MMP_SSPA_CLK:
		ret = clk_set_rate(priv->sspa->clk, freq_out);
		if (ret)
			return ret;
		break;
	default:
		return -ENODEV;
	}

	return 0;
}

/*
 * Set up the sspa dai format. The sspa port must be inactive
 * before calling this function as the physical
 * interface format is changed.
 */
static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
				 unsigned int fmt)
{
	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
	struct ssp_device *sspa = sspa_priv->sspa;
	u32 sspa_sp, sspa_ctrl;

	/* check if we need to change anything at all */
	if (sspa_priv->dai_fmt == fmt)
		return 0;

	/* we can only change the settings if the port is not in use */
	if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
	    (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
		dev_err(&sspa->pdev->dev,
			"can't change hardware dai format: stream is in use\n");
		return -EINVAL;
	}

	/* reset port settings */
	sspa_sp   = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
	sspa_ctrl = 0;

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBS_CFS:
		sspa_sp |= SSPA_SP_MSL;
		break;
	case SND_SOC_DAIFMT_CBM_CFM:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		sspa_sp |= SSPA_SP_FSP;
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		sspa_sp |= SSPA_TXSP_FPER(63);
		sspa_sp |= SSPA_SP_FWID(31);
		sspa_ctrl |= SSPA_CTL_XDATDLY(1);
		break;
	default:
		return -EINVAL;
	}

	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);

	sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);

	/*
	 * FIXME: hw issue, for the tx serial port,
	 * can not config the master/slave mode;
	 * so must clean this bit.
	 * The master/slave mode has been set in the
	 * rx port.
	 */
	sspa_sp &= ~SSPA_SP_MSL;
	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);

	mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
	mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);

	/* Since we are configuring the timings for the format by hand
	 * we have to defer some things until hw_params() where we
	 * know parameters like the sample size.
	 */
	sspa_priv->dai_fmt = fmt;
	return 0;
}

/*
 * Set the SSPA audio DMA parameters and sample size.
 * Can be called multiple times by oss emulation.
 */
static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
			       struct snd_pcm_hw_params *params,
			       struct snd_soc_dai *dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
	struct ssp_device *sspa = sspa_priv->sspa;
	struct snd_dmaengine_dai_dma_data *dma_params;
	u32 sspa_ctrl;

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
	else
		sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);

	sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
	sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
	sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
	sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
	sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;

	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S8:
		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
		break;
	case SNDRV_PCM_FORMAT_S16_LE:
		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
		break;
	case SNDRV_PCM_FORMAT_S20_3LE:
		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
		break;
	case SNDRV_PCM_FORMAT_S24_3LE:
		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
		break;
	default:
		return -EINVAL;
	}

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
		mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
	} else {
		mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
		mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
	}

	dma_params = &sspa_priv->dma_params[substream->stream];
	dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
				(sspa->phys_base + SSPA_TXD) :
				(sspa->phys_base + SSPA_RXD);
	snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
	return 0;
}

static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
			     struct snd_soc_dai *dai)
{
	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
	struct ssp_device *sspa = sspa_priv->sspa;
	int ret = 0;

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		/*
		 * whatever playback or capture, must enable rx.
		 * this is a hw issue, so need check if rx has been
		 * enabled or not; if has been enabled by another
		 * stream, do not enable again.
		 */
		if (!sspa_priv->running_cnt)
			mmp_sspa_rx_enable(sspa);

		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
			mmp_sspa_tx_enable(sspa);

		sspa_priv->running_cnt++;
		break;

	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		sspa_priv->running_cnt--;

		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
			mmp_sspa_tx_disable(sspa);

		/* have no capture stream, disable rx port */
		if (!sspa_priv->running_cnt)
			mmp_sspa_rx_disable(sspa);
		break;

	default:
		ret = -EINVAL;
	}

	return ret;
}

static int mmp_sspa_probe(struct snd_soc_dai *dai)
{
	struct sspa_priv *priv = dev_get_drvdata(dai->dev);

	snd_soc_dai_set_drvdata(dai, priv);
	return 0;

}

#define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
#define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
		SNDRV_PCM_FMTBIT_S16_LE | \
		SNDRV_PCM_FMTBIT_S24_LE | \
		SNDRV_PCM_FMTBIT_S32_LE)

static const struct snd_soc_dai_ops mmp_sspa_dai_ops = {
	.startup	= mmp_sspa_startup,
	.shutdown	= mmp_sspa_shutdown,
	.trigger	= mmp_sspa_trigger,
	.hw_params	= mmp_sspa_hw_params,
	.set_sysclk	= mmp_sspa_set_dai_sysclk,
	.set_pll	= mmp_sspa_set_dai_pll,
	.set_fmt	= mmp_sspa_set_dai_fmt,
};

static struct snd_soc_dai_driver mmp_sspa_dai = {
	.probe = mmp_sspa_probe,
	.playback = {
		.channels_min = 1,
		.channels_max = 128,
		.rates = MMP_SSPA_RATES,
		.formats = MMP_SSPA_FORMATS,
	},
	.capture = {
		.channels_min = 1,
		.channels_max = 2,
		.rates = MMP_SSPA_RATES,
		.formats = MMP_SSPA_FORMATS,
	},
	.ops = &mmp_sspa_dai_ops,
};

static const struct snd_soc_component_driver mmp_sspa_component = {
	.name		= "mmp-sspa",
};

static int asoc_mmp_sspa_probe(struct platform_device *pdev)
{
	struct sspa_priv *priv;
	struct resource *res;

	priv = devm_kzalloc(&pdev->dev,
				sizeof(struct sspa_priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->sspa = devm_kzalloc(&pdev->dev,
				sizeof(struct ssp_device), GFP_KERNEL);
	if (priv->sspa == NULL)
		return -ENOMEM;

	priv->dma_params = devm_kcalloc(&pdev->dev,
			2, sizeof(struct snd_dmaengine_dai_dma_data),
			GFP_KERNEL);
	if (priv->dma_params == NULL)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(priv->sspa->mmio_base))
		return PTR_ERR(priv->sspa->mmio_base);

	priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(priv->sspa->clk))
		return PTR_ERR(priv->sspa->clk);

	priv->audio_clk = clk_get(NULL, "mmp-audio");
	if (IS_ERR(priv->audio_clk))
		return PTR_ERR(priv->audio_clk);

	priv->sysclk = clk_get(NULL, "mmp-sysclk");
	if (IS_ERR(priv->sysclk)) {
		clk_put(priv->audio_clk);
		return PTR_ERR(priv->sysclk);
	}
	clk_enable(priv->audio_clk);
	priv->dai_fmt = (unsigned int) -1;
	platform_set_drvdata(pdev, priv);

	return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
					       &mmp_sspa_dai, 1);
}

static int asoc_mmp_sspa_remove(struct platform_device *pdev)
{
	struct sspa_priv *priv = platform_get_drvdata(pdev);

	clk_disable(priv->audio_clk);
	clk_put(priv->audio_clk);
	clk_put(priv->sysclk);
	return 0;
}

static struct platform_driver asoc_mmp_sspa_driver = {
	.driver = {
		.name = "mmp-sspa-dai",
	},
	.probe = asoc_mmp_sspa_probe,
	.remove = asoc_mmp_sspa_remove,
};

module_platform_driver(asoc_mmp_sspa_driver);

MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
MODULE_DESCRIPTION("MMP SSPA SoC Interface");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:mmp-sspa-dai");
Commit	Line	Data
fa375d42 ZG	1	/*
	2	* linux/sound/soc/pxa/mmp-sspa.c
	3	* Base on pxa2xx-ssp.c
	4	*
	5	* Copyright (C) 2011 Marvell International Ltd.
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*
	21	*/
	22	#include <linux/init.h>
	23	#include <linux/module.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/delay.h>
	26	#include <linux/clk.h>
	27	#include <linux/slab.h>
	28	#include <linux/pxa2xx_ssp.h>
	29	#include <linux/io.h>
d65a1458 DM	30	#include <linux/dmaengine.h>
d65a1458 DM	31
fa375d42 ZG	32	#include <sound/core.h>
	33	#include <sound/pcm.h>
	34	#include <sound/initval.h>
	35	#include <sound/pcm_params.h>
	36	#include <sound/soc.h>
	37	#include <sound/pxa2xx-lib.h>
d65a1458	38	#include <sound/dmaengine_pcm.h>
fa375d42 ZG	39	#include "mmp-sspa.h"
	40
	41	/*
	42	* SSPA audio private data
	43	*/
	44	struct sspa_priv {
	45	struct ssp_device *sspa;
d65a1458	46	struct snd_dmaengine_dai_dma_data *dma_params;
fa375d42 ZG	47	struct clk *audio_clk;
	48	struct clk *sysclk;
	49	int dai_fmt;
	50	int running_cnt;
	51	};
	52
	53	static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
	54	{
	55	__raw_writel(val, sspa->mmio_base + reg);
	56	}
	57
	58	static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
	59	{
	60	return __raw_readl(sspa->mmio_base + reg);
	61	}
	62
	63	static void mmp_sspa_tx_enable(struct ssp_device *sspa)
	64	{
	65	unsigned int sspa_sp;
	66
	67	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
	68	sspa_sp \|= SSPA_SP_S_EN;
	69	sspa_sp \|= SSPA_SP_WEN;
	70	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
	71	}
	72
	73	static void mmp_sspa_tx_disable(struct ssp_device *sspa)
	74	{
	75	unsigned int sspa_sp;
	76
	77	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
	78	sspa_sp &= ~SSPA_SP_S_EN;
	79	sspa_sp \|= SSPA_SP_WEN;
	80	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
	81	}
	82
	83	static void mmp_sspa_rx_enable(struct ssp_device *sspa)
	84	{
	85	unsigned int sspa_sp;
	86
	87	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
	88	sspa_sp \|= SSPA_SP_S_EN;
	89	sspa_sp \|= SSPA_SP_WEN;
	90	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
	91	}
	92
	93	static void mmp_sspa_rx_disable(struct ssp_device *sspa)
	94	{
	95	unsigned int sspa_sp;
	96
	97	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
	98	sspa_sp &= ~SSPA_SP_S_EN;
	99	sspa_sp \|= SSPA_SP_WEN;
	100	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
	101	}
	102
	103	static int mmp_sspa_startup(struct snd_pcm_substream *substream,
	104	struct snd_soc_dai *dai)
	105	{
	106	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
	107
	108	clk_enable(priv->sysclk);
	109	clk_enable(priv->sspa->clk);
	110
111	return 0;
112	}
113
114	static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
115	struct snd_soc_dai *dai)
116	{
117	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
118
119	clk_disable(priv->sspa->clk);
120	clk_disable(priv->sysclk);
121
fa375d42 ZG	122	}
	123
	124	/*
	125	* Set the SSP ports SYSCLK.
	126	*/
	127	static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
	128	int clk_id, unsigned int freq, int dir)
	129	{
	130	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
	131	int ret = 0;
	132
	133	switch (clk_id) {
	134	case MMP_SSPA_CLK_AUDIO:
	135	ret = clk_set_rate(priv->audio_clk, freq);
	136	if (ret)
	137	return ret;
	138	break;
	139	case MMP_SSPA_CLK_PLL:
	140	case MMP_SSPA_CLK_VCXO:
	141	/* not support yet */
	142	return -EINVAL;
	143	default:
	144	return -EINVAL;
	145	}
	146
	147	return 0;
	148	}
	149
	150	static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
	151	int source, unsigned int freq_in,
	152	unsigned int freq_out)
	153	{
	154	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
	155	int ret = 0;
	156
	157	switch (pll_id) {
	158	case MMP_SYSCLK:
	159	ret = clk_set_rate(priv->sysclk, freq_out);
	160	if (ret)
	161	return ret;
	162	break;
	163	case MMP_SSPA_CLK:
	164	ret = clk_set_rate(priv->sspa->clk, freq_out);
	165	if (ret)
	166	return ret;
	167	break;
	168	default:
	169	return -ENODEV;
	170	}
	171
	172	return 0;
	173	}
	174
	175	/*
	176	* Set up the sspa dai format. The sspa port must be inactive
	177	* before calling this function as the physical
	178	* interface format is changed.
	179	*/
	180	static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
	181	unsigned int fmt)
	182	{
	183	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
	184	struct ssp_device *sspa = sspa_priv->sspa;
	185	u32 sspa_sp, sspa_ctrl;
186
187	/* check if we need to change anything at all */
188	if (sspa_priv->dai_fmt == fmt)
189	return 0;
190
191	/* we can only change the settings if the port is not in use */
192	if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) \|\|
193	(mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
194	dev_err(&sspa->pdev->dev,
195	"can't change hardware dai format: stream is in use\n");
196	return -EINVAL;
197	}
198
199	/* reset port settings */
200	sspa_sp = SSPA_SP_WEN \| SSPA_SP_S_RST \| SSPA_SP_FFLUSH;
201	sspa_ctrl = 0;
202
203	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
204	case SND_SOC_DAIFMT_CBS_CFS:
205	sspa_sp \|= SSPA_SP_MSL;
206	break;
207	case SND_SOC_DAIFMT_CBM_CFM:
208	break;
209	default:
210	return -EINVAL;
211	}
212
213	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
214	case SND_SOC_DAIFMT_NB_NF:
215	sspa_sp \|= SSPA_SP_FSP;
216	break;
217	default:
218	return -EINVAL;
219	}
220
221	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
222	case SND_SOC_DAIFMT_I2S:
223	sspa_sp \|= SSPA_TXSP_FPER(63);
224	sspa_sp \|= SSPA_SP_FWID(31);
225	sspa_ctrl \|= SSPA_CTL_XDATDLY(1);
226	break;
227	default:
228	return -EINVAL;
229	}
230
231	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
232	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
233
234	sspa_sp &= ~(SSPA_SP_S_RST \| SSPA_SP_FFLUSH);
235	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
236	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
237
238	/*
239	* FIXME: hw issue, for the tx serial port,
240	* can not config the master/slave mode;
241	* so must clean this bit.
242	* The master/slave mode has been set in the
243	* rx port.
244	*/
245	sspa_sp &= ~SSPA_SP_MSL;
246	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
247
248	mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
249	mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
250
251	/* Since we are configuring the timings for the format by hand
252	* we have to defer some things until hw_params() where we
253	* know parameters like the sample size.
254	*/
255	sspa_priv->dai_fmt = fmt;
256	return 0;
257	}
258
259	/*
260	* Set the SSPA audio DMA parameters and sample size.
261	* Can be called multiple times by oss emulation.
262	*/
263	static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
264	struct snd_pcm_hw_params *params,
265	struct snd_soc_dai *dai)
266	{
267	struct snd_soc_pcm_runtime *rtd = substream->private_data;
268	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
269	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
270	struct ssp_device *sspa = sspa_priv->sspa;
d65a1458	271	struct snd_dmaengine_dai_dma_data *dma_params;
fa375d42 ZG	272	u32 sspa_ctrl;
	273
	274	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	275	sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
	276	else
	277	sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
	278
	279	sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
	280	sspa_ctrl \|= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
	281	sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
	282	sspa_ctrl \|= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
	283	sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
	284
	285	switch (params_format(params)) {
	286	case SNDRV_PCM_FORMAT_S8:
	287	sspa_ctrl \|= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
	288	break;
	289	case SNDRV_PCM_FORMAT_S16_LE:
	290	sspa_ctrl \|= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
	291	break;
	292	case SNDRV_PCM_FORMAT_S20_3LE:
	293	sspa_ctrl \|= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
	294	break;
	295	case SNDRV_PCM_FORMAT_S24_3LE:
	296	sspa_ctrl \|= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
	297	break;
	298	case SNDRV_PCM_FORMAT_S32_LE:
	299	sspa_ctrl \|= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
	300	break;
	301	default:
	302	return -EINVAL;
	303	}
	304
	305	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
	306	mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
	307	mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
	308	} else {
	309	mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
	310	mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
	311	}
	312
	313	dma_params = &sspa_priv->dma_params[substream->stream];
d65a1458	314	dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
fa375d42 ZG	315	(sspa->phys_base + SSPA_TXD) :
	316	(sspa->phys_base + SSPA_RXD);
	317	snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
	318	return 0;
	319	}
	320
	321	static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
	322	struct snd_soc_dai *dai)
	323	{
	324	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
	325	struct ssp_device *sspa = sspa_priv->sspa;
	326	int ret = 0;
	327
	328	switch (cmd) {
	329	case SNDRV_PCM_TRIGGER_START:
	330	case SNDRV_PCM_TRIGGER_RESUME:
	331	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	332	/*
	333	* whatever playback or capture, must enable rx.
	334	* this is a hw issue, so need check if rx has been
	335	* enabled or not; if has been enabled by another
	336	* stream, do not enable again.
	337	*/
	338	if (!sspa_priv->running_cnt)
	339	mmp_sspa_rx_enable(sspa);
	340
	341	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	342	mmp_sspa_tx_enable(sspa);
	343
	344	sspa_priv->running_cnt++;
	345	break;
	346
	347	case SNDRV_PCM_TRIGGER_STOP:
	348	case SNDRV_PCM_TRIGGER_SUSPEND:
	349	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	350	sspa_priv->running_cnt--;
	351
	352	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	353	mmp_sspa_tx_disable(sspa);
	354
	355	/* have no capture stream, disable rx port */
	356	if (!sspa_priv->running_cnt)
	357	mmp_sspa_rx_disable(sspa);
	358	break;
	359
	360	default:
	361	ret = -EINVAL;
	362	}
	363
	364	return ret;
	365	}
	366
	367	static int mmp_sspa_probe(struct snd_soc_dai *dai)
	368	{
	369	struct sspa_priv *priv = dev_get_drvdata(dai->dev);
	370
	371	snd_soc_dai_set_drvdata(dai, priv);
	372	return 0;
	373
	374	}
	375
	376	#define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
	377	#define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 \| \
	378	SNDRV_PCM_FMTBIT_S16_LE \| \
379	SNDRV_PCM_FMTBIT_S24_LE \| \
fa375d42 ZG	380	SNDRV_PCM_FMTBIT_S32_LE)
fa375d42 ZG	381
cb753443	382	static const struct snd_soc_dai_ops mmp_sspa_dai_ops = {
fa375d42 ZG	383	.startup = mmp_sspa_startup,
	384	.shutdown = mmp_sspa_shutdown,
	385	.trigger = mmp_sspa_trigger,
	386	.hw_params = mmp_sspa_hw_params,
	387	.set_sysclk = mmp_sspa_set_dai_sysclk,
	388	.set_pll = mmp_sspa_set_dai_pll,
	389	.set_fmt = mmp_sspa_set_dai_fmt,
	390	};
	391
5d9ff402	392	static struct snd_soc_dai_driver mmp_sspa_dai = {
fa375d42 ZG	393	.probe = mmp_sspa_probe,
	394	.playback = {
	395	.channels_min = 1,
	396	.channels_max = 128,
	397	.rates = MMP_SSPA_RATES,
	398	.formats = MMP_SSPA_FORMATS,
	399	},
	400	.capture = {
	401	.channels_min = 1,
	402	.channels_max = 2,
	403	.rates = MMP_SSPA_RATES,
	404	.formats = MMP_SSPA_FORMATS,
	405	},
	406	.ops = &mmp_sspa_dai_ops,
	407	};
	408
425f3708 KM	409	static const struct snd_soc_component_driver mmp_sspa_component = {
	410	.name = "mmp-sspa",
	411	};
	412
570f6fe1	413	static int asoc_mmp_sspa_probe(struct platform_device *pdev)
fa375d42 ZG	414	{
	415	struct sspa_priv *priv;
	416	struct resource *res;
	417
	418	priv = devm_kzalloc(&pdev->dev,
	419	sizeof(struct sspa_priv), GFP_KERNEL);
	420	if (!priv)
	421	return -ENOMEM;
	422
	423	priv->sspa = devm_kzalloc(&pdev->dev,
	424	sizeof(struct ssp_device), GFP_KERNEL);
	425	if (priv->sspa == NULL)
	426	return -ENOMEM;
	427
a86854d0 KC	428	priv->dma_params = devm_kcalloc(&pdev->dev,
a86854d0 KC	429	2, sizeof(struct snd_dmaengine_dai_dma_data),
d65a1458	430	GFP_KERNEL);
fa375d42 ZG	431	if (priv->dma_params == NULL)
	432	return -ENOMEM;
	433
	434	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
b25b5aa0 TR	435	priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
	436	if (IS_ERR(priv->sspa->mmio_base))
	437	return PTR_ERR(priv->sspa->mmio_base);
fa375d42 ZG	438
	439	priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
	440	if (IS_ERR(priv->sspa->clk))
	441	return PTR_ERR(priv->sspa->clk);
	442
	443	priv->audio_clk = clk_get(NULL, "mmp-audio");
	444	if (IS_ERR(priv->audio_clk))
	445	return PTR_ERR(priv->audio_clk);
	446
	447	priv->sysclk = clk_get(NULL, "mmp-sysclk");
	448	if (IS_ERR(priv->sysclk)) {
	449	clk_put(priv->audio_clk);
	450	return PTR_ERR(priv->sysclk);
	451	}
	452	clk_enable(priv->audio_clk);
	453	priv->dai_fmt = (unsigned int) -1;
	454	platform_set_drvdata(pdev, priv);
	455
9ff50721 SK	456	return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
9ff50721 SK	457	&mmp_sspa_dai, 1);
fa375d42 ZG	458	}
fa375d42 ZG	459
570f6fe1	460	static int asoc_mmp_sspa_remove(struct platform_device *pdev)
fa375d42 ZG	461	{
	462	struct sspa_priv *priv = platform_get_drvdata(pdev);
	463
	464	clk_disable(priv->audio_clk);
	465	clk_put(priv->audio_clk);
	466	clk_put(priv->sysclk);
fa375d42 ZG	467	return 0;
	468	}
	469
	470	static struct platform_driver asoc_mmp_sspa_driver = {
	471	.driver = {
	472	.name = "mmp-sspa-dai",
fa375d42 ZG	473	},
fa375d42 ZG	474	.probe = asoc_mmp_sspa_probe,
570f6fe1	475	.remove = asoc_mmp_sspa_remove,
fa375d42 ZG	476	};
	477
	478	module_platform_driver(asoc_mmp_sspa_driver);
	479
	480	MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
	481	MODULE_DESCRIPTION("MMP SSPA SoC Interface");
	482	MODULE_LICENSE("GPL");
e5b7d71a	483	MODULE_ALIAS("platform:mmp-sspa-dai");