[linux-block.git] / sound / soc / intel / common / soc-acpi-intel-tgl-match.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
 *
 * Copyright (c) 2019, Intel Corporation.
 *
 */

#include <sound/soc-acpi.h>
#include <sound/soc-acpi-intel-match.h>
#include "soc-acpi-intel-sdw-mockup-match.h"

static const struct snd_soc_acpi_codecs essx_83x6 = {
	.num_codecs = 3,
	.codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
};

static const struct snd_soc_acpi_codecs tgl_codecs = {
	.num_codecs = 1,
	.codecs = {"MX98357A"}
};

static const struct snd_soc_acpi_endpoint single_endpoint = {
	.num = 0,
	.aggregated = 0,
	.group_position = 0,
	.group_id = 0,
};

static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
	.num = 0,
	.aggregated = 1,
	.group_position = 0,
	.group_id = 1,
};

static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
	.num = 0,
	.aggregated = 1,
	.group_position = 1,
	.group_id = 1,
};

static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
	{
		.adr = 0x000020025D071100ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt711"
	}
};

static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
	{
		.adr = 0x000120025D071100ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt711"
	}
};

static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
	{
		.adr = 0x000120025D130800ull,
		.num_endpoints = 1,
		.endpoints = &spk_l_endpoint,
		.name_prefix = "rt1308-1"
	},
	{
		.adr = 0x000122025D130800ull,
		.num_endpoints = 1,
		.endpoints = &spk_r_endpoint,
		.name_prefix = "rt1308-2"
	}
};

static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
	{
		.adr = 0x000120025D130800ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt1308-1"
	}
};

static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
	{
		.adr = 0x000220025D130800ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt1308-1"
	}
};

static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
	{
		.adr = 0x000120025D130800ull,
		.num_endpoints = 1,
		.endpoints = &spk_l_endpoint,
		.name_prefix = "rt1308-1"
	}
};

static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
	{
		.adr = 0x000220025D130800ull,
		.num_endpoints = 1,
		.endpoints = &spk_r_endpoint,
		.name_prefix = "rt1308-2"
	}
};

static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
	{
		.adr = 0x000021025D071500ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt715"
	}
};

static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
	{
		.adr = 0x000320025D071500ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt715"
	}
};

static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
	{
		.adr = 0x000123019F837300ull,
		.num_endpoints = 1,
		.endpoints = &spk_r_endpoint,
		.name_prefix = "Right"
	},
	{
		.adr = 0x000127019F837300ull,
		.num_endpoints = 1,
		.endpoints = &spk_l_endpoint,
		.name_prefix = "Left"
	}
};

static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
	{
		.adr = 0x000021025D568200ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt5682"
	}
};

static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
	{
		.adr = 0x000030025D071101ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt711"
	}
};

static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
	{
		.adr = 0x000131025D131601ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt1316-1"
	}
};

static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
	{
		.adr = 0x000131025D131601ull, /* unique ID is set for some reason */
		.num_endpoints = 1,
		.endpoints = &spk_l_endpoint,
		.name_prefix = "rt1316-1"
	}
};

static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
	{
		.adr = 0x000230025D131601ull,
		.num_endpoints = 1,
		.endpoints = &spk_r_endpoint,
		.name_prefix = "rt1316-2"
	}
};

static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
	{
		.adr = 0x000330025D071401ull,
		.num_endpoints = 1,
		.endpoints = &single_endpoint,
		.name_prefix = "rt714"
	}
};

static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_0_adr),
		.adr_d = rt711_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
		.adr_d = rt1308_1_dual_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_0_adr),
		.adr_d = rt711_0_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_hp[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_0_adr),
		.adr_d = rt711_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
		.adr_d = rt1308_1_single_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt5682_0_adr),
		.adr_d = rt5682_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(mx8373_1_adr),
		.adr_d = mx8373_1_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_0_adr),
		.adr_d = rt711_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
		.adr_d = rt1308_1_group1_adr,
	},
	{
		.mask = BIT(2),
		.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
		.adr_d = rt1308_2_group1_adr,
	},
	{
		.mask = BIT(3),
		.num_adr = ARRAY_SIZE(rt715_3_adr),
		.adr_d = rt715_3_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_0_adr),
		.adr_d = rt711_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
		.adr_d = rt1308_1_single_adr,
	},
	{
		.mask = BIT(3),
		.num_adr = ARRAY_SIZE(rt715_3_adr),
		.adr_d = rt715_3_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt711_1_adr),
		.adr_d = rt711_1_adr,
	},
	{
		.mask = BIT(2),
		.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
		.adr_d = rt1308_2_single_adr,
	},
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt715_0_adr),
		.adr_d = rt715_0_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
		.adr_d = rt711_sdca_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
		.adr_d = rt1316_1_group1_adr,
	},
	{
		.mask = BIT(2),
		.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
		.adr_d = rt1316_2_group1_adr,
	},
	{
		.mask = BIT(3),
		.num_adr = ARRAY_SIZE(rt714_3_adr),
		.adr_d = rt714_3_adr,
	},
	{}
};

static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
	{
		.mask = BIT(0),
		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
		.adr_d = rt711_sdca_0_adr,
	},
	{
		.mask = BIT(1),
		.num_adr = ARRAY_SIZE(rt1316_1_single_adr),
		.adr_d = rt1316_1_single_adr,
	},
	{
		.mask = BIT(3),
		.num_adr = ARRAY_SIZE(rt714_3_adr),
		.adr_d = rt714_3_adr,
	},
	{}
};

static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
	.num_codecs = 1,
	.codecs = {"MX98373"}
};

static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
	.num_codecs = 1,
	.codecs = {"10EC1011"}
};

static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
	.num_codecs = 2,
	.codecs = {"10EC5682", "RTL5682"},
};

static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
	.num_codecs = 1,
	.codecs = {"INTC10B0"}
};

struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
	{
		.comp_ids = &tgl_rt5682_rt5682s_hp,
		.drv_name = "tgl_mx98357_rt5682",
		.machine_quirk = snd_soc_acpi_codec_list,
		.quirk_data = &tgl_codecs,
		.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
	},
	{
		.comp_ids = &tgl_rt5682_rt5682s_hp,
		.drv_name = "tgl_mx98373_rt5682",
		.machine_quirk = snd_soc_acpi_codec_list,
		.quirk_data = &tgl_max98373_amp,
		.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
	},
	{
		.comp_ids = &tgl_rt5682_rt5682s_hp,
		.drv_name = "tgl_rt1011_rt5682",
		.machine_quirk = snd_soc_acpi_codec_list,
		.quirk_data = &tgl_rt1011_amp,
		.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
	},
	{
		.comp_ids = &essx_83x6,
		.drv_name = "sof-essx8336",
		.sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
		.tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER |
					SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
					SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
	},
	{
		.id = "10EC1308",
		.drv_name = "tgl_rt1308_hdmi_ssp",
		.machine_quirk = snd_soc_acpi_codec_list,
		.quirk_data = &tgl_lt6911_hdmi,
		.sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
	},
	{},
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);

/* this table is used when there is no I2S codec present */
struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
	/* mockup tests need to be first */
	{
		.link_mask = GENMASK(3, 0),
		.links = sdw_mockup_headset_2amps_mic,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
	},
	{
		.link_mask = BIT(0) | BIT(1) | BIT(3),
		.links = sdw_mockup_headset_1amp_mic,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
	},
	{
		.link_mask = BIT(0) | BIT(1) | BIT(2),
		.links = sdw_mockup_mic_headset_1amp,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
	},
	{
		.link_mask = 0x7,
		.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
	},
	{
		.link_mask = 0xF, /* 4 active links required */
		.links = tgl_3_in_1_default,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
	},
	{
		/*
		 * link_mask should be 0xB, but all links are enabled by BIOS.
		 * This entry will be selected if there is no rt1308 exposed
		 * on link2 since it will fail to match the above entry.
		 */
		.link_mask = 0xF,
		.links = tgl_3_in_1_mono_amp,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
	},
	{
		.link_mask = 0xF, /* 4 active links required */
		.links = tgl_3_in_1_sdca,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
	},
	{
		/*
		 * link_mask should be 0xB, but all links are enabled by BIOS.
		 * This entry will be selected if there is no rt1316 amplifier exposed
		 * on link2 since it will fail to match the above entry.
		 */

		.link_mask = 0xF, /* 4 active links required */
		.links = tgl_3_in_1_sdca_mono,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
	},

	{
		.link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
		.links = tgl_hp,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
	},
	{
		.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
		.links = tgl_rvp,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
	},
	{
		.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
		.links = tgl_chromebook_base,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
	},
	{
		.link_mask = 0x1, /* rt711 on link 0 */
		.links = tgl_rvp_headset_only,
		.drv_name = "sof_sdw",
		.sof_tplg_filename = "sof-tgl-rt711.tplg",
	},
	{},
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
Commit	Line	Data
e149ca29	1	// SPDX-License-Identifier: GPL-2.0-only
5f7af9ec	2	/*
49d411f2	3	* soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
5f7af9ec PX	4	*
	5	* Copyright (c) 2019, Intel Corporation.
	6	*
	7	*/
	8
	9	#include <sound/soc-acpi.h>
	10	#include <sound/soc-acpi-intel-match.h>
3025d398	11	#include "soc-acpi-intel-sdw-mockup-match.h"
5f7af9ec	12
1cedb6ea PLB	13	static const struct snd_soc_acpi_codecs essx_83x6 = {
	14	.num_codecs = 3,
	15	.codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
	16	};
	17
aa6cc97c	18	static const struct snd_soc_acpi_codecs tgl_codecs = {
903e9d37 SN	19	.num_codecs = 1,
	20	.codecs = {"MX98357A"}
	21	};
	22
004bd416 PLB	23	static const struct snd_soc_acpi_endpoint single_endpoint = {
	24	.num = 0,
	25	.aggregated = 0,
	26	.group_position = 0,
	27	.group_id = 0,
d985d208 PLB	28	};
d985d208 PLB	29
004bd416 PLB	30	static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
	31	.num = 0,
	32	.aggregated = 1,
	33	.group_position = 0,
	34	.group_id = 1,
	35	};
	36
	37	static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
	38	.num = 0,
	39	.aggregated = 1,
	40	.group_position = 1,
	41	.group_id = 1,
	42	};
	43
	44	static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
	45	{
0c52d3e2	46	.adr = 0x000020025D071100ull,
004bd416 PLB	47	.num_endpoints = 1,
004bd416 PLB	48	.endpoints = &single_endpoint,
f9380830	49	.name_prefix = "rt711"
004bd416 PLB	50	}
	51	};
	52
e787f5b5 BL	53	static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
e787f5b5 BL	54	{
0c52d3e2	55	.adr = 0x000120025D071100ull,
e787f5b5 BL	56	.num_endpoints = 1,
	57	.endpoints = &single_endpoint,
	58	.name_prefix = "rt711"
	59	}
	60	};
	61
6cb8bd60	62	static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
004bd416	63	{
0c52d3e2	64	.adr = 0x000120025D130800ull,
004bd416 PLB	65	.num_endpoints = 1,
004bd416 PLB	66	.endpoints = &spk_l_endpoint,
f9380830	67	.name_prefix = "rt1308-1"
004bd416 PLB	68	},
004bd416 PLB	69	{
0c52d3e2	70	.adr = 0x000122025D130800ull,
004bd416 PLB	71	.num_endpoints = 1,
004bd416 PLB	72	.endpoints = &spk_r_endpoint,
f9380830	73	.name_prefix = "rt1308-2"
004bd416	74	}
d985d208 PLB	75	};
d985d208 PLB	76
6cb8bd60 PLB	77	static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
6cb8bd60 PLB	78	{
0c52d3e2	79	.adr = 0x000120025D130800ull,
6cb8bd60 PLB	80	.num_endpoints = 1,
6cb8bd60 PLB	81	.endpoints = &single_endpoint,
f9380830	82	.name_prefix = "rt1308-1"
6cb8bd60 PLB	83	}
	84	};
	85
e787f5b5 BL	86	static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
e787f5b5 BL	87	{
0c52d3e2	88	.adr = 0x000220025D130800ull,
e787f5b5 BL	89	.num_endpoints = 1,
	90	.endpoints = &single_endpoint,
	91	.name_prefix = "rt1308-1"
	92	}
	93	};
	94
6cb8bd60 PLB	95	static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
6cb8bd60 PLB	96	{
0c52d3e2	97	.adr = 0x000120025D130800ull,
6cb8bd60 PLB	98	.num_endpoints = 1,
6cb8bd60 PLB	99	.endpoints = &spk_l_endpoint,
f9380830	100	.name_prefix = "rt1308-1"
6cb8bd60 PLB	101	}
	102	};
	103
	104	static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
	105	{
0c52d3e2	106	.adr = 0x000220025D130800ull,
6cb8bd60 PLB	107	.num_endpoints = 1,
6cb8bd60 PLB	108	.endpoints = &spk_r_endpoint,
f9380830	109	.name_prefix = "rt1308-2"
6cb8bd60 PLB	110	}
	111	};
	112
e787f5b5 BL	113	static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
e787f5b5 BL	114	{
0c52d3e2	115	.adr = 0x000021025D071500ull,
e787f5b5 BL	116	.num_endpoints = 1,
	117	.endpoints = &single_endpoint,
	118	.name_prefix = "rt715"
	119	}
	120	};
	121
6cb8bd60 PLB	122	static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
6cb8bd60 PLB	123	{
0c52d3e2	124	.adr = 0x000320025D071500ull,
6cb8bd60 PLB	125	.num_endpoints = 1,
6cb8bd60 PLB	126	.endpoints = &single_endpoint,
f9380830	127	.name_prefix = "rt715"
6cb8bd60 PLB	128	}
	129	};
	130
55caf370 NM	131	static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
55caf370 NM	132	{
0c52d3e2	133	.adr = 0x000123019F837300ull,
55caf370	134	.num_endpoints = 1,
97326be1	135	.endpoints = &spk_r_endpoint,
f9380830	136	.name_prefix = "Right"
55caf370 NM	137	},
55caf370 NM	138	{
0c52d3e2	139	.adr = 0x000127019F837300ull,
55caf370	140	.num_endpoints = 1,
97326be1	141	.endpoints = &spk_l_endpoint,
f9380830	142	.name_prefix = "Left"
55caf370 NM	143	}
	144	};
	145
095ee719 NM	146	static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
095ee719 NM	147	{
0c52d3e2	148	.adr = 0x000021025D568200ull,
095ee719 NM	149	.num_endpoints = 1,
095ee719 NM	150	.endpoints = &single_endpoint,
f9380830	151	.name_prefix = "rt5682"
095ee719 NM	152	}
	153	};
	154
44751fc5 PLB	155	static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
44751fc5 PLB	156	{
0c52d3e2	157	.adr = 0x000030025D071101ull,
44751fc5 PLB	158	.num_endpoints = 1,
44751fc5 PLB	159	.endpoints = &single_endpoint,
f9380830	160	.name_prefix = "rt711"
44751fc5 PLB	161	}
	162	};
	163
f2470679 PLB	164	static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
	165	{
	166	.adr = 0x000131025D131601ull,
	167	.num_endpoints = 1,
	168	.endpoints = &single_endpoint,
	169	.name_prefix = "rt1316-1"
	170	}
	171	};
	172
44751fc5 PLB	173	static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
44751fc5 PLB	174	{
0c52d3e2	175	.adr = 0x000131025D131601ull, /* unique ID is set for some reason */
44751fc5 PLB	176	.num_endpoints = 1,
44751fc5 PLB	177	.endpoints = &spk_l_endpoint,
f9380830	178	.name_prefix = "rt1316-1"
44751fc5 PLB	179	}
	180	};
	181
	182	static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
	183	{
0c52d3e2	184	.adr = 0x000230025D131601ull,
44751fc5 PLB	185	.num_endpoints = 1,
44751fc5 PLB	186	.endpoints = &spk_r_endpoint,
f9380830	187	.name_prefix = "rt1316-2"
44751fc5 PLB	188	}
	189	};
	190
	191	static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
	192	{
0c52d3e2	193	.adr = 0x000330025D071401ull,
44751fc5 PLB	194	.num_endpoints = 1,
44751fc5 PLB	195	.endpoints = &single_endpoint,
f9380830	196	.name_prefix = "rt714"
44751fc5 PLB	197	}
	198	};
	199
d985d208 PLB	200	static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
	201	{
	202	.mask = BIT(0),
	203	.num_adr = ARRAY_SIZE(rt711_0_adr),
004bd416	204	.adr_d = rt711_0_adr,
d985d208 PLB	205	},
	206	{
	207	.mask = BIT(1),
6cb8bd60 PLB	208	.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
6cb8bd60 PLB	209	.adr_d = rt1308_1_dual_adr,
d985d208 PLB	210	},
	211	{}
	212	};
	213
f99acc25 GS	214	static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
	215	{
	216	.mask = BIT(0),
	217	.num_adr = ARRAY_SIZE(rt711_0_adr),
	218	.adr_d = rt711_0_adr,
	219	},
	220	{}
	221	};
	222
717a8fdd PLB	223	static const struct snd_soc_acpi_link_adr tgl_hp[] = {
	224	{
	225	.mask = BIT(0),
	226	.num_adr = ARRAY_SIZE(rt711_0_adr),
	227	.adr_d = rt711_0_adr,
	228	},
	229	{
	230	.mask = BIT(1),
	231	.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
	232	.adr_d = rt1308_1_single_adr,
	233	},
	234	{}
	235	};
	236
095ee719 NM	237	static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
	238	{
	239	.mask = BIT(0),
	240	.num_adr = ARRAY_SIZE(rt5682_0_adr),
	241	.adr_d = rt5682_0_adr,
	242	},
55caf370 NM	243	{
	244	.mask = BIT(1),
	245	.num_adr = ARRAY_SIZE(mx8373_1_adr),
	246	.adr_d = mx8373_1_adr,
	247	},
095ee719 NM	248	{}
	249	};
	250
6cb8bd60 PLB	251	static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
	252	{
	253	.mask = BIT(0),
	254	.num_adr = ARRAY_SIZE(rt711_0_adr),
	255	.adr_d = rt711_0_adr,
	256	},
	257	{
	258	.mask = BIT(1),
	259	.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
	260	.adr_d = rt1308_1_group1_adr,
	261	},
	262	{
	263	.mask = BIT(2),
	264	.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
	265	.adr_d = rt1308_2_group1_adr,
	266	},
	267	{
	268	.mask = BIT(3),
	269	.num_adr = ARRAY_SIZE(rt715_3_adr),
	270	.adr_d = rt715_3_adr,
	271	},
	272	{}
	273	};
	274
	275	static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
	276	{
	277	.mask = BIT(0),
	278	.num_adr = ARRAY_SIZE(rt711_0_adr),
	279	.adr_d = rt711_0_adr,
	280	},
	281	{
	282	.mask = BIT(1),
	283	.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
	284	.adr_d = rt1308_1_single_adr,
	285	},
	286	{
	287	.mask = BIT(3),
	288	.num_adr = ARRAY_SIZE(rt715_3_adr),
	289	.adr_d = rt715_3_adr,
	290	},
	291	{}
	292	};
	293
e787f5b5 BL	294	static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
	295	{
	296	.mask = BIT(1),
	297	.num_adr = ARRAY_SIZE(rt711_1_adr),
	298	.adr_d = rt711_1_adr,
	299	},
	300	{
	301	.mask = BIT(2),
	302	.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
	303	.adr_d = rt1308_2_single_adr,
	304	},
	305	{
	306	.mask = BIT(0),
	307	.num_adr = ARRAY_SIZE(rt715_0_adr),
	308	.adr_d = rt715_0_adr,
	309	},
	310	{}
	311	};
	312
44751fc5 PLB	313	static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
	314	{
	315	.mask = BIT(0),
	316	.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
	317	.adr_d = rt711_sdca_0_adr,
	318	},
	319	{
	320	.mask = BIT(1),
	321	.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
	322	.adr_d = rt1316_1_group1_adr,
	323	},
	324	{
	325	.mask = BIT(2),
	326	.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
	327	.adr_d = rt1316_2_group1_adr,
	328	},
	329	{
	330	.mask = BIT(3),
	331	.num_adr = ARRAY_SIZE(rt714_3_adr),
	332	.adr_d = rt714_3_adr,
	333	},
	334	{}
	335	};
	336
f2470679 PLB	337	static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
	338	{
	339	.mask = BIT(0),
	340	.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
	341	.adr_d = rt711_sdca_0_adr,
	342	},
	343	{
	344	.mask = BIT(1),
	345	.num_adr = ARRAY_SIZE(rt1316_1_single_adr),
	346	.adr_d = rt1316_1_single_adr,
	347	},
	348	{
	349	.mask = BIT(3),
	350	.num_adr = ARRAY_SIZE(rt714_3_adr),
	351	.adr_d = rt714_3_adr,
	352	},
	353	{}
	354	};
	355
aa6cc97c	356	static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
eb1006c6 SN	357	.num_codecs = 1,
	358	.codecs = {"MX98373"}
	359	};
	360
aa6cc97c BL	361	static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
	362	.num_codecs = 1,
	363	.codecs = {"10EC1011"}
	364	};
	365
d4f3fdc2 BL	366	static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
	367	.num_codecs = 2,
	368	.codecs = {"10EC5682", "RTL5682"},
	369	};
	370
da793fb0	371	static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
	372	.num_codecs = 1,
	373	.codecs = {"INTC10B0"}
	374	};
	375
5f7af9ec	376	struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
903e9d37	377	{
d4f3fdc2	378	.comp_ids = &tgl_rt5682_rt5682s_hp,
3c561a09	379	.drv_name = "tgl_mx98357_rt5682",
903e9d37 SN	380	.machine_quirk = snd_soc_acpi_codec_list,
903e9d37 SN	381	.quirk_data = &tgl_codecs,
903e9d37 SN	382	.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
903e9d37 SN	383	},
eb1006c6	384	{
d4f3fdc2	385	.comp_ids = &tgl_rt5682_rt5682s_hp,
590cfb08	386	.drv_name = "tgl_mx98373_rt5682",
eb1006c6 SN	387	.machine_quirk = snd_soc_acpi_codec_list,
eb1006c6 SN	388	.quirk_data = &tgl_max98373_amp,
eb1006c6 SN	389	.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
eb1006c6 SN	390	},
aa6cc97c	391	{
d4f3fdc2	392	.comp_ids = &tgl_rt5682_rt5682s_hp,
aa6cc97c BL	393	.drv_name = "tgl_rt1011_rt5682",
	394	.machine_quirk = snd_soc_acpi_codec_list,
	395	.quirk_data = &tgl_rt1011_amp,
aa6cc97c BL	396	.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
aa6cc97c BL	397	},
790049fb	398	{
1cedb6ea	399	.comp_ids = &essx_83x6,
790049fb	400	.drv_name = "sof-essx8336",
4694b838 PLB	401	.sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
	402	.tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER \|
	403	SND_SOC_ACPI_TPLG_INTEL_SSP_MSB \|
	404	SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
790049fb	405	},
da793fb0	406	{
	407	.id = "10EC1308",
	408	.drv_name = "tgl_rt1308_hdmi_ssp",
	409	.machine_quirk = snd_soc_acpi_codec_list,
	410	.quirk_data = &tgl_lt6911_hdmi,
	411	.sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
	412	},
5f7af9ec PX	413	{},
	414	};
	415	EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
	416
d985d208 PLB	417	/* this table is used when there is no I2S codec present */
d985d208 PLB	418	struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
3025d398 PLB	419	/* mockup tests need to be first */
	420	{
	421	.link_mask = GENMASK(3, 0),
	422	.links = sdw_mockup_headset_2amps_mic,
	423	.drv_name = "sof_sdw",
3025d398 PLB	424	.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
	425	},
	426	{
	427	.link_mask = BIT(0) \| BIT(1) \| BIT(3),
	428	.links = sdw_mockup_headset_1amp_mic,
	429	.drv_name = "sof_sdw",
3025d398 PLB	430	.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
	431	},
	432	{
	433	.link_mask = BIT(0) \| BIT(1) \| BIT(2),
	434	.links = sdw_mockup_mic_headset_1amp,
	435	.drv_name = "sof_sdw",
3025d398 PLB	436	.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
3025d398 PLB	437	},
e787f5b5 BL	438	{
	439	.link_mask = 0x7,
	440	.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
	441	.drv_name = "sof_sdw",
e787f5b5 BL	442	.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
e787f5b5 BL	443	},
6cb8bd60 PLB	444	{
	445	.link_mask = 0xF, /* 4 active links required */
	446	.links = tgl_3_in_1_default,
	447	.drv_name = "sof_sdw",
6cb8bd60 PLB	448	.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
	449	},
	450	{
	451	/*
	452	* link_mask should be 0xB, but all links are enabled by BIOS.
	453	* This entry will be selected if there is no rt1308 exposed
	454	* on link2 since it will fail to match the above entry.
	455	*/
	456	.link_mask = 0xF,
	457	.links = tgl_3_in_1_mono_amp,
	458	.drv_name = "sof_sdw",
6cb8bd60 PLB	459	.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
6cb8bd60 PLB	460	},
44751fc5 PLB	461	{
	462	.link_mask = 0xF, /* 4 active links required */
	463	.links = tgl_3_in_1_sdca,
	464	.drv_name = "sof_sdw",
44751fc5 PLB	465	.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
44751fc5 PLB	466	},
f2470679 PLB	467	{
	468	/*
	469	* link_mask should be 0xB, but all links are enabled by BIOS.
	470	* This entry will be selected if there is no rt1316 amplifier exposed
	471	* on link2 since it will fail to match the above entry.
	472	*/
	473
	474	.link_mask = 0xF, /* 4 active links required */
	475	.links = tgl_3_in_1_sdca_mono,
	476	.drv_name = "sof_sdw",
	477	.sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
	478	},
	479
717a8fdd PLB	480	{
	481	.link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
	482	.links = tgl_hp,
	483	.drv_name = "sof_sdw",
	484	.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
	485	},
d985d208 PLB	486	{
	487	.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
	488	.links = tgl_rvp,
ba762e67	489	.drv_name = "sof_sdw",
d985d208 PLB	490	.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
d985d208 PLB	491	},
55caf370 NM	492	{
	493	.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
	494	.links = tgl_chromebook_base,
	495	.drv_name = "sof_sdw",
55caf370 NM	496	.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
55caf370 NM	497	},
f99acc25 GS	498	{
	499	.link_mask = 0x1, /* rt711 on link 0 */
	500	.links = tgl_rvp_headset_only,
	501	.drv_name = "sof_sdw",
	502	.sof_tplg_filename = "sof-tgl-rt711.tplg",
	503	},
d985d208 PLB	504	{},
	505	};
	506	EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);