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ASoC: Intel: bytcr_rt5640: Convert to use acpi_dev_get_first_match_dev()
[linux-2.6-block.git] / sound / soc / intel / boards / bytcr_rt5651.c
CommitLineData
2bd5bd15
PLB		 1/*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
46058aeb 21#include <linux/i2c.h>
2bd5bd15
PLB		 22#include <linux/module.h>
23#include <linux/platform_device.h>
46058aeb 24#include <linux/property.h>
2bd5bd15 25#include <linux/acpi.h>
02c0a3b3 26#include <linux/clk.h>
2bd5bd15
PLB		 27#include <linux/device.h>
28#include <linux/dmi.h>
caed9d63 29#include <linux/input.h>
5f6fb23d
HG		 30#include <linux/gpio/consumer.h>
31#include <linux/gpio/machine.h>
2bd5bd15 32#include <linux/slab.h>
8a880a20 33#include <asm/cpu_device_id.h>
fbea16db 34#include <asm/intel-family.h>
2bd5bd15
PLB		 35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
38#include <sound/jack.h>
7feb2f78 39#include <sound/soc-acpi.h>
2bd5bd15
PLB		 40#include "../../codecs/rt5651.h"
41#include "../atom/sst-atom-controls.h"
02c0a3b3
PLB		 42
43enum {
44 BYT_RT5651_DMIC_MAP,
45 BYT_RT5651_IN1_MAP,
ac275ee5 46 BYT_RT5651_IN2_MAP,
ea261bd0 47 BYT_RT5651_IN1_IN2_MAP,
02c0a3b3
PLB		 48};
49
46058aeb
HG		 50enum {
51 BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4),
52 BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4),
53 BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4),
54 BYT_RT5651_JD2 = (RT5651_JD2 << 4),
55};
56
8ffaa6a1
HG		 57enum {
58 BYT_RT5651_OVCD_TH_600UA = (6 << 8),
59 BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
60 BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
61};
62
63enum {
64 BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13),
65 BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13),
66 BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13),
67 BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13),
68};
69
46058aeb
HG		 70#define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0))
71#define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4)
8ffaa6a1
HG		 72#define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8)
73#define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13)
46058aeb
HG		 74#define BYT_RT5651_DMIC_EN BIT(16)
75#define BYT_RT5651_MCLK_EN BIT(17)
76#define BYT_RT5651_MCLK_25MHZ BIT(18)
8a880a20
HG		 77#define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */
78#define BYT_RT5651_SSP0_AIF1 BIT(20)
79#define BYT_RT5651_SSP0_AIF2 BIT(21)
8f250e70 80#define BYT_RT5651_HP_LR_SWAPPED BIT(22)
a0d1d867 81#define BYT_RT5651_MONO_SPEAKER BIT(23)
46058aeb 82
fc7c460f
HG		 83#define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \
84 BYT_RT5651_JD1_1 | \
85 BYT_RT5651_OVCD_TH_2000UA | \
86 BYT_RT5651_OVCD_SF_0P75)
87
8ffaa6a1
HG		 88/* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
89#define MAX_NO_PROPS 5
02c0a3b3
PLB		 90
91struct byt_rt5651_private {
92 struct clk *mclk;
5f6fb23d 93 struct gpio_desc *ext_amp_gpio;
90768eaf 94 struct gpio_desc *hp_detect;
d9f8f9b2 95 struct snd_soc_jack jack;
02c0a3b3
PLB		 96};
97
fee3e1cb
HG		 98static const struct acpi_gpio_mapping *byt_rt5651_gpios;
99
ac275ee5 100/* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */
fc7c460f 101static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 102 BYT_RT5651_IN2_MAP;
02c0a3b3 103
7eb18731
HG		 104static unsigned int quirk_override;
105module_param_named(quirk, quirk_override, uint, 0444);
106MODULE_PARM_DESC(quirk, "Board-specific quirk override");
107
02c0a3b3
PLB		 108static void log_quirks(struct device *dev)
109{
110 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
111 dev_info(dev, "quirk DMIC_MAP enabled");
112 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
113 dev_info(dev, "quirk IN1_MAP enabled");
ac275ee5
HG		 114 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
115 dev_info(dev, "quirk IN2_MAP enabled");
366780df
HG		 116 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP)
117 dev_info(dev, "quirk IN1_IN2_MAP enabled");
8ffaa6a1 118 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
46058aeb
HG		 119 dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
120 BYT_RT5651_JDSRC(byt_rt5651_quirk));
8ffaa6a1
HG		 121 dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
122 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
123 dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
124 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
125 }
02c0a3b3
PLB		 126 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
127 dev_info(dev, "quirk DMIC enabled");
128 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
129 dev_info(dev, "quirk MCLK_EN enabled");
130 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
131 dev_info(dev, "quirk MCLK_25MHZ enabled");
8a880a20
HG		 132 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
133 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
134 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
135 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
136 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
137 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
a0d1d867
HG		 138 if (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER)
139 dev_info(dev, "quirk MONO_SPEAKER enabled\n");
02c0a3b3
PLB		 140}
141
142#define BYT_CODEC_DAI1 "rt5651-aif1"
8a880a20 143#define BYT_CODEC_DAI2 "rt5651-aif2"
02c0a3b3 144
aeec6cc0
HG		 145static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
146 int rate, int bclk_ratio)
147{
148 int clk_id, clk_freq, ret;
149
150 /* Configure the PLL before selecting it */
151 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
152 clk_id = RT5651_PLL1_S_BCLK1,
153 clk_freq = rate * bclk_ratio;
154 } else {
155 clk_id = RT5651_PLL1_S_MCLK;
156 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
157 clk_freq = 25000000;
158 else
159 clk_freq = 19200000;
160 }
161 ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
162 if (ret < 0) {
2759ba9b 163 dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
aeec6cc0
HG		 164 return ret;
165 }
166
167 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
168 rate * 512, SND_SOC_CLOCK_IN);
169 if (ret < 0) {
2759ba9b 170 dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
aeec6cc0
HG		 171 return ret;
172 }
173
174 return 0;
175}
176
02c0a3b3
PLB		 177static int platform_clock_control(struct snd_soc_dapm_widget *w,
178 struct snd_kcontrol *k, int event)
179{
180 struct snd_soc_dapm_context *dapm = w->dapm;
181 struct snd_soc_card *card = dapm->card;
182 struct snd_soc_dai *codec_dai;
183 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
184 int ret;
185
dfb6ec7a 186 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
8a880a20
HG		 187 if (!codec_dai)
188 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
02c0a3b3
PLB		 189 if (!codec_dai) {
190 dev_err(card->dev,
191 "Codec dai not found; Unable to set platform clock\n");
192 return -EIO;
193 }
194
195 if (SND_SOC_DAPM_EVENT_ON(event)) {
196 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
197 ret = clk_prepare_enable(priv->mclk);
198 if (ret < 0) {
199 dev_err(card->dev,
200 "could not configure MCLK state");
201 return ret;
202 }
203 }
aeec6cc0 204 ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
02c0a3b3
PLB		 205 } else {
206 /*
207 * Set codec clock source to internal clock before
208 * turning off the platform clock. Codec needs clock
209 * for Jack detection and button press
210 */
211 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
212 48000 * 512,
213 SND_SOC_CLOCK_IN);
214 if (!ret)
215 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
216 clk_disable_unprepare(priv->mclk);
217 }
218
219 if (ret < 0) {
220 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
221 return ret;
222 }
223
224 return 0;
225}
2bd5bd15 226
5f6fb23d
HG		 227static int rt5651_ext_amp_power_event(struct snd_soc_dapm_widget *w,
228 struct snd_kcontrol *kcontrol, int event)
229{
230 struct snd_soc_card *card = w->dapm->card;
231 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
232
233 if (SND_SOC_DAPM_EVENT_ON(event))
234 gpiod_set_value_cansleep(priv->ext_amp_gpio, 1);
235 else
236 gpiod_set_value_cansleep(priv->ext_amp_gpio, 0);
237
238 return 0;
239}
240
2bd5bd15
PLB		 241static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
242 SND_SOC_DAPM_HP("Headphone", NULL),
243 SND_SOC_DAPM_MIC("Headset Mic", NULL),
244 SND_SOC_DAPM_MIC("Internal Mic", NULL),
245 SND_SOC_DAPM_SPK("Speaker", NULL),
ea39bdcf 246 SND_SOC_DAPM_LINE("Line In", NULL),
02c0a3b3
PLB		 247 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
248 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
249 SND_SOC_DAPM_POST_PMD),
5f6fb23d
HG		 250 SND_SOC_DAPM_SUPPLY("Ext Amp Power", SND_SOC_NOPM, 0, 0,
251 rt5651_ext_amp_power_event,
252 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2bd5bd15
PLB		 253};
254
255static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
02c0a3b3
PLB		 256 {"Headphone", NULL, "Platform Clock"},
257 {"Headset Mic", NULL, "Platform Clock"},
258 {"Internal Mic", NULL, "Platform Clock"},
259 {"Speaker", NULL, "Platform Clock"},
5f6fb23d 260 {"Speaker", NULL, "Ext Amp Power"},
ea39bdcf 261 {"Line In", NULL, "Platform Clock"},
02c0a3b3 262
2bd5bd15 263 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
2bd5bd15
PLB		 264 {"Headphone", NULL, "HPOL"},
265 {"Headphone", NULL, "HPOR"},
266 {"Speaker", NULL, "LOUTL"},
267 {"Speaker", NULL, "LOUTR"},
ea39bdcf
PLB		 268 {"IN2P", NULL, "Line In"},
269 {"IN2N", NULL, "Line In"},
270
2bd5bd15
PLB		 271};
272
6356c78c
PLB		 273static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
274 {"DMIC L1", NULL, "Internal Mic"},
275 {"DMIC R1", NULL, "Internal Mic"},
aee48a9f 276 {"IN2P", NULL, "Headset Mic"},
2bd5bd15
PLB		 277};
278
279static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
280 {"Internal Mic", NULL, "micbias1"},
281 {"IN1P", NULL, "Internal Mic"},
de231479 282 {"IN3P", NULL, "Headset Mic"},
2bd5bd15
PLB		 283};
284
ac275ee5
HG		 285static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
286 {"Internal Mic", NULL, "micbias1"},
287 {"IN2P", NULL, "Internal Mic"},
288 {"IN3P", NULL, "Headset Mic"},
289};
290
ea261bd0
CC		 291static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
292 {"Internal Mic", NULL, "micbias1"},
293 {"IN1P", NULL, "Internal Mic"},
294 {"IN2P", NULL, "Internal Mic"},
295 {"IN3P", NULL, "Headset Mic"},
296};
297
8a880a20
HG		 298static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
299 {"ssp0 Tx", NULL, "modem_out"},
300 {"modem_in", NULL, "ssp0 Rx"},
301
302 {"AIF1 Playback", NULL, "ssp0 Tx"},
303 {"ssp0 Rx", NULL, "AIF1 Capture"},
304};
305
306static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
307 {"ssp0 Tx", NULL, "modem_out"},
308 {"modem_in", NULL, "ssp0 Rx"},
309
310 {"AIF2 Playback", NULL, "ssp0 Tx"},
311 {"ssp0 Rx", NULL, "AIF2 Capture"},
312};
313
314static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
315 {"ssp2 Tx", NULL, "codec_out0"},
316 {"ssp2 Tx", NULL, "codec_out1"},
317 {"codec_in0", NULL, "ssp2 Rx"},
318 {"codec_in1", NULL, "ssp2 Rx"},
319
320 {"AIF1 Playback", NULL, "ssp2 Tx"},
321 {"ssp2 Rx", NULL, "AIF1 Capture"},
322};
323
324static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
325 {"ssp2 Tx", NULL, "codec_out0"},
326 {"ssp2 Tx", NULL, "codec_out1"},
327 {"codec_in0", NULL, "ssp2 Rx"},
328 {"codec_in1", NULL, "ssp2 Rx"},
329
330 {"AIF2 Playback", NULL, "ssp2 Tx"},
331 {"ssp2 Rx", NULL, "AIF2 Capture"},
332};
333
2bd5bd15
PLB		 334static const struct snd_kcontrol_new byt_rt5651_controls[] = {
335 SOC_DAPM_PIN_SWITCH("Headphone"),
336 SOC_DAPM_PIN_SWITCH("Headset Mic"),
337 SOC_DAPM_PIN_SWITCH("Internal Mic"),
338 SOC_DAPM_PIN_SWITCH("Speaker"),
ea39bdcf 339 SOC_DAPM_PIN_SWITCH("Line In"),
2bd5bd15
PLB		 340};
341
d9f8f9b2
CC		 342static struct snd_soc_jack_pin bytcr_jack_pins[] = {
343 {
344 .pin = "Headphone",
345 .mask = SND_JACK_HEADPHONE,
346 },
347 {
348 .pin = "Headset Mic",
349 .mask = SND_JACK_MICROPHONE,
350 },
351};
352
2bd5bd15
PLB		 353static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
354 struct snd_pcm_hw_params *params)
355{
356 struct snd_soc_pcm_runtime *rtd = substream->private_data;
357 struct snd_soc_dai *codec_dai = rtd->codec_dai;
8a880a20 358 snd_pcm_format_t format = params_format(params);
aeec6cc0 359 int rate = params_rate(params);
8a880a20 360 int bclk_ratio;
2bd5bd15 361
8a880a20
HG		 362 if (format == SNDRV_PCM_FORMAT_S16_LE)
363 bclk_ratio = 32;
364 else
365 bclk_ratio = 50;
366
367 return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
2bd5bd15
PLB		 368}
369
fee3e1cb
HG		 370static const struct acpi_gpio_params pov_p1006w_hp_detect = { 1, 0, false };
371static const struct acpi_gpio_params pov_p1006w_ext_amp_en = { 2, 0, true };
372
373static const struct acpi_gpio_mapping byt_rt5651_pov_p1006w_gpios[] = {
374 { "hp-detect-gpios", &pov_p1006w_hp_detect, 1, },
375 { "ext-amp-enable-gpios", &pov_p1006w_ext_amp_en, 1, },
376 { },
377};
378
379static int byt_rt5651_pov_p1006w_quirk_cb(const struct dmi_system_id *id)
380{
381 byt_rt5651_quirk = (unsigned long)id->driver_data;
382 byt_rt5651_gpios = byt_rt5651_pov_p1006w_gpios;
383 return 1;
384}
385
02c0a3b3
PLB		 386static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
387{
388 byt_rt5651_quirk = (unsigned long)id->driver_data;
389 return 1;
390}
391
2bd5bd15 392static const struct dmi_system_id byt_rt5651_quirk_table[] = {
02c0a3b3 393 {
55d69c03 394 /* Chuwi Hi8 Pro (CWI513) */
02c0a3b3
PLB		 395 .callback = byt_rt5651_quirk_cb,
396 .matches = {
55d69c03
HG		 397 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
398 DMI_MATCH(DMI_PRODUCT_NAME, "X1D3_C806N"),
02c0a3b3 399 },
55d69c03 400 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 401 BYT_RT5651_IN2_MAP |
a0d1d867
HG		 402 BYT_RT5651_HP_LR_SWAPPED |
403 BYT_RT5651_MONO_SPEAKER),
02c0a3b3 404 },
416f2b51 405 {
55d69c03 406 /* Chuwi Vi8 Plus (CWI519) */
416f2b51
PLB		 407 .callback = byt_rt5651_quirk_cb,
408 .matches = {
55d69c03
HG		 409 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
410 DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
416f2b51 411 },
55d69c03 412 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 413 BYT_RT5651_IN2_MAP |
a0d1d867
HG		 414 BYT_RT5651_HP_LR_SWAPPED |
415 BYT_RT5651_MONO_SPEAKER),
416f2b51 416 },
06aa6e51
HG		 417 {
418 /* I.T.Works TW701, Ployer Momo7w and Trekstor ST70416-6
419 * (these all use the same mainboard) */
420 .callback = byt_rt5651_quirk_cb,
421 .matches = {
422 DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
423 /* Partial match for all of itWORKS.G.WI71C.JGBMRBA,
424 * TREK.G.WI71C.JGBMRBA0x and MOMO.G.WI71C.MABMRBA02 */
425 DMI_MATCH(DMI_BIOS_VERSION, ".G.WI71C."),
426 },
427 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
428 BYT_RT5651_IN2_MAP |
429 BYT_RT5651_SSP0_AIF1 |
430 BYT_RT5651_MONO_SPEAKER),
431 },
2fe30129 432 {
55d69c03 433 /* KIANO SlimNote 14.2 */
2fe30129
CC		 434 .callback = byt_rt5651_quirk_cb,
435 .matches = {
436 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
437 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
438 },
fc7c460f 439 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
56e49aa4 440 BYT_RT5651_IN1_IN2_MAP),
2fe30129 441 },
8f250e70 442 {
55d69c03 443 /* Minnowboard Max B3 */
8f250e70
HG		 444 .callback = byt_rt5651_quirk_cb,
445 .matches = {
55d69c03
HG		 446 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
447 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
8f250e70 448 },
55d69c03 449 .driver_data = (void *)(BYT_RT5651_IN1_MAP),
8f250e70 450 },
f026e063 451 {
55d69c03 452 /* Minnowboard Turbot */
f026e063
HG		 453 .callback = byt_rt5651_quirk_cb,
454 .matches = {
55d69c03
HG		 455 DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
456 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
f026e063 457 },
55d69c03
HG		 458 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
459 BYT_RT5651_IN1_MAP),
f026e063 460 },
fee3e1cb
HG		 461 {
462 /* Point of View mobii wintab p1006w (v1.0) */
463 .callback = byt_rt5651_pov_p1006w_quirk_cb,
464 .matches = {
465 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Insyde"),
466 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "BayTrail"),
467 /* Note 105b is Foxcon's USB/PCI vendor id */
468 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "105B"),
469 DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"),
470 },
471 .driver_data = (void *)(BYT_RT5651_DMIC_MAP |
472 BYT_RT5651_OVCD_TH_2000UA |
473 BYT_RT5651_OVCD_SF_0P75 |
474 BYT_RT5651_DMIC_EN |
475 BYT_RT5651_MCLK_EN |
476 BYT_RT5651_SSP0_AIF1),
477 },
f9877eb5
HG		 478 {
479 /* VIOS LTH17 */
480 .callback = byt_rt5651_quirk_cb,
481 .matches = {
482 DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
483 DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
484 },
8627fb25
HG		 485 .driver_data = (void *)(BYT_RT5651_IN1_IN2_MAP |
486 BYT_RT5651_JD1_1 |
487 BYT_RT5651_OVCD_TH_2000UA |
488 BYT_RT5651_OVCD_SF_1P0 |
489 BYT_RT5651_MCLK_EN),
f9877eb5 490 },
06aa6e51
HG		 491 {
492 /* Yours Y8W81 (and others using the same mainboard) */
493 .callback = byt_rt5651_quirk_cb,
494 .matches = {
495 DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
496 /* Partial match for all devs with a W86C mainboard */
497 DMI_MATCH(DMI_BIOS_VERSION, ".F.W86C."),
498 },
499 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
500 BYT_RT5651_IN2_MAP |
501 BYT_RT5651_SSP0_AIF1 |
502 BYT_RT5651_MONO_SPEAKER),
503 },
2bd5bd15
PLB		 504 {}
505};
506
46058aeb
HG		 507/*
508 * Note this MUST be called before snd_soc_register_card(), so that the props
509 * are in place before the codec component driver's probe function parses them.
510 */
2c375204 511static int byt_rt5651_add_codec_device_props(struct device *i2c_dev)
46058aeb
HG		 512{
513 struct property_entry props[MAX_NO_PROPS] = {};
2c375204 514 int cnt = 0;
46058aeb
HG		 515
516 props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
517 BYT_RT5651_JDSRC(byt_rt5651_quirk));
518
8ffaa6a1
HG		 519 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
520 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
521
522 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
523 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
524
c2f26938
HG		 525 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
526 props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
527
2c375204 528 return device_add_properties(i2c_dev, props);
46058aeb
HG		 529}
530
2bd5bd15
PLB		 531static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
532{
2bd5bd15 533 struct snd_soc_card *card = runtime->card;
17b52010 534 struct snd_soc_component *codec = runtime->codec_dai->component;
02c0a3b3 535 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
2bd5bd15
PLB		 536 const struct snd_soc_dapm_route *custom_map;
537 int num_routes;
90768eaf 538 int report;
02c0a3b3 539 int ret;
2bd5bd15
PLB		 540
541 card->dapm.idle_bias_off = true;
542
c22969d7
HG		 543 /* Start with RC clk for jack-detect (we disable MCLK below) */
544 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
545 snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
546 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
547
2bd5bd15
PLB		 548 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
549 case BYT_RT5651_IN1_MAP:
550 custom_map = byt_rt5651_intmic_in1_map;
551 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
552 break;
ac275ee5
HG		 553 case BYT_RT5651_IN2_MAP:
554 custom_map = byt_rt5651_intmic_in2_map;
555 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
556 break;
ea261bd0
CC		 557 case BYT_RT5651_IN1_IN2_MAP:
558 custom_map = byt_rt5651_intmic_in1_in2_map;
559 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
560 break;
2bd5bd15 561 default:
6356c78c
PLB		 562 custom_map = byt_rt5651_intmic_dmic_map;
563 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
2bd5bd15 564 }
6356c78c
PLB		 565 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
566 if (ret)
567 return ret;
2bd5bd15 568
8a880a20
HG		 569 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
570 ret = snd_soc_dapm_add_routes(&card->dapm,
571 byt_rt5651_ssp2_aif2_map,
572 ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
573 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
574 ret = snd_soc_dapm_add_routes(&card->dapm,
575 byt_rt5651_ssp0_aif1_map,
576 ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
577 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
578 ret = snd_soc_dapm_add_routes(&card->dapm,
579 byt_rt5651_ssp0_aif2_map,
580 ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
581 } else {
582 ret = snd_soc_dapm_add_routes(&card->dapm,
583 byt_rt5651_ssp2_aif1_map,
584 ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
585 }
586 if (ret)
587 return ret;
588
2bd5bd15
PLB		 589 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
590 ARRAY_SIZE(byt_rt5651_controls));
591 if (ret) {
592 dev_err(card->dev, "unable to add card controls\n");
593 return ret;
594 }
595 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
596 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
597
02c0a3b3
PLB		 598 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
599 /*
600 * The firmware might enable the clock at
601 * boot (this information may or may not
602 * be reflected in the enable clock register).
603 * To change the rate we must disable the clock
604 * first to cover these cases. Due to common
605 * clock framework restrictions that do not allow
606 * to disable a clock that has not been enabled,
607 * we need to enable the clock first.
608 */
609 ret = clk_prepare_enable(priv->mclk);
610 if (!ret)
611 clk_disable_unprepare(priv->mclk);
612
613 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
614 ret = clk_set_rate(priv->mclk, 25000000);
615 else
616 ret = clk_set_rate(priv->mclk, 19200000);
617
618 if (ret)
619 dev_err(card->dev, "unable to set MCLK rate\n");
620 }
621
90768eaf
HG		 622 report = 0;
623 if (BYT_RT5651_JDSRC(byt_rt5651_quirk))
624 report = SND_JACK_HEADSET | SND_JACK_BTN_0;
625 else if (priv->hp_detect)
626 report = SND_JACK_HEADSET;
627
628 if (report) {
aed859a2 629 ret = snd_soc_card_jack_new(runtime->card, "Headset",
90768eaf 630 report, &priv->jack, bytcr_jack_pins,
caed9d63 631 ARRAY_SIZE(bytcr_jack_pins));
aed859a2
HG		 632 if (ret) {
633 dev_err(runtime->dev, "jack creation failed %d\n", ret);
634 return ret;
635 }
d9f8f9b2 636
90768eaf
HG		 637 if (report & SND_JACK_BTN_0)
638 snd_jack_set_key(priv->jack.jack, SND_JACK_BTN_0,
639 KEY_PLAYPAUSE);
caed9d63 640
90768eaf
HG		 641 ret = snd_soc_component_set_jack(codec, &priv->jack,
642 priv->hp_detect);
aed859a2
HG		 643 if (ret)
644 return ret;
645 }
d9f8f9b2 646
aed859a2 647 return 0;
2bd5bd15
PLB		 648}
649
650static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
651 .formats = SNDRV_PCM_FMTBIT_S24_LE,
652 .rate_min = 48000,
653 .rate_max = 48000,
654 .channels_min = 2,
655 .channels_max = 2,
656};
657
658static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
659 struct snd_pcm_hw_params *params)
660{
661 struct snd_interval *rate = hw_param_interval(params,
662 SNDRV_PCM_HW_PARAM_RATE);
663 struct snd_interval *channels = hw_param_interval(params,
664 SNDRV_PCM_HW_PARAM_CHANNELS);
8a880a20 665 int ret, bits;
2bd5bd15 666
8a880a20 667 /* The DSP will covert the FE rate to 48k, stereo */
2bd5bd15
PLB		 668 rate->min = rate->max = 48000;
669 channels->min = channels->max = 2;
670
8a880a20
HG		 671 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
672 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
673 /* set SSP0 to 16-bit */
674 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
675 bits = 16;
676 } else {
677 /* set SSP2 to 24-bit */
678 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
679 bits = 24;
680 }
2bd5bd15
PLB		 681
682 /*
683 * Default mode for SSP configuration is TDM 4 slot, override config
8a880a20 684 * with explicit setting to I2S 2ch. The word length is set with
2bd5bd15
PLB		 685 * dai_set_tdm_slot() since there is no other API exposed
686 */
687 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
688 SND_SOC_DAIFMT_I2S |
f12f5c84 689 SND_SOC_DAIFMT_NB_NF |
2bd5bd15
PLB		 690 SND_SOC_DAIFMT_CBS_CFS
691 );
692
693 if (ret < 0) {
694 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
695 return ret;
696 }
697
8a880a20 698 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
2bd5bd15
PLB		 699 if (ret < 0) {
700 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
701 return ret;
702 }
703
704 return 0;
705}
706
1ebb4d9d 707static const unsigned int rates_48000[] = {
2bd5bd15
PLB		 708 48000,
709};
710
1ebb4d9d 711static const struct snd_pcm_hw_constraint_list constraints_48000 = {
2bd5bd15
PLB		 712 .count = ARRAY_SIZE(rates_48000),
713 .list = rates_48000,
714};
715
716static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
717{
718 return snd_pcm_hw_constraint_list(substream->runtime, 0,
719 SNDRV_PCM_HW_PARAM_RATE,
720 &constraints_48000);
721}
722
9b6fdef6 723static const struct snd_soc_ops byt_rt5651_aif1_ops = {
2bd5bd15
PLB		 724 .startup = byt_rt5651_aif1_startup,
725};
726
9b6fdef6 727static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
2bd5bd15
PLB		 728 .hw_params = byt_rt5651_aif1_hw_params,
729};
730
731static struct snd_soc_dai_link byt_rt5651_dais[] = {
732 [MERR_DPCM_AUDIO] = {
733 .name = "Audio Port",
734 .stream_name = "Audio",
735 .cpu_dai_name = "media-cpu-dai",
736 .codec_dai_name = "snd-soc-dummy-dai",
737 .codec_name = "snd-soc-dummy",
738 .platform_name = "sst-mfld-platform",
2bd5bd15
PLB		 739 .nonatomic = true,
740 .dynamic = 1,
741 .dpcm_playback = 1,
742 .dpcm_capture = 1,
743 .ops = &byt_rt5651_aif1_ops,
744 },
745 [MERR_DPCM_DEEP_BUFFER] = {
746 .name = "Deep-Buffer Audio Port",
747 .stream_name = "Deep-Buffer Audio",
748 .cpu_dai_name = "deepbuffer-cpu-dai",
749 .codec_dai_name = "snd-soc-dummy-dai",
750 .codec_name = "snd-soc-dummy",
751 .platform_name = "sst-mfld-platform",
2bd5bd15
PLB		 752 .nonatomic = true,
753 .dynamic = 1,
754 .dpcm_playback = 1,
755 .ops = &byt_rt5651_aif1_ops,
756 },
2bd5bd15
PLB		 757 /* CODEC<->CODEC link */
758 /* back ends */
759 {
760 .name = "SSP2-Codec",
149f7757 761 .id = 0,
2bd5bd15
PLB		 762 .cpu_dai_name = "ssp2-port",
763 .platform_name = "sst-mfld-platform",
764 .no_pcm = 1,
765 .codec_dai_name = "rt5651-aif1",
766 .codec_name = "i2c-10EC5651:00",
767 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
768 | SND_SOC_DAIFMT_CBS_CFS,
769 .be_hw_params_fixup = byt_rt5651_codec_fixup,
770 .ignore_suspend = 1,
771 .nonatomic = true,
772 .dpcm_playback = 1,
773 .dpcm_capture = 1,
774 .init = byt_rt5651_init,
775 .ops = &byt_rt5651_be_ssp2_ops,
776 },
777};
778
779/* SoC card */
b91f432c
HG		 780static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
781static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */
782static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
a0d1d867 783static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */
b91f432c
HG		 784
785static int byt_rt5651_suspend(struct snd_soc_card *card)
786{
787 struct snd_soc_component *component;
788
789 if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
790 return 0;
791
f70f18f7 792 for_each_card_components(card, component) {
b91f432c
HG		 793 if (!strcmp(component->name, byt_rt5651_codec_name)) {
794 dev_dbg(component->dev, "disabling jack detect before suspend\n");
795 snd_soc_component_set_jack(component, NULL, NULL);
796 break;
797 }
798 }
799
800 return 0;
801}
802
803static int byt_rt5651_resume(struct snd_soc_card *card)
804{
805 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
806 struct snd_soc_component *component;
807
808 if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
809 return 0;
810
f70f18f7 811 for_each_card_components(card, component) {
b91f432c
HG		 812 if (!strcmp(component->name, byt_rt5651_codec_name)) {
813 dev_dbg(component->dev, "re-enabling jack detect after resume\n");
90768eaf
HG		 814 snd_soc_component_set_jack(component, &priv->jack,
815 priv->hp_detect);
b91f432c
HG		 816 break;
817 }
818 }
819
820 return 0;
821}
822
2bd5bd15
PLB		 823static struct snd_soc_card byt_rt5651_card = {
824 .name = "bytcr-rt5651",
825 .owner = THIS_MODULE,
826 .dai_link = byt_rt5651_dais,
827 .num_links = ARRAY_SIZE(byt_rt5651_dais),
828 .dapm_widgets = byt_rt5651_widgets,
829 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
830 .dapm_routes = byt_rt5651_audio_map,
831 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
832 .fully_routed = true,
b91f432c
HG		 833 .suspend_pre = byt_rt5651_suspend,
834 .resume_post = byt_rt5651_resume,
2bd5bd15
PLB		 835};
836
fbea16db 837static const struct x86_cpu_id baytrail_cpu_ids[] = {
f2c4db1b 838 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, /* Valleyview */
fbea16db
HG		 839 {}
840};
8a880a20 841
5f6fb23d
HG		 842static const struct x86_cpu_id cherrytrail_cpu_ids[] = {
843 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, /* Braswell */
844 {}
845};
846
4d1f7a6e 847static const struct acpi_gpio_params ext_amp_enable_gpios = { 0, 0, false };
5f6fb23d 848
4d1f7a6e
AS		 849static const struct acpi_gpio_mapping cht_rt5651_gpios[] = {
850 /*
851 * Some boards have I2cSerialBusV2, GpioIo, GpioInt as ACPI resources,
852 * other boards may have I2cSerialBusV2, GpioInt, GpioIo instead.
853 * We want the GpioIo one for the ext-amp-enable-gpio.
854 */
855 { "ext-amp-enable-gpios", &ext_amp_enable_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
0a3badd1
HG		 856 { },
857};
858
8a880a20
HG		 859struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
860 u64 aif_value; /* 1: AIF1, 2: AIF2 */
861 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
862};
02c0a3b3 863
2bd5bd15
PLB		 864static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
865{
4ffdca62 866 static const char * const mic_name[] = { "dmic", "in1", "in2", "in12" };
02c0a3b3 867 struct byt_rt5651_private *priv;
7feb2f78 868 struct snd_soc_acpi_mach *mach;
0b2c2093 869 const char *platform_name;
2c375204 870 struct device *codec_dev;
02c0a3b3 871 const char *i2c_name = NULL;
8f250e70 872 const char *hp_swapped;
8a880a20 873 bool is_bytcr = false;
2bd5bd15 874 int ret_val = 0;
2193eb96 875 int dai_index = 0;
02c0a3b3
PLB		 876 int i;
877
aa5398e1 878 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
02c0a3b3
PLB		 879 if (!priv)
880 return -ENOMEM;
2bd5bd15
PLB		 881
882 /* register the soc card */
883 byt_rt5651_card.dev = &pdev->dev;
884
02c0a3b3
PLB		 885 mach = byt_rt5651_card.dev->platform_data;
886 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
887
888 /* fix index of codec dai */
02c0a3b3
PLB		 889 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
890 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
891 dai_index = i;
892 break;
893 }
894 }
895
896 /* fixup codec name based on HID */
3a147959 897 i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
e39cacc1
HG		 898 if (!i2c_name) {
899 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
900 return -ENODEV;
02c0a3b3 901 }
e39cacc1
HG		 902 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
903 "%s%s", "i2c-", i2c_name);
904 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
02c0a3b3 905
2c375204
HG		 906 codec_dev = bus_find_device_by_name(&i2c_bus_type, NULL,
907 byt_rt5651_codec_name);
908 if (!codec_dev)
909 return -EPROBE_DEFER;
910
8a880a20
HG		 911 /*
912 * swap SSP0 if bytcr is detected
913 * (will be overridden if DMI quirk is detected)
914 */
fbea16db 915 if (x86_match_cpu(baytrail_cpu_ids)) {
3ee1cd4f 916 if (mach->mach_params.acpi_ipc_irq_index == 0)
8a880a20
HG		 917 is_bytcr = true;
918 }
919
920 if (is_bytcr) {
921 /*
922 * Baytrail CR platforms may have CHAN package in BIOS, try
923 * to find relevant routing quirk based as done on Windows
924 * platforms. We have to read the information directly from the
925 * BIOS, at this stage the card is not created and the links
926 * with the codec driver/pdata are non-existent
927 */
928
929 struct acpi_chan_package chan_package;
930
931 /* format specified: 2 64-bit integers */
932 struct acpi_buffer format = {sizeof("NN"), "NN"};
933 struct acpi_buffer state = {0, NULL};
934 struct snd_soc_acpi_package_context pkg_ctx;
935 bool pkg_found = false;
936
937 state.length = sizeof(chan_package);
938 state.pointer = &chan_package;
939
940 pkg_ctx.name = "CHAN";
941 pkg_ctx.length = 2;
942 pkg_ctx.format = &format;
943 pkg_ctx.state = &state;
944 pkg_ctx.data_valid = false;
945
946 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
947 &pkg_ctx);
948 if (pkg_found) {
949 if (chan_package.aif_value == 1) {
950 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
951 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
952 } else if (chan_package.aif_value == 2) {
953 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
954 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
955 } else {
956 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
957 pkg_found = false;
958 }
959 }
960
961 if (!pkg_found) {
962 /* no BIOS indications, assume SSP0-AIF2 connection */
963 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
964 }
8a880a20
HG		 965 }
966
02c0a3b3
PLB		 967 /* check quirks before creating card */
968 dmi_check_system(byt_rt5651_quirk_table);
46058aeb 969
7eb18731
HG		 970 if (quirk_override) {
971 dev_info(&pdev->dev, "Overriding quirk 0x%x => 0x%x\n",
972 (unsigned int)byt_rt5651_quirk, quirk_override);
973 byt_rt5651_quirk = quirk_override;
974 }
975
46058aeb 976 /* Must be called before register_card, also see declaration comment. */
2c375204 977 ret_val = byt_rt5651_add_codec_device_props(codec_dev);
5f6fb23d
HG		 978 if (ret_val) {
979 put_device(codec_dev);
46058aeb 980 return ret_val;
5f6fb23d
HG		 981 }
982
983 /* Cherry Trail devices use an external amplifier enable gpio */
fee3e1cb 984 if (x86_match_cpu(cherrytrail_cpu_ids) && !byt_rt5651_gpios)
4d1f7a6e 985 byt_rt5651_gpios = cht_rt5651_gpios;
fee3e1cb
HG		 986
987 if (byt_rt5651_gpios) {
988 devm_acpi_dev_add_driver_gpios(codec_dev, byt_rt5651_gpios);
5f6fb23d
HG		 989 priv->ext_amp_gpio = devm_fwnode_get_index_gpiod_from_child(
990 &pdev->dev, "ext-amp-enable", 0,
991 codec_dev->fwnode,
992 GPIOD_OUT_LOW, "speaker-amp");
993 if (IS_ERR(priv->ext_amp_gpio)) {
994 ret_val = PTR_ERR(priv->ext_amp_gpio);
995 switch (ret_val) {
996 case -ENOENT:
997 priv->ext_amp_gpio = NULL;
998 break;
999 default:
1000 dev_err(&pdev->dev, "Failed to get ext-amp-enable GPIO: %d\n",
1001 ret_val);
1002 /* fall through */
1003 case -EPROBE_DEFER:
1004 put_device(codec_dev);
1005 return ret_val;
1006 }
1007 }
90768eaf
HG		 1008 priv->hp_detect = devm_fwnode_get_index_gpiod_from_child(
1009 &pdev->dev, "hp-detect", 0,
1010 codec_dev->fwnode,
1011 GPIOD_IN, "hp-detect");
1012 if (IS_ERR(priv->hp_detect)) {
1013 ret_val = PTR_ERR(priv->hp_detect);
1014 switch (ret_val) {
1015 case -ENOENT:
1016 priv->hp_detect = NULL;
1017 break;
1018 default:
1019 dev_err(&pdev->dev, "Failed to get hp-detect GPIO: %d\n",
1020 ret_val);
1021 /* fall through */
1022 case -EPROBE_DEFER:
1023 put_device(codec_dev);
1024 return ret_val;
1025 }
1026 }
5f6fb23d
HG		 1027 }
1028
1029 put_device(codec_dev);
46058aeb 1030
02c0a3b3
PLB		 1031 log_quirks(&pdev->dev);
1032
8a880a20
HG		 1033 if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
1034 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
1035 /* fixup codec aif name */
1036 snprintf(byt_rt5651_codec_aif_name,
1037 sizeof(byt_rt5651_codec_aif_name),
1038 "%s", "rt5651-aif2");
1039
1040 byt_rt5651_dais[dai_index].codec_dai_name =
1041 byt_rt5651_codec_aif_name;
1042 }
1043
1044 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
1045 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
1046 /* fixup cpu dai name name */
1047 snprintf(byt_rt5651_cpu_dai_name,
1048 sizeof(byt_rt5651_cpu_dai_name),
1049 "%s", "ssp0-port");
1050
1051 byt_rt5651_dais[dai_index].cpu_dai_name =
1052 byt_rt5651_cpu_dai_name;
1053 }
1054
02c0a3b3
PLB		 1055 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
1056 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
1057 if (IS_ERR(priv->mclk)) {
de5afce2 1058 ret_val = PTR_ERR(priv->mclk);
02c0a3b3 1059 dev_err(&pdev->dev,
de5afce2
CIK		 1060 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
1061 ret_val);
02c0a3b3
PLB		 1062 /*
1063 * Fall back to bit clock usage for -ENOENT (clock not
1064 * available likely due to missing dependencies), bail
1065 * for all other errors, including -EPROBE_DEFER
1066 */
1067 if (ret_val != -ENOENT)
1068 return ret_val;
1069 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
1070 }
1071 }
1072
8f250e70
HG		 1073 if (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED)
1074 hp_swapped = "-hp-swapped";
1075 else
1076 hp_swapped = "";
1077
64484cce 1078 snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
a0d1d867
HG		 1079 "bytcr-rt5651-%s-spk-%s-mic%s",
1080 (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ?
1081 "mono" : "stereo",
8f250e70 1082 mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], hp_swapped);
64484cce
HG		 1083 byt_rt5651_card.long_name = byt_rt5651_long_name;
1084
0b2c2093
PLB		 1085 /* override plaform name, if required */
1086 platform_name = mach->mach_params.platform;
1087
1088 ret_val = snd_soc_fixup_dai_links_platform_name(&byt_rt5651_card,
1089 platform_name);
1090 if (ret_val)
1091 return ret_val;
1092
2bd5bd15
PLB		 1093 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
1094
1095 if (ret_val) {
1096 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
1097 ret_val);
1098 return ret_val;
1099 }
1100 platform_set_drvdata(pdev, &byt_rt5651_card);
1101 return ret_val;
1102}
1103
1104static struct platform_driver snd_byt_rt5651_mc_driver = {
1105 .driver = {
1106 .name = "bytcr_rt5651",
2bd5bd15
PLB		 1107 },
1108 .probe = snd_byt_rt5651_mc_probe,
1109};
1110
1111module_platform_driver(snd_byt_rt5651_mc_driver);
1112
1113MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
1114MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
1115MODULE_LICENSE("GPL v2");
1116MODULE_ALIAS("platform:bytcr_rt5651");
Linux 6.x block layer and io_uring tree(s)