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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284
[linux-2.6-block.git] / sound / soc / intel / boards / bytcr_rt5651.c
CommitLineData
2bd5bd15
PLB		 1/*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
46058aeb 21#include <linux/i2c.h>
2bd5bd15
PLB		 22#include <linux/module.h>
23#include <linux/platform_device.h>
46058aeb 24#include <linux/property.h>
2bd5bd15 25#include <linux/acpi.h>
02c0a3b3 26#include <linux/clk.h>
2bd5bd15
PLB		 27#include <linux/device.h>
28#include <linux/dmi.h>
caed9d63 29#include <linux/input.h>
5f6fb23d
HG		 30#include <linux/gpio/consumer.h>
31#include <linux/gpio/machine.h>
2bd5bd15 32#include <linux/slab.h>
8a880a20 33#include <asm/cpu_device_id.h>
fbea16db 34#include <asm/intel-family.h>
2bd5bd15
PLB		 35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
38#include <sound/jack.h>
7feb2f78 39#include <sound/soc-acpi.h>
2bd5bd15
PLB		 40#include "../../codecs/rt5651.h"
41#include "../atom/sst-atom-controls.h"
02c0a3b3
PLB		 42
43enum {
44 BYT_RT5651_DMIC_MAP,
45 BYT_RT5651_IN1_MAP,
ac275ee5 46 BYT_RT5651_IN2_MAP,
ea261bd0 47 BYT_RT5651_IN1_IN2_MAP,
02c0a3b3
PLB		 48};
49
46058aeb
HG		 50enum {
51 BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4),
52 BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4),
53 BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4),
54 BYT_RT5651_JD2 = (RT5651_JD2 << 4),
55};
56
8ffaa6a1
HG		 57enum {
58 BYT_RT5651_OVCD_TH_600UA = (6 << 8),
59 BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
60 BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
61};
62
63enum {
64 BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13),
65 BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13),
66 BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13),
67 BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13),
68};
69
46058aeb
HG		 70#define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0))
71#define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4)
8ffaa6a1
HG		 72#define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8)
73#define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13)
46058aeb
HG		 74#define BYT_RT5651_DMIC_EN BIT(16)
75#define BYT_RT5651_MCLK_EN BIT(17)
76#define BYT_RT5651_MCLK_25MHZ BIT(18)
8a880a20
HG		 77#define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */
78#define BYT_RT5651_SSP0_AIF1 BIT(20)
79#define BYT_RT5651_SSP0_AIF2 BIT(21)
8f250e70 80#define BYT_RT5651_HP_LR_SWAPPED BIT(22)
a0d1d867 81#define BYT_RT5651_MONO_SPEAKER BIT(23)
a0cb2d43 82#define BYT_RT5651_JD_NOT_INV BIT(24)
46058aeb 83
fc7c460f
HG		 84#define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \
85 BYT_RT5651_JD1_1 | \
86 BYT_RT5651_OVCD_TH_2000UA | \
87 BYT_RT5651_OVCD_SF_0P75)
88
a0cb2d43
HG		 89/* jack-detect-source + inv + dmic-en + ovcd-th + -sf + terminating entry */
90#define MAX_NO_PROPS 6
02c0a3b3
PLB		 91
92struct byt_rt5651_private {
93 struct clk *mclk;
5f6fb23d 94 struct gpio_desc *ext_amp_gpio;
90768eaf 95 struct gpio_desc *hp_detect;
d9f8f9b2 96 struct snd_soc_jack jack;
02c0a3b3
PLB		 97};
98
fee3e1cb
HG		 99static const struct acpi_gpio_mapping *byt_rt5651_gpios;
100
ac275ee5 101/* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */
fc7c460f 102static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 103 BYT_RT5651_IN2_MAP;
02c0a3b3 104
fb45befa
PLB		 105static int quirk_override = -1;
106module_param_named(quirk, quirk_override, int, 0444);
7eb18731
HG		 107MODULE_PARM_DESC(quirk, "Board-specific quirk override");
108
02c0a3b3
PLB		 109static void log_quirks(struct device *dev)
110{
111 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
112 dev_info(dev, "quirk DMIC_MAP enabled");
113 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
114 dev_info(dev, "quirk IN1_MAP enabled");
ac275ee5
HG		 115 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
116 dev_info(dev, "quirk IN2_MAP enabled");
366780df
HG		 117 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP)
118 dev_info(dev, "quirk IN1_IN2_MAP enabled");
8ffaa6a1 119 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
46058aeb
HG		 120 dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
121 BYT_RT5651_JDSRC(byt_rt5651_quirk));
8ffaa6a1
HG		 122 dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
123 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
124 dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
125 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
126 }
02c0a3b3
PLB		 127 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
128 dev_info(dev, "quirk DMIC enabled");
129 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
130 dev_info(dev, "quirk MCLK_EN enabled");
131 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
132 dev_info(dev, "quirk MCLK_25MHZ enabled");
8a880a20
HG		 133 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
134 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
135 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
136 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
137 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
138 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
a0d1d867
HG		 139 if (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER)
140 dev_info(dev, "quirk MONO_SPEAKER enabled\n");
a0cb2d43
HG		 141 if (byt_rt5651_quirk & BYT_RT5651_JD_NOT_INV)
142 dev_info(dev, "quirk JD_NOT_INV enabled\n");
02c0a3b3
PLB		 143}
144
145#define BYT_CODEC_DAI1 "rt5651-aif1"
8a880a20 146#define BYT_CODEC_DAI2 "rt5651-aif2"
02c0a3b3 147
aeec6cc0
HG		 148static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
149 int rate, int bclk_ratio)
150{
151 int clk_id, clk_freq, ret;
152
153 /* Configure the PLL before selecting it */
154 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
155 clk_id = RT5651_PLL1_S_BCLK1,
156 clk_freq = rate * bclk_ratio;
157 } else {
158 clk_id = RT5651_PLL1_S_MCLK;
159 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
160 clk_freq = 25000000;
161 else
162 clk_freq = 19200000;
163 }
164 ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
165 if (ret < 0) {
2759ba9b 166 dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
aeec6cc0
HG		 167 return ret;
168 }
169
170 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
171 rate * 512, SND_SOC_CLOCK_IN);
172 if (ret < 0) {
2759ba9b 173 dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
aeec6cc0
HG		 174 return ret;
175 }
176
177 return 0;
178}
179
02c0a3b3
PLB		 180static int platform_clock_control(struct snd_soc_dapm_widget *w,
181 struct snd_kcontrol *k, int event)
182{
183 struct snd_soc_dapm_context *dapm = w->dapm;
184 struct snd_soc_card *card = dapm->card;
185 struct snd_soc_dai *codec_dai;
186 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
187 int ret;
188
dfb6ec7a 189 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
8a880a20
HG		 190 if (!codec_dai)
191 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
02c0a3b3
PLB		 192 if (!codec_dai) {
193 dev_err(card->dev,
194 "Codec dai not found; Unable to set platform clock\n");
195 return -EIO;
196 }
197
198 if (SND_SOC_DAPM_EVENT_ON(event)) {
199 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
200 ret = clk_prepare_enable(priv->mclk);
201 if (ret < 0) {
202 dev_err(card->dev,
203 "could not configure MCLK state");
204 return ret;
205 }
206 }
aeec6cc0 207 ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
02c0a3b3
PLB		 208 } else {
209 /*
210 * Set codec clock source to internal clock before
211 * turning off the platform clock. Codec needs clock
212 * for Jack detection and button press
213 */
214 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
215 48000 * 512,
216 SND_SOC_CLOCK_IN);
217 if (!ret)
218 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
219 clk_disable_unprepare(priv->mclk);
220 }
221
222 if (ret < 0) {
223 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
224 return ret;
225 }
226
227 return 0;
228}
2bd5bd15 229
5f6fb23d
HG		 230static int rt5651_ext_amp_power_event(struct snd_soc_dapm_widget *w,
231 struct snd_kcontrol *kcontrol, int event)
232{
233 struct snd_soc_card *card = w->dapm->card;
234 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
235
236 if (SND_SOC_DAPM_EVENT_ON(event))
237 gpiod_set_value_cansleep(priv->ext_amp_gpio, 1);
238 else
239 gpiod_set_value_cansleep(priv->ext_amp_gpio, 0);
240
241 return 0;
242}
243
2bd5bd15
PLB		 244static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
245 SND_SOC_DAPM_HP("Headphone", NULL),
246 SND_SOC_DAPM_MIC("Headset Mic", NULL),
247 SND_SOC_DAPM_MIC("Internal Mic", NULL),
248 SND_SOC_DAPM_SPK("Speaker", NULL),
ea39bdcf 249 SND_SOC_DAPM_LINE("Line In", NULL),
02c0a3b3
PLB		 250 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
251 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
252 SND_SOC_DAPM_POST_PMD),
5f6fb23d
HG		 253 SND_SOC_DAPM_SUPPLY("Ext Amp Power", SND_SOC_NOPM, 0, 0,
254 rt5651_ext_amp_power_event,
255 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2bd5bd15
PLB		 256};
257
258static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
02c0a3b3
PLB		 259 {"Headphone", NULL, "Platform Clock"},
260 {"Headset Mic", NULL, "Platform Clock"},
261 {"Internal Mic", NULL, "Platform Clock"},
262 {"Speaker", NULL, "Platform Clock"},
5f6fb23d 263 {"Speaker", NULL, "Ext Amp Power"},
ea39bdcf 264 {"Line In", NULL, "Platform Clock"},
02c0a3b3 265
2bd5bd15 266 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
2bd5bd15
PLB		 267 {"Headphone", NULL, "HPOL"},
268 {"Headphone", NULL, "HPOR"},
269 {"Speaker", NULL, "LOUTL"},
270 {"Speaker", NULL, "LOUTR"},
ea39bdcf
PLB		 271 {"IN2P", NULL, "Line In"},
272 {"IN2N", NULL, "Line In"},
273
2bd5bd15
PLB		 274};
275
6356c78c
PLB		 276static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
277 {"DMIC L1", NULL, "Internal Mic"},
278 {"DMIC R1", NULL, "Internal Mic"},
aee48a9f 279 {"IN2P", NULL, "Headset Mic"},
2bd5bd15
PLB		 280};
281
282static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
283 {"Internal Mic", NULL, "micbias1"},
284 {"IN1P", NULL, "Internal Mic"},
de231479 285 {"IN3P", NULL, "Headset Mic"},
2bd5bd15
PLB		 286};
287
ac275ee5
HG		 288static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
289 {"Internal Mic", NULL, "micbias1"},
290 {"IN2P", NULL, "Internal Mic"},
291 {"IN3P", NULL, "Headset Mic"},
292};
293
ea261bd0
CC		 294static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
295 {"Internal Mic", NULL, "micbias1"},
296 {"IN1P", NULL, "Internal Mic"},
297 {"IN2P", NULL, "Internal Mic"},
298 {"IN3P", NULL, "Headset Mic"},
299};
300
8a880a20
HG		 301static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
302 {"ssp0 Tx", NULL, "modem_out"},
303 {"modem_in", NULL, "ssp0 Rx"},
304
305 {"AIF1 Playback", NULL, "ssp0 Tx"},
306 {"ssp0 Rx", NULL, "AIF1 Capture"},
307};
308
309static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
310 {"ssp0 Tx", NULL, "modem_out"},
311 {"modem_in", NULL, "ssp0 Rx"},
312
313 {"AIF2 Playback", NULL, "ssp0 Tx"},
314 {"ssp0 Rx", NULL, "AIF2 Capture"},
315};
316
317static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
318 {"ssp2 Tx", NULL, "codec_out0"},
319 {"ssp2 Tx", NULL, "codec_out1"},
320 {"codec_in0", NULL, "ssp2 Rx"},
321 {"codec_in1", NULL, "ssp2 Rx"},
322
323 {"AIF1 Playback", NULL, "ssp2 Tx"},
324 {"ssp2 Rx", NULL, "AIF1 Capture"},
325};
326
327static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
328 {"ssp2 Tx", NULL, "codec_out0"},
329 {"ssp2 Tx", NULL, "codec_out1"},
330 {"codec_in0", NULL, "ssp2 Rx"},
331 {"codec_in1", NULL, "ssp2 Rx"},
332
333 {"AIF2 Playback", NULL, "ssp2 Tx"},
334 {"ssp2 Rx", NULL, "AIF2 Capture"},
335};
336
2bd5bd15
PLB		 337static const struct snd_kcontrol_new byt_rt5651_controls[] = {
338 SOC_DAPM_PIN_SWITCH("Headphone"),
339 SOC_DAPM_PIN_SWITCH("Headset Mic"),
340 SOC_DAPM_PIN_SWITCH("Internal Mic"),
341 SOC_DAPM_PIN_SWITCH("Speaker"),
ea39bdcf 342 SOC_DAPM_PIN_SWITCH("Line In"),
2bd5bd15
PLB		 343};
344
d9f8f9b2
CC		 345static struct snd_soc_jack_pin bytcr_jack_pins[] = {
346 {
347 .pin = "Headphone",
348 .mask = SND_JACK_HEADPHONE,
349 },
350 {
351 .pin = "Headset Mic",
352 .mask = SND_JACK_MICROPHONE,
353 },
354};
355
2bd5bd15
PLB		 356static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
357 struct snd_pcm_hw_params *params)
358{
359 struct snd_soc_pcm_runtime *rtd = substream->private_data;
360 struct snd_soc_dai *codec_dai = rtd->codec_dai;
8a880a20 361 snd_pcm_format_t format = params_format(params);
aeec6cc0 362 int rate = params_rate(params);
8a880a20 363 int bclk_ratio;
2bd5bd15 364
8a880a20
HG		 365 if (format == SNDRV_PCM_FORMAT_S16_LE)
366 bclk_ratio = 32;
367 else
368 bclk_ratio = 50;
369
370 return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
2bd5bd15
PLB		 371}
372
fee3e1cb
HG		 373static const struct acpi_gpio_params pov_p1006w_hp_detect = { 1, 0, false };
374static const struct acpi_gpio_params pov_p1006w_ext_amp_en = { 2, 0, true };
375
376static const struct acpi_gpio_mapping byt_rt5651_pov_p1006w_gpios[] = {
377 { "hp-detect-gpios", &pov_p1006w_hp_detect, 1, },
378 { "ext-amp-enable-gpios", &pov_p1006w_ext_amp_en, 1, },
379 { },
380};
381
382static int byt_rt5651_pov_p1006w_quirk_cb(const struct dmi_system_id *id)
383{
384 byt_rt5651_quirk = (unsigned long)id->driver_data;
385 byt_rt5651_gpios = byt_rt5651_pov_p1006w_gpios;
386 return 1;
387}
388
02c0a3b3
PLB		 389static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
390{
391 byt_rt5651_quirk = (unsigned long)id->driver_data;
392 return 1;
393}
394
2bd5bd15 395static const struct dmi_system_id byt_rt5651_quirk_table[] = {
02c0a3b3 396 {
55d69c03 397 /* Chuwi Hi8 Pro (CWI513) */
02c0a3b3
PLB		 398 .callback = byt_rt5651_quirk_cb,
399 .matches = {
55d69c03
HG		 400 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
401 DMI_MATCH(DMI_PRODUCT_NAME, "X1D3_C806N"),
02c0a3b3 402 },
55d69c03 403 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 404 BYT_RT5651_IN2_MAP |
a0d1d867
HG		 405 BYT_RT5651_HP_LR_SWAPPED |
406 BYT_RT5651_MONO_SPEAKER),
02c0a3b3 407 },
416f2b51 408 {
55d69c03 409 /* Chuwi Vi8 Plus (CWI519) */
416f2b51
PLB		 410 .callback = byt_rt5651_quirk_cb,
411 .matches = {
55d69c03
HG		 412 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
413 DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
416f2b51 414 },
55d69c03 415 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
ac275ee5 416 BYT_RT5651_IN2_MAP |
a0d1d867
HG		 417 BYT_RT5651_HP_LR_SWAPPED |
418 BYT_RT5651_MONO_SPEAKER),
416f2b51 419 },
a0cb2d43
HG		 420 {
421 /* Complet Electro Serv MY8307 */
422 .callback = byt_rt5651_quirk_cb,
423 .matches = {
424 DMI_MATCH(DMI_SYS_VENDOR, "Complet Electro Serv"),
425 DMI_MATCH(DMI_PRODUCT_NAME, "MY8307"),
426 },
427 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
428 BYT_RT5651_IN2_MAP |
429 BYT_RT5651_MONO_SPEAKER |
430 BYT_RT5651_JD_NOT_INV),
431 },
06aa6e51
HG		 432 {
433 /* I.T.Works TW701, Ployer Momo7w and Trekstor ST70416-6
434 * (these all use the same mainboard) */
435 .callback = byt_rt5651_quirk_cb,
436 .matches = {
437 DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
438 /* Partial match for all of itWORKS.G.WI71C.JGBMRBA,
439 * TREK.G.WI71C.JGBMRBA0x and MOMO.G.WI71C.MABMRBA02 */
440 DMI_MATCH(DMI_BIOS_VERSION, ".G.WI71C."),
441 },
442 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
443 BYT_RT5651_IN2_MAP |
444 BYT_RT5651_SSP0_AIF1 |
445 BYT_RT5651_MONO_SPEAKER),
446 },
2fe30129 447 {
55d69c03 448 /* KIANO SlimNote 14.2 */
2fe30129
CC		 449 .callback = byt_rt5651_quirk_cb,
450 .matches = {
451 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
452 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
453 },
fc7c460f 454 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
56e49aa4 455 BYT_RT5651_IN1_IN2_MAP),
2fe30129 456 },
8f250e70 457 {
55d69c03 458 /* Minnowboard Max B3 */
8f250e70
HG		 459 .callback = byt_rt5651_quirk_cb,
460 .matches = {
55d69c03
HG		 461 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
462 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
8f250e70 463 },
55d69c03 464 .driver_data = (void *)(BYT_RT5651_IN1_MAP),
8f250e70 465 },
f026e063 466 {
55d69c03 467 /* Minnowboard Turbot */
f026e063
HG		 468 .callback = byt_rt5651_quirk_cb,
469 .matches = {
55d69c03
HG		 470 DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
471 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
f026e063 472 },
55d69c03
HG		 473 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
474 BYT_RT5651_IN1_MAP),
f026e063 475 },
fee3e1cb
HG		 476 {
477 /* Point of View mobii wintab p1006w (v1.0) */
478 .callback = byt_rt5651_pov_p1006w_quirk_cb,
479 .matches = {
480 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Insyde"),
481 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "BayTrail"),
482 /* Note 105b is Foxcon's USB/PCI vendor id */
483 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "105B"),
484 DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"),
485 },
486 .driver_data = (void *)(BYT_RT5651_DMIC_MAP |
487 BYT_RT5651_OVCD_TH_2000UA |
488 BYT_RT5651_OVCD_SF_0P75 |
489 BYT_RT5651_DMIC_EN |
490 BYT_RT5651_MCLK_EN |
491 BYT_RT5651_SSP0_AIF1),
492 },
f9877eb5
HG		 493 {
494 /* VIOS LTH17 */
495 .callback = byt_rt5651_quirk_cb,
496 .matches = {
497 DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
498 DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
499 },
8627fb25
HG		 500 .driver_data = (void *)(BYT_RT5651_IN1_IN2_MAP |
501 BYT_RT5651_JD1_1 |
502 BYT_RT5651_OVCD_TH_2000UA |
503 BYT_RT5651_OVCD_SF_1P0 |
504 BYT_RT5651_MCLK_EN),
f9877eb5 505 },
06aa6e51
HG		 506 {
507 /* Yours Y8W81 (and others using the same mainboard) */
508 .callback = byt_rt5651_quirk_cb,
509 .matches = {
510 DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
511 /* Partial match for all devs with a W86C mainboard */
512 DMI_MATCH(DMI_BIOS_VERSION, ".F.W86C."),
513 },
514 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
515 BYT_RT5651_IN2_MAP |
516 BYT_RT5651_SSP0_AIF1 |
517 BYT_RT5651_MONO_SPEAKER),
518 },
2bd5bd15
PLB		 519 {}
520};
521
46058aeb
HG		 522/*
523 * Note this MUST be called before snd_soc_register_card(), so that the props
524 * are in place before the codec component driver's probe function parses them.
525 */
2c375204 526static int byt_rt5651_add_codec_device_props(struct device *i2c_dev)
46058aeb
HG		 527{
528 struct property_entry props[MAX_NO_PROPS] = {};
2c375204 529 int cnt = 0;
46058aeb
HG		 530
531 props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
532 BYT_RT5651_JDSRC(byt_rt5651_quirk));
533
8ffaa6a1
HG		 534 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
535 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
536
537 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
538 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
539
c2f26938
HG		 540 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
541 props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
542
a0cb2d43
HG		 543 if (byt_rt5651_quirk & BYT_RT5651_JD_NOT_INV)
544 props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,jack-detect-not-inverted");
545
2c375204 546 return device_add_properties(i2c_dev, props);
46058aeb
HG		 547}
548
2bd5bd15
PLB		 549static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
550{
2bd5bd15 551 struct snd_soc_card *card = runtime->card;
17b52010 552 struct snd_soc_component *codec = runtime->codec_dai->component;
02c0a3b3 553 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
2bd5bd15
PLB		 554 const struct snd_soc_dapm_route *custom_map;
555 int num_routes;
90768eaf 556 int report;
02c0a3b3 557 int ret;
2bd5bd15
PLB		 558
559 card->dapm.idle_bias_off = true;
560
c22969d7
HG		 561 /* Start with RC clk for jack-detect (we disable MCLK below) */
562 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
563 snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
564 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
565
2bd5bd15
PLB		 566 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
567 case BYT_RT5651_IN1_MAP:
568 custom_map = byt_rt5651_intmic_in1_map;
569 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
570 break;
ac275ee5
HG		 571 case BYT_RT5651_IN2_MAP:
572 custom_map = byt_rt5651_intmic_in2_map;
573 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
574 break;
ea261bd0
CC		 575 case BYT_RT5651_IN1_IN2_MAP:
576 custom_map = byt_rt5651_intmic_in1_in2_map;
577 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
578 break;
2bd5bd15 579 default:
6356c78c
PLB		 580 custom_map = byt_rt5651_intmic_dmic_map;
581 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
2bd5bd15 582 }
6356c78c
PLB		 583 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
584 if (ret)
585 return ret;
2bd5bd15 586
8a880a20
HG		 587 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
588 ret = snd_soc_dapm_add_routes(&card->dapm,
589 byt_rt5651_ssp2_aif2_map,
590 ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
591 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
592 ret = snd_soc_dapm_add_routes(&card->dapm,
593 byt_rt5651_ssp0_aif1_map,
594 ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
595 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
596 ret = snd_soc_dapm_add_routes(&card->dapm,
597 byt_rt5651_ssp0_aif2_map,
598 ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
599 } else {
600 ret = snd_soc_dapm_add_routes(&card->dapm,
601 byt_rt5651_ssp2_aif1_map,
602 ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
603 }
604 if (ret)
605 return ret;
606
2bd5bd15
PLB		 607 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
608 ARRAY_SIZE(byt_rt5651_controls));
609 if (ret) {
610 dev_err(card->dev, "unable to add card controls\n");
611 return ret;
612 }
613 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
614 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
615
02c0a3b3
PLB		 616 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
617 /*
618 * The firmware might enable the clock at
619 * boot (this information may or may not
620 * be reflected in the enable clock register).
621 * To change the rate we must disable the clock
622 * first to cover these cases. Due to common
623 * clock framework restrictions that do not allow
624 * to disable a clock that has not been enabled,
625 * we need to enable the clock first.
626 */
627 ret = clk_prepare_enable(priv->mclk);
628 if (!ret)
629 clk_disable_unprepare(priv->mclk);
630
631 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
632 ret = clk_set_rate(priv->mclk, 25000000);
633 else
634 ret = clk_set_rate(priv->mclk, 19200000);
635
636 if (ret)
637 dev_err(card->dev, "unable to set MCLK rate\n");
638 }
639
90768eaf
HG		 640 report = 0;
641 if (BYT_RT5651_JDSRC(byt_rt5651_quirk))
642 report = SND_JACK_HEADSET | SND_JACK_BTN_0;
643 else if (priv->hp_detect)
644 report = SND_JACK_HEADSET;
645
646 if (report) {
aed859a2 647 ret = snd_soc_card_jack_new(runtime->card, "Headset",
90768eaf 648 report, &priv->jack, bytcr_jack_pins,
caed9d63 649 ARRAY_SIZE(bytcr_jack_pins));
aed859a2
HG		 650 if (ret) {
651 dev_err(runtime->dev, "jack creation failed %d\n", ret);
652 return ret;
653 }
d9f8f9b2 654
90768eaf
HG		 655 if (report & SND_JACK_BTN_0)
656 snd_jack_set_key(priv->jack.jack, SND_JACK_BTN_0,
657 KEY_PLAYPAUSE);
caed9d63 658
90768eaf
HG		 659 ret = snd_soc_component_set_jack(codec, &priv->jack,
660 priv->hp_detect);
aed859a2
HG		 661 if (ret)
662 return ret;
663 }
d9f8f9b2 664
aed859a2 665 return 0;
2bd5bd15
PLB		 666}
667
668static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
669 .formats = SNDRV_PCM_FMTBIT_S24_LE,
670 .rate_min = 48000,
671 .rate_max = 48000,
672 .channels_min = 2,
673 .channels_max = 2,
674};
675
676static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
677 struct snd_pcm_hw_params *params)
678{
679 struct snd_interval *rate = hw_param_interval(params,
680 SNDRV_PCM_HW_PARAM_RATE);
681 struct snd_interval *channels = hw_param_interval(params,
682 SNDRV_PCM_HW_PARAM_CHANNELS);
8a880a20 683 int ret, bits;
2bd5bd15 684
8a880a20 685 /* The DSP will covert the FE rate to 48k, stereo */
2bd5bd15
PLB		 686 rate->min = rate->max = 48000;
687 channels->min = channels->max = 2;
688
8a880a20
HG		 689 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
690 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
691 /* set SSP0 to 16-bit */
692 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
693 bits = 16;
694 } else {
695 /* set SSP2 to 24-bit */
696 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
697 bits = 24;
698 }
2bd5bd15
PLB		 699
700 /*
701 * Default mode for SSP configuration is TDM 4 slot, override config
8a880a20 702 * with explicit setting to I2S 2ch. The word length is set with
2bd5bd15
PLB		 703 * dai_set_tdm_slot() since there is no other API exposed
704 */
705 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
706 SND_SOC_DAIFMT_I2S |
f12f5c84 707 SND_SOC_DAIFMT_NB_NF |
2bd5bd15
PLB		 708 SND_SOC_DAIFMT_CBS_CFS
709 );
710
711 if (ret < 0) {
712 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
713 return ret;
714 }
715
8a880a20 716 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
2bd5bd15
PLB		 717 if (ret < 0) {
718 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
719 return ret;
720 }
721
722 return 0;
723}
724
1ebb4d9d 725static const unsigned int rates_48000[] = {
2bd5bd15
PLB		 726 48000,
727};
728
1ebb4d9d 729static const struct snd_pcm_hw_constraint_list constraints_48000 = {
2bd5bd15
PLB		 730 .count = ARRAY_SIZE(rates_48000),
731 .list = rates_48000,
732};
733
734static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
735{
736 return snd_pcm_hw_constraint_list(substream->runtime, 0,
737 SNDRV_PCM_HW_PARAM_RATE,
738 &constraints_48000);
739}
740
9b6fdef6 741static const struct snd_soc_ops byt_rt5651_aif1_ops = {
2bd5bd15
PLB		 742 .startup = byt_rt5651_aif1_startup,
743};
744
9b6fdef6 745static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
2bd5bd15
PLB		 746 .hw_params = byt_rt5651_aif1_hw_params,
747};
748
749static struct snd_soc_dai_link byt_rt5651_dais[] = {
750 [MERR_DPCM_AUDIO] = {
751 .name = "Audio Port",
752 .stream_name = "Audio",
753 .cpu_dai_name = "media-cpu-dai",
754 .codec_dai_name = "snd-soc-dummy-dai",
755 .codec_name = "snd-soc-dummy",
756 .platform_name = "sst-mfld-platform",
2bd5bd15
PLB		 757 .nonatomic = true,
758 .dynamic = 1,
759 .dpcm_playback = 1,
760 .dpcm_capture = 1,
761 .ops = &byt_rt5651_aif1_ops,
762 },
763 [MERR_DPCM_DEEP_BUFFER] = {
764 .name = "Deep-Buffer Audio Port",
765 .stream_name = "Deep-Buffer Audio",
766 .cpu_dai_name = "deepbuffer-cpu-dai",
767 .codec_dai_name = "snd-soc-dummy-dai",
768 .codec_name = "snd-soc-dummy",
769 .platform_name = "sst-mfld-platform",
2bd5bd15
PLB		 770 .nonatomic = true,
771 .dynamic = 1,
772 .dpcm_playback = 1,
773 .ops = &byt_rt5651_aif1_ops,
774 },
2bd5bd15
PLB		 775 /* CODEC<->CODEC link */
776 /* back ends */
777 {
778 .name = "SSP2-Codec",
149f7757 779 .id = 0,
2bd5bd15
PLB		 780 .cpu_dai_name = "ssp2-port",
781 .platform_name = "sst-mfld-platform",
782 .no_pcm = 1,
783 .codec_dai_name = "rt5651-aif1",
784 .codec_name = "i2c-10EC5651:00",
785 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
786 | SND_SOC_DAIFMT_CBS_CFS,
787 .be_hw_params_fixup = byt_rt5651_codec_fixup,
788 .ignore_suspend = 1,
789 .nonatomic = true,
790 .dpcm_playback = 1,
791 .dpcm_capture = 1,
792 .init = byt_rt5651_init,
793 .ops = &byt_rt5651_be_ssp2_ops,
794 },
795};
796
797/* SoC card */
b91f432c
HG		 798static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
799static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */
800static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
a0d1d867 801static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */
b91f432c
HG		 802
803static int byt_rt5651_suspend(struct snd_soc_card *card)
804{
805 struct snd_soc_component *component;
806
807 if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
808 return 0;
809
f70f18f7 810 for_each_card_components(card, component) {
b91f432c
HG		 811 if (!strcmp(component->name, byt_rt5651_codec_name)) {
812 dev_dbg(component->dev, "disabling jack detect before suspend\n");
813 snd_soc_component_set_jack(component, NULL, NULL);
814 break;
815 }
816 }
817
818 return 0;
819}
820
821static int byt_rt5651_resume(struct snd_soc_card *card)
822{
823 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
824 struct snd_soc_component *component;
825
826 if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
827 return 0;
828
f70f18f7 829 for_each_card_components(card, component) {
b91f432c
HG		 830 if (!strcmp(component->name, byt_rt5651_codec_name)) {
831 dev_dbg(component->dev, "re-enabling jack detect after resume\n");
90768eaf
HG		 832 snd_soc_component_set_jack(component, &priv->jack,
833 priv->hp_detect);
b91f432c
HG		 834 break;
835 }
836 }
837
838 return 0;
839}
840
2bd5bd15
PLB		 841static struct snd_soc_card byt_rt5651_card = {
842 .name = "bytcr-rt5651",
843 .owner = THIS_MODULE,
844 .dai_link = byt_rt5651_dais,
845 .num_links = ARRAY_SIZE(byt_rt5651_dais),
846 .dapm_widgets = byt_rt5651_widgets,
847 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
848 .dapm_routes = byt_rt5651_audio_map,
849 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
850 .fully_routed = true,
b91f432c
HG		 851 .suspend_pre = byt_rt5651_suspend,
852 .resume_post = byt_rt5651_resume,
2bd5bd15
PLB		 853};
854
fbea16db 855static const struct x86_cpu_id baytrail_cpu_ids[] = {
f2c4db1b 856 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, /* Valleyview */
fbea16db
HG		 857 {}
858};
8a880a20 859
5f6fb23d
HG		 860static const struct x86_cpu_id cherrytrail_cpu_ids[] = {
861 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, /* Braswell */
862 {}
863};
864
4d1f7a6e 865static const struct acpi_gpio_params ext_amp_enable_gpios = { 0, 0, false };
5f6fb23d 866
4d1f7a6e
AS		 867static const struct acpi_gpio_mapping cht_rt5651_gpios[] = {
868 /*
869 * Some boards have I2cSerialBusV2, GpioIo, GpioInt as ACPI resources,
870 * other boards may have I2cSerialBusV2, GpioInt, GpioIo instead.
871 * We want the GpioIo one for the ext-amp-enable-gpio.
872 */
873 { "ext-amp-enable-gpios", &ext_amp_enable_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
0a3badd1
HG		 874 { },
875};
876
8a880a20
HG		 877struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
878 u64 aif_value; /* 1: AIF1, 2: AIF2 */
879 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
880};
02c0a3b3 881
2bd5bd15
PLB		 882static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
883{
4ffdca62 884 static const char * const mic_name[] = { "dmic", "in1", "in2", "in12" };
02c0a3b3 885 struct byt_rt5651_private *priv;
7feb2f78 886 struct snd_soc_acpi_mach *mach;
0b2c2093 887 const char *platform_name;
7075e9ba 888 struct acpi_device *adev;
2c375204 889 struct device *codec_dev;
8f250e70 890 const char *hp_swapped;
8a880a20 891 bool is_bytcr = false;
2bd5bd15 892 int ret_val = 0;
2193eb96 893 int dai_index = 0;
02c0a3b3
PLB		 894 int i;
895
aa5398e1 896 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
02c0a3b3
PLB		 897 if (!priv)
898 return -ENOMEM;
2bd5bd15
PLB		 899
900 /* register the soc card */
901 byt_rt5651_card.dev = &pdev->dev;
902
02c0a3b3
PLB		 903 mach = byt_rt5651_card.dev->platform_data;
904 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
905
906 /* fix index of codec dai */
02c0a3b3
PLB		 907 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
908 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
909 dai_index = i;
910 break;
911 }
912 }
913
914 /* fixup codec name based on HID */
7075e9ba
AS		 915 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
916 if (adev) {
917 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
918 "i2c-%s", acpi_dev_name(adev));
919 put_device(&adev->dev);
920 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
921 } else {
e39cacc1
HG		 922 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
923 return -ENODEV;
02c0a3b3
PLB		 924 }
925
2c375204
HG		 926 codec_dev = bus_find_device_by_name(&i2c_bus_type, NULL,
927 byt_rt5651_codec_name);
928 if (!codec_dev)
929 return -EPROBE_DEFER;
930
8a880a20
HG		 931 /*
932 * swap SSP0 if bytcr is detected
933 * (will be overridden if DMI quirk is detected)
934 */
fbea16db 935 if (x86_match_cpu(baytrail_cpu_ids)) {
3ee1cd4f 936 if (mach->mach_params.acpi_ipc_irq_index == 0)
8a880a20
HG		 937 is_bytcr = true;
938 }
939
940 if (is_bytcr) {
941 /*
942 * Baytrail CR platforms may have CHAN package in BIOS, try
943 * to find relevant routing quirk based as done on Windows
944 * platforms. We have to read the information directly from the
945 * BIOS, at this stage the card is not created and the links
946 * with the codec driver/pdata are non-existent
947 */
948
949 struct acpi_chan_package chan_package;
950
951 /* format specified: 2 64-bit integers */
952 struct acpi_buffer format = {sizeof("NN"), "NN"};
953 struct acpi_buffer state = {0, NULL};
954 struct snd_soc_acpi_package_context pkg_ctx;
955 bool pkg_found = false;
956
957 state.length = sizeof(chan_package);
958 state.pointer = &chan_package;
959
960 pkg_ctx.name = "CHAN";
961 pkg_ctx.length = 2;
962 pkg_ctx.format = &format;
963 pkg_ctx.state = &state;
964 pkg_ctx.data_valid = false;
965
966 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
967 &pkg_ctx);
968 if (pkg_found) {
969 if (chan_package.aif_value == 1) {
970 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
971 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
972 } else if (chan_package.aif_value == 2) {
973 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
974 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
975 } else {
976 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
977 pkg_found = false;
978 }
979 }
980
981 if (!pkg_found) {
982 /* no BIOS indications, assume SSP0-AIF2 connection */
983 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
984 }
8a880a20
HG		 985 }
986
02c0a3b3
PLB		 987 /* check quirks before creating card */
988 dmi_check_system(byt_rt5651_quirk_table);
46058aeb 989
fb45befa 990 if (quirk_override != -1) {
7eb18731
HG		 991 dev_info(&pdev->dev, "Overriding quirk 0x%x => 0x%x\n",
992 (unsigned int)byt_rt5651_quirk, quirk_override);
993 byt_rt5651_quirk = quirk_override;
994 }
995
46058aeb 996 /* Must be called before register_card, also see declaration comment. */
2c375204 997 ret_val = byt_rt5651_add_codec_device_props(codec_dev);
5f6fb23d
HG		 998 if (ret_val) {
999 put_device(codec_dev);
46058aeb 1000 return ret_val;
5f6fb23d
HG		 1001 }
1002
1003 /* Cherry Trail devices use an external amplifier enable gpio */
fee3e1cb 1004 if (x86_match_cpu(cherrytrail_cpu_ids) && !byt_rt5651_gpios)
4d1f7a6e 1005 byt_rt5651_gpios = cht_rt5651_gpios;
fee3e1cb
HG		 1006
1007 if (byt_rt5651_gpios) {
1008 devm_acpi_dev_add_driver_gpios(codec_dev, byt_rt5651_gpios);
5f6fb23d
HG		 1009 priv->ext_amp_gpio = devm_fwnode_get_index_gpiod_from_child(
1010 &pdev->dev, "ext-amp-enable", 0,
1011 codec_dev->fwnode,
1012 GPIOD_OUT_LOW, "speaker-amp");
1013 if (IS_ERR(priv->ext_amp_gpio)) {
1014 ret_val = PTR_ERR(priv->ext_amp_gpio);
1015 switch (ret_val) {
1016 case -ENOENT:
1017 priv->ext_amp_gpio = NULL;
1018 break;
1019 default:
1020 dev_err(&pdev->dev, "Failed to get ext-amp-enable GPIO: %d\n",
1021 ret_val);
1022 /* fall through */
1023 case -EPROBE_DEFER:
1024 put_device(codec_dev);
1025 return ret_val;
1026 }
1027 }
90768eaf
HG		 1028 priv->hp_detect = devm_fwnode_get_index_gpiod_from_child(
1029 &pdev->dev, "hp-detect", 0,
1030 codec_dev->fwnode,
1031 GPIOD_IN, "hp-detect");
1032 if (IS_ERR(priv->hp_detect)) {
1033 ret_val = PTR_ERR(priv->hp_detect);
1034 switch (ret_val) {
1035 case -ENOENT:
1036 priv->hp_detect = NULL;
1037 break;
1038 default:
1039 dev_err(&pdev->dev, "Failed to get hp-detect GPIO: %d\n",
1040 ret_val);
1041 /* fall through */
1042 case -EPROBE_DEFER:
1043 put_device(codec_dev);
1044 return ret_val;
1045 }
1046 }
5f6fb23d
HG		 1047 }
1048
1049 put_device(codec_dev);
46058aeb 1050
02c0a3b3
PLB		 1051 log_quirks(&pdev->dev);
1052
8a880a20
HG		 1053 if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
1054 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
1055 /* fixup codec aif name */
1056 snprintf(byt_rt5651_codec_aif_name,
1057 sizeof(byt_rt5651_codec_aif_name),
1058 "%s", "rt5651-aif2");
1059
1060 byt_rt5651_dais[dai_index].codec_dai_name =
1061 byt_rt5651_codec_aif_name;
1062 }
1063
1064 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
1065 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
1066 /* fixup cpu dai name name */
1067 snprintf(byt_rt5651_cpu_dai_name,
1068 sizeof(byt_rt5651_cpu_dai_name),
1069 "%s", "ssp0-port");
1070
1071 byt_rt5651_dais[dai_index].cpu_dai_name =
1072 byt_rt5651_cpu_dai_name;
1073 }
1074
02c0a3b3
PLB		 1075 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
1076 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
1077 if (IS_ERR(priv->mclk)) {
de5afce2 1078 ret_val = PTR_ERR(priv->mclk);
02c0a3b3 1079 dev_err(&pdev->dev,
de5afce2
CIK		 1080 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
1081 ret_val);
02c0a3b3
PLB		 1082 /*
1083 * Fall back to bit clock usage for -ENOENT (clock not
1084 * available likely due to missing dependencies), bail
1085 * for all other errors, including -EPROBE_DEFER
1086 */
1087 if (ret_val != -ENOENT)
1088 return ret_val;
1089 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
1090 }
1091 }
1092
8f250e70
HG		 1093 if (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED)
1094 hp_swapped = "-hp-swapped";
1095 else
1096 hp_swapped = "";
1097
64484cce 1098 snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
a0d1d867
HG		 1099 "bytcr-rt5651-%s-spk-%s-mic%s",
1100 (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ?
1101 "mono" : "stereo",
8f250e70 1102 mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], hp_swapped);
64484cce
HG		 1103 byt_rt5651_card.long_name = byt_rt5651_long_name;
1104
0b2c2093
PLB		 1105 /* override plaform name, if required */
1106 platform_name = mach->mach_params.platform;
1107
1108 ret_val = snd_soc_fixup_dai_links_platform_name(&byt_rt5651_card,
1109 platform_name);
1110 if (ret_val)
1111 return ret_val;
1112
2bd5bd15
PLB		 1113 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
1114
1115 if (ret_val) {
1116 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
1117 ret_val);
1118 return ret_val;
1119 }
1120 platform_set_drvdata(pdev, &byt_rt5651_card);
1121 return ret_val;
1122}
1123
1124static struct platform_driver snd_byt_rt5651_mc_driver = {
1125 .driver = {
1126 .name = "bytcr_rt5651",
2bd5bd15
PLB		 1127 },
1128 .probe = snd_byt_rt5651_mc_probe,
1129};
1130
1131module_platform_driver(snd_byt_rt5651_mc_driver);
1132
1133MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
1134MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
1135MODULE_LICENSE("GPL v2");
1136MODULE_ALIAS("platform:bytcr_rt5651");
Linux 6.x block layer and io_uring tree(s)