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8e8e69d6 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2bd5bd15 PLB |
2 | /* |
3 | * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform | |
4 | * (derived from bytcr_rt5640.c) | |
5 | * | |
6 | * Copyright (C) 2015 Intel Corp | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
2bd5bd15 PLB |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
46058aeb | 13 | #include <linux/i2c.h> |
2bd5bd15 PLB |
14 | #include <linux/module.h> |
15 | #include <linux/platform_device.h> | |
46058aeb | 16 | #include <linux/property.h> |
2bd5bd15 | 17 | #include <linux/acpi.h> |
02c0a3b3 | 18 | #include <linux/clk.h> |
2bd5bd15 PLB |
19 | #include <linux/device.h> |
20 | #include <linux/dmi.h> | |
caed9d63 | 21 | #include <linux/input.h> |
5f6fb23d HG |
22 | #include <linux/gpio/consumer.h> |
23 | #include <linux/gpio/machine.h> | |
2bd5bd15 PLB |
24 | #include <linux/slab.h> |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
28 | #include <sound/jack.h> | |
7feb2f78 | 29 | #include <sound/soc-acpi.h> |
2bd5bd15 PLB |
30 | #include "../../codecs/rt5651.h" |
31 | #include "../atom/sst-atom-controls.h" | |
536cfd2f | 32 | #include "../common/soc-intel-quirks.h" |
02c0a3b3 PLB |
33 | |
34 | enum { | |
35 | BYT_RT5651_DMIC_MAP, | |
36 | BYT_RT5651_IN1_MAP, | |
ac275ee5 | 37 | BYT_RT5651_IN2_MAP, |
ea261bd0 | 38 | BYT_RT5651_IN1_IN2_MAP, |
02c0a3b3 PLB |
39 | }; |
40 | ||
46058aeb HG |
41 | enum { |
42 | BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4), | |
43 | BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4), | |
44 | BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4), | |
45 | BYT_RT5651_JD2 = (RT5651_JD2 << 4), | |
46 | }; | |
47 | ||
8ffaa6a1 HG |
48 | enum { |
49 | BYT_RT5651_OVCD_TH_600UA = (6 << 8), | |
50 | BYT_RT5651_OVCD_TH_1500UA = (15 << 8), | |
51 | BYT_RT5651_OVCD_TH_2000UA = (20 << 8), | |
52 | }; | |
53 | ||
54 | enum { | |
55 | BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13), | |
56 | BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13), | |
57 | BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13), | |
58 | BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13), | |
59 | }; | |
60 | ||
46058aeb HG |
61 | #define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0)) |
62 | #define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4) | |
8ffaa6a1 HG |
63 | #define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8) |
64 | #define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13) | |
46058aeb HG |
65 | #define BYT_RT5651_DMIC_EN BIT(16) |
66 | #define BYT_RT5651_MCLK_EN BIT(17) | |
67 | #define BYT_RT5651_MCLK_25MHZ BIT(18) | |
8a880a20 HG |
68 | #define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */ |
69 | #define BYT_RT5651_SSP0_AIF1 BIT(20) | |
70 | #define BYT_RT5651_SSP0_AIF2 BIT(21) | |
8f250e70 | 71 | #define BYT_RT5651_HP_LR_SWAPPED BIT(22) |
a0d1d867 | 72 | #define BYT_RT5651_MONO_SPEAKER BIT(23) |
a0cb2d43 | 73 | #define BYT_RT5651_JD_NOT_INV BIT(24) |
46058aeb | 74 | |
fc7c460f HG |
75 | #define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \ |
76 | BYT_RT5651_JD1_1 | \ | |
77 | BYT_RT5651_OVCD_TH_2000UA | \ | |
78 | BYT_RT5651_OVCD_SF_0P75) | |
79 | ||
a0cb2d43 HG |
80 | /* jack-detect-source + inv + dmic-en + ovcd-th + -sf + terminating entry */ |
81 | #define MAX_NO_PROPS 6 | |
02c0a3b3 PLB |
82 | |
83 | struct byt_rt5651_private { | |
84 | struct clk *mclk; | |
5f6fb23d | 85 | struct gpio_desc *ext_amp_gpio; |
90768eaf | 86 | struct gpio_desc *hp_detect; |
d9f8f9b2 | 87 | struct snd_soc_jack jack; |
02c0a3b3 PLB |
88 | }; |
89 | ||
fee3e1cb HG |
90 | static const struct acpi_gpio_mapping *byt_rt5651_gpios; |
91 | ||
ac275ee5 | 92 | /* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */ |
fc7c460f | 93 | static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS | |
ac275ee5 | 94 | BYT_RT5651_IN2_MAP; |
02c0a3b3 | 95 | |
fb45befa PLB |
96 | static int quirk_override = -1; |
97 | module_param_named(quirk, quirk_override, int, 0444); | |
7eb18731 HG |
98 | MODULE_PARM_DESC(quirk, "Board-specific quirk override"); |
99 | ||
02c0a3b3 PLB |
100 | static void log_quirks(struct device *dev) |
101 | { | |
102 | if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP) | |
103 | dev_info(dev, "quirk DMIC_MAP enabled"); | |
104 | if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP) | |
105 | dev_info(dev, "quirk IN1_MAP enabled"); | |
ac275ee5 HG |
106 | if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP) |
107 | dev_info(dev, "quirk IN2_MAP enabled"); | |
366780df HG |
108 | if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP) |
109 | dev_info(dev, "quirk IN1_IN2_MAP enabled"); | |
8ffaa6a1 | 110 | if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) { |
46058aeb HG |
111 | dev_info(dev, "quirk realtek,jack-detect-source %ld\n", |
112 | BYT_RT5651_JDSRC(byt_rt5651_quirk)); | |
8ffaa6a1 HG |
113 | dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n", |
114 | BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100); | |
115 | dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n", | |
116 | BYT_RT5651_OVCD_SF(byt_rt5651_quirk)); | |
117 | } | |
02c0a3b3 PLB |
118 | if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN) |
119 | dev_info(dev, "quirk DMIC enabled"); | |
120 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) | |
121 | dev_info(dev, "quirk MCLK_EN enabled"); | |
122 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ) | |
123 | dev_info(dev, "quirk MCLK_25MHZ enabled"); | |
8a880a20 HG |
124 | if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) |
125 | dev_info(dev, "quirk SSP2_AIF2 enabled\n"); | |
126 | if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) | |
127 | dev_info(dev, "quirk SSP0_AIF1 enabled\n"); | |
128 | if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) | |
129 | dev_info(dev, "quirk SSP0_AIF2 enabled\n"); | |
a0d1d867 HG |
130 | if (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) |
131 | dev_info(dev, "quirk MONO_SPEAKER enabled\n"); | |
a0cb2d43 HG |
132 | if (byt_rt5651_quirk & BYT_RT5651_JD_NOT_INV) |
133 | dev_info(dev, "quirk JD_NOT_INV enabled\n"); | |
02c0a3b3 PLB |
134 | } |
135 | ||
136 | #define BYT_CODEC_DAI1 "rt5651-aif1" | |
8a880a20 | 137 | #define BYT_CODEC_DAI2 "rt5651-aif2" |
02c0a3b3 | 138 | |
aeec6cc0 HG |
139 | static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai, |
140 | int rate, int bclk_ratio) | |
141 | { | |
142 | int clk_id, clk_freq, ret; | |
143 | ||
144 | /* Configure the PLL before selecting it */ | |
145 | if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) { | |
146 | clk_id = RT5651_PLL1_S_BCLK1, | |
147 | clk_freq = rate * bclk_ratio; | |
148 | } else { | |
149 | clk_id = RT5651_PLL1_S_MCLK; | |
150 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ) | |
151 | clk_freq = 25000000; | |
152 | else | |
153 | clk_freq = 19200000; | |
154 | } | |
155 | ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512); | |
156 | if (ret < 0) { | |
2759ba9b | 157 | dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret); |
aeec6cc0 HG |
158 | return ret; |
159 | } | |
160 | ||
161 | ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1, | |
162 | rate * 512, SND_SOC_CLOCK_IN); | |
163 | if (ret < 0) { | |
2759ba9b | 164 | dev_err(codec_dai->component->dev, "can't set clock %d\n", ret); |
aeec6cc0 HG |
165 | return ret; |
166 | } | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
02c0a3b3 PLB |
171 | static int platform_clock_control(struct snd_soc_dapm_widget *w, |
172 | struct snd_kcontrol *k, int event) | |
173 | { | |
174 | struct snd_soc_dapm_context *dapm = w->dapm; | |
175 | struct snd_soc_card *card = dapm->card; | |
176 | struct snd_soc_dai *codec_dai; | |
177 | struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card); | |
178 | int ret; | |
179 | ||
dfb6ec7a | 180 | codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1); |
8a880a20 HG |
181 | if (!codec_dai) |
182 | codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2); | |
02c0a3b3 PLB |
183 | if (!codec_dai) { |
184 | dev_err(card->dev, | |
185 | "Codec dai not found; Unable to set platform clock\n"); | |
186 | return -EIO; | |
187 | } | |
188 | ||
189 | if (SND_SOC_DAPM_EVENT_ON(event)) { | |
190 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) { | |
191 | ret = clk_prepare_enable(priv->mclk); | |
192 | if (ret < 0) { | |
193 | dev_err(card->dev, | |
194 | "could not configure MCLK state"); | |
195 | return ret; | |
196 | } | |
197 | } | |
aeec6cc0 | 198 | ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50); |
02c0a3b3 PLB |
199 | } else { |
200 | /* | |
201 | * Set codec clock source to internal clock before | |
202 | * turning off the platform clock. Codec needs clock | |
203 | * for Jack detection and button press | |
204 | */ | |
205 | ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK, | |
206 | 48000 * 512, | |
207 | SND_SOC_CLOCK_IN); | |
208 | if (!ret) | |
209 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) | |
210 | clk_disable_unprepare(priv->mclk); | |
211 | } | |
212 | ||
213 | if (ret < 0) { | |
214 | dev_err(card->dev, "can't set codec sysclk: %d\n", ret); | |
215 | return ret; | |
216 | } | |
217 | ||
218 | return 0; | |
219 | } | |
2bd5bd15 | 220 | |
5f6fb23d HG |
221 | static int rt5651_ext_amp_power_event(struct snd_soc_dapm_widget *w, |
222 | struct snd_kcontrol *kcontrol, int event) | |
223 | { | |
224 | struct snd_soc_card *card = w->dapm->card; | |
225 | struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card); | |
226 | ||
227 | if (SND_SOC_DAPM_EVENT_ON(event)) | |
228 | gpiod_set_value_cansleep(priv->ext_amp_gpio, 1); | |
229 | else | |
230 | gpiod_set_value_cansleep(priv->ext_amp_gpio, 0); | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
2bd5bd15 PLB |
235 | static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = { |
236 | SND_SOC_DAPM_HP("Headphone", NULL), | |
237 | SND_SOC_DAPM_MIC("Headset Mic", NULL), | |
238 | SND_SOC_DAPM_MIC("Internal Mic", NULL), | |
239 | SND_SOC_DAPM_SPK("Speaker", NULL), | |
ea39bdcf | 240 | SND_SOC_DAPM_LINE("Line In", NULL), |
02c0a3b3 PLB |
241 | SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, |
242 | platform_clock_control, SND_SOC_DAPM_PRE_PMU | | |
243 | SND_SOC_DAPM_POST_PMD), | |
5f6fb23d HG |
244 | SND_SOC_DAPM_SUPPLY("Ext Amp Power", SND_SOC_NOPM, 0, 0, |
245 | rt5651_ext_amp_power_event, | |
246 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
2bd5bd15 PLB |
247 | }; |
248 | ||
249 | static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = { | |
02c0a3b3 PLB |
250 | {"Headphone", NULL, "Platform Clock"}, |
251 | {"Headset Mic", NULL, "Platform Clock"}, | |
252 | {"Internal Mic", NULL, "Platform Clock"}, | |
253 | {"Speaker", NULL, "Platform Clock"}, | |
5f6fb23d | 254 | {"Speaker", NULL, "Ext Amp Power"}, |
ea39bdcf | 255 | {"Line In", NULL, "Platform Clock"}, |
02c0a3b3 | 256 | |
2bd5bd15 | 257 | {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */ |
2bd5bd15 PLB |
258 | {"Headphone", NULL, "HPOL"}, |
259 | {"Headphone", NULL, "HPOR"}, | |
260 | {"Speaker", NULL, "LOUTL"}, | |
261 | {"Speaker", NULL, "LOUTR"}, | |
ea39bdcf PLB |
262 | {"IN2P", NULL, "Line In"}, |
263 | {"IN2N", NULL, "Line In"}, | |
264 | ||
2bd5bd15 PLB |
265 | }; |
266 | ||
6356c78c PLB |
267 | static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = { |
268 | {"DMIC L1", NULL, "Internal Mic"}, | |
269 | {"DMIC R1", NULL, "Internal Mic"}, | |
aee48a9f | 270 | {"IN2P", NULL, "Headset Mic"}, |
2bd5bd15 PLB |
271 | }; |
272 | ||
273 | static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = { | |
274 | {"Internal Mic", NULL, "micbias1"}, | |
275 | {"IN1P", NULL, "Internal Mic"}, | |
de231479 | 276 | {"IN3P", NULL, "Headset Mic"}, |
2bd5bd15 PLB |
277 | }; |
278 | ||
ac275ee5 HG |
279 | static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = { |
280 | {"Internal Mic", NULL, "micbias1"}, | |
281 | {"IN2P", NULL, "Internal Mic"}, | |
282 | {"IN3P", NULL, "Headset Mic"}, | |
283 | }; | |
284 | ||
ea261bd0 CC |
285 | static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = { |
286 | {"Internal Mic", NULL, "micbias1"}, | |
287 | {"IN1P", NULL, "Internal Mic"}, | |
288 | {"IN2P", NULL, "Internal Mic"}, | |
289 | {"IN3P", NULL, "Headset Mic"}, | |
290 | }; | |
291 | ||
8a880a20 HG |
292 | static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = { |
293 | {"ssp0 Tx", NULL, "modem_out"}, | |
294 | {"modem_in", NULL, "ssp0 Rx"}, | |
295 | ||
296 | {"AIF1 Playback", NULL, "ssp0 Tx"}, | |
297 | {"ssp0 Rx", NULL, "AIF1 Capture"}, | |
298 | }; | |
299 | ||
300 | static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = { | |
301 | {"ssp0 Tx", NULL, "modem_out"}, | |
302 | {"modem_in", NULL, "ssp0 Rx"}, | |
303 | ||
304 | {"AIF2 Playback", NULL, "ssp0 Tx"}, | |
305 | {"ssp0 Rx", NULL, "AIF2 Capture"}, | |
306 | }; | |
307 | ||
308 | static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = { | |
309 | {"ssp2 Tx", NULL, "codec_out0"}, | |
310 | {"ssp2 Tx", NULL, "codec_out1"}, | |
311 | {"codec_in0", NULL, "ssp2 Rx"}, | |
312 | {"codec_in1", NULL, "ssp2 Rx"}, | |
313 | ||
314 | {"AIF1 Playback", NULL, "ssp2 Tx"}, | |
315 | {"ssp2 Rx", NULL, "AIF1 Capture"}, | |
316 | }; | |
317 | ||
318 | static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = { | |
319 | {"ssp2 Tx", NULL, "codec_out0"}, | |
320 | {"ssp2 Tx", NULL, "codec_out1"}, | |
321 | {"codec_in0", NULL, "ssp2 Rx"}, | |
322 | {"codec_in1", NULL, "ssp2 Rx"}, | |
323 | ||
324 | {"AIF2 Playback", NULL, "ssp2 Tx"}, | |
325 | {"ssp2 Rx", NULL, "AIF2 Capture"}, | |
326 | }; | |
327 | ||
2bd5bd15 PLB |
328 | static const struct snd_kcontrol_new byt_rt5651_controls[] = { |
329 | SOC_DAPM_PIN_SWITCH("Headphone"), | |
330 | SOC_DAPM_PIN_SWITCH("Headset Mic"), | |
331 | SOC_DAPM_PIN_SWITCH("Internal Mic"), | |
332 | SOC_DAPM_PIN_SWITCH("Speaker"), | |
ea39bdcf | 333 | SOC_DAPM_PIN_SWITCH("Line In"), |
2bd5bd15 PLB |
334 | }; |
335 | ||
d9f8f9b2 CC |
336 | static struct snd_soc_jack_pin bytcr_jack_pins[] = { |
337 | { | |
338 | .pin = "Headphone", | |
339 | .mask = SND_JACK_HEADPHONE, | |
340 | }, | |
341 | { | |
342 | .pin = "Headset Mic", | |
343 | .mask = SND_JACK_MICROPHONE, | |
344 | }, | |
345 | }; | |
346 | ||
2bd5bd15 PLB |
347 | static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream, |
348 | struct snd_pcm_hw_params *params) | |
349 | { | |
2207b93b | 350 | struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
0d1571c1 | 351 | struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); |
8a880a20 | 352 | snd_pcm_format_t format = params_format(params); |
aeec6cc0 | 353 | int rate = params_rate(params); |
8a880a20 | 354 | int bclk_ratio; |
2bd5bd15 | 355 | |
8a880a20 HG |
356 | if (format == SNDRV_PCM_FORMAT_S16_LE) |
357 | bclk_ratio = 32; | |
358 | else | |
359 | bclk_ratio = 50; | |
360 | ||
361 | return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio); | |
2bd5bd15 PLB |
362 | } |
363 | ||
fee3e1cb HG |
364 | static const struct acpi_gpio_params pov_p1006w_hp_detect = { 1, 0, false }; |
365 | static const struct acpi_gpio_params pov_p1006w_ext_amp_en = { 2, 0, true }; | |
366 | ||
367 | static const struct acpi_gpio_mapping byt_rt5651_pov_p1006w_gpios[] = { | |
368 | { "hp-detect-gpios", &pov_p1006w_hp_detect, 1, }, | |
369 | { "ext-amp-enable-gpios", &pov_p1006w_ext_amp_en, 1, }, | |
370 | { }, | |
371 | }; | |
372 | ||
373 | static int byt_rt5651_pov_p1006w_quirk_cb(const struct dmi_system_id *id) | |
374 | { | |
375 | byt_rt5651_quirk = (unsigned long)id->driver_data; | |
376 | byt_rt5651_gpios = byt_rt5651_pov_p1006w_gpios; | |
377 | return 1; | |
378 | } | |
379 | ||
02c0a3b3 PLB |
380 | static int byt_rt5651_quirk_cb(const struct dmi_system_id *id) |
381 | { | |
382 | byt_rt5651_quirk = (unsigned long)id->driver_data; | |
383 | return 1; | |
384 | } | |
385 | ||
2bd5bd15 | 386 | static const struct dmi_system_id byt_rt5651_quirk_table[] = { |
02c0a3b3 | 387 | { |
55d69c03 | 388 | /* Chuwi Hi8 Pro (CWI513) */ |
02c0a3b3 PLB |
389 | .callback = byt_rt5651_quirk_cb, |
390 | .matches = { | |
55d69c03 HG |
391 | DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"), |
392 | DMI_MATCH(DMI_PRODUCT_NAME, "X1D3_C806N"), | |
02c0a3b3 | 393 | }, |
55d69c03 | 394 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | |
ac275ee5 | 395 | BYT_RT5651_IN2_MAP | |
a0d1d867 HG |
396 | BYT_RT5651_HP_LR_SWAPPED | |
397 | BYT_RT5651_MONO_SPEAKER), | |
02c0a3b3 | 398 | }, |
416f2b51 | 399 | { |
55d69c03 | 400 | /* Chuwi Vi8 Plus (CWI519) */ |
416f2b51 PLB |
401 | .callback = byt_rt5651_quirk_cb, |
402 | .matches = { | |
55d69c03 HG |
403 | DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"), |
404 | DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"), | |
416f2b51 | 405 | }, |
55d69c03 | 406 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | |
ac275ee5 | 407 | BYT_RT5651_IN2_MAP | |
a0d1d867 HG |
408 | BYT_RT5651_HP_LR_SWAPPED | |
409 | BYT_RT5651_MONO_SPEAKER), | |
416f2b51 | 410 | }, |
a0cb2d43 HG |
411 | { |
412 | /* Complet Electro Serv MY8307 */ | |
413 | .callback = byt_rt5651_quirk_cb, | |
414 | .matches = { | |
415 | DMI_MATCH(DMI_SYS_VENDOR, "Complet Electro Serv"), | |
416 | DMI_MATCH(DMI_PRODUCT_NAME, "MY8307"), | |
417 | }, | |
418 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | | |
419 | BYT_RT5651_IN2_MAP | | |
420 | BYT_RT5651_MONO_SPEAKER | | |
421 | BYT_RT5651_JD_NOT_INV), | |
422 | }, | |
06aa6e51 HG |
423 | { |
424 | /* I.T.Works TW701, Ployer Momo7w and Trekstor ST70416-6 | |
425 | * (these all use the same mainboard) */ | |
426 | .callback = byt_rt5651_quirk_cb, | |
427 | .matches = { | |
428 | DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."), | |
429 | /* Partial match for all of itWORKS.G.WI71C.JGBMRBA, | |
430 | * TREK.G.WI71C.JGBMRBA0x and MOMO.G.WI71C.MABMRBA02 */ | |
431 | DMI_MATCH(DMI_BIOS_VERSION, ".G.WI71C."), | |
432 | }, | |
433 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | | |
434 | BYT_RT5651_IN2_MAP | | |
435 | BYT_RT5651_SSP0_AIF1 | | |
436 | BYT_RT5651_MONO_SPEAKER), | |
437 | }, | |
2fe30129 | 438 | { |
55d69c03 | 439 | /* KIANO SlimNote 14.2 */ |
2fe30129 CC |
440 | .callback = byt_rt5651_quirk_cb, |
441 | .matches = { | |
442 | DMI_MATCH(DMI_SYS_VENDOR, "KIANO"), | |
443 | DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"), | |
444 | }, | |
fc7c460f | 445 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | |
56e49aa4 | 446 | BYT_RT5651_IN1_IN2_MAP), |
2fe30129 | 447 | }, |
8f250e70 | 448 | { |
55d69c03 | 449 | /* Minnowboard Max B3 */ |
8f250e70 HG |
450 | .callback = byt_rt5651_quirk_cb, |
451 | .matches = { | |
55d69c03 HG |
452 | DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"), |
453 | DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"), | |
8f250e70 | 454 | }, |
55d69c03 | 455 | .driver_data = (void *)(BYT_RT5651_IN1_MAP), |
8f250e70 | 456 | }, |
f026e063 | 457 | { |
55d69c03 | 458 | /* Minnowboard Turbot */ |
f026e063 HG |
459 | .callback = byt_rt5651_quirk_cb, |
460 | .matches = { | |
55d69c03 HG |
461 | DMI_MATCH(DMI_SYS_VENDOR, "ADI"), |
462 | DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"), | |
f026e063 | 463 | }, |
55d69c03 HG |
464 | .driver_data = (void *)(BYT_RT5651_MCLK_EN | |
465 | BYT_RT5651_IN1_MAP), | |
f026e063 | 466 | }, |
fee3e1cb HG |
467 | { |
468 | /* Point of View mobii wintab p1006w (v1.0) */ | |
469 | .callback = byt_rt5651_pov_p1006w_quirk_cb, | |
470 | .matches = { | |
471 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Insyde"), | |
472 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "BayTrail"), | |
473 | /* Note 105b is Foxcon's USB/PCI vendor id */ | |
474 | DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "105B"), | |
475 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"), | |
476 | }, | |
477 | .driver_data = (void *)(BYT_RT5651_DMIC_MAP | | |
478 | BYT_RT5651_OVCD_TH_2000UA | | |
479 | BYT_RT5651_OVCD_SF_0P75 | | |
480 | BYT_RT5651_DMIC_EN | | |
481 | BYT_RT5651_MCLK_EN | | |
482 | BYT_RT5651_SSP0_AIF1), | |
483 | }, | |
f9877eb5 HG |
484 | { |
485 | /* VIOS LTH17 */ | |
486 | .callback = byt_rt5651_quirk_cb, | |
487 | .matches = { | |
488 | DMI_MATCH(DMI_SYS_VENDOR, "VIOS"), | |
489 | DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"), | |
490 | }, | |
8627fb25 HG |
491 | .driver_data = (void *)(BYT_RT5651_IN1_IN2_MAP | |
492 | BYT_RT5651_JD1_1 | | |
493 | BYT_RT5651_OVCD_TH_2000UA | | |
494 | BYT_RT5651_OVCD_SF_1P0 | | |
495 | BYT_RT5651_MCLK_EN), | |
f9877eb5 | 496 | }, |
06aa6e51 HG |
497 | { |
498 | /* Yours Y8W81 (and others using the same mainboard) */ | |
499 | .callback = byt_rt5651_quirk_cb, | |
500 | .matches = { | |
501 | DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."), | |
502 | /* Partial match for all devs with a W86C mainboard */ | |
503 | DMI_MATCH(DMI_BIOS_VERSION, ".F.W86C."), | |
504 | }, | |
505 | .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS | | |
506 | BYT_RT5651_IN2_MAP | | |
507 | BYT_RT5651_SSP0_AIF1 | | |
508 | BYT_RT5651_MONO_SPEAKER), | |
509 | }, | |
2bd5bd15 PLB |
510 | {} |
511 | }; | |
512 | ||
46058aeb HG |
513 | /* |
514 | * Note this MUST be called before snd_soc_register_card(), so that the props | |
515 | * are in place before the codec component driver's probe function parses them. | |
516 | */ | |
2c375204 | 517 | static int byt_rt5651_add_codec_device_props(struct device *i2c_dev) |
46058aeb HG |
518 | { |
519 | struct property_entry props[MAX_NO_PROPS] = {}; | |
2c375204 | 520 | int cnt = 0; |
46058aeb HG |
521 | |
522 | props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source", | |
523 | BYT_RT5651_JDSRC(byt_rt5651_quirk)); | |
524 | ||
8ffaa6a1 HG |
525 | props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp", |
526 | BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100); | |
527 | ||
528 | props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor", | |
529 | BYT_RT5651_OVCD_SF(byt_rt5651_quirk)); | |
530 | ||
c2f26938 HG |
531 | if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN) |
532 | props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en"); | |
533 | ||
a0cb2d43 HG |
534 | if (byt_rt5651_quirk & BYT_RT5651_JD_NOT_INV) |
535 | props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,jack-detect-not-inverted"); | |
536 | ||
2c375204 | 537 | return device_add_properties(i2c_dev, props); |
46058aeb HG |
538 | } |
539 | ||
2bd5bd15 PLB |
540 | static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime) |
541 | { | |
2bd5bd15 | 542 | struct snd_soc_card *card = runtime->card; |
0d1571c1 | 543 | struct snd_soc_component *codec = asoc_rtd_to_codec(runtime, 0)->component; |
02c0a3b3 | 544 | struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card); |
2bd5bd15 PLB |
545 | const struct snd_soc_dapm_route *custom_map; |
546 | int num_routes; | |
90768eaf | 547 | int report; |
02c0a3b3 | 548 | int ret; |
2bd5bd15 PLB |
549 | |
550 | card->dapm.idle_bias_off = true; | |
551 | ||
c22969d7 HG |
552 | /* Start with RC clk for jack-detect (we disable MCLK below) */ |
553 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) | |
554 | snd_soc_component_update_bits(codec, RT5651_GLB_CLK, | |
555 | RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK); | |
556 | ||
2bd5bd15 PLB |
557 | switch (BYT_RT5651_MAP(byt_rt5651_quirk)) { |
558 | case BYT_RT5651_IN1_MAP: | |
559 | custom_map = byt_rt5651_intmic_in1_map; | |
560 | num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map); | |
561 | break; | |
ac275ee5 HG |
562 | case BYT_RT5651_IN2_MAP: |
563 | custom_map = byt_rt5651_intmic_in2_map; | |
564 | num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map); | |
565 | break; | |
ea261bd0 CC |
566 | case BYT_RT5651_IN1_IN2_MAP: |
567 | custom_map = byt_rt5651_intmic_in1_in2_map; | |
568 | num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map); | |
569 | break; | |
2bd5bd15 | 570 | default: |
6356c78c PLB |
571 | custom_map = byt_rt5651_intmic_dmic_map; |
572 | num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map); | |
2bd5bd15 | 573 | } |
6356c78c PLB |
574 | ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes); |
575 | if (ret) | |
576 | return ret; | |
2bd5bd15 | 577 | |
8a880a20 HG |
578 | if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) { |
579 | ret = snd_soc_dapm_add_routes(&card->dapm, | |
580 | byt_rt5651_ssp2_aif2_map, | |
581 | ARRAY_SIZE(byt_rt5651_ssp2_aif2_map)); | |
582 | } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) { | |
583 | ret = snd_soc_dapm_add_routes(&card->dapm, | |
584 | byt_rt5651_ssp0_aif1_map, | |
585 | ARRAY_SIZE(byt_rt5651_ssp0_aif1_map)); | |
586 | } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) { | |
587 | ret = snd_soc_dapm_add_routes(&card->dapm, | |
588 | byt_rt5651_ssp0_aif2_map, | |
589 | ARRAY_SIZE(byt_rt5651_ssp0_aif2_map)); | |
590 | } else { | |
591 | ret = snd_soc_dapm_add_routes(&card->dapm, | |
592 | byt_rt5651_ssp2_aif1_map, | |
593 | ARRAY_SIZE(byt_rt5651_ssp2_aif1_map)); | |
594 | } | |
595 | if (ret) | |
596 | return ret; | |
597 | ||
2bd5bd15 PLB |
598 | ret = snd_soc_add_card_controls(card, byt_rt5651_controls, |
599 | ARRAY_SIZE(byt_rt5651_controls)); | |
600 | if (ret) { | |
601 | dev_err(card->dev, "unable to add card controls\n"); | |
602 | return ret; | |
603 | } | |
2bd5bd15 | 604 | |
02c0a3b3 PLB |
605 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) { |
606 | /* | |
607 | * The firmware might enable the clock at | |
608 | * boot (this information may or may not | |
609 | * be reflected in the enable clock register). | |
610 | * To change the rate we must disable the clock | |
611 | * first to cover these cases. Due to common | |
612 | * clock framework restrictions that do not allow | |
613 | * to disable a clock that has not been enabled, | |
614 | * we need to enable the clock first. | |
615 | */ | |
616 | ret = clk_prepare_enable(priv->mclk); | |
617 | if (!ret) | |
618 | clk_disable_unprepare(priv->mclk); | |
619 | ||
620 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ) | |
621 | ret = clk_set_rate(priv->mclk, 25000000); | |
622 | else | |
623 | ret = clk_set_rate(priv->mclk, 19200000); | |
624 | ||
625 | if (ret) | |
626 | dev_err(card->dev, "unable to set MCLK rate\n"); | |
627 | } | |
628 | ||
90768eaf HG |
629 | report = 0; |
630 | if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) | |
631 | report = SND_JACK_HEADSET | SND_JACK_BTN_0; | |
632 | else if (priv->hp_detect) | |
633 | report = SND_JACK_HEADSET; | |
634 | ||
635 | if (report) { | |
aed859a2 | 636 | ret = snd_soc_card_jack_new(runtime->card, "Headset", |
90768eaf | 637 | report, &priv->jack, bytcr_jack_pins, |
caed9d63 | 638 | ARRAY_SIZE(bytcr_jack_pins)); |
aed859a2 HG |
639 | if (ret) { |
640 | dev_err(runtime->dev, "jack creation failed %d\n", ret); | |
641 | return ret; | |
642 | } | |
d9f8f9b2 | 643 | |
90768eaf HG |
644 | if (report & SND_JACK_BTN_0) |
645 | snd_jack_set_key(priv->jack.jack, SND_JACK_BTN_0, | |
646 | KEY_PLAYPAUSE); | |
caed9d63 | 647 | |
90768eaf HG |
648 | ret = snd_soc_component_set_jack(codec, &priv->jack, |
649 | priv->hp_detect); | |
aed859a2 HG |
650 | if (ret) |
651 | return ret; | |
652 | } | |
d9f8f9b2 | 653 | |
aed859a2 | 654 | return 0; |
2bd5bd15 PLB |
655 | } |
656 | ||
2bd5bd15 PLB |
657 | static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd, |
658 | struct snd_pcm_hw_params *params) | |
659 | { | |
660 | struct snd_interval *rate = hw_param_interval(params, | |
661 | SNDRV_PCM_HW_PARAM_RATE); | |
662 | struct snd_interval *channels = hw_param_interval(params, | |
663 | SNDRV_PCM_HW_PARAM_CHANNELS); | |
8a880a20 | 664 | int ret, bits; |
2bd5bd15 | 665 | |
8a880a20 | 666 | /* The DSP will covert the FE rate to 48k, stereo */ |
2bd5bd15 PLB |
667 | rate->min = rate->max = 48000; |
668 | channels->min = channels->max = 2; | |
669 | ||
8a880a20 HG |
670 | if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) || |
671 | (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) { | |
672 | /* set SSP0 to 16-bit */ | |
673 | params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); | |
674 | bits = 16; | |
675 | } else { | |
676 | /* set SSP2 to 24-bit */ | |
677 | params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); | |
678 | bits = 24; | |
679 | } | |
2bd5bd15 PLB |
680 | |
681 | /* | |
682 | * Default mode for SSP configuration is TDM 4 slot, override config | |
8a880a20 | 683 | * with explicit setting to I2S 2ch. The word length is set with |
2bd5bd15 PLB |
684 | * dai_set_tdm_slot() since there is no other API exposed |
685 | */ | |
0d1571c1 | 686 | ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), |
2bd5bd15 | 687 | SND_SOC_DAIFMT_I2S | |
f12f5c84 | 688 | SND_SOC_DAIFMT_NB_NF | |
2bd5bd15 PLB |
689 | SND_SOC_DAIFMT_CBS_CFS |
690 | ); | |
691 | ||
692 | if (ret < 0) { | |
693 | dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); | |
694 | return ret; | |
695 | } | |
696 | ||
0d1571c1 | 697 | ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits); |
2bd5bd15 PLB |
698 | if (ret < 0) { |
699 | dev_err(rtd->dev, "can't set I2S config, err %d\n", ret); | |
700 | return ret; | |
701 | } | |
702 | ||
703 | return 0; | |
704 | } | |
705 | ||
1ebb4d9d | 706 | static const unsigned int rates_48000[] = { |
2bd5bd15 PLB |
707 | 48000, |
708 | }; | |
709 | ||
1ebb4d9d | 710 | static const struct snd_pcm_hw_constraint_list constraints_48000 = { |
2bd5bd15 PLB |
711 | .count = ARRAY_SIZE(rates_48000), |
712 | .list = rates_48000, | |
713 | }; | |
714 | ||
715 | static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream) | |
716 | { | |
717 | return snd_pcm_hw_constraint_list(substream->runtime, 0, | |
718 | SNDRV_PCM_HW_PARAM_RATE, | |
719 | &constraints_48000); | |
720 | } | |
721 | ||
9b6fdef6 | 722 | static const struct snd_soc_ops byt_rt5651_aif1_ops = { |
2bd5bd15 PLB |
723 | .startup = byt_rt5651_aif1_startup, |
724 | }; | |
725 | ||
9b6fdef6 | 726 | static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = { |
2bd5bd15 PLB |
727 | .hw_params = byt_rt5651_aif1_hw_params, |
728 | }; | |
729 | ||
01fee62a KM |
730 | SND_SOC_DAILINK_DEF(dummy, |
731 | DAILINK_COMP_ARRAY(COMP_DUMMY())); | |
732 | ||
733 | SND_SOC_DAILINK_DEF(media, | |
734 | DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai"))); | |
735 | ||
736 | SND_SOC_DAILINK_DEF(deepbuffer, | |
737 | DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai"))); | |
738 | ||
739 | SND_SOC_DAILINK_DEF(ssp2_port, | |
740 | DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port"))); | |
741 | SND_SOC_DAILINK_DEF(ssp2_codec, | |
742 | DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5651:00", "rt5651-aif1"))); | |
743 | ||
744 | SND_SOC_DAILINK_DEF(platform, | |
745 | DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform"))); | |
746 | ||
2bd5bd15 PLB |
747 | static struct snd_soc_dai_link byt_rt5651_dais[] = { |
748 | [MERR_DPCM_AUDIO] = { | |
749 | .name = "Audio Port", | |
750 | .stream_name = "Audio", | |
2bd5bd15 PLB |
751 | .nonatomic = true, |
752 | .dynamic = 1, | |
753 | .dpcm_playback = 1, | |
754 | .dpcm_capture = 1, | |
755 | .ops = &byt_rt5651_aif1_ops, | |
01fee62a | 756 | SND_SOC_DAILINK_REG(media, dummy, platform), |
2bd5bd15 PLB |
757 | }, |
758 | [MERR_DPCM_DEEP_BUFFER] = { | |
759 | .name = "Deep-Buffer Audio Port", | |
760 | .stream_name = "Deep-Buffer Audio", | |
2bd5bd15 PLB |
761 | .nonatomic = true, |
762 | .dynamic = 1, | |
763 | .dpcm_playback = 1, | |
764 | .ops = &byt_rt5651_aif1_ops, | |
01fee62a | 765 | SND_SOC_DAILINK_REG(deepbuffer, dummy, platform), |
2bd5bd15 | 766 | }, |
2bd5bd15 PLB |
767 | /* CODEC<->CODEC link */ |
768 | /* back ends */ | |
769 | { | |
770 | .name = "SSP2-Codec", | |
149f7757 | 771 | .id = 0, |
2bd5bd15 | 772 | .no_pcm = 1, |
2bd5bd15 PLB |
773 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
774 | | SND_SOC_DAIFMT_CBS_CFS, | |
775 | .be_hw_params_fixup = byt_rt5651_codec_fixup, | |
2bd5bd15 PLB |
776 | .nonatomic = true, |
777 | .dpcm_playback = 1, | |
778 | .dpcm_capture = 1, | |
779 | .init = byt_rt5651_init, | |
780 | .ops = &byt_rt5651_be_ssp2_ops, | |
01fee62a | 781 | SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform), |
2bd5bd15 PLB |
782 | }, |
783 | }; | |
784 | ||
785 | /* SoC card */ | |
b91f432c | 786 | static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN]; |
b5706f8e | 787 | #if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) |
a0d1d867 | 788 | static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */ |
b5706f8e | 789 | #endif |
0d5c8187 | 790 | static char byt_rt5651_components[50]; /* = "cfg-spk:* cfg-mic:*" */ |
b91f432c HG |
791 | |
792 | static int byt_rt5651_suspend(struct snd_soc_card *card) | |
793 | { | |
794 | struct snd_soc_component *component; | |
795 | ||
796 | if (!BYT_RT5651_JDSRC(byt_rt5651_quirk)) | |
797 | return 0; | |
798 | ||
f70f18f7 | 799 | for_each_card_components(card, component) { |
b91f432c HG |
800 | if (!strcmp(component->name, byt_rt5651_codec_name)) { |
801 | dev_dbg(component->dev, "disabling jack detect before suspend\n"); | |
802 | snd_soc_component_set_jack(component, NULL, NULL); | |
803 | break; | |
804 | } | |
805 | } | |
806 | ||
807 | return 0; | |
808 | } | |
809 | ||
810 | static int byt_rt5651_resume(struct snd_soc_card *card) | |
811 | { | |
812 | struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card); | |
813 | struct snd_soc_component *component; | |
814 | ||
815 | if (!BYT_RT5651_JDSRC(byt_rt5651_quirk)) | |
816 | return 0; | |
817 | ||
f70f18f7 | 818 | for_each_card_components(card, component) { |
b91f432c HG |
819 | if (!strcmp(component->name, byt_rt5651_codec_name)) { |
820 | dev_dbg(component->dev, "re-enabling jack detect after resume\n"); | |
90768eaf HG |
821 | snd_soc_component_set_jack(component, &priv->jack, |
822 | priv->hp_detect); | |
b91f432c HG |
823 | break; |
824 | } | |
825 | } | |
826 | ||
827 | return 0; | |
828 | } | |
829 | ||
b4ecd58b PLB |
830 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_BAYTRAIL) |
831 | /* use space before codec name to simplify card ID, and simplify driver name */ | |
832 | #define CARD_NAME "bytcht rt5651" /* card name will be 'sof-bytcht rt5651' */ | |
833 | #define DRIVER_NAME "SOF" | |
834 | #else | |
835 | #define CARD_NAME "bytcr-rt5651" | |
836 | #define DRIVER_NAME NULL /* card name will be used for driver name */ | |
837 | #endif | |
838 | ||
2bd5bd15 | 839 | static struct snd_soc_card byt_rt5651_card = { |
b4ecd58b PLB |
840 | .name = CARD_NAME, |
841 | .driver_name = DRIVER_NAME, | |
2bd5bd15 PLB |
842 | .owner = THIS_MODULE, |
843 | .dai_link = byt_rt5651_dais, | |
844 | .num_links = ARRAY_SIZE(byt_rt5651_dais), | |
845 | .dapm_widgets = byt_rt5651_widgets, | |
846 | .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets), | |
847 | .dapm_routes = byt_rt5651_audio_map, | |
848 | .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map), | |
849 | .fully_routed = true, | |
b91f432c HG |
850 | .suspend_pre = byt_rt5651_suspend, |
851 | .resume_post = byt_rt5651_resume, | |
2bd5bd15 PLB |
852 | }; |
853 | ||
4d1f7a6e | 854 | static const struct acpi_gpio_params ext_amp_enable_gpios = { 0, 0, false }; |
5f6fb23d | 855 | |
4d1f7a6e AS |
856 | static const struct acpi_gpio_mapping cht_rt5651_gpios[] = { |
857 | /* | |
858 | * Some boards have I2cSerialBusV2, GpioIo, GpioInt as ACPI resources, | |
859 | * other boards may have I2cSerialBusV2, GpioInt, GpioIo instead. | |
860 | * We want the GpioIo one for the ext-amp-enable-gpio. | |
861 | */ | |
862 | { "ext-amp-enable-gpios", &ext_amp_enable_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO }, | |
0a3badd1 HG |
863 | { }, |
864 | }; | |
865 | ||
8a880a20 HG |
866 | struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */ |
867 | u64 aif_value; /* 1: AIF1, 2: AIF2 */ | |
868 | u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */ | |
869 | }; | |
02c0a3b3 | 870 | |
2bd5bd15 PLB |
871 | static int snd_byt_rt5651_mc_probe(struct platform_device *pdev) |
872 | { | |
4ffdca62 | 873 | static const char * const mic_name[] = { "dmic", "in1", "in2", "in12" }; |
02c0a3b3 | 874 | struct byt_rt5651_private *priv; |
7feb2f78 | 875 | struct snd_soc_acpi_mach *mach; |
0b2c2093 | 876 | const char *platform_name; |
7075e9ba | 877 | struct acpi_device *adev; |
2c375204 | 878 | struct device *codec_dev; |
8a880a20 | 879 | bool is_bytcr = false; |
2bd5bd15 | 880 | int ret_val = 0; |
2193eb96 | 881 | int dai_index = 0; |
02c0a3b3 PLB |
882 | int i; |
883 | ||
aa5398e1 | 884 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
02c0a3b3 PLB |
885 | if (!priv) |
886 | return -ENOMEM; | |
2bd5bd15 PLB |
887 | |
888 | /* register the soc card */ | |
889 | byt_rt5651_card.dev = &pdev->dev; | |
890 | ||
02c0a3b3 PLB |
891 | mach = byt_rt5651_card.dev->platform_data; |
892 | snd_soc_card_set_drvdata(&byt_rt5651_card, priv); | |
893 | ||
894 | /* fix index of codec dai */ | |
02c0a3b3 | 895 | for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) { |
01fee62a KM |
896 | if (!strcmp(byt_rt5651_dais[i].codecs->name, |
897 | "i2c-10EC5651:00")) { | |
02c0a3b3 PLB |
898 | dai_index = i; |
899 | break; | |
900 | } | |
901 | } | |
902 | ||
903 | /* fixup codec name based on HID */ | |
7075e9ba AS |
904 | adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); |
905 | if (adev) { | |
906 | snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name), | |
907 | "i2c-%s", acpi_dev_name(adev)); | |
908 | put_device(&adev->dev); | |
01fee62a | 909 | byt_rt5651_dais[dai_index].codecs->name = byt_rt5651_codec_name; |
7075e9ba | 910 | } else { |
e39cacc1 HG |
911 | dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id); |
912 | return -ENODEV; | |
02c0a3b3 PLB |
913 | } |
914 | ||
2c375204 HG |
915 | codec_dev = bus_find_device_by_name(&i2c_bus_type, NULL, |
916 | byt_rt5651_codec_name); | |
917 | if (!codec_dev) | |
918 | return -EPROBE_DEFER; | |
919 | ||
8a880a20 HG |
920 | /* |
921 | * swap SSP0 if bytcr is detected | |
922 | * (will be overridden if DMI quirk is detected) | |
923 | */ | |
536cfd2f | 924 | if (soc_intel_is_byt()) { |
3ee1cd4f | 925 | if (mach->mach_params.acpi_ipc_irq_index == 0) |
8a880a20 HG |
926 | is_bytcr = true; |
927 | } | |
928 | ||
929 | if (is_bytcr) { | |
930 | /* | |
931 | * Baytrail CR platforms may have CHAN package in BIOS, try | |
932 | * to find relevant routing quirk based as done on Windows | |
933 | * platforms. We have to read the information directly from the | |
934 | * BIOS, at this stage the card is not created and the links | |
935 | * with the codec driver/pdata are non-existent | |
936 | */ | |
937 | ||
938 | struct acpi_chan_package chan_package; | |
939 | ||
940 | /* format specified: 2 64-bit integers */ | |
941 | struct acpi_buffer format = {sizeof("NN"), "NN"}; | |
942 | struct acpi_buffer state = {0, NULL}; | |
943 | struct snd_soc_acpi_package_context pkg_ctx; | |
944 | bool pkg_found = false; | |
945 | ||
946 | state.length = sizeof(chan_package); | |
947 | state.pointer = &chan_package; | |
948 | ||
949 | pkg_ctx.name = "CHAN"; | |
950 | pkg_ctx.length = 2; | |
951 | pkg_ctx.format = &format; | |
952 | pkg_ctx.state = &state; | |
953 | pkg_ctx.data_valid = false; | |
954 | ||
955 | pkg_found = snd_soc_acpi_find_package_from_hid(mach->id, | |
956 | &pkg_ctx); | |
957 | if (pkg_found) { | |
958 | if (chan_package.aif_value == 1) { | |
959 | dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n"); | |
960 | byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1; | |
961 | } else if (chan_package.aif_value == 2) { | |
962 | dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n"); | |
963 | byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2; | |
964 | } else { | |
965 | dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n"); | |
966 | pkg_found = false; | |
967 | } | |
968 | } | |
969 | ||
970 | if (!pkg_found) { | |
971 | /* no BIOS indications, assume SSP0-AIF2 connection */ | |
972 | byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2; | |
973 | } | |
8a880a20 HG |
974 | } |
975 | ||
02c0a3b3 PLB |
976 | /* check quirks before creating card */ |
977 | dmi_check_system(byt_rt5651_quirk_table); | |
46058aeb | 978 | |
fb45befa | 979 | if (quirk_override != -1) { |
2697f3af PLB |
980 | dev_info(&pdev->dev, "Overriding quirk 0x%lx => 0x%x\n", |
981 | byt_rt5651_quirk, quirk_override); | |
7eb18731 HG |
982 | byt_rt5651_quirk = quirk_override; |
983 | } | |
984 | ||
46058aeb | 985 | /* Must be called before register_card, also see declaration comment. */ |
2c375204 | 986 | ret_val = byt_rt5651_add_codec_device_props(codec_dev); |
5f6fb23d HG |
987 | if (ret_val) { |
988 | put_device(codec_dev); | |
46058aeb | 989 | return ret_val; |
5f6fb23d HG |
990 | } |
991 | ||
992 | /* Cherry Trail devices use an external amplifier enable gpio */ | |
536cfd2f | 993 | if (soc_intel_is_cht() && !byt_rt5651_gpios) |
4d1f7a6e | 994 | byt_rt5651_gpios = cht_rt5651_gpios; |
fee3e1cb HG |
995 | |
996 | if (byt_rt5651_gpios) { | |
997 | devm_acpi_dev_add_driver_gpios(codec_dev, byt_rt5651_gpios); | |
e26c4e90 DT |
998 | priv->ext_amp_gpio = devm_fwnode_gpiod_get(&pdev->dev, |
999 | codec_dev->fwnode, | |
1000 | "ext-amp-enable", | |
1001 | GPIOD_OUT_LOW, | |
1002 | "speaker-amp"); | |
5f6fb23d HG |
1003 | if (IS_ERR(priv->ext_amp_gpio)) { |
1004 | ret_val = PTR_ERR(priv->ext_amp_gpio); | |
1005 | switch (ret_val) { | |
1006 | case -ENOENT: | |
1007 | priv->ext_amp_gpio = NULL; | |
1008 | break; | |
1009 | default: | |
1010 | dev_err(&pdev->dev, "Failed to get ext-amp-enable GPIO: %d\n", | |
1011 | ret_val); | |
df561f66 | 1012 | fallthrough; |
5f6fb23d HG |
1013 | case -EPROBE_DEFER: |
1014 | put_device(codec_dev); | |
1015 | return ret_val; | |
1016 | } | |
1017 | } | |
e26c4e90 DT |
1018 | priv->hp_detect = devm_fwnode_gpiod_get(&pdev->dev, |
1019 | codec_dev->fwnode, | |
1020 | "hp-detect", | |
1021 | GPIOD_IN, | |
1022 | "hp-detect"); | |
90768eaf HG |
1023 | if (IS_ERR(priv->hp_detect)) { |
1024 | ret_val = PTR_ERR(priv->hp_detect); | |
1025 | switch (ret_val) { | |
1026 | case -ENOENT: | |
1027 | priv->hp_detect = NULL; | |
1028 | break; | |
1029 | default: | |
1030 | dev_err(&pdev->dev, "Failed to get hp-detect GPIO: %d\n", | |
1031 | ret_val); | |
df561f66 | 1032 | fallthrough; |
90768eaf HG |
1033 | case -EPROBE_DEFER: |
1034 | put_device(codec_dev); | |
1035 | return ret_val; | |
1036 | } | |
1037 | } | |
5f6fb23d HG |
1038 | } |
1039 | ||
1040 | put_device(codec_dev); | |
46058aeb | 1041 | |
02c0a3b3 PLB |
1042 | log_quirks(&pdev->dev); |
1043 | ||
8a880a20 | 1044 | if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) || |
fcce38d8 JU |
1045 | (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) |
1046 | byt_rt5651_dais[dai_index].codecs->dai_name = "rt5651-aif2"; | |
8a880a20 HG |
1047 | |
1048 | if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) || | |
fcce38d8 JU |
1049 | (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) |
1050 | byt_rt5651_dais[dai_index].cpus->dai_name = "ssp0-port"; | |
8a880a20 | 1051 | |
02c0a3b3 PLB |
1052 | if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) { |
1053 | priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); | |
1054 | if (IS_ERR(priv->mclk)) { | |
de5afce2 | 1055 | ret_val = PTR_ERR(priv->mclk); |
02c0a3b3 | 1056 | dev_err(&pdev->dev, |
de5afce2 CIK |
1057 | "Failed to get MCLK from pmc_plt_clk_3: %d\n", |
1058 | ret_val); | |
02c0a3b3 PLB |
1059 | /* |
1060 | * Fall back to bit clock usage for -ENOENT (clock not | |
1061 | * available likely due to missing dependencies), bail | |
1062 | * for all other errors, including -EPROBE_DEFER | |
1063 | */ | |
1064 | if (ret_val != -ENOENT) | |
1065 | return ret_val; | |
1066 | byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN; | |
1067 | } | |
1068 | } | |
1069 | ||
0d5c8187 JK |
1070 | snprintf(byt_rt5651_components, sizeof(byt_rt5651_components), |
1071 | "cfg-spk:%s cfg-mic:%s%s", | |
1072 | (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ? "1" : "2", | |
1073 | mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], | |
1074 | (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? | |
1075 | " cfg-hp:lrswap" : ""); | |
1076 | byt_rt5651_card.components = byt_rt5651_components; | |
b5706f8e | 1077 | #if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) |
64484cce | 1078 | snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name), |
a0d1d867 HG |
1079 | "bytcr-rt5651-%s-spk-%s-mic%s", |
1080 | (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ? | |
1081 | "mono" : "stereo", | |
0d5c8187 JK |
1082 | mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], |
1083 | (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? | |
1084 | "-hp-swapped" : ""); | |
64484cce | 1085 | byt_rt5651_card.long_name = byt_rt5651_long_name; |
b5706f8e | 1086 | #endif |
64484cce | 1087 | |
0b2c2093 PLB |
1088 | /* override plaform name, if required */ |
1089 | platform_name = mach->mach_params.platform; | |
1090 | ||
1091 | ret_val = snd_soc_fixup_dai_links_platform_name(&byt_rt5651_card, | |
1092 | platform_name); | |
1093 | if (ret_val) | |
1094 | return ret_val; | |
1095 | ||
2bd5bd15 PLB |
1096 | ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card); |
1097 | ||
1098 | if (ret_val) { | |
1099 | dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n", | |
1100 | ret_val); | |
1101 | return ret_val; | |
1102 | } | |
1103 | platform_set_drvdata(pdev, &byt_rt5651_card); | |
1104 | return ret_val; | |
1105 | } | |
1106 | ||
1107 | static struct platform_driver snd_byt_rt5651_mc_driver = { | |
1108 | .driver = { | |
1109 | .name = "bytcr_rt5651", | |
68224376 PLB |
1110 | #if IS_ENABLED(CONFIG_SND_SOC_SOF_BAYTRAIL) |
1111 | .pm = &snd_soc_pm_ops, | |
1112 | #endif | |
2bd5bd15 PLB |
1113 | }, |
1114 | .probe = snd_byt_rt5651_mc_probe, | |
1115 | }; | |
1116 | ||
1117 | module_platform_driver(snd_byt_rt5651_mc_driver); | |
1118 | ||
1119 | MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651"); | |
1120 | MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>"); | |
1121 | MODULE_LICENSE("GPL v2"); | |
1122 | MODULE_ALIAS("platform:bytcr_rt5651"); |