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Linux 4.4-rc1
[linux-2.6-block.git] / sound / soc / codecs / wm8974.c
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0a1bf553
MB		 1/*
2 * wm8974.c -- WM8974 ALSA Soc Audio driver
3 *
8b83a193 4 * Copyright 2006-2009 Wolfson Microelectronics PLC.
0a1bf553 5 *
9a185b9a 6 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
0a1bf553
MB		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
0a1bf553
MB		 15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
e40e0b5d 20#include <linux/regmap.h>
5a0e3ad6 21#include <linux/slab.h>
0a1bf553
MB		 22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
0a1bf553 26#include <sound/initval.h>
a5f8d2f1 27#include <sound/tlv.h>
0a1bf553
MB		 28
29#include "wm8974.h"
30
e40e0b5d
MB		 31static const struct reg_default wm8974_reg_defaults[] = {
32 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
33 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
34 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
35 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
36 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
37 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
38 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
39 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
40 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
41 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
42 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
43 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
44 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
45 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
46 { 56, 0x0000 },
0a1bf553
MB		 47};
48
df1ef7a3 49#define WM8974_POWER1_BIASEN 0x08
48c03ce7 50#define WM8974_POWER1_BUFIOEN 0x04
df1ef7a3 51
1e97f50b 52#define wm8974_reset(c) snd_soc_write(c, WM8974_RESET, 0)
0a1bf553
MB		 53
54static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
55static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
56static const char *wm8974_eqmode[] = {"Capture", "Playback" };
57static const char *wm8974_bw[] = {"Narrow", "Wide" };
58static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
59static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
60static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
61static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
62static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
63static const char *wm8974_alc[] = {"ALC", "Limiter" };
64
65static const struct soc_enum wm8974_enum[] = {
66 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
67 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
68 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
69 SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode),
70
71 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
72 SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw),
73 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
74 SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw),
75
76 SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3),
77 SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw),
78 SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4),
79 SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw),
80
81 SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5),
82 SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc),
83};
84
8a123ee2
MB		 85static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
86
de461bd2
TI		 87static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
88 WM8974_INPUT, 3, wm8974_auxmode_text);
8a123ee2 89
a5f8d2f1
MB		 90static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
91static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
92static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
93static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
94
0a1bf553
MB		 95static const struct snd_kcontrol_new wm8974_snd_controls[] = {
96
97SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
98
99SOC_ENUM("DAC Companding", wm8974_enum[1]),
100SOC_ENUM("ADC Companding", wm8974_enum[0]),
101
102SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
103SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
104
a5f8d2f1 105SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
0a1bf553
MB		 106
107SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
108SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
25cbf465 109SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
0a1bf553 110
a5f8d2f1 111SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv),
0a1bf553
MB		 112
113SOC_ENUM("Equaliser Function", wm8974_enum[3]),
114SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
a5f8d2f1 115SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv),
0a1bf553 116
c46d5c04 117SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
0a1bf553 118SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
a5f8d2f1 119SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv),
0a1bf553 120
c46d5c04 121SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
0a1bf553 122SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
a5f8d2f1 123SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv),
0a1bf553 124
c46d5c04 125SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
0a1bf553 126SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
a5f8d2f1 127SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv),
0a1bf553 128
a895d57d 129SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
0a1bf553 130SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
a5f8d2f1 131SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv),
0a1bf553
MB		 132
133SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0),
134SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0),
135SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0),
136
137SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0),
138SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0),
139
140SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0),
141SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
142SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0),
143
144SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0),
145SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0),
146SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0),
147
148SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
149SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0),
150SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0),
151
152SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0),
153SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0),
154
155SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0),
a5f8d2f1 156SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv),
0a1bf553
MB		 157
158SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0),
159SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1),
8a123ee2
MB		 160SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv),
161
162SOC_ENUM("Aux Mode", wm8974_auxmode),
0a1bf553
MB		 163
164SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0),
8a123ee2 165SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
b2c3e923
GL		 166
167/* DAC / ADC oversampling */
168SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
169SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
0a1bf553
MB		 170};
171
0a1bf553
MB		 172/* Speaker Output Mixer */
173static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
174SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
175SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
759512fb 176SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
0a1bf553
MB		 177};
178
179/* Mono Output Mixer */
180static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
181SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
182SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
8a123ee2
MB		 183SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
184};
185
186/* Boost mixer */
187static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
188SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
189};
190
191/* Input PGA */
192static const struct snd_kcontrol_new wm8974_inpga[] = {
193SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
194SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
195SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
0a1bf553
MB		 196};
197
198/* AUX Input boost vol */
199static const struct snd_kcontrol_new wm8974_aux_boost_controls =
200SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
201
202/* Mic Input boost vol */
203static const struct snd_kcontrol_new wm8974_mic_boost_controls =
204SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
205
0a1bf553
MB		 206static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
207SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
208 &wm8974_speaker_mixer_controls[0],
209 ARRAY_SIZE(wm8974_speaker_mixer_controls)),
210SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
211 &wm8974_mono_mixer_controls[0],
212 ARRAY_SIZE(wm8974_mono_mixer_controls)),
213SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
8a123ee2 214SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
0a1bf553
MB		 215SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
216SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
217SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
218SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
0a1bf553 219
8a123ee2
MB		 220SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
221 ARRAY_SIZE(wm8974_inpga)),
222SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
223 wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
0a1bf553 224
48dd231b 225SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
0a1bf553
MB		 226
227SND_SOC_DAPM_INPUT("MICN"),
228SND_SOC_DAPM_INPUT("MICP"),
229SND_SOC_DAPM_INPUT("AUX"),
230SND_SOC_DAPM_OUTPUT("MONOOUT"),
231SND_SOC_DAPM_OUTPUT("SPKOUTP"),
232SND_SOC_DAPM_OUTPUT("SPKOUTN"),
233};
234
a2bd691c 235static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
0a1bf553
MB		 236 /* Mono output mixer */
237 {"Mono Mixer", "PCM Playback Switch", "DAC"},
238 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
239 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
240
241 /* Speaker output mixer */
242 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
243 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
244 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
245
246 /* Outputs */
247 {"Mono Out", NULL, "Mono Mixer"},
248 {"MONOOUT", NULL, "Mono Out"},
249 {"SpkN Out", NULL, "Speaker Mixer"},
250 {"SpkP Out", NULL, "Speaker Mixer"},
251 {"SPKOUTN", NULL, "SpkN Out"},
252 {"SPKOUTP", NULL, "SpkP Out"},
253
254 /* Boost Mixer */
8a123ee2
MB		 255 {"ADC", NULL, "Boost Mixer"},
256 {"Boost Mixer", "Aux Switch", "Aux Input"},
257 {"Boost Mixer", NULL, "Input PGA"},
258 {"Boost Mixer", NULL, "MICP"},
259
260 /* Input PGA */
261 {"Input PGA", "Aux Switch", "Aux Input"},
262 {"Input PGA", "MicN Switch", "MICN"},
263 {"Input PGA", "MicP Switch", "MICP"},
0a1bf553
MB		 264
265 /* Inputs */
8a123ee2 266 {"Aux Input", NULL, "AUX"},
0a1bf553
MB		 267};
268
0a1bf553 269struct pll_ {
c36b2fc7 270 unsigned int pre_div:1;
0a1bf553
MB		 271 unsigned int n:4;
272 unsigned int k;
273};
274
91d0c3ec
MB		 275/* The size in bits of the pll divide multiplied by 10
276 * to allow rounding later */
277#define FIXED_PLL_SIZE ((1 << 24) * 10)
278
c36b2fc7
MB		 279static void pll_factors(struct pll_ *pll_div,
280 unsigned int target, unsigned int source)
91d0c3ec
MB		 281{
282 unsigned long long Kpart;
283 unsigned int K, Ndiv, Nmod;
284
c36b2fc7
MB		 285 /* There is a fixed divide by 4 in the output path */
286 target *= 4;
287
91d0c3ec
MB		 288 Ndiv = target / source;
289 if (Ndiv < 6) {
c36b2fc7
MB		 290 source /= 2;
291 pll_div->pre_div = 1;
91d0c3ec
MB		 292 Ndiv = target / source;
293 } else
c36b2fc7 294 pll_div->pre_div = 0;
91d0c3ec
MB		 295
296 if ((Ndiv < 6) || (Ndiv > 12))
297 printk(KERN_WARNING
8b83a193 298 "WM8974 N value %u outwith recommended range!\n",
91d0c3ec
MB		 299 Ndiv);
300
c36b2fc7 301 pll_div->n = Ndiv;
91d0c3ec
MB		 302 Nmod = target % source;
303 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
304
305 do_div(Kpart, source);
306
307 K = Kpart & 0xFFFFFFFF;
308
309 /* Check if we need to round */
310 if ((K % 10) >= 5)
311 K += 5;
312
313 /* Move down to proper range now rounding is done */
314 K /= 10;
315
c36b2fc7 316 pll_div->k = K;
91d0c3ec 317}
0a1bf553 318
85488037
MB		 319static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
320 int source, unsigned int freq_in, unsigned int freq_out)
0a1bf553
MB		 321{
322 struct snd_soc_codec *codec = codec_dai->codec;
c36b2fc7 323 struct pll_ pll_div;
0a1bf553
MB		 324 u16 reg;
325
1a55b3f6 326 if (freq_in == 0 || freq_out == 0) {
91d0c3ec 327 /* Clock CODEC directly from MCLK */
1e97f50b
MB		 328 reg = snd_soc_read(codec, WM8974_CLOCK);
329 snd_soc_write(codec, WM8974_CLOCK, reg & 0x0ff);
91d0c3ec
MB		 330
331 /* Turn off PLL */
1e97f50b
MB		 332 reg = snd_soc_read(codec, WM8974_POWER1);
333 snd_soc_write(codec, WM8974_POWER1, reg & 0x1df);
0a1bf553
MB		 334 return 0;
335 }
336
c36b2fc7 337 pll_factors(&pll_div, freq_out, freq_in);
91d0c3ec 338
1e97f50b
MB		 339 snd_soc_write(codec, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
340 snd_soc_write(codec, WM8974_PLLK1, pll_div.k >> 18);
341 snd_soc_write(codec, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
342 snd_soc_write(codec, WM8974_PLLK3, pll_div.k & 0x1ff);
343 reg = snd_soc_read(codec, WM8974_POWER1);
344 snd_soc_write(codec, WM8974_POWER1, reg | 0x020);
1a55b3f6 345
91d0c3ec 346 /* Run CODEC from PLL instead of MCLK */
1e97f50b
MB		 347 reg = snd_soc_read(codec, WM8974_CLOCK);
348 snd_soc_write(codec, WM8974_CLOCK, reg | 0x100);
91d0c3ec
MB		 349
350 return 0;
0a1bf553
MB		 351}
352
353/*
354 * Configure WM8974 clock dividers.
355 */
356static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
357 int div_id, int div)
358{
359 struct snd_soc_codec *codec = codec_dai->codec;
360 u16 reg;
361
362 switch (div_id) {
363 case WM8974_OPCLKDIV:
1e97f50b
MB		 364 reg = snd_soc_read(codec, WM8974_GPIO) & 0x1cf;
365 snd_soc_write(codec, WM8974_GPIO, reg | div);
0a1bf553
MB		 366 break;
367 case WM8974_MCLKDIV:
1e97f50b
MB		 368 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x11f;
369 snd_soc_write(codec, WM8974_CLOCK, reg | div);
0a1bf553 370 break;
0a1bf553 371 case WM8974_BCLKDIV:
1e97f50b
MB		 372 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x1e3;
373 snd_soc_write(codec, WM8974_CLOCK, reg | div);
0a1bf553
MB		 374 break;
375 default:
376 return -EINVAL;
377 }
378
379 return 0;
380}
381
382static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
383 unsigned int fmt)
384{
385 struct snd_soc_codec *codec = codec_dai->codec;
386 u16 iface = 0;
1e97f50b 387 u16 clk = snd_soc_read(codec, WM8974_CLOCK) & 0x1fe;
0a1bf553
MB		 388
389 /* set master/slave audio interface */
390 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
391 case SND_SOC_DAIFMT_CBM_CFM:
392 clk |= 0x0001;
393 break;
394 case SND_SOC_DAIFMT_CBS_CFS:
395 break;
396 default:
397 return -EINVAL;
398 }
399
400 /* interface format */
401 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
402 case SND_SOC_DAIFMT_I2S:
403 iface |= 0x0010;
404 break;
405 case SND_SOC_DAIFMT_RIGHT_J:
406 break;
407 case SND_SOC_DAIFMT_LEFT_J:
408 iface |= 0x0008;
409 break;
410 case SND_SOC_DAIFMT_DSP_A:
411 iface |= 0x00018;
412 break;
413 default:
414 return -EINVAL;
415 }
416
417 /* clock inversion */
418 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
419 case SND_SOC_DAIFMT_NB_NF:
420 break;
421 case SND_SOC_DAIFMT_IB_IF:
422 iface |= 0x0180;
423 break;
424 case SND_SOC_DAIFMT_IB_NF:
425 iface |= 0x0100;
426 break;
427 case SND_SOC_DAIFMT_NB_IF:
428 iface |= 0x0080;
429 break;
430 default:
431 return -EINVAL;
432 }
433
1e97f50b
MB		 434 snd_soc_write(codec, WM8974_IFACE, iface);
435 snd_soc_write(codec, WM8974_CLOCK, clk);
0a1bf553
MB		 436 return 0;
437}
438
439static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
440 struct snd_pcm_hw_params *params,
441 struct snd_soc_dai *dai)
442{
443 struct snd_soc_codec *codec = dai->codec;
1e97f50b
MB		 444 u16 iface = snd_soc_read(codec, WM8974_IFACE) & 0x19f;
445 u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1;
0a1bf553
MB		 446
447 /* bit size */
6afdc9a0
MB		 448 switch (params_width(params)) {
449 case 16:
0a1bf553 450 break;
6afdc9a0 451 case 20:
0a1bf553
MB		 452 iface |= 0x0020;
453 break;
6afdc9a0 454 case 24:
0a1bf553
MB		 455 iface |= 0x0040;
456 break;
6afdc9a0 457 case 32:
0a1bf553
MB		 458 iface |= 0x0060;
459 break;
460 }
461
462 /* filter coefficient */
463 switch (params_rate(params)) {
b3172f22 464 case 8000:
0a1bf553
MB		 465 adn |= 0x5 << 1;
466 break;
b3172f22 467 case 11025:
0a1bf553
MB		 468 adn |= 0x4 << 1;
469 break;
b3172f22 470 case 16000:
0a1bf553
MB		 471 adn |= 0x3 << 1;
472 break;
b3172f22 473 case 22050:
0a1bf553
MB		 474 adn |= 0x2 << 1;
475 break;
b3172f22 476 case 32000:
0a1bf553
MB		 477 adn |= 0x1 << 1;
478 break;
b3172f22
GL		 479 case 44100:
480 case 48000:
0a1bf553
MB		 481 break;
482 }
483
1e97f50b
MB		 484 snd_soc_write(codec, WM8974_IFACE, iface);
485 snd_soc_write(codec, WM8974_ADD, adn);
0a1bf553
MB		 486 return 0;
487}
488
489static int wm8974_mute(struct snd_soc_dai *dai, int mute)
490{
491 struct snd_soc_codec *codec = dai->codec;
1e97f50b 492 u16 mute_reg = snd_soc_read(codec, WM8974_DAC) & 0xffbf;
0a1bf553 493
1a55b3f6 494 if (mute)
1e97f50b 495 snd_soc_write(codec, WM8974_DAC, mute_reg | 0x40);
0a1bf553 496 else
1e97f50b 497 snd_soc_write(codec, WM8974_DAC, mute_reg);
0a1bf553
MB		 498 return 0;
499}
500
501/* liam need to make this lower power with dapm */
502static int wm8974_set_bias_level(struct snd_soc_codec *codec,
503 enum snd_soc_bias_level level)
504{
1e97f50b 505 u16 power1 = snd_soc_read(codec, WM8974_POWER1) & ~0x3;
df1ef7a3 506
0a1bf553
MB		 507 switch (level) {
508 case SND_SOC_BIAS_ON:
0a1bf553 509 case SND_SOC_BIAS_PREPARE:
df1ef7a3 510 power1 |= 0x1; /* VMID 50k */
1e97f50b 511 snd_soc_write(codec, WM8974_POWER1, power1);
0a1bf553 512 break;
df1ef7a3 513
0a1bf553 514 case SND_SOC_BIAS_STANDBY:
df1ef7a3
MB		 515 power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
516
5c6415d6 517 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
e40e0b5d 518 regcache_sync(dev_get_regmap(codec->dev, NULL));
0bad3d84 519
df1ef7a3 520 /* Initial cap charge at VMID 5k */
1e97f50b 521 snd_soc_write(codec, WM8974_POWER1, power1 | 0x3);
df1ef7a3
MB		 522 mdelay(100);
523 }
524
525 power1 |= 0x2; /* VMID 500k */
1e97f50b 526 snd_soc_write(codec, WM8974_POWER1, power1);
0a1bf553 527 break;
df1ef7a3 528
0a1bf553 529 case SND_SOC_BIAS_OFF:
1e97f50b
MB		 530 snd_soc_write(codec, WM8974_POWER1, 0);
531 snd_soc_write(codec, WM8974_POWER2, 0);
532 snd_soc_write(codec, WM8974_POWER3, 0);
0a1bf553
MB		 533 break;
534 }
df1ef7a3 535
0a1bf553
MB		 536 return 0;
537}
538
1a55b3f6 539#define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
0a1bf553
MB		 540
541#define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
542 SNDRV_PCM_FMTBIT_S24_LE)
543
85e7652d 544static const struct snd_soc_dai_ops wm8974_ops = {
0a1bf553
MB		 545 .hw_params = wm8974_pcm_hw_params,
546 .digital_mute = wm8974_mute,
547 .set_fmt = wm8974_set_dai_fmt,
548 .set_clkdiv = wm8974_set_dai_clkdiv,
549 .set_pll = wm8974_set_dai_pll,
550};
551
f0fba2ad
LG		 552static struct snd_soc_dai_driver wm8974_dai = {
553 .name = "wm8974-hifi",
0a1bf553
MB		 554 .playback = {
555 .stream_name = "Playback",
556 .channels_min = 1,
33d81af4 557 .channels_max = 2, /* Only 1 channel of data */
0a1bf553
MB		 558 .rates = WM8974_RATES,
559 .formats = WM8974_FORMATS,},
560 .capture = {
561 .stream_name = "Capture",
562 .channels_min = 1,
33d81af4 563 .channels_max = 2, /* Only 1 channel of data */
0a1bf553
MB		 564 .rates = WM8974_RATES,
565 .formats = WM8974_FORMATS,},
566 .ops = &wm8974_ops,
cb11d39e 567 .symmetric_rates = 1,
0a1bf553 568};
0a1bf553 569
e40e0b5d
MB		 570static const struct regmap_config wm8974_regmap = {
571 .reg_bits = 7,
572 .val_bits = 9,
573
574 .max_register = WM8974_MONOMIX,
575 .reg_defaults = wm8974_reg_defaults,
576 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
577};
578
f0fba2ad 579static int wm8974_probe(struct snd_soc_codec *codec)
0a1bf553 580{
0a1bf553
MB		 581 int ret = 0;
582
f0fba2ad 583 ret = wm8974_reset(codec);
1a55b3f6 584 if (ret < 0) {
f0fba2ad
LG		 585 dev_err(codec->dev, "Failed to issue reset\n");
586 return ret;
0a1bf553
MB		 587 }
588
4fcbbb67
MB		 589 return 0;
590}
0a1bf553 591
f0fba2ad 592static struct snd_soc_codec_driver soc_codec_dev_wm8974 = {
4fcbbb67 593 .probe = wm8974_probe,
f0fba2ad 594 .set_bias_level = wm8974_set_bias_level,
ed1358f5 595 .suspend_bias_off = true,
a2bd691c
MB		 596
597 .controls = wm8974_snd_controls,
598 .num_controls = ARRAY_SIZE(wm8974_snd_controls),
599 .dapm_widgets = wm8974_dapm_widgets,
600 .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets),
601 .dapm_routes = wm8974_dapm_routes,
602 .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
4fcbbb67 603};
0a1bf553 604
7a79e94e
BP		 605static int wm8974_i2c_probe(struct i2c_client *i2c,
606 const struct i2c_device_id *id)
0a1bf553 607{
e40e0b5d 608 struct regmap *regmap;
f0fba2ad 609 int ret;
0a1bf553 610
e40e0b5d
MB		 611 regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
612 if (IS_ERR(regmap))
613 return PTR_ERR(regmap);
614
f0fba2ad
LG		 615 ret = snd_soc_register_codec(&i2c->dev,
616 &soc_codec_dev_wm8974, &wm8974_dai, 1);
c2562a8e 617
f0fba2ad 618 return ret;
4fcbbb67 619}
0a1bf553 620
7a79e94e 621static int wm8974_i2c_remove(struct i2c_client *client)
4fcbbb67 622{
f0fba2ad 623 snd_soc_unregister_codec(&client->dev);
c2562a8e 624
0a1bf553
MB		 625 return 0;
626}
627
4fcbbb67
MB		 628static const struct i2c_device_id wm8974_i2c_id[] = {
629 { "wm8974", 0 },
630 { }
631};
632MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
633
634static struct i2c_driver wm8974_i2c_driver = {
635 .driver = {
091edccf 636 .name = "wm8974",
4fcbbb67
MB		 637 },
638 .probe = wm8974_i2c_probe,
7a79e94e 639 .remove = wm8974_i2c_remove,
4fcbbb67 640 .id_table = wm8974_i2c_id,
0a1bf553 641};
0a1bf553 642
2be59418 643module_i2c_driver(wm8974_i2c_driver);
0a1bf553
MB		 644
645MODULE_DESCRIPTION("ASoC WM8974 driver");
646MODULE_AUTHOR("Liam Girdwood");
647MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)