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Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / sound / soc / codecs / wm8960.c
CommitLineData
f2644a2c
MB		 1/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
656baaeb
MB		 4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
f2644a2c
MB		 6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
5a0e3ad6 19#include <linux/slab.h>
f2644a2c
MB		 20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
f2644a2c
MB		 24#include <sound/initval.h>
25#include <sound/tlv.h>
b6877a47 26#include <sound/wm8960.h>
f2644a2c
MB		 27
28#include "wm8960.h"
29
f2644a2c 30/* R25 - Power 1 */
913d7b4c 31#define WM8960_VMID_MASK 0x180
f2644a2c
MB		 32#define WM8960_VREF 0x40
33
913d7b4c
MB		 34/* R26 - Power 2 */
35#define WM8960_PWR2_LOUT1 0x40
36#define WM8960_PWR2_ROUT1 0x20
37#define WM8960_PWR2_OUT3 0x02
38
f2644a2c
MB		 39/* R28 - Anti-pop 1 */
40#define WM8960_POBCTRL 0x80
41#define WM8960_BUFDCOPEN 0x10
42#define WM8960_BUFIOEN 0x08
43#define WM8960_SOFT_ST 0x04
44#define WM8960_HPSTBY 0x01
45
46/* R29 - Anti-pop 2 */
47#define WM8960_DISOP 0x40
913d7b4c 48#define WM8960_DRES_MASK 0x30
f2644a2c
MB		 49
50/*
51 * wm8960 register cache
52 * We can't read the WM8960 register space when we are
53 * using 2 wire for device control, so we cache them instead.
54 */
0ebe36c6 55static const struct reg_default wm8960_reg_defaults[] = {
b3df026e
MB		 56 { 0x0, 0x00a7 },
57 { 0x1, 0x00a7 },
0ebe36c6
MB		 58 { 0x2, 0x0000 },
59 { 0x3, 0x0000 },
60 { 0x4, 0x0000 },
61 { 0x5, 0x0008 },
62 { 0x6, 0x0000 },
63 { 0x7, 0x000a },
64 { 0x8, 0x01c0 },
65 { 0x9, 0x0000 },
66 { 0xa, 0x00ff },
67 { 0xb, 0x00ff },
68
69 { 0x10, 0x0000 },
70 { 0x11, 0x007b },
71 { 0x12, 0x0100 },
72 { 0x13, 0x0032 },
73 { 0x14, 0x0000 },
74 { 0x15, 0x00c3 },
75 { 0x16, 0x00c3 },
76 { 0x17, 0x01c0 },
77 { 0x18, 0x0000 },
78 { 0x19, 0x0000 },
79 { 0x1a, 0x0000 },
80 { 0x1b, 0x0000 },
81 { 0x1c, 0x0000 },
82 { 0x1d, 0x0000 },
83
84 { 0x20, 0x0100 },
85 { 0x21, 0x0100 },
86 { 0x22, 0x0050 },
87
88 { 0x25, 0x0050 },
89 { 0x26, 0x0000 },
90 { 0x27, 0x0000 },
91 { 0x28, 0x0000 },
92 { 0x29, 0x0000 },
93 { 0x2a, 0x0040 },
94 { 0x2b, 0x0000 },
95 { 0x2c, 0x0000 },
96 { 0x2d, 0x0050 },
97 { 0x2e, 0x0050 },
98 { 0x2f, 0x0000 },
99 { 0x30, 0x0002 },
100 { 0x31, 0x0037 },
101
102 { 0x33, 0x0080 },
103 { 0x34, 0x0008 },
104 { 0x35, 0x0031 },
105 { 0x36, 0x0026 },
106 { 0x37, 0x00e9 },
f2644a2c
MB		 107};
108
0ebe36c6
MB		 109static bool wm8960_volatile(struct device *dev, unsigned int reg)
110{
111 switch (reg) {
112 case WM8960_RESET:
113 return true;
114 default:
115 return false;
116 }
117}
118
f2644a2c 119struct wm8960_priv {
0ebe36c6 120 struct regmap *regmap;
f0fba2ad
LG		 121 int (*set_bias_level)(struct snd_soc_codec *,
122 enum snd_soc_bias_level level);
913d7b4c
MB		 123 struct snd_soc_dapm_widget *lout1;
124 struct snd_soc_dapm_widget *rout1;
125 struct snd_soc_dapm_widget *out3;
afd6d36a
MB		 126 bool deemph;
127 int playback_fs;
f2644a2c
MB		 128};
129
17a52fd6 130#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
f2644a2c
MB		 131
132/* enumerated controls */
f2644a2c
MB		 133static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
134 "Right Inverted", "Stereo Inversion"};
135static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
136static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
137static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
138static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
139
140static const struct soc_enum wm8960_enum[] = {
f2644a2c
MB		 141 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
142 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
143 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
144 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
145 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
146 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
147};
148
afd6d36a
MB		 149static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
150
151static int wm8960_set_deemph(struct snd_soc_codec *codec)
152{
153 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
154 int val, i, best;
155
156 /* If we're using deemphasis select the nearest available sample
157 * rate.
158 */
159 if (wm8960->deemph) {
160 best = 1;
161 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
162 if (abs(deemph_settings[i] - wm8960->playback_fs) <
163 abs(deemph_settings[best] - wm8960->playback_fs))
164 best = i;
165 }
166
167 val = best << 1;
168 } else {
169 val = 0;
170 }
171
172 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
173
174 return snd_soc_update_bits(codec, WM8960_DACCTL1,
175 0x6, val);
176}
177
178static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
179 struct snd_ctl_elem_value *ucontrol)
180{
181 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
182 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
183
3f343f85
DA		 184 ucontrol->value.enumerated.item[0] = wm8960->deemph;
185 return 0;
afd6d36a
MB		 186}
187
188static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol)
190{
191 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
192 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
193 int deemph = ucontrol->value.enumerated.item[0];
194
195 if (deemph > 1)
196 return -EINVAL;
197
198 wm8960->deemph = deemph;
199
200 return wm8960_set_deemph(codec);
201}
202
f2644a2c
MB		 203static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
204static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
205static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
206static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
21eb2693 207static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1);
f2644a2c
MB		 208
209static const struct snd_kcontrol_new wm8960_snd_controls[] = {
210SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
211 0, 63, 0, adc_tlv),
212SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
213 6, 1, 0),
214SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
215 7, 1, 0),
216
21eb2693
MB		 217SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
218 WM8960_INBMIX1, 4, 7, 0, boost_tlv),
219SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
220 WM8960_INBMIX1, 1, 7, 0, boost_tlv),
221SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
222 WM8960_INBMIX2, 4, 7, 0, boost_tlv),
223SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
224 WM8960_INBMIX2, 1, 7, 0, boost_tlv),
225
f2644a2c
MB		 226SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
227 0, 255, 0, dac_tlv),
228
229SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
230 0, 127, 0, out_tlv),
231SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
232 7, 1, 0),
233
234SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
235 0, 127, 0, out_tlv),
236SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
237 7, 1, 0),
238SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
239SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
240
241SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
4faaa8d9 242SOC_ENUM("ADC Polarity", wm8960_enum[0]),
f2644a2c
MB		 243SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
244
245SOC_ENUM("DAC Polarity", wm8960_enum[2]),
afd6d36a
MB		 246SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
247 wm8960_get_deemph, wm8960_put_deemph),
f2644a2c 248
4faaa8d9
MB		 249SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
250SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
f2644a2c
MB		 251SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
252SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
253
4faaa8d9 254SOC_ENUM("ALC Function", wm8960_enum[4]),
f2644a2c
MB		 255SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
256SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
257SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
258SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
4faaa8d9 259SOC_ENUM("ALC Mode", wm8960_enum[5]),
f2644a2c
MB		 260SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
261SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
262
263SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
264SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
265
c324aac0
MH		 266SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
267 0, 255, 0, adc_tlv),
f2644a2c
MB		 268
269SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
270 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
271SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
272 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
273SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
274 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
275SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
276 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
277};
278
279static const struct snd_kcontrol_new wm8960_lin_boost[] = {
280SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
281SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
282SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
283};
284
285static const struct snd_kcontrol_new wm8960_lin[] = {
286SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
287};
288
289static const struct snd_kcontrol_new wm8960_rin_boost[] = {
290SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
291SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
292SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
293};
294
295static const struct snd_kcontrol_new wm8960_rin[] = {
296SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
297};
298
299static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
300SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
301SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
302SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
303};
304
305static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
306SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
307SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
308SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
309};
310
311static const struct snd_kcontrol_new wm8960_mono_out[] = {
312SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
313SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
314};
315
316static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
317SND_SOC_DAPM_INPUT("LINPUT1"),
318SND_SOC_DAPM_INPUT("RINPUT1"),
319SND_SOC_DAPM_INPUT("LINPUT2"),
320SND_SOC_DAPM_INPUT("RINPUT2"),
321SND_SOC_DAPM_INPUT("LINPUT3"),
322SND_SOC_DAPM_INPUT("RINPUT3"),
323
187774cb 324SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
f2644a2c
MB		 325
326SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
327 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
328SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
329 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
330
331SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
332 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
333SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
334 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
335
44426de4
MB		 336SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
337SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
f2644a2c
MB		 338
339SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
340SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
341
342SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
343 &wm8960_loutput_mixer[0],
344 ARRAY_SIZE(wm8960_loutput_mixer)),
345SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
346 &wm8960_routput_mixer[0],
347 ARRAY_SIZE(wm8960_routput_mixer)),
348
f2644a2c
MB		 349SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
350SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
351
352SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
353SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
354
355SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
356SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
357
358SND_SOC_DAPM_OUTPUT("SPK_LP"),
359SND_SOC_DAPM_OUTPUT("SPK_LN"),
360SND_SOC_DAPM_OUTPUT("HP_L"),
361SND_SOC_DAPM_OUTPUT("HP_R"),
362SND_SOC_DAPM_OUTPUT("SPK_RP"),
363SND_SOC_DAPM_OUTPUT("SPK_RN"),
364SND_SOC_DAPM_OUTPUT("OUT3"),
365};
366
913d7b4c
MB		 367static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
368SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
369 &wm8960_mono_out[0],
370 ARRAY_SIZE(wm8960_mono_out)),
371};
372
373/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
374static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
375SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
376};
377
f2644a2c
MB		 378static const struct snd_soc_dapm_route audio_paths[] = {
379 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
380 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
381 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
382
383 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
384 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
385 { "Left Input Mixer", NULL, "LINPUT2" },
386 { "Left Input Mixer", NULL, "LINPUT3" },
387
388 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
389 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
390 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
391
392 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
393 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
394 { "Right Input Mixer", NULL, "RINPUT2" },
395 { "Right Input Mixer", NULL, "LINPUT3" },
396
397 { "Left ADC", NULL, "Left Input Mixer" },
398 { "Right ADC", NULL, "Right Input Mixer" },
399
400 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
401 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
402 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
403
404 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
405 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
406 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
407
f2644a2c
MB		 408 { "LOUT1 PGA", NULL, "Left Output Mixer" },
409 { "ROUT1 PGA", NULL, "Right Output Mixer" },
410
411 { "HP_L", NULL, "LOUT1 PGA" },
412 { "HP_R", NULL, "ROUT1 PGA" },
413
414 { "Left Speaker PGA", NULL, "Left Output Mixer" },
415 { "Right Speaker PGA", NULL, "Right Output Mixer" },
416
417 { "Left Speaker Output", NULL, "Left Speaker PGA" },
418 { "Right Speaker Output", NULL, "Right Speaker PGA" },
419
420 { "SPK_LN", NULL, "Left Speaker Output" },
421 { "SPK_LP", NULL, "Left Speaker Output" },
422 { "SPK_RN", NULL, "Right Speaker Output" },
423 { "SPK_RP", NULL, "Right Speaker Output" },
913d7b4c
MB		 424};
425
426static const struct snd_soc_dapm_route audio_paths_out3[] = {
427 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
428 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
f2644a2c
MB		 429
430 { "OUT3", NULL, "Mono Output Mixer", }
431};
432
913d7b4c
MB		 433static const struct snd_soc_dapm_route audio_paths_capless[] = {
434 { "HP_L", NULL, "OUT3 VMID" },
435 { "HP_R", NULL, "OUT3 VMID" },
436
437 { "OUT3 VMID", NULL, "Left Output Mixer" },
438 { "OUT3 VMID", NULL, "Right Output Mixer" },
439};
440
f2644a2c
MB		 441static int wm8960_add_widgets(struct snd_soc_codec *codec)
442{
913d7b4c 443 struct wm8960_data *pdata = codec->dev->platform_data;
b2c812e2 444 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
ce6120cc 445 struct snd_soc_dapm_context *dapm = &codec->dapm;
913d7b4c
MB		 446 struct snd_soc_dapm_widget *w;
447
ce6120cc 448 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
f2644a2c
MB		 449 ARRAY_SIZE(wm8960_dapm_widgets));
450
ce6120cc 451 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
f2644a2c 452
913d7b4c
MB		 453 /* In capless mode OUT3 is used to provide VMID for the
454 * headphone outputs, otherwise it is used as a mono mixer.
455 */
456 if (pdata && pdata->capless) {
ce6120cc 457 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
913d7b4c
MB		 458 ARRAY_SIZE(wm8960_dapm_widgets_capless));
459
ce6120cc 460 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
913d7b4c
MB		 461 ARRAY_SIZE(audio_paths_capless));
462 } else {
ce6120cc 463 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
913d7b4c
MB		 464 ARRAY_SIZE(wm8960_dapm_widgets_out3));
465
ce6120cc 466 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
913d7b4c
MB		 467 ARRAY_SIZE(audio_paths_out3));
468 }
469
470 /* We need to power up the headphone output stage out of
471 * sequence for capless mode. To save scanning the widget
472 * list each time to find the desired power state do so now
473 * and save the result.
474 */
97c866de
JN		 475 list_for_each_entry(w, &codec->card->widgets, list) {
476 if (w->dapm != &codec->dapm)
477 continue;
913d7b4c
MB		 478 if (strcmp(w->name, "LOUT1 PGA") == 0)
479 wm8960->lout1 = w;
480 if (strcmp(w->name, "ROUT1 PGA") == 0)
481 wm8960->rout1 = w;
482 if (strcmp(w->name, "OUT3 VMID") == 0)
483 wm8960->out3 = w;
484 }
485
f2644a2c
MB		 486 return 0;
487}
488
489static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
490 unsigned int fmt)
491{
492 struct snd_soc_codec *codec = codec_dai->codec;
493 u16 iface = 0;
494
495 /* set master/slave audio interface */
496 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
497 case SND_SOC_DAIFMT_CBM_CFM:
498 iface |= 0x0040;
499 break;
500 case SND_SOC_DAIFMT_CBS_CFS:
501 break;
502 default:
503 return -EINVAL;
504 }
505
506 /* interface format */
507 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
508 case SND_SOC_DAIFMT_I2S:
509 iface |= 0x0002;
510 break;
511 case SND_SOC_DAIFMT_RIGHT_J:
512 break;
513 case SND_SOC_DAIFMT_LEFT_J:
514 iface |= 0x0001;
515 break;
516 case SND_SOC_DAIFMT_DSP_A:
517 iface |= 0x0003;
518 break;
519 case SND_SOC_DAIFMT_DSP_B:
520 iface |= 0x0013;
521 break;
522 default:
523 return -EINVAL;
524 }
525
526 /* clock inversion */
527 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
528 case SND_SOC_DAIFMT_NB_NF:
529 break;
530 case SND_SOC_DAIFMT_IB_IF:
531 iface |= 0x0090;
532 break;
533 case SND_SOC_DAIFMT_IB_NF:
534 iface |= 0x0080;
535 break;
536 case SND_SOC_DAIFMT_NB_IF:
537 iface |= 0x0010;
538 break;
539 default:
540 return -EINVAL;
541 }
542
543 /* set iface */
17a52fd6 544 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 545 return 0;
546}
547
db059c0f
MB		 548static struct {
549 int rate;
550 unsigned int val;
551} alc_rates[] = {
552 { 48000, 0 },
553 { 44100, 0 },
554 { 32000, 1 },
555 { 22050, 2 },
556 { 24000, 2 },
557 { 16000, 3 },
558 { 11250, 4 },
559 { 12000, 4 },
560 { 8000, 5 },
561};
562
f2644a2c
MB		 563static int wm8960_hw_params(struct snd_pcm_substream *substream,
564 struct snd_pcm_hw_params *params,
565 struct snd_soc_dai *dai)
566{
e6968a17 567 struct snd_soc_codec *codec = dai->codec;
afd6d36a 568 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
17a52fd6 569 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
4c2474c0 570 snd_pcm_format_t format = params_format(params);
db059c0f 571 int i;
f2644a2c
MB		 572
573 /* bit size */
4c2474c0 574 switch (format) {
f2644a2c 575 case SNDRV_PCM_FORMAT_S16_LE:
4c2474c0 576 case SNDRV_PCM_FORMAT_S16_BE:
f2644a2c
MB		 577 break;
578 case SNDRV_PCM_FORMAT_S20_3LE:
4c2474c0 579 case SNDRV_PCM_FORMAT_S20_3BE:
f2644a2c
MB		 580 iface |= 0x0004;
581 break;
582 case SNDRV_PCM_FORMAT_S24_LE:
4c2474c0 583 case SNDRV_PCM_FORMAT_S24_BE:
f2644a2c
MB		 584 iface |= 0x0008;
585 break;
4c2474c0
TT		 586 default:
587 dev_err(codec->dev, "unsupported format %i\n", format);
588 return -EINVAL;
f2644a2c
MB		 589 }
590
afd6d36a
MB		 591 /* Update filters for the new rate */
592 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
593 wm8960->playback_fs = params_rate(params);
594 wm8960_set_deemph(codec);
db059c0f
MB		 595 } else {
596 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
597 if (alc_rates[i].rate == params_rate(params))
598 snd_soc_update_bits(codec,
599 WM8960_ADDCTL3, 0x7,
600 alc_rates[i].val);
afd6d36a
MB		 601 }
602
f2644a2c 603 /* set iface */
17a52fd6 604 snd_soc_write(codec, WM8960_IFACE1, iface);
f2644a2c
MB		 605 return 0;
606}
607
608static int wm8960_mute(struct snd_soc_dai *dai, int mute)
609{
610 struct snd_soc_codec *codec = dai->codec;
f2644a2c
MB		 611
612 if (mute)
16b24881 613 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
f2644a2c 614 else
16b24881 615 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
f2644a2c
MB		 616 return 0;
617}
618
913d7b4c
MB		 619static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
620 enum snd_soc_bias_level level)
f2644a2c 621{
0ebe36c6
MB		 622 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
623
f2644a2c
MB		 624 switch (level) {
625 case SND_SOC_BIAS_ON:
626 break;
627
628 case SND_SOC_BIAS_PREPARE:
629 /* Set VMID to 2x50k */
16b24881 630 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
f2644a2c
MB		 631 break;
632
633 case SND_SOC_BIAS_STANDBY:
ce6120cc 634 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
0ebe36c6 635 regcache_sync(wm8960->regmap);
bc45df2d 636
f2644a2c 637 /* Enable anti-pop features */
17a52fd6 638 snd_soc_write(codec, WM8960_APOP1,
913d7b4c
MB		 639 WM8960_POBCTRL | WM8960_SOFT_ST |
640 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
f2644a2c
MB		 641
642 /* Enable & ramp VMID at 2x50k */
16b24881 643 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
f2644a2c
MB		 644 msleep(100);
645
646 /* Enable VREF */
16b24881
AL		 647 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
648 WM8960_VREF);
f2644a2c
MB		 649
650 /* Disable anti-pop features */
17a52fd6 651 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
f2644a2c
MB		 652 }
653
654 /* Set VMID to 2x250k */
16b24881 655 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
f2644a2c
MB		 656 break;
657
658 case SND_SOC_BIAS_OFF:
659 /* Enable anti-pop features */
17a52fd6 660 snd_soc_write(codec, WM8960_APOP1,
f2644a2c
MB		 661 WM8960_POBCTRL | WM8960_SOFT_ST |
662 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
663
664 /* Disable VMID and VREF, let them discharge */
17a52fd6 665 snd_soc_write(codec, WM8960_POWER1, 0);
f2644a2c 666 msleep(600);
913d7b4c
MB		 667 break;
668 }
669
ce6120cc 670 codec->dapm.bias_level = level;
913d7b4c
MB		 671
672 return 0;
673}
674
675static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
676 enum snd_soc_bias_level level)
677{
b2c812e2 678 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
913d7b4c
MB		 679 int reg;
680
681 switch (level) {
682 case SND_SOC_BIAS_ON:
683 break;
684
685 case SND_SOC_BIAS_PREPARE:
ce6120cc 686 switch (codec->dapm.bias_level) {
913d7b4c
MB		 687 case SND_SOC_BIAS_STANDBY:
688 /* Enable anti pop mode */
689 snd_soc_update_bits(codec, WM8960_APOP1,
690 WM8960_POBCTRL | WM8960_SOFT_ST |
691 WM8960_BUFDCOPEN,
692 WM8960_POBCTRL | WM8960_SOFT_ST |
693 WM8960_BUFDCOPEN);
694
695 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
696 reg = 0;
697 if (wm8960->lout1 && wm8960->lout1->power)
698 reg |= WM8960_PWR2_LOUT1;
699 if (wm8960->rout1 && wm8960->rout1->power)
700 reg |= WM8960_PWR2_ROUT1;
701 if (wm8960->out3 && wm8960->out3->power)
702 reg |= WM8960_PWR2_OUT3;
703 snd_soc_update_bits(codec, WM8960_POWER2,
704 WM8960_PWR2_LOUT1 |
705 WM8960_PWR2_ROUT1 |
706 WM8960_PWR2_OUT3, reg);
707
708 /* Enable VMID at 2*50k */
709 snd_soc_update_bits(codec, WM8960_POWER1,
710 WM8960_VMID_MASK, 0x80);
711
712 /* Ramp */
713 msleep(100);
714
715 /* Enable VREF */
716 snd_soc_update_bits(codec, WM8960_POWER1,
717 WM8960_VREF, WM8960_VREF);
718
719 msleep(100);
720 break;
721
722 case SND_SOC_BIAS_ON:
723 /* Enable anti-pop mode */
724 snd_soc_update_bits(codec, WM8960_APOP1,
725 WM8960_POBCTRL | WM8960_SOFT_ST |
726 WM8960_BUFDCOPEN,
727 WM8960_POBCTRL | WM8960_SOFT_ST |
728 WM8960_BUFDCOPEN);
729
730 /* Disable VMID and VREF */
731 snd_soc_update_bits(codec, WM8960_POWER1,
732 WM8960_VREF | WM8960_VMID_MASK, 0);
733 break;
734
bc45df2d 735 case SND_SOC_BIAS_OFF:
0ebe36c6 736 regcache_sync(wm8960->regmap);
bc45df2d 737 break;
913d7b4c
MB		 738 default:
739 break;
740 }
741 break;
f2644a2c 742
913d7b4c 743 case SND_SOC_BIAS_STANDBY:
ce6120cc 744 switch (codec->dapm.bias_level) {
913d7b4c
MB		 745 case SND_SOC_BIAS_PREPARE:
746 /* Disable HP discharge */
747 snd_soc_update_bits(codec, WM8960_APOP2,
748 WM8960_DISOP | WM8960_DRES_MASK,
749 0);
750
751 /* Disable anti-pop features */
752 snd_soc_update_bits(codec, WM8960_APOP1,
753 WM8960_POBCTRL | WM8960_SOFT_ST |
754 WM8960_BUFDCOPEN,
755 WM8960_POBCTRL | WM8960_SOFT_ST |
756 WM8960_BUFDCOPEN);
757 break;
758
759 default:
760 break;
761 }
762 break;
f2644a2c 763
913d7b4c 764 case SND_SOC_BIAS_OFF:
f2644a2c
MB		 765 break;
766 }
767
ce6120cc 768 codec->dapm.bias_level = level;
f2644a2c
MB		 769
770 return 0;
771}
772
773/* PLL divisors */
774struct _pll_div {
775 u32 pre_div:1;
776 u32 n:4;
777 u32 k:24;
778};
779
780/* The size in bits of the pll divide multiplied by 10
781 * to allow rounding later */
782#define FIXED_PLL_SIZE ((1 << 24) * 10)
783
784static int pll_factors(unsigned int source, unsigned int target,
785 struct _pll_div *pll_div)
786{
787 unsigned long long Kpart;
788 unsigned int K, Ndiv, Nmod;
789
790 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
791
792 /* Scale up target to PLL operating frequency */
793 target *= 4;
794
795 Ndiv = target / source;
796 if (Ndiv < 6) {
797 source >>= 1;
798 pll_div->pre_div = 1;
799 Ndiv = target / source;
800 } else
801 pll_div->pre_div = 0;
802
803 if ((Ndiv < 6) || (Ndiv > 12)) {
804 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
805 return -EINVAL;
806 }
807
808 pll_div->n = Ndiv;
809 Nmod = target % source;
810 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
811
812 do_div(Kpart, source);
813
814 K = Kpart & 0xFFFFFFFF;
815
816 /* Check if we need to round */
817 if ((K % 10) >= 5)
818 K += 5;
819
820 /* Move down to proper range now rounding is done */
821 K /= 10;
822
823 pll_div->k = K;
824
825 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
826 pll_div->n, pll_div->k, pll_div->pre_div);
827
828 return 0;
829}
830
85488037
MB		 831static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
832 int source, unsigned int freq_in, unsigned int freq_out)
f2644a2c
MB		 833{
834 struct snd_soc_codec *codec = codec_dai->codec;
835 u16 reg;
836 static struct _pll_div pll_div;
837 int ret;
838
839 if (freq_in && freq_out) {
840 ret = pll_factors(freq_in, freq_out, &pll_div);
841 if (ret != 0)
842 return ret;
843 }
844
845 /* Disable the PLL: even if we are changing the frequency the
846 * PLL needs to be disabled while we do so. */
16b24881
AL		 847 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
848 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
f2644a2c
MB		 849
850 if (!freq_in || !freq_out)
851 return 0;
852
17a52fd6 853 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
f2644a2c
MB		 854 reg |= pll_div.pre_div << 4;
855 reg |= pll_div.n;
856
857 if (pll_div.k) {
858 reg |= 0x20;
859
85fa532b
MD		 860 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
861 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
862 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
f2644a2c 863 }
17a52fd6 864 snd_soc_write(codec, WM8960_PLL1, reg);
f2644a2c
MB		 865
866 /* Turn it on */
16b24881 867 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
f2644a2c 868 msleep(250);
16b24881 869 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
f2644a2c
MB		 870
871 return 0;
872}
873
874static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
875 int div_id, int div)
876{
877 struct snd_soc_codec *codec = codec_dai->codec;
878 u16 reg;
879
880 switch (div_id) {
f2644a2c 881 case WM8960_SYSCLKDIV:
17a52fd6
MB		 882 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
883 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 884 break;
885 case WM8960_DACDIV:
17a52fd6
MB		 886 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
887 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
f2644a2c
MB		 888 break;
889 case WM8960_OPCLKDIV:
17a52fd6
MB		 890 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
891 snd_soc_write(codec, WM8960_PLL1, reg | div);
f2644a2c
MB		 892 break;
893 case WM8960_DCLKDIV:
17a52fd6
MB		 894 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
895 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
f2644a2c
MB		 896 break;
897 case WM8960_TOCLKSEL:
17a52fd6
MB		 898 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
899 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
f2644a2c
MB		 900 break;
901 default:
902 return -EINVAL;
903 }
904
905 return 0;
906}
907
f0fba2ad
LG		 908static int wm8960_set_bias_level(struct snd_soc_codec *codec,
909 enum snd_soc_bias_level level)
910{
911 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
912
913 return wm8960->set_bias_level(codec, level);
914}
915
f2644a2c
MB		 916#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
917
918#define WM8960_FORMATS \
919 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
920 SNDRV_PCM_FMTBIT_S24_LE)
921
85e7652d 922static const struct snd_soc_dai_ops wm8960_dai_ops = {
f2644a2c
MB		 923 .hw_params = wm8960_hw_params,
924 .digital_mute = wm8960_mute,
925 .set_fmt = wm8960_set_dai_fmt,
926 .set_clkdiv = wm8960_set_dai_clkdiv,
927 .set_pll = wm8960_set_dai_pll,
928};
929
f0fba2ad
LG		 930static struct snd_soc_dai_driver wm8960_dai = {
931 .name = "wm8960-hifi",
f2644a2c
MB		 932 .playback = {
933 .stream_name = "Playback",
934 .channels_min = 1,
935 .channels_max = 2,
936 .rates = WM8960_RATES,
937 .formats = WM8960_FORMATS,},
938 .capture = {
939 .stream_name = "Capture",
940 .channels_min = 1,
941 .channels_max = 2,
942 .rates = WM8960_RATES,
943 .formats = WM8960_FORMATS,},
944 .ops = &wm8960_dai_ops,
945 .symmetric_rates = 1,
946};
f2644a2c 947
84b315ee 948static int wm8960_suspend(struct snd_soc_codec *codec)
f2644a2c 949{
f0fba2ad 950 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 951
f0fba2ad 952 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
f2644a2c
MB		 953 return 0;
954}
955
f0fba2ad 956static int wm8960_resume(struct snd_soc_codec *codec)
f2644a2c 957{
f0fba2ad 958 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
f2644a2c 959
f0fba2ad 960 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 961 return 0;
962}
963
f0fba2ad 964static int wm8960_probe(struct snd_soc_codec *codec)
f2644a2c 965{
f0fba2ad
LG		 966 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
967 struct wm8960_data *pdata = dev_get_platdata(codec->dev);
f2644a2c 968 int ret;
f2644a2c 969
f0fba2ad 970 wm8960->set_bias_level = wm8960_set_bias_level_out3;
913d7b4c 971
f2644a2c
MB		 972 if (!pdata) {
973 dev_warn(codec->dev, "No platform data supplied\n");
974 } else {
913d7b4c 975 if (pdata->capless)
f0fba2ad 976 wm8960->set_bias_level = wm8960_set_bias_level_capless;
f2644a2c
MB		 977 }
978
f2644a2c
MB		 979 ret = wm8960_reset(codec);
980 if (ret < 0) {
981 dev_err(codec->dev, "Failed to issue reset\n");
f0fba2ad 982 return ret;
f2644a2c
MB		 983 }
984
f0fba2ad 985 wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
f2644a2c
MB		 986
987 /* Latch the update bits */
16b24881
AL		 988 snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
989 snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
990 snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
991 snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
992 snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
993 snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
994 snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
995 snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
996 snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
997 snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
f2644a2c 998
022658be 999 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
f0fba2ad
LG		 1000 ARRAY_SIZE(wm8960_snd_controls));
1001 wm8960_add_widgets(codec);
f2644a2c
MB		 1002
1003 return 0;
1004}
1005
f0fba2ad
LG		 1006/* power down chip */
1007static int wm8960_remove(struct snd_soc_codec *codec)
f2644a2c 1008{
f0fba2ad
LG		 1009 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1010
1011 wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
1012 return 0;
f2644a2c
MB		 1013}
1014
f0fba2ad
LG		 1015static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1016 .probe = wm8960_probe,
1017 .remove = wm8960_remove,
1018 .suspend = wm8960_suspend,
1019 .resume = wm8960_resume,
1020 .set_bias_level = wm8960_set_bias_level,
0ebe36c6
MB		 1021};
1022
1023static const struct regmap_config wm8960_regmap = {
1024 .reg_bits = 7,
1025 .val_bits = 9,
1026 .max_register = WM8960_PLL4,
1027
1028 .reg_defaults = wm8960_reg_defaults,
1029 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1030 .cache_type = REGCACHE_RBTREE,
1031
1032 .volatile_reg = wm8960_volatile,
f0fba2ad
LG		 1033};
1034
7a79e94e
BP		 1035static int wm8960_i2c_probe(struct i2c_client *i2c,
1036 const struct i2c_device_id *id)
f2644a2c 1037{
37061631 1038 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
f2644a2c 1039 struct wm8960_priv *wm8960;
f0fba2ad 1040 int ret;
f2644a2c 1041
b9791c01
MB		 1042 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1043 GFP_KERNEL);
f2644a2c
MB		 1044 if (wm8960 == NULL)
1045 return -ENOMEM;
1046
c5e6f5fa 1047 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
0ebe36c6
MB		 1048 if (IS_ERR(wm8960->regmap))
1049 return PTR_ERR(wm8960->regmap);
1050
37061631
MB		 1051 if (pdata && pdata->shared_lrclk) {
1052 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1053 0x4, 0x4);
1054 if (ret != 0) {
1055 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1056 ret);
1057 return ret;
1058 }
1059 }
1060
f2644a2c 1061 i2c_set_clientdata(i2c, wm8960);
f2644a2c 1062
f0fba2ad
LG		 1063 ret = snd_soc_register_codec(&i2c->dev,
1064 &soc_codec_dev_wm8960, &wm8960_dai, 1);
b9791c01 1065
f0fba2ad 1066 return ret;
f2644a2c
MB		 1067}
1068
7a79e94e 1069static int wm8960_i2c_remove(struct i2c_client *client)
f2644a2c 1070{
f0fba2ad 1071 snd_soc_unregister_codec(&client->dev);
f2644a2c
MB		 1072 return 0;
1073}
1074
1075static const struct i2c_device_id wm8960_i2c_id[] = {
1076 { "wm8960", 0 },
1077 { }
1078};
1079MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1080
1081static struct i2c_driver wm8960_i2c_driver = {
1082 .driver = {
091edccf 1083 .name = "wm8960",
f2644a2c
MB		 1084 .owner = THIS_MODULE,
1085 },
1086 .probe = wm8960_i2c_probe,
7a79e94e 1087 .remove = wm8960_i2c_remove,
f2644a2c
MB		 1088 .id_table = wm8960_i2c_id,
1089};
1090
3c010e60 1091module_i2c_driver(wm8960_i2c_driver);
f2644a2c 1092
f2644a2c
MB		 1093MODULE_DESCRIPTION("ASoC WM8960 driver");
1094MODULE_AUTHOR("Liam Girdwood");
1095MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)