[linux-2.6-block.git] / sound / soc / codecs / wm8958-dsp2.c

/*
 * wm8958-dsp2.c  --  WM8958 DSP2 support
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include <trace/events/asoc.h>

#include <linux/mfd/wm8994/core.h>
#include <linux/mfd/wm8994/registers.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/wm8994/gpio.h>

#include "wm8994.h"

#define WM_FW_BLOCK_INFO 0xff
#define WM_FW_BLOCK_PM   0x00
#define WM_FW_BLOCK_X    0x01
#define WM_FW_BLOCK_Y    0x02
#define WM_FW_BLOCK_Z    0x03
#define WM_FW_BLOCK_I    0x06
#define WM_FW_BLOCK_A    0x08
#define WM_FW_BLOCK_C    0x0c

static int wm8958_dsp2_fw(struct snd_soc_codec *codec, const char *name,
			  const struct firmware *fw, bool check)
{
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	u64 data64;
	u32 data32;
	const u8 *data;
	char *str;
	size_t block_len, len;
	int ret = 0;

	/* Suppress unneeded downloads */
	if (wm8994->cur_fw == fw)
		return 0;

	if (fw->size < 32) {
		dev_err(codec->dev, "%s: firmware too short\n", name);
		goto err;
	}

	if (memcmp(fw->data, "WMFW", 4) != 0) {
		dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
			name, data32);
		goto err;
	}

	memcpy(&data32, fw->data + 4, sizeof(data32));
	len = be32_to_cpu(data32);

	memcpy(&data32, fw->data + 8, sizeof(data32));
	data32 = be32_to_cpu(data32);
	if ((data32 >> 24) & 0xff) {
		dev_err(codec->dev, "%s: unsupported firmware version %d\n",
			name, (data32 >> 24) & 0xff);
		goto err;
	}
	if ((data32 & 0xffff) != 8958) {
		dev_err(codec->dev, "%s: unsupported target device %d\n",
			name, data32 & 0xffff);
		goto err;
	}
	if (((data32 >> 16) & 0xff) != 0xc) {
		dev_err(codec->dev, "%s: unsupported target core %d\n",
			name, (data32 >> 16) & 0xff);
		goto err;
	}

	if (check) {
		memcpy(&data64, fw->data + 24, sizeof(u64));
		dev_info(codec->dev, "%s timestamp %llx\n",
			 name, be64_to_cpu(data64));
	} else {
		snd_soc_write(codec, 0x102, 0x2);
		snd_soc_write(codec, 0x900, 0x2);
	}

	data = fw->data + len;
	len = fw->size - len;
	while (len) {
		if (len < 12) {
			dev_err(codec->dev, "%s short data block of %d\n",
				name, len);
			goto err;
		}

		memcpy(&data32, data + 4, sizeof(data32));
		block_len = be32_to_cpu(data32);
		if (block_len + 8 > len) {
			dev_err(codec->dev, "%d byte block longer than file\n",
				block_len);
			goto err;
		}
		if (block_len == 0) {
			dev_err(codec->dev, "Zero length block\n");
			goto err;
		}

		memcpy(&data32, data, sizeof(data32));
		data32 = be32_to_cpu(data32);

		switch ((data32 >> 24) & 0xff) {
		case WM_FW_BLOCK_INFO:
			/* Informational text */
			if (!check)
				break;

			str = kzalloc(block_len + 1, GFP_KERNEL);
			if (str) {
				memcpy(str, data + 8, block_len);
				dev_info(codec->dev, "%s: %s\n", name, str);
				kfree(str);
			} else {
				dev_err(codec->dev, "Out of memory\n");
			}
			break;
		case WM_FW_BLOCK_PM:
		case WM_FW_BLOCK_X:
		case WM_FW_BLOCK_Y:
		case WM_FW_BLOCK_Z:
		case WM_FW_BLOCK_I:
		case WM_FW_BLOCK_A:
		case WM_FW_BLOCK_C:
			dev_dbg(codec->dev, "%s: %d bytes of %x@%x\n", name,
				block_len, (data32 >> 24) & 0xff,
				data32 & 0xffffff);

			if (check)
				break;

			data32 &= 0xffffff;

			wm8994_bulk_write(codec->control_data,
					  data32 & 0xffffff,
					  block_len / 2,
					  (void *)(data + 8));

			break;
		default:
			dev_warn(codec->dev, "%s: unknown block type %d\n",
				 name, (data32 >> 24) & 0xff);
			break;
		}

		/* Round up to the next 32 bit word */
		block_len += block_len % 4;

		data += block_len + 8;
		len -= block_len + 8;
	}

	if (!check) {
		dev_dbg(codec->dev, "%s: download done\n", name);
		wm8994->cur_fw = fw;
	} else {
		dev_info(codec->dev, "%s: got firmware\n", name);
	}

	goto ok;

err:
	ret = -EINVAL;
ok:
	if (!check) {
		snd_soc_write(codec, 0x900, 0x0);
		snd_soc_write(codec, 0x102, 0x0);
	}

	return ret;
}

static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
{
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	struct wm8994_pdata *pdata = wm8994->pdata;
	int i;

	/* If the DSP is already running then noop */
	if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
		return;

	/* If we have MBC firmware download it */
	if (wm8994->mbc)
		wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);

	snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
			    WM8958_DSP2_ENA, WM8958_DSP2_ENA);

	/* If we've got user supplied MBC settings use them */
	if (pdata && pdata->num_mbc_cfgs) {
		struct wm8958_mbc_cfg *cfg
			= &pdata->mbc_cfgs[wm8994->mbc_cfg];

		for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
			snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
				      cfg->coeff_regs[i]);

		for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
			snd_soc_write(codec,
				      i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
				      cfg->cutoff_regs[i]);
	}

	/* Run the DSP */
	snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
		      WM8958_DSP2_RUNR);

	/* And we're off! */
	snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
			    WM8958_MBC_ENA |
			    WM8958_MBC_SEL_MASK,
			    path << WM8958_MBC_SEL_SHIFT |
			    WM8958_MBC_ENA);
}

static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
{
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
	int ena, reg, aif;

	switch (path) {
	case 0:
		pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
		aif = 0;
		break;
	case 1:
		pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
		aif = 0;
		break;
	case 2:
		pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
		aif = 1;
		break;
	default:
		BUG();
		return;
	}

	/* Do we have both an active AIF and an active algorithm? */
	ena = wm8994->mbc_ena[path];
	if (!pwr_reg)
		ena = 0;

	reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);

	dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
		path, wm8994->dsp_active, start, pwr_reg, reg);

	if (start && ena) {
		/* If either AIFnCLK is not yet enabled postpone */
		if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
		      & WM8994_AIF1CLK_ENA_MASK) &&
		    !(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
		      & WM8994_AIF2CLK_ENA_MASK))
			return;

		/* Switch the clock over to the appropriate AIF */
		snd_soc_update_bits(codec, WM8994_CLOCKING_1,
				    WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
				    aif << WM8958_DSP2CLK_SRC_SHIFT |
				    WM8958_DSP2CLK_ENA);

		if (wm8994->mbc_ena[path])
			wm8958_dsp_start_mbc(codec, path);

		dev_dbg(codec->dev, "DSP running\n");
	} else {
		/* If the DSP is already stopped then noop */
		if (!(reg & WM8958_DSP2_ENA))
			return;

		snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
				    WM8958_MBC_ENA, 0);	
		snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
			      WM8958_DSP2_STOP);
		snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
				    WM8958_DSP2_ENA, 0);
		snd_soc_update_bits(codec, WM8994_CLOCKING_1,
				    WM8958_DSP2CLK_ENA, 0);

		wm8994->dsp_active = -1;

		dev_dbg(codec->dev, "DSP stopped\n");
	}
}

int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
		  struct snd_kcontrol *kcontrol, int event)
{
	struct snd_soc_codec *codec = w->codec;
	int i;

	switch (event) {
	case SND_SOC_DAPM_POST_PMU:
	case SND_SOC_DAPM_PRE_PMU:
		for (i = 0; i < 3; i++)
			wm8958_dsp_apply(codec, i, 1);
		break;
	case SND_SOC_DAPM_POST_PMD:
	case SND_SOC_DAPM_PRE_PMD:
		for (i = 0; i < 3; i++)
			wm8958_dsp_apply(codec, i, 0);
		break;
	}

	return 0;
}

/* Check if DSP2 is in use on another AIF */
static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
		if (i == aif)
			continue;
		if (wm8994->mbc_ena[i])
			return 1;
	}

	return 0;
}

static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_value *ucontrol)
{
	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	struct wm8994_pdata *pdata = wm8994->pdata;
	int value = ucontrol->value.integer.value[0];
	int reg;

	/* Don't allow on the fly reconfiguration */
	reg = snd_soc_read(codec, WM8994_CLOCKING_1);
	if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
		return -EBUSY;

	if (value >= pdata->num_mbc_cfgs)
		return -EINVAL;

	wm8994->mbc_cfg = value;

	return 0;
}

static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_value *ucontrol)
{
	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);

	ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;

	return 0;
}

static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
			   struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
	uinfo->count = 1;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = 1;
	return 0;
}

static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
			  struct snd_ctl_elem_value *ucontrol)
{
	int mbc = kcontrol->private_value;
	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);

	ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];

	return 0;
}

static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
			  struct snd_ctl_elem_value *ucontrol)
{
	int mbc = kcontrol->private_value;
	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);

	if (ucontrol->value.integer.value[0] > 1)
		return -EINVAL;

	if (wm8958_dsp2_busy(wm8994, mbc)) {
		dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
		return -EBUSY;
	}

	wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];

	wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);

	return 0;
}

#define WM8958_MBC_SWITCH(xname, xval) {\
	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	.info = wm8958_mbc_info, \
	.get = wm8958_mbc_get, .put = wm8958_mbc_put, \
	.private_value = xval }

static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
};

static void wm8958_mbc_loaded(const struct firmware *fw, void *context)
{
	struct snd_soc_codec *codec = context;
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);

	if (fw && wm8958_dsp2_fw(codec, "MBC", fw, true) != 0) {
		mutex_lock(&codec->mutex);
		wm8994->mbc = fw;
		mutex_unlock(&codec->mutex);
	}
}

void wm8958_dsp2_init(struct snd_soc_codec *codec)
{
	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	struct wm8994_pdata *pdata = wm8994->pdata;
	int ret, i;

	wm8994->dsp_active = -1;

	snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
			     ARRAY_SIZE(wm8958_mbc_snd_controls));

	/* We don't *require* firmware and don't want to delay boot */
	request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
				"wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
				codec, wm8958_mbc_loaded);

	if (!pdata)
		return;

	if (pdata->num_mbc_cfgs) {
		struct snd_kcontrol_new control[] = {
			SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
				     wm8958_get_mbc_enum, wm8958_put_mbc_enum),
		};

		/* We need an array of texts for the enum API */
		wm8994->mbc_texts = kmalloc(sizeof(char *)
					    * pdata->num_mbc_cfgs, GFP_KERNEL);
		if (!wm8994->mbc_texts) {
			dev_err(wm8994->codec->dev,
				"Failed to allocate %d MBC config texts\n",
				pdata->num_mbc_cfgs);
			return;
		}

		for (i = 0; i < pdata->num_mbc_cfgs; i++)
			wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;

		wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
		wm8994->mbc_enum.texts = wm8994->mbc_texts;

		ret = snd_soc_add_controls(wm8994->codec, control, 1);
		if (ret != 0)
			dev_err(wm8994->codec->dev,
				"Failed to add MBC mode controls: %d\n", ret);
	}


}
Commit	Line	Data
f701a2e5 MB	1	/*
	2	* wm8958-dsp2.c -- WM8958 DSP2 support
	3	*
	4	* Copyright 2011 Wolfson Microelectronics plc
	5	*
	6	* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/moduleparam.h>
	15	#include <linux/init.h>
	16	#include <linux/delay.h>
	17	#include <linux/pm.h>
	18	#include <linux/i2c.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/slab.h>
	21	#include <sound/soc.h>
	22	#include <sound/initval.h>
	23	#include <sound/tlv.h>
	24	#include <trace/events/asoc.h>
	25
	26	#include <linux/mfd/wm8994/core.h>
	27	#include <linux/mfd/wm8994/registers.h>
	28	#include <linux/mfd/wm8994/pdata.h>
	29	#include <linux/mfd/wm8994/gpio.h>
	30
	31	#include "wm8994.h"
	32
fbbf5920 MB	33	#define WM_FW_BLOCK_INFO 0xff
	34	#define WM_FW_BLOCK_PM 0x00
	35	#define WM_FW_BLOCK_X 0x01
	36	#define WM_FW_BLOCK_Y 0x02
	37	#define WM_FW_BLOCK_Z 0x03
	38	#define WM_FW_BLOCK_I 0x06
	39	#define WM_FW_BLOCK_A 0x08
	40	#define WM_FW_BLOCK_C 0x0c
	41
	42	static int wm8958_dsp2_fw(struct snd_soc_codec codec, const char name,
	43	const struct firmware *fw, bool check)
	44	{
	45	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	46	u64 data64;
	47	u32 data32;
	48	const u8 *data;
	49	char *str;
	50	size_t block_len, len;
	51	int ret = 0;
	52
	53	/* Suppress unneeded downloads */
	54	if (wm8994->cur_fw == fw)
	55	return 0;
	56
	57	if (fw->size < 32) {
	58	dev_err(codec->dev, "%s: firmware too short\n", name);
	59	goto err;
	60	}
	61
	62	if (memcmp(fw->data, "WMFW", 4) != 0) {
	63	dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
	64	name, data32);
	65	goto err;
	66	}
	67
	68	memcpy(&data32, fw->data + 4, sizeof(data32));
	69	len = be32_to_cpu(data32);
	70
	71	memcpy(&data32, fw->data + 8, sizeof(data32));
	72	data32 = be32_to_cpu(data32);
	73	if ((data32 >> 24) & 0xff) {
	74	dev_err(codec->dev, "%s: unsupported firmware version %d\n",
	75	name, (data32 >> 24) & 0xff);
	76	goto err;
	77	}
	78	if ((data32 & 0xffff) != 8958) {
	79	dev_err(codec->dev, "%s: unsupported target device %d\n",
	80	name, data32 & 0xffff);
	81	goto err;
	82	}
	83	if (((data32 >> 16) & 0xff) != 0xc) {
	84	dev_err(codec->dev, "%s: unsupported target core %d\n",
	85	name, (data32 >> 16) & 0xff);
	86	goto err;
	87	}
	88
	89	if (check) {
	90	memcpy(&data64, fw->data + 24, sizeof(u64));
	91	dev_info(codec->dev, "%s timestamp %llx\n",
	92	name, be64_to_cpu(data64));
	93	} else {
	94	snd_soc_write(codec, 0x102, 0x2);
	95	snd_soc_write(codec, 0x900, 0x2);
	96	}
97
98	data = fw->data + len;
99	len = fw->size - len;
100	while (len) {
101	if (len < 12) {
102	dev_err(codec->dev, "%s short data block of %d\n",
103	name, len);
104	goto err;
105	}
106
107	memcpy(&data32, data + 4, sizeof(data32));
108	block_len = be32_to_cpu(data32);
109	if (block_len + 8 > len) {
110	dev_err(codec->dev, "%d byte block longer than file\n",
111	block_len);
112	goto err;
113	}
114	if (block_len == 0) {
115	dev_err(codec->dev, "Zero length block\n");
116	goto err;
117	}
118
119	memcpy(&data32, data, sizeof(data32));
120	data32 = be32_to_cpu(data32);
121
122	switch ((data32 >> 24) & 0xff) {
123	case WM_FW_BLOCK_INFO:
124	/* Informational text */
125	if (!check)
126	break;
127
128	str = kzalloc(block_len + 1, GFP_KERNEL);
129	if (str) {
130	memcpy(str, data + 8, block_len);
131	dev_info(codec->dev, "%s: %s\n", name, str);
132	kfree(str);
133	} else {
134	dev_err(codec->dev, "Out of memory\n");
135	}
136	break;
137	case WM_FW_BLOCK_PM:
138	case WM_FW_BLOCK_X:
139	case WM_FW_BLOCK_Y:
140	case WM_FW_BLOCK_Z:
141	case WM_FW_BLOCK_I:
142	case WM_FW_BLOCK_A:
143	case WM_FW_BLOCK_C:
144	dev_dbg(codec->dev, "%s: %d bytes of %x@%x\n", name,
145	block_len, (data32 >> 24) & 0xff,
146	data32 & 0xffffff);
147
148	if (check)
149	break;
150
151	data32 &= 0xffffff;
152
153	wm8994_bulk_write(codec->control_data,
154	data32 & 0xffffff,
155	block_len / 2,
156	(void *)(data + 8));
157
158	break;
159	default:
160	dev_warn(codec->dev, "%s: unknown block type %d\n",
161	name, (data32 >> 24) & 0xff);
162	break;
163	}
164
165	/* Round up to the next 32 bit word */
166	block_len += block_len % 4;
167
168	data += block_len + 8;
169	len -= block_len + 8;
170	}
171
172	if (!check) {
173	dev_dbg(codec->dev, "%s: download done\n", name);
174	wm8994->cur_fw = fw;
175	} else {
176	dev_info(codec->dev, "%s: got firmware\n", name);
177	}
178
179	goto ok;
180
181	err:
182	ret = -EINVAL;
183	ok:
184	if (!check) {
185	snd_soc_write(codec, 0x900, 0x0);
186	snd_soc_write(codec, 0x102, 0x0);
187	}
188
189	return ret;
190	}
191
f20d77ce	192	static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
f701a2e5 MB	193	{
	194	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	195	struct wm8994_pdata *pdata = wm8994->pdata;
fbbf5920 MB	196	int i;
	197
	198	/* If the DSP is already running then noop */
	199	if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
	200	return;
	201
	202	/* If we have MBC firmware download it */
	203	if (wm8994->mbc)
	204	wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
	205
	206	snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
	207	WM8958_DSP2_ENA, WM8958_DSP2_ENA);
	208
	209	/* If we've got user supplied MBC settings use them */
	210	if (pdata && pdata->num_mbc_cfgs) {
	211	struct wm8958_mbc_cfg *cfg
	212	= &pdata->mbc_cfgs[wm8994->mbc_cfg];
	213
	214	for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
	215	snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
	216	cfg->coeff_regs[i]);
	217
	218	for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
	219	snd_soc_write(codec,
	220	i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
	221	cfg->cutoff_regs[i]);
	222	}
	223
	224	/* Run the DSP */
	225	snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
	226	WM8958_DSP2_RUNR);
	227
	228	/* And we're off! */
	229	snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
	230	WM8958_MBC_ENA \|
	231	WM8958_MBC_SEL_MASK,
	232	path << WM8958_MBC_SEL_SHIFT \|
	233	WM8958_MBC_ENA);
	234	}
	235
	236	static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
	237	{
	238	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
f701a2e5	239	int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
f20d77ce	240	int ena, reg, aif;
f701a2e5	241
f20d77ce	242	switch (path) {
f701a2e5 MB	243	case 0:
	244	pwr_reg &= (WM8994_AIF1DAC1L_ENA \| WM8994_AIF1DAC1R_ENA);
	245	aif = 0;
	246	break;
	247	case 1:
	248	pwr_reg &= (WM8994_AIF1DAC2L_ENA \| WM8994_AIF1DAC2R_ENA);
	249	aif = 0;
	250	break;
	251	case 2:
	252	pwr_reg &= (WM8994_AIF2DACL_ENA \| WM8994_AIF2DACR_ENA);
	253	aif = 1;
	254	break;
	255	default:
	256	BUG();
	257	return;
	258	}
	259
f20d77ce MB	260	/* Do we have both an active AIF and an active algorithm? */
	261	ena = wm8994->mbc_ena[path];
	262	if (!pwr_reg)
	263	ena = 0;
f701a2e5 MB	264
	265	reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
	266
f20d77ce MB	267	dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
f20d77ce MB	268	path, wm8994->dsp_active, start, pwr_reg, reg);
f701a2e5 MB	269
f701a2e5 MB	270	if (start && ena) {
f20d77ce	271	/* If either AIFnCLK is not yet enabled postpone */
c6b7b570 MB	272	if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
	273	& WM8994_AIF1CLK_ENA_MASK) &&
	274	!(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
	275	& WM8994_AIF2CLK_ENA_MASK))
	276	return;
	277
f701a2e5 MB	278	/* Switch the clock over to the appropriate AIF */
	279	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
	280	WM8958_DSP2CLK_SRC \| WM8958_DSP2CLK_ENA,
	281	aif << WM8958_DSP2CLK_SRC_SHIFT \|
	282	WM8958_DSP2CLK_ENA);
	283
f20d77ce MB	284	if (wm8994->mbc_ena[path])
f20d77ce MB	285	wm8958_dsp_start_mbc(codec, path);
f701a2e5	286
f20d77ce	287	dev_dbg(codec->dev, "DSP running\n");
f701a2e5 MB	288	} else {
	289	/* If the DSP is already stopped then noop */
	290	if (!(reg & WM8958_DSP2_ENA))
	291	return;
	292
	293	snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
	294	WM8958_MBC_ENA, 0);
f20d77ce MB	295	snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
f20d77ce MB	296	WM8958_DSP2_STOP);
f701a2e5 MB	297	snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
	298	WM8958_DSP2_ENA, 0);
	299	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
	300	WM8958_DSP2CLK_ENA, 0);
f20d77ce MB	301
	302	wm8994->dsp_active = -1;
	303
	304	dev_dbg(codec->dev, "DSP stopped\n");
f701a2e5 MB	305	}
	306	}
	307
	308	int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
	309	struct snd_kcontrol *kcontrol, int event)
	310	{
	311	struct snd_soc_codec *codec = w->codec;
c6b7b570	312	int i;
f701a2e5 MB	313
	314	switch (event) {
	315	case SND_SOC_DAPM_POST_PMU:
c6b7b570 MB	316	case SND_SOC_DAPM_PRE_PMU:
c6b7b570 MB	317	for (i = 0; i < 3; i++)
f20d77ce	318	wm8958_dsp_apply(codec, i, 1);
f701a2e5 MB	319	break;
f701a2e5 MB	320	case SND_SOC_DAPM_POST_PMD:
c6b7b570 MB	321	case SND_SOC_DAPM_PRE_PMD:
c6b7b570 MB	322	for (i = 0; i < 3; i++)
f20d77ce	323	wm8958_dsp_apply(codec, i, 0);
f701a2e5 MB	324	break;
	325	}
	326
	327	return 0;
	328	}
	329
f20d77ce MB	330	/* Check if DSP2 is in use on another AIF */
	331	static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
	332	{
	333	int i;
	334
	335	for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
	336	if (i == aif)
	337	continue;
	338	if (wm8994->mbc_ena[i])
	339	return 1;
	340	}
	341
	342	return 0;
	343	}
	344
f701a2e5 MB	345	static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
	346	struct snd_ctl_elem_value *ucontrol)
	347	{
	348	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	349	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	350	struct wm8994_pdata *pdata = wm8994->pdata;
	351	int value = ucontrol->value.integer.value[0];
	352	int reg;
	353
	354	/* Don't allow on the fly reconfiguration */
	355	reg = snd_soc_read(codec, WM8994_CLOCKING_1);
	356	if (reg < 0 \|\| reg & WM8958_DSP2CLK_ENA)
	357	return -EBUSY;
	358
	359	if (value >= pdata->num_mbc_cfgs)
	360	return -EINVAL;
	361
	362	wm8994->mbc_cfg = value;
	363
	364	return 0;
	365	}
	366
	367	static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
	368	struct snd_ctl_elem_value *ucontrol)
	369	{
	370	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	371	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	372
	373	ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
	374
	375	return 0;
	376	}
	377
	378	static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
	379	struct snd_ctl_elem_info *uinfo)
	380	{
	381	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
	382	uinfo->count = 1;
	383	uinfo->value.integer.min = 0;
	384	uinfo->value.integer.max = 1;
	385	return 0;
	386	}
	387
	388	static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
	389	struct snd_ctl_elem_value *ucontrol)
	390	{
	391	int mbc = kcontrol->private_value;
	392	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	393	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	394
	395	ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
	396
	397	return 0;
	398	}
	399
	400	static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
	401	struct snd_ctl_elem_value *ucontrol)
	402	{
	403	int mbc = kcontrol->private_value;
f701a2e5 MB	404	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
	405	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	406
	407	if (ucontrol->value.integer.value[0] > 1)
	408	return -EINVAL;
	409
f20d77ce MB	410	if (wm8958_dsp2_busy(wm8994, mbc)) {
	411	dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
	412	return -EBUSY;
f701a2e5 MB	413	}
	414
	415	wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
	416
f20d77ce	417	wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);
f701a2e5 MB	418
	419	return 0;
	420	}
	421
	422	#define WM8958_MBC_SWITCH(xname, xval) {\
	423	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
	424	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
	425	.info = wm8958_mbc_info, \
	426	.get = wm8958_mbc_get, .put = wm8958_mbc_put, \
	427	.private_value = xval }
	428
	429	static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
	430	WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
	431	WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
	432	WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
	433	};
	434
fbbf5920 MB	435	static void wm8958_mbc_loaded(const struct firmware fw, void context)
	436	{
	437	struct snd_soc_codec *codec = context;
	438	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	439
	440	if (fw && wm8958_dsp2_fw(codec, "MBC", fw, true) != 0) {
	441	mutex_lock(&codec->mutex);
	442	wm8994->mbc = fw;
	443	mutex_unlock(&codec->mutex);
	444	}
	445	}
	446
f701a2e5 MB	447	void wm8958_dsp2_init(struct snd_soc_codec *codec)
	448	{
	449	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
	450	struct wm8994_pdata *pdata = wm8994->pdata;
	451	int ret, i;
	452
f20d77ce MB	453	wm8994->dsp_active = -1;
f20d77ce MB	454
f701a2e5 MB	455	snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
	456	ARRAY_SIZE(wm8958_mbc_snd_controls));
	457
f20d77ce	458	/* We don't require firmware and don't want to delay boot */
fbbf5920 MB	459	request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
	460	"wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
	461	codec, wm8958_mbc_loaded);
	462
f701a2e5 MB	463	if (!pdata)
	464	return;
	465
	466	if (pdata->num_mbc_cfgs) {
	467	struct snd_kcontrol_new control[] = {
	468	SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
	469	wm8958_get_mbc_enum, wm8958_put_mbc_enum),
	470	};
	471
	472	/* We need an array of texts for the enum API */
	473	wm8994->mbc_texts = kmalloc(sizeof(char *)
	474	* pdata->num_mbc_cfgs, GFP_KERNEL);
	475	if (!wm8994->mbc_texts) {
	476	dev_err(wm8994->codec->dev,
	477	"Failed to allocate %d MBC config texts\n",
	478	pdata->num_mbc_cfgs);
	479	return;
	480	}
	481
	482	for (i = 0; i < pdata->num_mbc_cfgs; i++)
	483	wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
	484
	485	wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
	486	wm8994->mbc_enum.texts = wm8994->mbc_texts;
	487
	488	ret = snd_soc_add_controls(wm8994->codec, control, 1);
	489	if (ret != 0)
	490	dev_err(wm8994->codec->dev,
	491	"Failed to add MBC mode controls: %d\n", ret);
	492	}
	493
	494
	495	}