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ASoC: make ops a pointer in 'struct snd_soc_dai'
[linux-2.6-block.git] / sound / soc / codecs / wm8753.c
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1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
69e169da
MB		 54#ifdef CONFIG_SPI_MASTER
55static struct spi_driver wm8753_spi_driver;
56static int wm8753_spi_write(struct spi_device *spi, const char *data, int len);
57#endif
58
1f53aee0
LG		 59static int caps_charge = 2000;
60module_param(caps_charge, int, 0);
61MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
62
63static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
64 unsigned int mode);
65
1f53aee0
LG		 66/*
67 * wm8753 register cache
68 * We can't read the WM8753 register space when we
69 * are using 2 wire for device control, so we cache them instead.
70 */
71static const u16 wm8753_reg[] = {
72 0x0008, 0x0000, 0x000a, 0x000a,
73 0x0033, 0x0000, 0x0007, 0x00ff,
74 0x00ff, 0x000f, 0x000f, 0x007b,
75 0x0000, 0x0032, 0x0000, 0x00c3,
76 0x00c3, 0x00c0, 0x0000, 0x0000,
77 0x0000, 0x0000, 0x0000, 0x0000,
78 0x0000, 0x0000, 0x0000, 0x0000,
79 0x0000, 0x0000, 0x0000, 0x0055,
80 0x0005, 0x0050, 0x0055, 0x0050,
81 0x0055, 0x0050, 0x0055, 0x0079,
82 0x0079, 0x0079, 0x0079, 0x0079,
83 0x0000, 0x0000, 0x0000, 0x0000,
84 0x0097, 0x0097, 0x0000, 0x0004,
85 0x0000, 0x0083, 0x0024, 0x01ba,
86 0x0000, 0x0083, 0x0024, 0x01ba,
87 0x0000, 0x0000
88};
89
c2bac160
MB		 90/* codec private data */
91struct wm8753_priv {
92 unsigned int sysclk;
93 unsigned int pcmclk;
94 struct snd_soc_codec codec;
95 u16 reg_cache[ARRAY_SIZE(wm8753_reg)];
96};
97
1f53aee0
LG		 98/*
99 * read wm8753 register cache
100 */
101static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
102 unsigned int reg)
103{
104 u16 *cache = codec->reg_cache;
91432e97 105 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 106 return -1;
107 return cache[reg - 1];
108}
109
110/*
111 * write wm8753 register cache
112 */
113static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
114 unsigned int reg, unsigned int value)
115{
116 u16 *cache = codec->reg_cache;
91432e97 117 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 118 return;
119 cache[reg - 1] = value;
120}
121
122/*
123 * write to the WM8753 register space
124 */
125static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
126 unsigned int value)
127{
128 u8 data[2];
129
130 /* data is
131 * D15..D9 WM8753 register offset
132 * D8...D0 register data
133 */
134 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
135 data[1] = value & 0x00ff;
136
60fc684a 137 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 138 if (codec->hw_write(codec->control_data, data, 2) == 2)
139 return 0;
140 else
141 return -EIO;
142}
143
144#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
145
146/*
147 * WM8753 Controls
148 */
149static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
150static const char *wm8753_base_filter[] =
151 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
152 "100Hz @ 8kHz", "200Hz @ 8kHz"};
153static const char *wm8753_treble[] = {"8kHz", "4kHz"};
154static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
155static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
156static const char *wm8753_3d_func[] = {"Capture", "Playback"};
157static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
158static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
159static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
160static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
161static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
162static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
163 "Line 1", "Line 2"};
164static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
165static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
166static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
167static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
168static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
169 "Right PGA"};
170static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
171 "Left + Right"};
172static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
173static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
174static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
175static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
176static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
177 "Analogue Mix Right", "Digital Mono Mix"};
178static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
179 "82Hz @ 8kHz", "170Hz @ 8kHz"};
180static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
181static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
182static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
183static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
184 "Channel Swap"};
ae092c9e 185static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 186
187static const struct soc_enum wm8753_enum[] = {
188SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
189SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
190SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
191SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
192SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
193SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
194SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
195SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
196SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
197SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
198SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
199SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
200SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
201SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
202SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
203SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
204SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
205SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
206SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
207SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
208SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
209SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
210SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
211SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
212SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
213SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
214SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
215SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 216SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 217};
218
219
220static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
221 struct snd_ctl_elem_value *ucontrol)
222{
223 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
224 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
225
226 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
227 return 0;
228}
229
230static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol)
232{
233 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
234 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
235
60fc684a 236 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 237 return 0;
238
239 mode &= 0xfff3;
240 mode |= (ucontrol->value.integer.value[0] << 2);
241
242 wm8753_write(codec, WM8753_IOCTL, mode);
243 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
244 return 1;
245}
246
2cc8c609
MM		 247static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
248static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
249static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
250static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
251static const unsigned int out_tlv[] = {
252 TLV_DB_RANGE_HEAD(2),
253 /* 0000000 - 0101111 = "Analogue mute" */
254 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
255 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
256};
257static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
258static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
259static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 260
1f53aee0 261static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 262SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
263
264SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
265 adc_tlv),
266
267SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
268 0, 127, 0, out_tlv),
269SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
270 127, 0, out_tlv),
271
272SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
273
274SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
275 1, mix_tlv),
276SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
277 7, 1, mix_tlv),
278SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
279 1, voice_mix_tlv),
280
281SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
282 1, 0),
283SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
284 1, 0),
285
286SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
287SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
288 mix_tlv),
289SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
290 voice_mix_tlv),
1f53aee0
LG		 291SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
292
293SOC_ENUM("Bass Boost", wm8753_enum[0]),
294SOC_ENUM("Bass Filter", wm8753_enum[1]),
295SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
296
297SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
298SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
299
2cc8c609
MM		 300SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
301 rec_mix_tlv),
302SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
303 rec_mix_tlv),
1f53aee0 304
2cc8c609
MM		 305SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
306 pga_tlv),
1f53aee0
LG		 307SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
308SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
309
310SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
311SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
312SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
313
314SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
315SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
316SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
317SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
318SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
319SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
320SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
321SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
322SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
323SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
324
325SOC_ENUM("3D Function", wm8753_enum[5]),
326SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
327SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
328SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
329SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
330
331SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
332SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
333
334SOC_ENUM("De-emphasis", wm8753_enum[8]),
335SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
336SOC_ENUM("Playback Phase", wm8753_enum[10]),
337
2cc8c609
MM		 338SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
339SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 340
341SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
342
343SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 344SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 345};
346
1f53aee0
LG		 347/*
348 * _DAPM_ Controls
349 */
350
351/* Left Mixer */
352static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
353SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
354SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
355SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
356SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
357};
358
359/* Right mixer */
360static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
361SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
362SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
363SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
364SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
365};
366
367/* Mono mixer */
368static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
369SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
370SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
371SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
372SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
373SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
374};
375
376/* Mono 2 Mux */
377static const struct snd_kcontrol_new wm8753_mono2_controls =
378SOC_DAPM_ENUM("Route", wm8753_enum[17]);
379
380/* Out 3 Mux */
381static const struct snd_kcontrol_new wm8753_out3_controls =
382SOC_DAPM_ENUM("Route", wm8753_enum[18]);
383
384/* Out 4 Mux */
385static const struct snd_kcontrol_new wm8753_out4_controls =
386SOC_DAPM_ENUM("Route", wm8753_enum[19]);
387
388/* ADC Mono Mix */
389static const struct snd_kcontrol_new wm8753_adc_mono_controls =
390SOC_DAPM_ENUM("Route", wm8753_enum[22]);
391
392/* Record mixer */
393static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
394SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
395SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
396SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
397};
398
399/* Left ADC mux */
400static const struct snd_kcontrol_new wm8753_adc_left_controls =
401SOC_DAPM_ENUM("Route", wm8753_enum[21]);
402
403/* Right ADC mux */
404static const struct snd_kcontrol_new wm8753_adc_right_controls =
405SOC_DAPM_ENUM("Route", wm8753_enum[20]);
406
407/* MIC mux */
408static const struct snd_kcontrol_new wm8753_mic_mux_controls =
409SOC_DAPM_ENUM("Route", wm8753_enum[16]);
410
411/* ALC mixer */
412static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
413SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
414SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
415SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
416SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
417};
418
419/* Left Line mux */
420static const struct snd_kcontrol_new wm8753_line_left_controls =
421SOC_DAPM_ENUM("Route", wm8753_enum[14]);
422
423/* Right Line mux */
424static const struct snd_kcontrol_new wm8753_line_right_controls =
425SOC_DAPM_ENUM("Route", wm8753_enum[13]);
426
427/* Mono Line mux */
428static const struct snd_kcontrol_new wm8753_line_mono_controls =
429SOC_DAPM_ENUM("Route", wm8753_enum[12]);
430
431/* Line mux and mixer */
432static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
433SOC_DAPM_ENUM("Route", wm8753_enum[11]);
434
435/* Rx mux and mixer */
436static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
437SOC_DAPM_ENUM("Route", wm8753_enum[15]);
438
439/* Mic Selector Mux */
440static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
441SOC_DAPM_ENUM("Route", wm8753_enum[25]);
442
443static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
444SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
445SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
446 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
447SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
448SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
449SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
450SND_SOC_DAPM_OUTPUT("LOUT1"),
451SND_SOC_DAPM_OUTPUT("LOUT2"),
452SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
453 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
454SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
455SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
456SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
457SND_SOC_DAPM_OUTPUT("ROUT1"),
458SND_SOC_DAPM_OUTPUT("ROUT2"),
459SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
460 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
461SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
462SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
463SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
464SND_SOC_DAPM_OUTPUT("MONO1"),
465SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
466SND_SOC_DAPM_OUTPUT("MONO2"),
467SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
468SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
469SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
470SND_SOC_DAPM_OUTPUT("OUT3"),
471SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
472SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
473SND_SOC_DAPM_OUTPUT("OUT4"),
474SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
475 &wm8753_record_mixer_controls[0],
476 ARRAY_SIZE(wm8753_record_mixer_controls)),
477SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
478SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
479SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
480 &wm8753_adc_mono_controls),
481SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
482 &wm8753_adc_mono_controls),
483SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
484 &wm8753_adc_left_controls),
485SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
486 &wm8753_adc_right_controls),
487SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
488 &wm8753_mic_mux_controls),
489SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
490SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
491SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
492 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
493SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
494 &wm8753_line_left_controls),
495SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
496 &wm8753_line_right_controls),
497SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
498 &wm8753_line_mono_controls),
499SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
500 &wm8753_line_mux_mix_controls),
501SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
502 &wm8753_rx_mux_mix_controls),
503SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
504SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
505SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
506 &wm8753_mic_sel_mux_controls),
507SND_SOC_DAPM_INPUT("LINE1"),
508SND_SOC_DAPM_INPUT("LINE2"),
509SND_SOC_DAPM_INPUT("RXP"),
510SND_SOC_DAPM_INPUT("RXN"),
511SND_SOC_DAPM_INPUT("ACIN"),
512SND_SOC_DAPM_OUTPUT("ACOP"),
513SND_SOC_DAPM_INPUT("MIC1N"),
514SND_SOC_DAPM_INPUT("MIC1"),
515SND_SOC_DAPM_INPUT("MIC2N"),
516SND_SOC_DAPM_INPUT("MIC2"),
517SND_SOC_DAPM_VMID("VREF"),
518};
519
a65f0568 520static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 521 /* left mixer */
522 {"Left Mixer", "Left Playback Switch", "Left DAC"},
523 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
524 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
525 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
526
527 /* right mixer */
528 {"Right Mixer", "Right Playback Switch", "Right DAC"},
529 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
530 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
531 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
532
533 /* mono mixer */
534 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
535 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
536 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
537 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
538 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
539
540 /* left out */
541 {"Left Out 1", NULL, "Left Mixer"},
542 {"Left Out 2", NULL, "Left Mixer"},
543 {"LOUT1", NULL, "Left Out 1"},
544 {"LOUT2", NULL, "Left Out 2"},
545
546 /* right out */
547 {"Right Out 1", NULL, "Right Mixer"},
548 {"Right Out 2", NULL, "Right Mixer"},
549 {"ROUT1", NULL, "Right Out 1"},
550 {"ROUT2", NULL, "Right Out 2"},
551
552 /* mono 1 out */
553 {"Mono Out 1", NULL, "Mono Mixer"},
554 {"MONO1", NULL, "Mono Out 1"},
555
556 /* mono 2 out */
557 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
558 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
559 {"Mono 2 Mux", "Left", "Left Mixer"},
560 {"Mono 2 Mux", "Right", "Right Mixer"},
561 {"Mono Out 2", NULL, "Mono 2 Mux"},
562 {"MONO2", NULL, "Mono Out 2"},
563
564 /* out 3 */
565 {"Out3 Left + Right", NULL, "Left Mixer"},
566 {"Out3 Left + Right", NULL, "Right Mixer"},
567 {"Out3 Mux", "VREF", "VREF"},
568 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
569 {"Out3 Mux", "ROUT2", "ROUT2"},
570 {"Out 3", NULL, "Out3 Mux"},
571 {"OUT3", NULL, "Out 3"},
572
573 /* out 4 */
574 {"Out4 Mux", "VREF", "VREF"},
4037314a 575 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 576 {"Out4 Mux", "LOUT2", "LOUT2"},
577 {"Out 4", NULL, "Out4 Mux"},
578 {"OUT4", NULL, "Out 4"},
579
580 /* record mixer */
581 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
582 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
583 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
584
585 /* Mic/SideTone Mux */
586 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
587 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
588 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
589 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
590
591 /* Capture Left Mux */
592 {"Capture Left Mux", "PGA", "Left Capture Volume"},
593 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
594 {"Capture Left Mux", "Line", "LINE1"},
595
596 /* Capture Right Mux */
597 {"Capture Right Mux", "PGA", "Right Capture Volume"},
598 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 599 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 600
601 /* Mono Capture mixer-mux */
602 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
603 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
604 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
605 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
606 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
607 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
608 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
609 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
610 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
611
612 /* ADC */
613 {"Left ADC", NULL, "Capture Left Mixer"},
614 {"Right ADC", NULL, "Capture Right Mixer"},
615
616 /* Left Capture Volume */
617 {"Left Capture Volume", NULL, "ACIN"},
618
619 /* Right Capture Volume */
620 {"Right Capture Volume", NULL, "Mic 2 Volume"},
621
622 /* ALC Mixer */
623 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
624 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
625 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
626 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
627
628 /* Line Left Mux */
629 {"Line Left Mux", "Line 1", "LINE1"},
630 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
631
632 /* Line Right Mux */
633 {"Line Right Mux", "Line 2", "LINE2"},
634 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
635
636 /* Line Mono Mux */
637 {"Line Mono Mux", "Line Mix", "Line Mixer"},
638 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
639
640 /* Line Mixer/Mux */
641 {"Line Mixer", "Line 1 + 2", "LINE1"},
642 {"Line Mixer", "Line 1 - 2", "LINE1"},
643 {"Line Mixer", "Line 1 + 2", "LINE2"},
644 {"Line Mixer", "Line 1 - 2", "LINE2"},
645 {"Line Mixer", "Line 1", "LINE1"},
646 {"Line Mixer", "Line 2", "LINE2"},
647
648 /* Rx Mixer/Mux */
649 {"Rx Mixer", "RXP - RXN", "RXP"},
650 {"Rx Mixer", "RXP + RXN", "RXP"},
651 {"Rx Mixer", "RXP - RXN", "RXN"},
652 {"Rx Mixer", "RXP + RXN", "RXN"},
653 {"Rx Mixer", "RXP", "RXP"},
654 {"Rx Mixer", "RXN", "RXN"},
655
656 /* Mic 1 Volume */
657 {"Mic 1 Volume", NULL, "MIC1N"},
658 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
659
660 /* Mic 2 Volume */
661 {"Mic 2 Volume", NULL, "MIC2N"},
662 {"Mic 2 Volume", NULL, "MIC2"},
663
664 /* Mic Selector Mux */
665 {"Mic Selection Mux", "Mic 1", "MIC1"},
666 {"Mic Selection Mux", "Mic 2", "MIC2N"},
667 {"Mic Selection Mux", "Mic 3", "MIC2"},
668
669 /* ACOP */
670 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 671};
672
673static int wm8753_add_widgets(struct snd_soc_codec *codec)
674{
a65f0568
MB		 675 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
676 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 677
a65f0568 678 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 679
680 snd_soc_dapm_new_widgets(codec);
681 return 0;
682}
683
684/* PLL divisors */
685struct _pll_div {
686 u32 div2:1;
687 u32 n:4;
688 u32 k:24;
689};
690
691/* The size in bits of the pll divide multiplied by 10
692 * to allow rounding later */
693#define FIXED_PLL_SIZE ((1 << 22) * 10)
694
695static void pll_factors(struct _pll_div *pll_div, unsigned int target,
696 unsigned int source)
697{
698 u64 Kpart;
699 unsigned int K, Ndiv, Nmod;
700
701 Ndiv = target / source;
702 if (Ndiv < 6) {
703 source >>= 1;
704 pll_div->div2 = 1;
705 Ndiv = target / source;
706 } else
707 pll_div->div2 = 0;
708
709 if ((Ndiv < 6) || (Ndiv > 12))
710 printk(KERN_WARNING
60fc684a 711 "wm8753: unsupported N = %d\n", Ndiv);
1f53aee0
LG		 712
713 pll_div->n = Ndiv;
714 Nmod = target % source;
715 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
716
717 do_div(Kpart, source);
718
719 K = Kpart & 0xFFFFFFFF;
720
721 /* Check if we need to round */
722 if ((K % 10) >= 5)
723 K += 5;
724
725 /* Move down to proper range now rounding is done */
726 K /= 10;
727
728 pll_div->k = K;
729}
730
e550e17f 731static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 732 int pll_id, unsigned int freq_in, unsigned int freq_out)
733{
734 u16 reg, enable;
735 int offset;
736 struct snd_soc_codec *codec = codec_dai->codec;
737
738 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
739 return -ENODEV;
740
741 if (pll_id == WM8753_PLL1) {
742 offset = 0;
743 enable = 0x10;
744 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
745 } else {
746 offset = 4;
747 enable = 0x8;
748 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
749 }
750
751 if (!freq_in || !freq_out) {
752 /* disable PLL */
753 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
754 wm8753_write(codec, WM8753_CLOCK, reg);
755 return 0;
756 } else {
757 u16 value = 0;
758 struct _pll_div pll_div;
759
760 pll_factors(&pll_div, freq_out * 8, freq_in);
761
762 /* set up N and K PLL divisor ratios */
763 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
764 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
765 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
766
767 /* bits 8:0 = PLL_K[17:9] */
768 value = (pll_div.k & 0x03fe00) >> 9;
769 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
770
771 /* bits 8:0 = PLL_K[8:0] */
772 value = pll_div.k & 0x0001ff;
773 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
774
775 /* set PLL as input and enable */
776 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
777 (pll_div.div2 << 3));
778 wm8753_write(codec, WM8753_CLOCK, reg | enable);
779 }
780 return 0;
781}
782
783struct _coeff_div {
784 u32 mclk;
785 u32 rate;
786 u8 sr:5;
787 u8 usb:1;
788};
789
790/* codec hifi mclk (after PLL) clock divider coefficients */
791static const struct _coeff_div coeff_div[] = {
792 /* 8k */
793 {12288000, 8000, 0x6, 0x0},
794 {11289600, 8000, 0x16, 0x0},
795 {18432000, 8000, 0x7, 0x0},
796 {16934400, 8000, 0x17, 0x0},
797 {12000000, 8000, 0x6, 0x1},
798
799 /* 11.025k */
800 {11289600, 11025, 0x18, 0x0},
801 {16934400, 11025, 0x19, 0x0},
802 {12000000, 11025, 0x19, 0x1},
803
804 /* 16k */
805 {12288000, 16000, 0xa, 0x0},
806 {18432000, 16000, 0xb, 0x0},
807 {12000000, 16000, 0xa, 0x1},
808
809 /* 22.05k */
810 {11289600, 22050, 0x1a, 0x0},
811 {16934400, 22050, 0x1b, 0x0},
812 {12000000, 22050, 0x1b, 0x1},
813
814 /* 32k */
815 {12288000, 32000, 0xc, 0x0},
816 {18432000, 32000, 0xd, 0x0},
817 {12000000, 32000, 0xa, 0x1},
818
819 /* 44.1k */
820 {11289600, 44100, 0x10, 0x0},
821 {16934400, 44100, 0x11, 0x0},
822 {12000000, 44100, 0x11, 0x1},
823
824 /* 48k */
825 {12288000, 48000, 0x0, 0x0},
826 {18432000, 48000, 0x1, 0x0},
827 {12000000, 48000, 0x0, 0x1},
828
829 /* 88.2k */
830 {11289600, 88200, 0x1e, 0x0},
831 {16934400, 88200, 0x1f, 0x0},
832 {12000000, 88200, 0x1f, 0x1},
833
834 /* 96k */
835 {12288000, 96000, 0xe, 0x0},
836 {18432000, 96000, 0xf, 0x0},
837 {12000000, 96000, 0xe, 0x1},
838};
839
840static int get_coeff(int mclk, int rate)
841{
842 int i;
843
844 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
845 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
846 return i;
847 }
848 return -EINVAL;
849}
850
851/*
852 * Clock after PLL and dividers
853 */
e550e17f 854static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 855 int clk_id, unsigned int freq, int dir)
856{
857 struct snd_soc_codec *codec = codec_dai->codec;
858 struct wm8753_priv *wm8753 = codec->private_data;
859
860 switch (freq) {
861 case 11289600:
862 case 12000000:
863 case 12288000:
864 case 16934400:
865 case 18432000:
866 if (clk_id == WM8753_MCLK) {
867 wm8753->sysclk = freq;
868 return 0;
869 } else if (clk_id == WM8753_PCMCLK) {
870 wm8753->pcmclk = freq;
871 return 0;
872 }
873 break;
874 }
875 return -EINVAL;
876}
877
878/*
879 * Set's ADC and Voice DAC format.
880 */
e550e17f 881static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 882 unsigned int fmt)
883{
884 struct snd_soc_codec *codec = codec_dai->codec;
885 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
886
887 /* interface format */
888 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
889 case SND_SOC_DAIFMT_I2S:
890 voice |= 0x0002;
891 break;
892 case SND_SOC_DAIFMT_RIGHT_J:
893 break;
894 case SND_SOC_DAIFMT_LEFT_J:
895 voice |= 0x0001;
896 break;
897 case SND_SOC_DAIFMT_DSP_A:
898 voice |= 0x0003;
899 break;
900 case SND_SOC_DAIFMT_DSP_B:
901 voice |= 0x0013;
902 break;
903 default:
904 return -EINVAL;
905 }
906
907 wm8753_write(codec, WM8753_PCM, voice);
908 return 0;
909}
910
911/*
912 * Set PCM DAI bit size and sample rate.
913 */
914static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 915 struct snd_pcm_hw_params *params,
916 struct snd_soc_dai *dai)
1f53aee0
LG		 917{
918 struct snd_soc_pcm_runtime *rtd = substream->private_data;
919 struct snd_soc_device *socdev = rtd->socdev;
6627a653 920 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 921 struct wm8753_priv *wm8753 = codec->private_data;
922 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
923 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
924
925 /* bit size */
926 switch (params_format(params)) {
927 case SNDRV_PCM_FORMAT_S16_LE:
928 break;
929 case SNDRV_PCM_FORMAT_S20_3LE:
930 voice |= 0x0004;
931 break;
932 case SNDRV_PCM_FORMAT_S24_LE:
933 voice |= 0x0008;
934 break;
935 case SNDRV_PCM_FORMAT_S32_LE:
936 voice |= 0x000c;
937 break;
938 }
939
940 /* sample rate */
941 if (params_rate(params) * 384 == wm8753->pcmclk)
942 srate |= 0x80;
943 wm8753_write(codec, WM8753_SRATE1, srate);
944
945 wm8753_write(codec, WM8753_PCM, voice);
946 return 0;
947}
948
949/*
950 * Set's PCM dai fmt and BCLK.
951 */
e550e17f 952static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 953 unsigned int fmt)
954{
955 struct snd_soc_codec *codec = codec_dai->codec;
956 u16 voice, ioctl;
957
958 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
959 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
960
961 /* set master/slave audio interface */
962 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
963 case SND_SOC_DAIFMT_CBS_CFS:
964 break;
965 case SND_SOC_DAIFMT_CBM_CFM:
966 ioctl |= 0x2;
967 case SND_SOC_DAIFMT_CBM_CFS:
968 voice |= 0x0040;
969 break;
970 default:
971 return -EINVAL;
972 }
973
974 /* clock inversion */
975 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
976 case SND_SOC_DAIFMT_DSP_A:
977 case SND_SOC_DAIFMT_DSP_B:
978 /* frame inversion not valid for DSP modes */
979 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
980 case SND_SOC_DAIFMT_NB_NF:
981 break;
982 case SND_SOC_DAIFMT_IB_NF:
983 voice |= 0x0080;
984 break;
985 default:
986 return -EINVAL;
987 }
988 break;
989 case SND_SOC_DAIFMT_I2S:
990 case SND_SOC_DAIFMT_RIGHT_J:
991 case SND_SOC_DAIFMT_LEFT_J:
992 voice &= ~0x0010;
993 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
994 case SND_SOC_DAIFMT_NB_NF:
995 break;
996 case SND_SOC_DAIFMT_IB_IF:
997 voice |= 0x0090;
998 break;
999 case SND_SOC_DAIFMT_IB_NF:
1000 voice |= 0x0080;
1001 break;
1002 case SND_SOC_DAIFMT_NB_IF:
1003 voice |= 0x0010;
1004 break;
1005 default:
1006 return -EINVAL;
1007 }
1008 break;
1009 default:
1010 return -EINVAL;
1011 }
1012
1013 wm8753_write(codec, WM8753_PCM, voice);
1014 wm8753_write(codec, WM8753_IOCTL, ioctl);
1015 return 0;
1016}
1017
e550e17f 1018static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1019 int div_id, int div)
1020{
1021 struct snd_soc_codec *codec = codec_dai->codec;
1022 u16 reg;
1023
1024 switch (div_id) {
1025 case WM8753_PCMDIV:
1026 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1027 wm8753_write(codec, WM8753_CLOCK, reg | div);
1028 break;
1029 case WM8753_BCLKDIV:
1030 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1031 wm8753_write(codec, WM8753_SRATE2, reg | div);
1032 break;
1033 case WM8753_VXCLKDIV:
1034 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1035 wm8753_write(codec, WM8753_SRATE2, reg | div);
1036 break;
1037 default:
1038 return -EINVAL;
1039 }
1040 return 0;
1041}
1042
1043/*
1044 * Set's HiFi DAC format.
1045 */
e550e17f 1046static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1047 unsigned int fmt)
1048{
1049 struct snd_soc_codec *codec = codec_dai->codec;
1050 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1051
1052 /* interface format */
1053 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1054 case SND_SOC_DAIFMT_I2S:
1055 hifi |= 0x0002;
1056 break;
1057 case SND_SOC_DAIFMT_RIGHT_J:
1058 break;
1059 case SND_SOC_DAIFMT_LEFT_J:
1060 hifi |= 0x0001;
1061 break;
1062 case SND_SOC_DAIFMT_DSP_A:
1063 hifi |= 0x0003;
1064 break;
1065 case SND_SOC_DAIFMT_DSP_B:
1066 hifi |= 0x0013;
1067 break;
1068 default:
1069 return -EINVAL;
1070 }
1071
1072 wm8753_write(codec, WM8753_HIFI, hifi);
1073 return 0;
1074}
1075
1076/*
1077 * Set's I2S DAI format.
1078 */
e550e17f 1079static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1080 unsigned int fmt)
1081{
1082 struct snd_soc_codec *codec = codec_dai->codec;
1083 u16 ioctl, hifi;
1084
1085 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1086 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1087
1088 /* set master/slave audio interface */
1089 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1090 case SND_SOC_DAIFMT_CBS_CFS:
1091 break;
1092 case SND_SOC_DAIFMT_CBM_CFM:
1093 ioctl |= 0x1;
1094 case SND_SOC_DAIFMT_CBM_CFS:
1095 hifi |= 0x0040;
1096 break;
1097 default:
1098 return -EINVAL;
1099 }
1100
1101 /* clock inversion */
1102 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1103 case SND_SOC_DAIFMT_DSP_A:
1104 case SND_SOC_DAIFMT_DSP_B:
1105 /* frame inversion not valid for DSP modes */
1106 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1107 case SND_SOC_DAIFMT_NB_NF:
1108 break;
1109 case SND_SOC_DAIFMT_IB_NF:
1110 hifi |= 0x0080;
1111 break;
1112 default:
1113 return -EINVAL;
1114 }
1115 break;
1116 case SND_SOC_DAIFMT_I2S:
1117 case SND_SOC_DAIFMT_RIGHT_J:
1118 case SND_SOC_DAIFMT_LEFT_J:
1119 hifi &= ~0x0010;
1120 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1121 case SND_SOC_DAIFMT_NB_NF:
1122 break;
1123 case SND_SOC_DAIFMT_IB_IF:
1124 hifi |= 0x0090;
1125 break;
1126 case SND_SOC_DAIFMT_IB_NF:
1127 hifi |= 0x0080;
1128 break;
1129 case SND_SOC_DAIFMT_NB_IF:
1130 hifi |= 0x0010;
1131 break;
1132 default:
1133 return -EINVAL;
1134 }
1135 break;
1136 default:
1137 return -EINVAL;
1138 }
1139
1140 wm8753_write(codec, WM8753_HIFI, hifi);
1141 wm8753_write(codec, WM8753_IOCTL, ioctl);
1142 return 0;
1143}
1144
1145/*
1146 * Set PCM DAI bit size and sample rate.
1147 */
1148static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1149 struct snd_pcm_hw_params *params,
1150 struct snd_soc_dai *dai)
1f53aee0
LG		 1151{
1152 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1153 struct snd_soc_device *socdev = rtd->socdev;
6627a653 1154 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1155 struct wm8753_priv *wm8753 = codec->private_data;
1156 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1157 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1158 int coeff;
1159
1160 /* is digital filter coefficient valid ? */
1161 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1162 if (coeff < 0) {
1163 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1164 return coeff;
1165 }
1166 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1167 coeff_div[coeff].usb);
1168
1169 /* bit size */
1170 switch (params_format(params)) {
1171 case SNDRV_PCM_FORMAT_S16_LE:
1172 break;
1173 case SNDRV_PCM_FORMAT_S20_3LE:
1174 hifi |= 0x0004;
1175 break;
1176 case SNDRV_PCM_FORMAT_S24_LE:
1177 hifi |= 0x0008;
1178 break;
1179 case SNDRV_PCM_FORMAT_S32_LE:
1180 hifi |= 0x000c;
1181 break;
1182 }
1183
1184 wm8753_write(codec, WM8753_HIFI, hifi);
1185 return 0;
1186}
1187
e550e17f 1188static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1189 unsigned int fmt)
1190{
1191 struct snd_soc_codec *codec = codec_dai->codec;
1192 u16 clock;
1193
1194 /* set clk source as pcmclk */
1195 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1196 wm8753_write(codec, WM8753_CLOCK, clock);
1197
1198 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1199 return -EINVAL;
1200 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1201}
1202
e550e17f 1203static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1204 unsigned int fmt)
1205{
1206 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1207 return -EINVAL;
1208 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1209}
1210
e550e17f 1211static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1212 unsigned int fmt)
1213{
1214 struct snd_soc_codec *codec = codec_dai->codec;
1215 u16 clock;
1216
1217 /* set clk source as pcmclk */
1218 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1219 wm8753_write(codec, WM8753_CLOCK, clock);
1220
1221 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1222 return -EINVAL;
1223 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1224}
1225
e550e17f 1226static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1227 unsigned int fmt)
1228{
1229 struct snd_soc_codec *codec = codec_dai->codec;
1230 u16 clock;
1231
1232 /* set clk source as mclk */
1233 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1234 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1235
1236 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1237 return -EINVAL;
1238 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1239 return -EINVAL;
1240 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1241}
1242
e550e17f 1243static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1244{
1245 struct snd_soc_codec *codec = dai->codec;
1246 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1247
1248 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1249 * make sure we check if they are not both active when we mute */
1250 if (mute && dai->id == 1) {
1251 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1252 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1253 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1254 } else {
1255 if (mute)
1256 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1257 else
1258 wm8753_write(codec, WM8753_DAC, mute_reg);
1259 }
1260
1261 return 0;
1262}
1263
0be9898a
MB		 1264static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1265 enum snd_soc_bias_level level)
1f53aee0
LG		 1266{
1267 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1268
0be9898a
MB		 1269 switch (level) {
1270 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1271 /* set vmid to 50k and unmute dac */
1272 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1273 break;
0be9898a 1274 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1275 /* set vmid to 5k for quick power up */
1276 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1277 break;
0be9898a 1278 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1279 /* mute dac and set vmid to 500k, enable VREF */
1280 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1281 break;
0be9898a 1282 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1283 wm8753_write(codec, WM8753_PWR1, 0x0001);
1284 break;
1285 }
0be9898a 1286 codec->bias_level = level;
1f53aee0
LG		 1287 return 0;
1288}
1289
1290#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1291 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1292 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1293 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1294
1295#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1296 SNDRV_PCM_FMTBIT_S24_LE)
1297
1298/*
1299 * The WM8753 supports upto 4 different and mutually exclusive DAI
1300 * configurations. This gives 2 PCM's available for use, hifi and voice.
1301 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1302 * is connected between the wm8753 and a BT codec or GSM modem.
1303 *
1304 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1305 * 2. Voice over HIFI DAI - HIFI disabled
1306 * 3. Voice disabled - HIFI over HIFI
1307 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1308 */
6335d055
EM		 1309static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode1 = {
1310 .hw_params = wm8753_i2s_hw_params,
1311 .digital_mute = wm8753_mute,
1312 .set_fmt = wm8753_mode1h_set_dai_fmt,
1313 .set_clkdiv = wm8753_set_dai_clkdiv,
1314 .set_pll = wm8753_set_dai_pll,
1315 .set_sysclk = wm8753_set_dai_sysclk,
1316};
1317
1318static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode1 = {
1319 .hw_params = wm8753_pcm_hw_params,
1320 .digital_mute = wm8753_mute,
1321 .set_fmt = wm8753_mode1v_set_dai_fmt,
1322 .set_clkdiv = wm8753_set_dai_clkdiv,
1323 .set_pll = wm8753_set_dai_pll,
1324 .set_sysclk = wm8753_set_dai_sysclk,
1325};
1326
1327static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode2 = {
1328 .hw_params = wm8753_pcm_hw_params,
1329 .digital_mute = wm8753_mute,
1330 .set_fmt = wm8753_mode2_set_dai_fmt,
1331 .set_clkdiv = wm8753_set_dai_clkdiv,
1332 .set_pll = wm8753_set_dai_pll,
1333 .set_sysclk = wm8753_set_dai_sysclk,
1334};
1335
1336static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode3 = {
1337 .hw_params = wm8753_i2s_hw_params,
1338 .digital_mute = wm8753_mute,
1339 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1340 .set_clkdiv = wm8753_set_dai_clkdiv,
1341 .set_pll = wm8753_set_dai_pll,
1342 .set_sysclk = wm8753_set_dai_sysclk,
1343};
1344
1345static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode4 = {
1346 .hw_params = wm8753_i2s_hw_params,
1347 .digital_mute = wm8753_mute,
1348 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1349 .set_clkdiv = wm8753_set_dai_clkdiv,
1350 .set_pll = wm8753_set_dai_pll,
1351 .set_sysclk = wm8753_set_dai_sysclk,
1352};
1353
e550e17f 1354static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1355/* DAI HiFi mode 1 */
1356{ .name = "WM8753 HiFi",
1357 .id = 1,
1358 .playback = {
1359 .stream_name = "HiFi Playback",
1360 .channels_min = 1,
1361 .channels_max = 2,
1362 .rates = WM8753_RATES,
dee89c4d 1363 .formats = WM8753_FORMATS},
1f53aee0
LG		 1364 .capture = { /* dummy for fast DAI switching */
1365 .stream_name = "Capture",
1366 .channels_min = 1,
1367 .channels_max = 2,
1368 .rates = WM8753_RATES,
dee89c4d 1369 .formats = WM8753_FORMATS},
6335d055 1370 .ops = &wm8753_dai_ops_hifi_mode1,
1f53aee0
LG		 1371},
1372/* DAI Voice mode 1 */
1373{ .name = "WM8753 Voice",
1374 .id = 1,
1375 .playback = {
1376 .stream_name = "Voice Playback",
1377 .channels_min = 1,
1378 .channels_max = 1,
1379 .rates = WM8753_RATES,
1380 .formats = WM8753_FORMATS,},
1381 .capture = {
1382 .stream_name = "Capture",
1383 .channels_min = 1,
1384 .channels_max = 2,
1385 .rates = WM8753_RATES,
1386 .formats = WM8753_FORMATS,},
6335d055 1387 .ops = &wm8753_dai_ops_voice_mode1,
1f53aee0
LG		 1388},
1389/* DAI HiFi mode 2 - dummy */
1390{ .name = "WM8753 HiFi",
1391 .id = 2,
1392},
1393/* DAI Voice mode 2 */
1394{ .name = "WM8753 Voice",
1395 .id = 2,
1396 .playback = {
1397 .stream_name = "Voice Playback",
1398 .channels_min = 1,
1399 .channels_max = 1,
1400 .rates = WM8753_RATES,
1401 .formats = WM8753_FORMATS,},
1402 .capture = {
1403 .stream_name = "Capture",
1404 .channels_min = 1,
1405 .channels_max = 2,
1406 .rates = WM8753_RATES,
1407 .formats = WM8753_FORMATS,},
6335d055 1408 .ops = &wm8753_dai_ops_voice_mode2,
1f53aee0
LG		 1409},
1410/* DAI HiFi mode 3 */
1411{ .name = "WM8753 HiFi",
1412 .id = 3,
1413 .playback = {
1414 .stream_name = "HiFi Playback",
1415 .channels_min = 1,
1416 .channels_max = 2,
1417 .rates = WM8753_RATES,
1418 .formats = WM8753_FORMATS,},
1419 .capture = {
1420 .stream_name = "Capture",
1421 .channels_min = 1,
1422 .channels_max = 2,
1423 .rates = WM8753_RATES,
1424 .formats = WM8753_FORMATS,},
6335d055 1425 .ops = &wm8753_dai_ops_hifi_mode3,
1f53aee0
LG		 1426},
1427/* DAI Voice mode 3 - dummy */
1428{ .name = "WM8753 Voice",
1429 .id = 3,
1430},
1431/* DAI HiFi mode 4 */
1432{ .name = "WM8753 HiFi",
1433 .id = 4,
1434 .playback = {
1435 .stream_name = "HiFi Playback",
1436 .channels_min = 1,
1437 .channels_max = 2,
1438 .rates = WM8753_RATES,
1439 .formats = WM8753_FORMATS,},
1440 .capture = {
1441 .stream_name = "Capture",
1442 .channels_min = 1,
1443 .channels_max = 2,
1444 .rates = WM8753_RATES,
1445 .formats = WM8753_FORMATS,},
6335d055 1446 .ops = &wm8753_dai_ops_hifi_mode4,
1f53aee0
LG		 1447},
1448/* DAI Voice mode 4 - dummy */
1449{ .name = "WM8753 Voice",
1450 .id = 4,
1451},
1452};
1453
9e70c1f0
MB		 1454struct snd_soc_dai wm8753_dai[] = {
1455 {
1456 .name = "WM8753 DAI 0",
1457 },
1458 {
1459 .name = "WM8753 DAI 1",
1460 },
1461};
1f53aee0
LG		 1462EXPORT_SYMBOL_GPL(wm8753_dai);
1463
1464static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1465{
1466 if (mode < 4) {
1467 int playback_active, capture_active, codec_active, pop_wait;
1468 void *private_data;
31b59cf9 1469 struct list_head list;
1f53aee0
LG		 1470
1471 playback_active = wm8753_dai[0].playback.active;
1472 capture_active = wm8753_dai[0].capture.active;
1473 codec_active = wm8753_dai[0].active;
1474 private_data = wm8753_dai[0].private_data;
1475 pop_wait = wm8753_dai[0].pop_wait;
31b59cf9 1476 list = wm8753_dai[0].list;
1f53aee0
LG		 1477 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1478 wm8753_dai[0].playback.active = playback_active;
1479 wm8753_dai[0].capture.active = capture_active;
1480 wm8753_dai[0].active = codec_active;
1481 wm8753_dai[0].private_data = private_data;
1482 wm8753_dai[0].pop_wait = pop_wait;
31b59cf9 1483 wm8753_dai[0].list = list;
1f53aee0
LG		 1484
1485 playback_active = wm8753_dai[1].playback.active;
1486 capture_active = wm8753_dai[1].capture.active;
1487 codec_active = wm8753_dai[1].active;
1488 private_data = wm8753_dai[1].private_data;
1489 pop_wait = wm8753_dai[1].pop_wait;
31b59cf9 1490 list = wm8753_dai[1].list;
1f53aee0
LG		 1491 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1492 wm8753_dai[1].playback.active = playback_active;
1493 wm8753_dai[1].capture.active = capture_active;
1494 wm8753_dai[1].active = codec_active;
1495 wm8753_dai[1].private_data = private_data;
1496 wm8753_dai[1].pop_wait = pop_wait;
31b59cf9 1497 wm8753_dai[1].list = list;
1f53aee0
LG		 1498 }
1499 wm8753_dai[0].codec = codec;
1500 wm8753_dai[1].codec = codec;
1501}
1502
1503static void wm8753_work(struct work_struct *work)
1504{
1505 struct snd_soc_codec *codec =
1506 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1507 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1508}
1509
1510static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1511{
1512 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1513 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1514
1515 /* we only need to suspend if we are a valid card */
60fc684a 1516 if (!codec->card)
1f53aee0 1517 return 0;
60fc684a 1518
0be9898a 1519 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1520 return 0;
1521}
1522
1523static int wm8753_resume(struct platform_device *pdev)
1524{
1525 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1526 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1527 int i;
1528 u8 data[2];
1529 u16 *cache = codec->reg_cache;
1530
1531 /* we only need to resume if we are a valid card */
60fc684a 1532 if (!codec->card)
1f53aee0
LG		 1533 return 0;
1534
1535 /* Sync reg_cache with the hardware */
1536 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1537 if (i + 1 == WM8753_RESET)
1538 continue;
e611bd82
MB		 1539
1540 /* No point in writing hardware default values back */
1541 if (cache[i] == wm8753_reg[i])
1542 continue;
1543
1f53aee0
LG		 1544 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1545 data[1] = cache[i] & 0x00ff;
1546 codec->hw_write(codec->control_data, data, 2);
1547 }
1548
0be9898a 1549 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1550
1551 /* charge wm8753 caps */
0be9898a
MB		 1552 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1553 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1554 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1555 schedule_delayed_work(&codec->delayed_work,
1556 msecs_to_jiffies(caps_charge));
1557 }
1558
1559 return 0;
1560}
1561
c2bac160
MB		 1562static struct snd_soc_codec *wm8753_codec;
1563
1564static int wm8753_probe(struct platform_device *pdev)
1f53aee0 1565{
c2bac160
MB		 1566 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1567 struct snd_soc_codec *codec;
1568 int ret = 0;
1f53aee0 1569
c2bac160
MB		 1570 if (!wm8753_codec) {
1571 dev_err(&pdev->dev, "WM8753 codec not yet registered\n");
1572 return -EINVAL;
1573 }
1f53aee0 1574
c2bac160
MB		 1575 socdev->card->codec = wm8753_codec;
1576 codec = wm8753_codec;
1f53aee0
LG		 1577
1578 wm8753_set_dai_mode(codec, 0);
1579
1f53aee0
LG		 1580 /* register pcms */
1581 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1582 if (ret < 0) {
1583 printk(KERN_ERR "wm8753: failed to create pcms\n");
1584 goto pcm_err;
1585 }
1586
6d564345
TI		 1587 snd_soc_add_controls(codec, wm8753_snd_controls,
1588 ARRAY_SIZE(wm8753_snd_controls));
1f53aee0 1589 wm8753_add_widgets(codec);
968a6025 1590 ret = snd_soc_init_card(socdev);
1f53aee0 1591 if (ret < 0) {
60fc684a 1592 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1593 goto card_err;
60fc684a
MB		 1594 }
1595
c2bac160 1596 return 0;
1f53aee0
LG		 1597
1598card_err:
1599 snd_soc_free_pcms(socdev);
1600 snd_soc_dapm_free(socdev);
3051e41a 1601
c2bac160 1602pcm_err:
1f53aee0
LG		 1603 return ret;
1604}
1605
1606/*
1607 * This function forces any delayed work to be queued and run.
1608 */
1609static int run_delayed_work(struct delayed_work *dwork)
1610{
1611 int ret;
1612
1613 /* cancel any work waiting to be queued. */
1614 ret = cancel_delayed_work(dwork);
1615
1616 /* if there was any work waiting then we run it now and
1617 * wait for it's completion */
1618 if (ret) {
1619 schedule_delayed_work(dwork, 0);
1620 flush_scheduled_work();
1621 }
1622 return ret;
1623}
1624
1625/* power down chip */
1626static int wm8753_remove(struct platform_device *pdev)
1627{
1628 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1f53aee0 1629
1f53aee0
LG		 1630 snd_soc_free_pcms(socdev);
1631 snd_soc_dapm_free(socdev);
1f53aee0
LG		 1632
1633 return 0;
1634}
1635
1636struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1637 .probe = wm8753_probe,
1638 .remove = wm8753_remove,
1639 .suspend = wm8753_suspend,
1640 .resume = wm8753_resume,
1641};
1f53aee0
LG		 1642EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1643
c2bac160
MB		 1644static int wm8753_register(struct wm8753_priv *wm8753)
1645{
1646 int ret, i;
1647 struct snd_soc_codec *codec = &wm8753->codec;
1648 u16 reg;
1649
1650 if (wm8753_codec) {
1651 dev_err(codec->dev, "Multiple WM8753 devices not supported\n");
1652 ret = -EINVAL;
1653 goto err;
1654 }
1655
1656 mutex_init(&codec->mutex);
1657 INIT_LIST_HEAD(&codec->dapm_widgets);
1658 INIT_LIST_HEAD(&codec->dapm_paths);
1659
1660 codec->name = "WM8753";
1661 codec->owner = THIS_MODULE;
1662 codec->read = wm8753_read_reg_cache;
1663 codec->write = wm8753_write;
1664 codec->bias_level = SND_SOC_BIAS_STANDBY;
1665 codec->set_bias_level = wm8753_set_bias_level;
1666 codec->dai = wm8753_dai;
1667 codec->num_dai = 2;
1668 codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache);
1669 codec->reg_cache = &wm8753->reg_cache;
1670 codec->private_data = wm8753;
1671
1672 memcpy(codec->reg_cache, wm8753_reg, sizeof(codec->reg_cache));
1673 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1674
1675 ret = wm8753_reset(codec);
1676 if (ret < 0) {
1677 dev_err(codec->dev, "Failed to issue reset\n");
1678 goto err;
1679 }
1680
1681 /* charge output caps */
1682 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1683 schedule_delayed_work(&codec->delayed_work,
1684 msecs_to_jiffies(caps_charge));
1685
1686 /* set the update bits */
1687 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1688 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1689 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1690 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1691 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1692 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1693 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1694 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1695 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1696 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1697 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1698 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1699 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1700 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1701 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1702 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1703 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1704 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1705 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1706 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1707
1708 wm8753_codec = codec;
1709
1710 for (i = 0; i < ARRAY_SIZE(wm8753_dai); i++)
1711 wm8753_dai[i].dev = codec->dev;
1712
1713 ret = snd_soc_register_codec(codec);
1714 if (ret != 0) {
1715 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
1716 goto err;
1717 }
1718
1719 ret = snd_soc_register_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
1720 if (ret != 0) {
1721 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
1722 goto err_codec;
1723 }
1724
1725 return 0;
1726
1727err_codec:
1728 run_delayed_work(&codec->delayed_work);
1729 snd_soc_unregister_codec(codec);
1730err:
1731 kfree(wm8753);
1732 return ret;
1733}
1734
1735static void wm8753_unregister(struct wm8753_priv *wm8753)
1736{
1737 wm8753_set_bias_level(&wm8753->codec, SND_SOC_BIAS_OFF);
1738 run_delayed_work(&wm8753->codec.delayed_work);
1739 snd_soc_unregister_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
1740 snd_soc_unregister_codec(&wm8753->codec);
1741 kfree(wm8753);
1742 wm8753_codec = NULL;
1743}
1744
69e169da
MB		 1745#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1746
1747static int wm8753_i2c_probe(struct i2c_client *i2c,
1748 const struct i2c_device_id *id)
1749{
c2bac160
MB		 1750 struct snd_soc_codec *codec;
1751 struct wm8753_priv *wm8753;
69e169da 1752
c2bac160
MB		 1753 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1754 if (wm8753 == NULL)
1755 return -ENOMEM;
69e169da 1756
c2bac160
MB		 1757 codec = &wm8753->codec;
1758 codec->hw_write = (hw_write_t)i2c_master_send;
1759 codec->control_data = i2c;
1760 i2c_set_clientdata(i2c, wm8753);
69e169da 1761
c2bac160
MB		 1762 codec->dev = &i2c->dev;
1763
1764 return wm8753_register(wm8753);
69e169da
MB		 1765}
1766
1767static int wm8753_i2c_remove(struct i2c_client *client)
1768{
c2bac160
MB		 1769 struct wm8753_priv *wm8753 = i2c_get_clientdata(client);
1770 wm8753_unregister(wm8753);
1771 return 0;
69e169da
MB		 1772}
1773
1774static const struct i2c_device_id wm8753_i2c_id[] = {
1775 { "wm8753", 0 },
1776 { }
1777};
1778MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1779
1780static struct i2c_driver wm8753_i2c_driver = {
1781 .driver = {
c2bac160 1782 .name = "wm8753",
69e169da
MB		 1783 .owner = THIS_MODULE,
1784 },
1785 .probe = wm8753_i2c_probe,
1786 .remove = wm8753_i2c_remove,
1787 .id_table = wm8753_i2c_id,
1788};
1789#endif
1790
1791#if defined(CONFIG_SPI_MASTER)
1792static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
1793{
1794 struct spi_transfer t;
1795 struct spi_message m;
1796 u8 msg[2];
1797
1798 if (len <= 0)
1799 return 0;
1800
1801 msg[0] = data[0];
1802 msg[1] = data[1];
1803
1804 spi_message_init(&m);
1805 memset(&t, 0, (sizeof t));
1806
1807 t.tx_buf = &msg[0];
1808 t.len = len;
1809
1810 spi_message_add_tail(&t, &m);
1811 spi_sync(spi, &m);
1812
1813 return len;
1814}
1815
1816static int __devinit wm8753_spi_probe(struct spi_device *spi)
1817{
c2bac160
MB		 1818 struct snd_soc_codec *codec;
1819 struct wm8753_priv *wm8753;
1820
1821 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1822 if (wm8753 == NULL)
1823 return -ENOMEM;
69e169da 1824
c2bac160 1825 codec = &wm8753->codec;
69e169da 1826 codec->control_data = spi;
c2bac160
MB		 1827 codec->hw_write = (hw_write_t)wm8753_spi_write;
1828 codec->dev = &spi->dev;
69e169da 1829
c2bac160 1830 spi->dev.driver_data = wm8753;
69e169da 1831
c2bac160 1832 return wm8753_register(wm8753);
69e169da
MB		 1833}
1834
1835static int __devexit wm8753_spi_remove(struct spi_device *spi)
1836{
c2bac160
MB		 1837 struct wm8753_priv *wm8753 = spi->dev.driver_data;
1838 wm8753_unregister(wm8753);
69e169da
MB		 1839 return 0;
1840}
1841
1842static struct spi_driver wm8753_spi_driver = {
1843 .driver = {
1844 .name = "wm8753",
1845 .bus = &spi_bus_type,
1846 .owner = THIS_MODULE,
1847 },
1848 .probe = wm8753_spi_probe,
1849 .remove = __devexit_p(wm8753_spi_remove),
1850};
1851#endif
1852
c9b3a40f 1853static int __init wm8753_modinit(void)
64089b84 1854{
c2bac160
MB		 1855 int ret;
1856#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1857 ret = i2c_add_driver(&wm8753_i2c_driver);
1858 if (ret != 0)
1859 pr_err("Failed to register WM8753 I2C driver: %d\n", ret);
1860#endif
1861#if defined(CONFIG_SPI_MASTER)
1862 ret = spi_register_driver(&wm8753_spi_driver);
1863 if (ret != 0)
1864 pr_err("Failed to register WM8753 SPI driver: %d\n", ret);
1865#endif
1866 return 0;
64089b84
MB		 1867}
1868module_init(wm8753_modinit);
1869
1870static void __exit wm8753_exit(void)
1871{
c2bac160
MB		 1872#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1873 i2c_del_driver(&wm8753_i2c_driver);
1874#endif
1875#if defined(CONFIG_SPI_MASTER)
1876 spi_unregister_driver(&wm8753_spi_driver);
1877#endif
64089b84
MB		 1878}
1879module_exit(wm8753_exit);
1880
1f53aee0
LG		 1881MODULE_DESCRIPTION("ASoC WM8753 driver");
1882MODULE_AUTHOR("Liam Girdwood");
1883MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)