projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: correct print specifiers for unsigneds
[linux-2.6-block.git] / sound / soc / codecs / wm8753.c
CommitLineData
1f53aee0
LG		 1/*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003 Wolfson Microelectronics PLC.
d331124d 5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
1f53aee0
LG		 6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
1f53aee0
LG		 36#include <linux/kernel.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/pm.h>
40#include <linux/i2c.h>
41#include <linux/platform_device.h>
dd0c0c80 42#include <linux/spi/spi.h>
1f53aee0
LG		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/soc.h>
47#include <sound/soc-dapm.h>
48#include <sound/initval.h>
2d6a4ac9 49#include <sound/tlv.h>
1f53aee0
LG		 50#include <asm/div64.h>
51
52#include "wm8753.h"
53
1f53aee0
LG		 54static int caps_charge = 2000;
55module_param(caps_charge, int, 0);
56MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
57
58static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
59 unsigned int mode);
60
1f53aee0
LG		 61/*
62 * wm8753 register cache
63 * We can't read the WM8753 register space when we
64 * are using 2 wire for device control, so we cache them instead.
65 */
66static const u16 wm8753_reg[] = {
67 0x0008, 0x0000, 0x000a, 0x000a,
68 0x0033, 0x0000, 0x0007, 0x00ff,
69 0x00ff, 0x000f, 0x000f, 0x007b,
70 0x0000, 0x0032, 0x0000, 0x00c3,
71 0x00c3, 0x00c0, 0x0000, 0x0000,
72 0x0000, 0x0000, 0x0000, 0x0000,
73 0x0000, 0x0000, 0x0000, 0x0000,
74 0x0000, 0x0000, 0x0000, 0x0055,
75 0x0005, 0x0050, 0x0055, 0x0050,
76 0x0055, 0x0050, 0x0055, 0x0079,
77 0x0079, 0x0079, 0x0079, 0x0079,
78 0x0000, 0x0000, 0x0000, 0x0000,
79 0x0097, 0x0097, 0x0000, 0x0004,
80 0x0000, 0x0083, 0x0024, 0x01ba,
81 0x0000, 0x0083, 0x0024, 0x01ba,
82 0x0000, 0x0000
83};
84
c2bac160
MB		 85/* codec private data */
86struct wm8753_priv {
87 unsigned int sysclk;
88 unsigned int pcmclk;
89 struct snd_soc_codec codec;
90 u16 reg_cache[ARRAY_SIZE(wm8753_reg)];
91};
92
1f53aee0
LG		 93/*
94 * read wm8753 register cache
95 */
96static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
97 unsigned int reg)
98{
99 u16 *cache = codec->reg_cache;
91432e97 100 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 101 return -1;
102 return cache[reg - 1];
103}
104
105/*
106 * write wm8753 register cache
107 */
108static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
109 unsigned int reg, unsigned int value)
110{
111 u16 *cache = codec->reg_cache;
91432e97 112 if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
1f53aee0
LG		 113 return;
114 cache[reg - 1] = value;
115}
116
117/*
118 * write to the WM8753 register space
119 */
120static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
121 unsigned int value)
122{
123 u8 data[2];
124
125 /* data is
126 * D15..D9 WM8753 register offset
127 * D8...D0 register data
128 */
129 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
130 data[1] = value & 0x00ff;
131
60fc684a 132 wm8753_write_reg_cache(codec, reg, value);
1f53aee0
LG		 133 if (codec->hw_write(codec->control_data, data, 2) == 2)
134 return 0;
135 else
136 return -EIO;
137}
138
139#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
140
141/*
142 * WM8753 Controls
143 */
144static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
145static const char *wm8753_base_filter[] =
146 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
147 "100Hz @ 8kHz", "200Hz @ 8kHz"};
148static const char *wm8753_treble[] = {"8kHz", "4kHz"};
149static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
150static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
151static const char *wm8753_3d_func[] = {"Capture", "Playback"};
152static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
153static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
154static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
155static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
156static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
157static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
158 "Line 1", "Line 2"};
159static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
160static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
161static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
162static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
163static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
164 "Right PGA"};
165static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
166 "Left + Right"};
167static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
168static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
169static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
170static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
171static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
172 "Analogue Mix Right", "Digital Mono Mix"};
173static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
174 "82Hz @ 8kHz", "170Hz @ 8kHz"};
175static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
176static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
177static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
178static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
179 "Channel Swap"};
ae092c9e 180static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
1f53aee0
LG		 181
182static const struct soc_enum wm8753_enum[] = {
183SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
184SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
185SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
186SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
187SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
188SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
189SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
190SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
191SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
192SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
193SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
194SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
195SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
196SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
197SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
198SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
199SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
200SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
201SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
202SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
203SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
204SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
205SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
206SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
207SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
208SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
209SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
210SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
ae092c9e 211SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
1f53aee0
LG		 212};
213
214
215static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
216 struct snd_ctl_elem_value *ucontrol)
217{
218 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
219 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
220
221 ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
222 return 0;
223}
224
225static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
226 struct snd_ctl_elem_value *ucontrol)
227{
228 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
229 int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
230
60fc684a 231 if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
1f53aee0
LG		 232 return 0;
233
234 mode &= 0xfff3;
235 mode |= (ucontrol->value.integer.value[0] << 2);
236
237 wm8753_write(codec, WM8753_IOCTL, mode);
238 wm8753_set_dai_mode(codec, ucontrol->value.integer.value[0]);
239 return 1;
240}
241
2cc8c609
MM		 242static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
243static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
244static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
245static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
246static const unsigned int out_tlv[] = {
247 TLV_DB_RANGE_HEAD(2),
248 /* 0000000 - 0101111 = "Analogue mute" */
249 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
250 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
251};
252static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
253static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
254static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
2d6a4ac9 255
1f53aee0 256static const struct snd_kcontrol_new wm8753_snd_controls[] = {
2cc8c609
MM		 257SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
258
259SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
260 adc_tlv),
261
262SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
263 0, 127, 0, out_tlv),
264SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
265 127, 0, out_tlv),
266
267SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
268
269SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
270 1, mix_tlv),
271SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
272 7, 1, mix_tlv),
273SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
274 1, voice_mix_tlv),
275
276SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
277 1, 0),
278SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
279 1, 0),
280
281SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
282SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
283 mix_tlv),
284SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
285 voice_mix_tlv),
1f53aee0
LG		 286SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
287
288SOC_ENUM("Bass Boost", wm8753_enum[0]),
289SOC_ENUM("Bass Filter", wm8753_enum[1]),
290SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
291
292SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
293SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
294
2cc8c609
MM		 295SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
296 rec_mix_tlv),
297SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
298 rec_mix_tlv),
1f53aee0 299
2cc8c609
MM		 300SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
301 pga_tlv),
1f53aee0
LG		 302SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
303SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
304
305SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
306SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
307SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
308
309SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
310SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
311SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
312SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
313SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
314SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
315SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
316SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
317SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
318SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
319
320SOC_ENUM("3D Function", wm8753_enum[5]),
321SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
322SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
323SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
324SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
325
326SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
327SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
328
329SOC_ENUM("De-emphasis", wm8753_enum[8]),
330SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
331SOC_ENUM("Playback Phase", wm8753_enum[10]),
332
2cc8c609
MM		 333SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
334SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
1f53aee0
LG		 335
336SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
337
338SOC_ENUM("ADC Data Select", wm8753_enum[27]),
ae092c9e 339SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
1f53aee0
LG		 340};
341
1f53aee0
LG		 342/*
343 * _DAPM_ Controls
344 */
345
346/* Left Mixer */
347static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
348SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
349SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
350SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
351SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
352};
353
354/* Right mixer */
355static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
356SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
357SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
358SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
359SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
360};
361
362/* Mono mixer */
363static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
364SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
365SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
366SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
367SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
368SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
369};
370
371/* Mono 2 Mux */
372static const struct snd_kcontrol_new wm8753_mono2_controls =
373SOC_DAPM_ENUM("Route", wm8753_enum[17]);
374
375/* Out 3 Mux */
376static const struct snd_kcontrol_new wm8753_out3_controls =
377SOC_DAPM_ENUM("Route", wm8753_enum[18]);
378
379/* Out 4 Mux */
380static const struct snd_kcontrol_new wm8753_out4_controls =
381SOC_DAPM_ENUM("Route", wm8753_enum[19]);
382
383/* ADC Mono Mix */
384static const struct snd_kcontrol_new wm8753_adc_mono_controls =
385SOC_DAPM_ENUM("Route", wm8753_enum[22]);
386
387/* Record mixer */
388static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
389SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
390SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
391SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
392};
393
394/* Left ADC mux */
395static const struct snd_kcontrol_new wm8753_adc_left_controls =
396SOC_DAPM_ENUM("Route", wm8753_enum[21]);
397
398/* Right ADC mux */
399static const struct snd_kcontrol_new wm8753_adc_right_controls =
400SOC_DAPM_ENUM("Route", wm8753_enum[20]);
401
402/* MIC mux */
403static const struct snd_kcontrol_new wm8753_mic_mux_controls =
404SOC_DAPM_ENUM("Route", wm8753_enum[16]);
405
406/* ALC mixer */
407static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
408SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
409SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
410SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
411SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
412};
413
414/* Left Line mux */
415static const struct snd_kcontrol_new wm8753_line_left_controls =
416SOC_DAPM_ENUM("Route", wm8753_enum[14]);
417
418/* Right Line mux */
419static const struct snd_kcontrol_new wm8753_line_right_controls =
420SOC_DAPM_ENUM("Route", wm8753_enum[13]);
421
422/* Mono Line mux */
423static const struct snd_kcontrol_new wm8753_line_mono_controls =
424SOC_DAPM_ENUM("Route", wm8753_enum[12]);
425
426/* Line mux and mixer */
427static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
428SOC_DAPM_ENUM("Route", wm8753_enum[11]);
429
430/* Rx mux and mixer */
431static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
432SOC_DAPM_ENUM("Route", wm8753_enum[15]);
433
434/* Mic Selector Mux */
435static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
436SOC_DAPM_ENUM("Route", wm8753_enum[25]);
437
438static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
439SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
440SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
441 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
442SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
443SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
444SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
445SND_SOC_DAPM_OUTPUT("LOUT1"),
446SND_SOC_DAPM_OUTPUT("LOUT2"),
447SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
448 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
449SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
450SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
451SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
452SND_SOC_DAPM_OUTPUT("ROUT1"),
453SND_SOC_DAPM_OUTPUT("ROUT2"),
454SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
455 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
456SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
457SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
458SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
459SND_SOC_DAPM_OUTPUT("MONO1"),
460SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
461SND_SOC_DAPM_OUTPUT("MONO2"),
462SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
463SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
464SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
465SND_SOC_DAPM_OUTPUT("OUT3"),
466SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
467SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
468SND_SOC_DAPM_OUTPUT("OUT4"),
469SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
470 &wm8753_record_mixer_controls[0],
471 ARRAY_SIZE(wm8753_record_mixer_controls)),
472SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
473SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
474SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
475 &wm8753_adc_mono_controls),
476SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
477 &wm8753_adc_mono_controls),
478SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
479 &wm8753_adc_left_controls),
480SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
481 &wm8753_adc_right_controls),
482SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
483 &wm8753_mic_mux_controls),
484SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
485SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
486SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
487 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
488SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
489 &wm8753_line_left_controls),
490SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
491 &wm8753_line_right_controls),
492SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
493 &wm8753_line_mono_controls),
494SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
495 &wm8753_line_mux_mix_controls),
496SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
497 &wm8753_rx_mux_mix_controls),
498SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
499SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
500SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
501 &wm8753_mic_sel_mux_controls),
502SND_SOC_DAPM_INPUT("LINE1"),
503SND_SOC_DAPM_INPUT("LINE2"),
504SND_SOC_DAPM_INPUT("RXP"),
505SND_SOC_DAPM_INPUT("RXN"),
506SND_SOC_DAPM_INPUT("ACIN"),
507SND_SOC_DAPM_OUTPUT("ACOP"),
508SND_SOC_DAPM_INPUT("MIC1N"),
509SND_SOC_DAPM_INPUT("MIC1"),
510SND_SOC_DAPM_INPUT("MIC2N"),
511SND_SOC_DAPM_INPUT("MIC2"),
512SND_SOC_DAPM_VMID("VREF"),
513};
514
a65f0568 515static const struct snd_soc_dapm_route audio_map[] = {
1f53aee0
LG		 516 /* left mixer */
517 {"Left Mixer", "Left Playback Switch", "Left DAC"},
518 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
519 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
520 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
521
522 /* right mixer */
523 {"Right Mixer", "Right Playback Switch", "Right DAC"},
524 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
525 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
526 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
527
528 /* mono mixer */
529 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
530 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
531 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
532 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
533 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
534
535 /* left out */
536 {"Left Out 1", NULL, "Left Mixer"},
537 {"Left Out 2", NULL, "Left Mixer"},
538 {"LOUT1", NULL, "Left Out 1"},
539 {"LOUT2", NULL, "Left Out 2"},
540
541 /* right out */
542 {"Right Out 1", NULL, "Right Mixer"},
543 {"Right Out 2", NULL, "Right Mixer"},
544 {"ROUT1", NULL, "Right Out 1"},
545 {"ROUT2", NULL, "Right Out 2"},
546
547 /* mono 1 out */
548 {"Mono Out 1", NULL, "Mono Mixer"},
549 {"MONO1", NULL, "Mono Out 1"},
550
551 /* mono 2 out */
552 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
553 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
554 {"Mono 2 Mux", "Left", "Left Mixer"},
555 {"Mono 2 Mux", "Right", "Right Mixer"},
556 {"Mono Out 2", NULL, "Mono 2 Mux"},
557 {"MONO2", NULL, "Mono Out 2"},
558
559 /* out 3 */
560 {"Out3 Left + Right", NULL, "Left Mixer"},
561 {"Out3 Left + Right", NULL, "Right Mixer"},
562 {"Out3 Mux", "VREF", "VREF"},
563 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
564 {"Out3 Mux", "ROUT2", "ROUT2"},
565 {"Out 3", NULL, "Out3 Mux"},
566 {"OUT3", NULL, "Out 3"},
567
568 /* out 4 */
569 {"Out4 Mux", "VREF", "VREF"},
4037314a 570 {"Out4 Mux", "Capture ST", "Playback Mixer"},
1f53aee0
LG		 571 {"Out4 Mux", "LOUT2", "LOUT2"},
572 {"Out 4", NULL, "Out4 Mux"},
573 {"OUT4", NULL, "Out 4"},
574
575 /* record mixer */
576 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
577 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
578 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
579
580 /* Mic/SideTone Mux */
581 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
582 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
583 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
584 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
585
586 /* Capture Left Mux */
587 {"Capture Left Mux", "PGA", "Left Capture Volume"},
588 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
589 {"Capture Left Mux", "Line", "LINE1"},
590
591 /* Capture Right Mux */
592 {"Capture Right Mux", "PGA", "Right Capture Volume"},
593 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
4037314a 594 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
1f53aee0
LG		 595
596 /* Mono Capture mixer-mux */
597 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
598 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
599 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
600 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
601 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
602 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
603 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
604 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
605 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
606
607 /* ADC */
608 {"Left ADC", NULL, "Capture Left Mixer"},
609 {"Right ADC", NULL, "Capture Right Mixer"},
610
611 /* Left Capture Volume */
612 {"Left Capture Volume", NULL, "ACIN"},
613
614 /* Right Capture Volume */
615 {"Right Capture Volume", NULL, "Mic 2 Volume"},
616
617 /* ALC Mixer */
618 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
619 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
620 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
621 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
622
623 /* Line Left Mux */
624 {"Line Left Mux", "Line 1", "LINE1"},
625 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
626
627 /* Line Right Mux */
628 {"Line Right Mux", "Line 2", "LINE2"},
629 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
630
631 /* Line Mono Mux */
632 {"Line Mono Mux", "Line Mix", "Line Mixer"},
633 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
634
635 /* Line Mixer/Mux */
636 {"Line Mixer", "Line 1 + 2", "LINE1"},
637 {"Line Mixer", "Line 1 - 2", "LINE1"},
638 {"Line Mixer", "Line 1 + 2", "LINE2"},
639 {"Line Mixer", "Line 1 - 2", "LINE2"},
640 {"Line Mixer", "Line 1", "LINE1"},
641 {"Line Mixer", "Line 2", "LINE2"},
642
643 /* Rx Mixer/Mux */
644 {"Rx Mixer", "RXP - RXN", "RXP"},
645 {"Rx Mixer", "RXP + RXN", "RXP"},
646 {"Rx Mixer", "RXP - RXN", "RXN"},
647 {"Rx Mixer", "RXP + RXN", "RXN"},
648 {"Rx Mixer", "RXP", "RXP"},
649 {"Rx Mixer", "RXN", "RXN"},
650
651 /* Mic 1 Volume */
652 {"Mic 1 Volume", NULL, "MIC1N"},
653 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
654
655 /* Mic 2 Volume */
656 {"Mic 2 Volume", NULL, "MIC2N"},
657 {"Mic 2 Volume", NULL, "MIC2"},
658
659 /* Mic Selector Mux */
660 {"Mic Selection Mux", "Mic 1", "MIC1"},
661 {"Mic Selection Mux", "Mic 2", "MIC2N"},
662 {"Mic Selection Mux", "Mic 3", "MIC2"},
663
664 /* ACOP */
665 {"ACOP", NULL, "ALC Mixer"},
1f53aee0
LG		 666};
667
668static int wm8753_add_widgets(struct snd_soc_codec *codec)
669{
a65f0568
MB		 670 snd_soc_dapm_new_controls(codec, wm8753_dapm_widgets,
671 ARRAY_SIZE(wm8753_dapm_widgets));
1f53aee0 672
a65f0568 673 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
1f53aee0
LG		 674
675 snd_soc_dapm_new_widgets(codec);
676 return 0;
677}
678
679/* PLL divisors */
680struct _pll_div {
681 u32 div2:1;
682 u32 n:4;
683 u32 k:24;
684};
685
686/* The size in bits of the pll divide multiplied by 10
687 * to allow rounding later */
688#define FIXED_PLL_SIZE ((1 << 22) * 10)
689
690static void pll_factors(struct _pll_div *pll_div, unsigned int target,
691 unsigned int source)
692{
693 u64 Kpart;
694 unsigned int K, Ndiv, Nmod;
695
696 Ndiv = target / source;
697 if (Ndiv < 6) {
698 source >>= 1;
699 pll_div->div2 = 1;
700 Ndiv = target / source;
701 } else
702 pll_div->div2 = 0;
703
704 if ((Ndiv < 6) || (Ndiv > 12))
705 printk(KERN_WARNING
449bd54d 706 "wm8753: unsupported N = %u\n", Ndiv);
1f53aee0
LG		 707
708 pll_div->n = Ndiv;
709 Nmod = target % source;
710 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
711
712 do_div(Kpart, source);
713
714 K = Kpart & 0xFFFFFFFF;
715
716 /* Check if we need to round */
717 if ((K % 10) >= 5)
718 K += 5;
719
720 /* Move down to proper range now rounding is done */
721 K /= 10;
722
723 pll_div->k = K;
724}
725
e550e17f 726static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 727 int pll_id, unsigned int freq_in, unsigned int freq_out)
728{
729 u16 reg, enable;
730 int offset;
731 struct snd_soc_codec *codec = codec_dai->codec;
732
733 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
734 return -ENODEV;
735
736 if (pll_id == WM8753_PLL1) {
737 offset = 0;
738 enable = 0x10;
739 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
740 } else {
741 offset = 4;
742 enable = 0x8;
743 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
744 }
745
746 if (!freq_in || !freq_out) {
747 /* disable PLL */
748 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
749 wm8753_write(codec, WM8753_CLOCK, reg);
750 return 0;
751 } else {
752 u16 value = 0;
753 struct _pll_div pll_div;
754
755 pll_factors(&pll_div, freq_out * 8, freq_in);
756
757 /* set up N and K PLL divisor ratios */
758 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
759 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
760 wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
761
762 /* bits 8:0 = PLL_K[17:9] */
763 value = (pll_div.k & 0x03fe00) >> 9;
764 wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
765
766 /* bits 8:0 = PLL_K[8:0] */
767 value = pll_div.k & 0x0001ff;
768 wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
769
770 /* set PLL as input and enable */
771 wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
772 (pll_div.div2 << 3));
773 wm8753_write(codec, WM8753_CLOCK, reg | enable);
774 }
775 return 0;
776}
777
778struct _coeff_div {
779 u32 mclk;
780 u32 rate;
781 u8 sr:5;
782 u8 usb:1;
783};
784
785/* codec hifi mclk (after PLL) clock divider coefficients */
786static const struct _coeff_div coeff_div[] = {
787 /* 8k */
788 {12288000, 8000, 0x6, 0x0},
789 {11289600, 8000, 0x16, 0x0},
790 {18432000, 8000, 0x7, 0x0},
791 {16934400, 8000, 0x17, 0x0},
792 {12000000, 8000, 0x6, 0x1},
793
794 /* 11.025k */
795 {11289600, 11025, 0x18, 0x0},
796 {16934400, 11025, 0x19, 0x0},
797 {12000000, 11025, 0x19, 0x1},
798
799 /* 16k */
800 {12288000, 16000, 0xa, 0x0},
801 {18432000, 16000, 0xb, 0x0},
802 {12000000, 16000, 0xa, 0x1},
803
804 /* 22.05k */
805 {11289600, 22050, 0x1a, 0x0},
806 {16934400, 22050, 0x1b, 0x0},
807 {12000000, 22050, 0x1b, 0x1},
808
809 /* 32k */
810 {12288000, 32000, 0xc, 0x0},
811 {18432000, 32000, 0xd, 0x0},
812 {12000000, 32000, 0xa, 0x1},
813
814 /* 44.1k */
815 {11289600, 44100, 0x10, 0x0},
816 {16934400, 44100, 0x11, 0x0},
817 {12000000, 44100, 0x11, 0x1},
818
819 /* 48k */
820 {12288000, 48000, 0x0, 0x0},
821 {18432000, 48000, 0x1, 0x0},
822 {12000000, 48000, 0x0, 0x1},
823
824 /* 88.2k */
825 {11289600, 88200, 0x1e, 0x0},
826 {16934400, 88200, 0x1f, 0x0},
827 {12000000, 88200, 0x1f, 0x1},
828
829 /* 96k */
830 {12288000, 96000, 0xe, 0x0},
831 {18432000, 96000, 0xf, 0x0},
832 {12000000, 96000, 0xe, 0x1},
833};
834
835static int get_coeff(int mclk, int rate)
836{
837 int i;
838
839 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
840 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
841 return i;
842 }
843 return -EINVAL;
844}
845
846/*
847 * Clock after PLL and dividers
848 */
e550e17f 849static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 850 int clk_id, unsigned int freq, int dir)
851{
852 struct snd_soc_codec *codec = codec_dai->codec;
853 struct wm8753_priv *wm8753 = codec->private_data;
854
855 switch (freq) {
856 case 11289600:
857 case 12000000:
858 case 12288000:
859 case 16934400:
860 case 18432000:
861 if (clk_id == WM8753_MCLK) {
862 wm8753->sysclk = freq;
863 return 0;
864 } else if (clk_id == WM8753_PCMCLK) {
865 wm8753->pcmclk = freq;
866 return 0;
867 }
868 break;
869 }
870 return -EINVAL;
871}
872
873/*
874 * Set's ADC and Voice DAC format.
875 */
e550e17f 876static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 877 unsigned int fmt)
878{
879 struct snd_soc_codec *codec = codec_dai->codec;
880 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
881
882 /* interface format */
883 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
884 case SND_SOC_DAIFMT_I2S:
885 voice |= 0x0002;
886 break;
887 case SND_SOC_DAIFMT_RIGHT_J:
888 break;
889 case SND_SOC_DAIFMT_LEFT_J:
890 voice |= 0x0001;
891 break;
892 case SND_SOC_DAIFMT_DSP_A:
893 voice |= 0x0003;
894 break;
895 case SND_SOC_DAIFMT_DSP_B:
896 voice |= 0x0013;
897 break;
898 default:
899 return -EINVAL;
900 }
901
902 wm8753_write(codec, WM8753_PCM, voice);
903 return 0;
904}
905
906/*
907 * Set PCM DAI bit size and sample rate.
908 */
909static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 910 struct snd_pcm_hw_params *params,
911 struct snd_soc_dai *dai)
1f53aee0
LG		 912{
913 struct snd_soc_pcm_runtime *rtd = substream->private_data;
914 struct snd_soc_device *socdev = rtd->socdev;
6627a653 915 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 916 struct wm8753_priv *wm8753 = codec->private_data;
917 u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
918 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
919
920 /* bit size */
921 switch (params_format(params)) {
922 case SNDRV_PCM_FORMAT_S16_LE:
923 break;
924 case SNDRV_PCM_FORMAT_S20_3LE:
925 voice |= 0x0004;
926 break;
927 case SNDRV_PCM_FORMAT_S24_LE:
928 voice |= 0x0008;
929 break;
930 case SNDRV_PCM_FORMAT_S32_LE:
931 voice |= 0x000c;
932 break;
933 }
934
935 /* sample rate */
936 if (params_rate(params) * 384 == wm8753->pcmclk)
937 srate |= 0x80;
938 wm8753_write(codec, WM8753_SRATE1, srate);
939
940 wm8753_write(codec, WM8753_PCM, voice);
941 return 0;
942}
943
944/*
945 * Set's PCM dai fmt and BCLK.
946 */
e550e17f 947static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 948 unsigned int fmt)
949{
950 struct snd_soc_codec *codec = codec_dai->codec;
951 u16 voice, ioctl;
952
953 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
954 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
955
956 /* set master/slave audio interface */
957 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
958 case SND_SOC_DAIFMT_CBS_CFS:
959 break;
960 case SND_SOC_DAIFMT_CBM_CFM:
961 ioctl |= 0x2;
962 case SND_SOC_DAIFMT_CBM_CFS:
963 voice |= 0x0040;
964 break;
965 default:
966 return -EINVAL;
967 }
968
969 /* clock inversion */
970 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
971 case SND_SOC_DAIFMT_DSP_A:
972 case SND_SOC_DAIFMT_DSP_B:
973 /* frame inversion not valid for DSP modes */
974 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
975 case SND_SOC_DAIFMT_NB_NF:
976 break;
977 case SND_SOC_DAIFMT_IB_NF:
978 voice |= 0x0080;
979 break;
980 default:
981 return -EINVAL;
982 }
983 break;
984 case SND_SOC_DAIFMT_I2S:
985 case SND_SOC_DAIFMT_RIGHT_J:
986 case SND_SOC_DAIFMT_LEFT_J:
987 voice &= ~0x0010;
988 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
989 case SND_SOC_DAIFMT_NB_NF:
990 break;
991 case SND_SOC_DAIFMT_IB_IF:
992 voice |= 0x0090;
993 break;
994 case SND_SOC_DAIFMT_IB_NF:
995 voice |= 0x0080;
996 break;
997 case SND_SOC_DAIFMT_NB_IF:
998 voice |= 0x0010;
999 break;
1000 default:
1001 return -EINVAL;
1002 }
1003 break;
1004 default:
1005 return -EINVAL;
1006 }
1007
1008 wm8753_write(codec, WM8753_PCM, voice);
1009 wm8753_write(codec, WM8753_IOCTL, ioctl);
1010 return 0;
1011}
1012
e550e17f 1013static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1014 int div_id, int div)
1015{
1016 struct snd_soc_codec *codec = codec_dai->codec;
1017 u16 reg;
1018
1019 switch (div_id) {
1020 case WM8753_PCMDIV:
1021 reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
1022 wm8753_write(codec, WM8753_CLOCK, reg | div);
1023 break;
1024 case WM8753_BCLKDIV:
1025 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
1026 wm8753_write(codec, WM8753_SRATE2, reg | div);
1027 break;
1028 case WM8753_VXCLKDIV:
1029 reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
1030 wm8753_write(codec, WM8753_SRATE2, reg | div);
1031 break;
1032 default:
1033 return -EINVAL;
1034 }
1035 return 0;
1036}
1037
1038/*
1039 * Set's HiFi DAC format.
1040 */
e550e17f 1041static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1042 unsigned int fmt)
1043{
1044 struct snd_soc_codec *codec = codec_dai->codec;
1045 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
1046
1047 /* interface format */
1048 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1049 case SND_SOC_DAIFMT_I2S:
1050 hifi |= 0x0002;
1051 break;
1052 case SND_SOC_DAIFMT_RIGHT_J:
1053 break;
1054 case SND_SOC_DAIFMT_LEFT_J:
1055 hifi |= 0x0001;
1056 break;
1057 case SND_SOC_DAIFMT_DSP_A:
1058 hifi |= 0x0003;
1059 break;
1060 case SND_SOC_DAIFMT_DSP_B:
1061 hifi |= 0x0013;
1062 break;
1063 default:
1064 return -EINVAL;
1065 }
1066
1067 wm8753_write(codec, WM8753_HIFI, hifi);
1068 return 0;
1069}
1070
1071/*
1072 * Set's I2S DAI format.
1073 */
e550e17f 1074static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1075 unsigned int fmt)
1076{
1077 struct snd_soc_codec *codec = codec_dai->codec;
1078 u16 ioctl, hifi;
1079
1080 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
1081 ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
1082
1083 /* set master/slave audio interface */
1084 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1085 case SND_SOC_DAIFMT_CBS_CFS:
1086 break;
1087 case SND_SOC_DAIFMT_CBM_CFM:
1088 ioctl |= 0x1;
1089 case SND_SOC_DAIFMT_CBM_CFS:
1090 hifi |= 0x0040;
1091 break;
1092 default:
1093 return -EINVAL;
1094 }
1095
1096 /* clock inversion */
1097 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1098 case SND_SOC_DAIFMT_DSP_A:
1099 case SND_SOC_DAIFMT_DSP_B:
1100 /* frame inversion not valid for DSP modes */
1101 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1102 case SND_SOC_DAIFMT_NB_NF:
1103 break;
1104 case SND_SOC_DAIFMT_IB_NF:
1105 hifi |= 0x0080;
1106 break;
1107 default:
1108 return -EINVAL;
1109 }
1110 break;
1111 case SND_SOC_DAIFMT_I2S:
1112 case SND_SOC_DAIFMT_RIGHT_J:
1113 case SND_SOC_DAIFMT_LEFT_J:
1114 hifi &= ~0x0010;
1115 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1116 case SND_SOC_DAIFMT_NB_NF:
1117 break;
1118 case SND_SOC_DAIFMT_IB_IF:
1119 hifi |= 0x0090;
1120 break;
1121 case SND_SOC_DAIFMT_IB_NF:
1122 hifi |= 0x0080;
1123 break;
1124 case SND_SOC_DAIFMT_NB_IF:
1125 hifi |= 0x0010;
1126 break;
1127 default:
1128 return -EINVAL;
1129 }
1130 break;
1131 default:
1132 return -EINVAL;
1133 }
1134
1135 wm8753_write(codec, WM8753_HIFI, hifi);
1136 wm8753_write(codec, WM8753_IOCTL, ioctl);
1137 return 0;
1138}
1139
1140/*
1141 * Set PCM DAI bit size and sample rate.
1142 */
1143static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 1144 struct snd_pcm_hw_params *params,
1145 struct snd_soc_dai *dai)
1f53aee0
LG		 1146{
1147 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1148 struct snd_soc_device *socdev = rtd->socdev;
6627a653 1149 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1150 struct wm8753_priv *wm8753 = codec->private_data;
1151 u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
1152 u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
1153 int coeff;
1154
1155 /* is digital filter coefficient valid ? */
1156 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1157 if (coeff < 0) {
1158 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1159 return coeff;
1160 }
1161 wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1162 coeff_div[coeff].usb);
1163
1164 /* bit size */
1165 switch (params_format(params)) {
1166 case SNDRV_PCM_FORMAT_S16_LE:
1167 break;
1168 case SNDRV_PCM_FORMAT_S20_3LE:
1169 hifi |= 0x0004;
1170 break;
1171 case SNDRV_PCM_FORMAT_S24_LE:
1172 hifi |= 0x0008;
1173 break;
1174 case SNDRV_PCM_FORMAT_S32_LE:
1175 hifi |= 0x000c;
1176 break;
1177 }
1178
1179 wm8753_write(codec, WM8753_HIFI, hifi);
1180 return 0;
1181}
1182
e550e17f 1183static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1184 unsigned int fmt)
1185{
1186 struct snd_soc_codec *codec = codec_dai->codec;
1187 u16 clock;
1188
1189 /* set clk source as pcmclk */
1190 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1191 wm8753_write(codec, WM8753_CLOCK, clock);
1192
1193 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1194 return -EINVAL;
1195 return wm8753_pcm_set_dai_fmt(codec_dai, fmt);
1196}
1197
e550e17f 1198static int wm8753_mode1h_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1199 unsigned int fmt)
1200{
1201 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1202 return -EINVAL;
1203 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1204}
1205
e550e17f 1206static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1207 unsigned int fmt)
1208{
1209 struct snd_soc_codec *codec = codec_dai->codec;
1210 u16 clock;
1211
1212 /* set clk source as pcmclk */
1213 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1214 wm8753_write(codec, WM8753_CLOCK, clock);
1215
1216 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1217 return -EINVAL;
1218 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1219}
1220
e550e17f 1221static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
1f53aee0
LG		 1222 unsigned int fmt)
1223{
1224 struct snd_soc_codec *codec = codec_dai->codec;
1225 u16 clock;
1226
1227 /* set clk source as mclk */
1228 clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
1229 wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
1230
1231 if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
1232 return -EINVAL;
1233 if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
1234 return -EINVAL;
1235 return wm8753_i2s_set_dai_fmt(codec_dai, fmt);
1236}
1237
e550e17f 1238static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1f53aee0
LG		 1239{
1240 struct snd_soc_codec *codec = dai->codec;
1241 u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
1242
1243 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1244 * make sure we check if they are not both active when we mute */
1245 if (mute && dai->id == 1) {
1246 if (!wm8753_dai[WM8753_DAI_VOICE].playback.active ||
1247 !wm8753_dai[WM8753_DAI_HIFI].playback.active)
1248 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1249 } else {
1250 if (mute)
1251 wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
1252 else
1253 wm8753_write(codec, WM8753_DAC, mute_reg);
1254 }
1255
1256 return 0;
1257}
1258
0be9898a
MB		 1259static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1260 enum snd_soc_bias_level level)
1f53aee0
LG		 1261{
1262 u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
1263
0be9898a
MB		 1264 switch (level) {
1265 case SND_SOC_BIAS_ON:
1f53aee0
LG		 1266 /* set vmid to 50k and unmute dac */
1267 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1268 break;
0be9898a 1269 case SND_SOC_BIAS_PREPARE:
1f53aee0
LG		 1270 /* set vmid to 5k for quick power up */
1271 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1272 break;
0be9898a 1273 case SND_SOC_BIAS_STANDBY:
1f53aee0
LG		 1274 /* mute dac and set vmid to 500k, enable VREF */
1275 wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1276 break;
0be9898a 1277 case SND_SOC_BIAS_OFF:
1f53aee0
LG		 1278 wm8753_write(codec, WM8753_PWR1, 0x0001);
1279 break;
1280 }
0be9898a 1281 codec->bias_level = level;
1f53aee0
LG		 1282 return 0;
1283}
1284
1285#define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
60fc684a
MB		 1286 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1287 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1288 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1f53aee0
LG		 1289
1290#define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1291 SNDRV_PCM_FMTBIT_S24_LE)
1292
1293/*
1294 * The WM8753 supports upto 4 different and mutually exclusive DAI
1295 * configurations. This gives 2 PCM's available for use, hifi and voice.
1296 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1297 * is connected between the wm8753 and a BT codec or GSM modem.
1298 *
1299 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1300 * 2. Voice over HIFI DAI - HIFI disabled
1301 * 3. Voice disabled - HIFI over HIFI
1302 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1303 */
6335d055
EM		 1304static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode1 = {
1305 .hw_params = wm8753_i2s_hw_params,
1306 .digital_mute = wm8753_mute,
1307 .set_fmt = wm8753_mode1h_set_dai_fmt,
1308 .set_clkdiv = wm8753_set_dai_clkdiv,
1309 .set_pll = wm8753_set_dai_pll,
1310 .set_sysclk = wm8753_set_dai_sysclk,
1311};
1312
1313static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode1 = {
1314 .hw_params = wm8753_pcm_hw_params,
1315 .digital_mute = wm8753_mute,
1316 .set_fmt = wm8753_mode1v_set_dai_fmt,
1317 .set_clkdiv = wm8753_set_dai_clkdiv,
1318 .set_pll = wm8753_set_dai_pll,
1319 .set_sysclk = wm8753_set_dai_sysclk,
1320};
1321
1322static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode2 = {
1323 .hw_params = wm8753_pcm_hw_params,
1324 .digital_mute = wm8753_mute,
1325 .set_fmt = wm8753_mode2_set_dai_fmt,
1326 .set_clkdiv = wm8753_set_dai_clkdiv,
1327 .set_pll = wm8753_set_dai_pll,
1328 .set_sysclk = wm8753_set_dai_sysclk,
1329};
1330
1331static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode3 = {
1332 .hw_params = wm8753_i2s_hw_params,
1333 .digital_mute = wm8753_mute,
1334 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1335 .set_clkdiv = wm8753_set_dai_clkdiv,
1336 .set_pll = wm8753_set_dai_pll,
1337 .set_sysclk = wm8753_set_dai_sysclk,
1338};
1339
1340static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode4 = {
1341 .hw_params = wm8753_i2s_hw_params,
1342 .digital_mute = wm8753_mute,
1343 .set_fmt = wm8753_mode3_4_set_dai_fmt,
1344 .set_clkdiv = wm8753_set_dai_clkdiv,
1345 .set_pll = wm8753_set_dai_pll,
1346 .set_sysclk = wm8753_set_dai_sysclk,
1347};
1348
e550e17f 1349static const struct snd_soc_dai wm8753_all_dai[] = {
1f53aee0
LG		 1350/* DAI HiFi mode 1 */
1351{ .name = "WM8753 HiFi",
1352 .id = 1,
1353 .playback = {
1354 .stream_name = "HiFi Playback",
1355 .channels_min = 1,
1356 .channels_max = 2,
1357 .rates = WM8753_RATES,
dee89c4d 1358 .formats = WM8753_FORMATS},
1f53aee0
LG		 1359 .capture = { /* dummy for fast DAI switching */
1360 .stream_name = "Capture",
1361 .channels_min = 1,
1362 .channels_max = 2,
1363 .rates = WM8753_RATES,
dee89c4d 1364 .formats = WM8753_FORMATS},
6335d055 1365 .ops = &wm8753_dai_ops_hifi_mode1,
1f53aee0
LG		 1366},
1367/* DAI Voice mode 1 */
1368{ .name = "WM8753 Voice",
1369 .id = 1,
1370 .playback = {
1371 .stream_name = "Voice Playback",
1372 .channels_min = 1,
1373 .channels_max = 1,
1374 .rates = WM8753_RATES,
1375 .formats = WM8753_FORMATS,},
1376 .capture = {
1377 .stream_name = "Capture",
1378 .channels_min = 1,
1379 .channels_max = 2,
1380 .rates = WM8753_RATES,
1381 .formats = WM8753_FORMATS,},
6335d055 1382 .ops = &wm8753_dai_ops_voice_mode1,
1f53aee0
LG		 1383},
1384/* DAI HiFi mode 2 - dummy */
1385{ .name = "WM8753 HiFi",
1386 .id = 2,
1387},
1388/* DAI Voice mode 2 */
1389{ .name = "WM8753 Voice",
1390 .id = 2,
1391 .playback = {
1392 .stream_name = "Voice Playback",
1393 .channels_min = 1,
1394 .channels_max = 1,
1395 .rates = WM8753_RATES,
1396 .formats = WM8753_FORMATS,},
1397 .capture = {
1398 .stream_name = "Capture",
1399 .channels_min = 1,
1400 .channels_max = 2,
1401 .rates = WM8753_RATES,
1402 .formats = WM8753_FORMATS,},
6335d055 1403 .ops = &wm8753_dai_ops_voice_mode2,
1f53aee0
LG		 1404},
1405/* DAI HiFi mode 3 */
1406{ .name = "WM8753 HiFi",
1407 .id = 3,
1408 .playback = {
1409 .stream_name = "HiFi Playback",
1410 .channels_min = 1,
1411 .channels_max = 2,
1412 .rates = WM8753_RATES,
1413 .formats = WM8753_FORMATS,},
1414 .capture = {
1415 .stream_name = "Capture",
1416 .channels_min = 1,
1417 .channels_max = 2,
1418 .rates = WM8753_RATES,
1419 .formats = WM8753_FORMATS,},
6335d055 1420 .ops = &wm8753_dai_ops_hifi_mode3,
1f53aee0
LG		 1421},
1422/* DAI Voice mode 3 - dummy */
1423{ .name = "WM8753 Voice",
1424 .id = 3,
1425},
1426/* DAI HiFi mode 4 */
1427{ .name = "WM8753 HiFi",
1428 .id = 4,
1429 .playback = {
1430 .stream_name = "HiFi Playback",
1431 .channels_min = 1,
1432 .channels_max = 2,
1433 .rates = WM8753_RATES,
1434 .formats = WM8753_FORMATS,},
1435 .capture = {
1436 .stream_name = "Capture",
1437 .channels_min = 1,
1438 .channels_max = 2,
1439 .rates = WM8753_RATES,
1440 .formats = WM8753_FORMATS,},
6335d055 1441 .ops = &wm8753_dai_ops_hifi_mode4,
1f53aee0
LG		 1442},
1443/* DAI Voice mode 4 - dummy */
1444{ .name = "WM8753 Voice",
1445 .id = 4,
1446},
1447};
1448
9e70c1f0
MB		 1449struct snd_soc_dai wm8753_dai[] = {
1450 {
1451 .name = "WM8753 DAI 0",
1452 },
1453 {
1454 .name = "WM8753 DAI 1",
1455 },
1456};
1f53aee0
LG		 1457EXPORT_SYMBOL_GPL(wm8753_dai);
1458
1459static void wm8753_set_dai_mode(struct snd_soc_codec *codec, unsigned int mode)
1460{
1461 if (mode < 4) {
1462 int playback_active, capture_active, codec_active, pop_wait;
1463 void *private_data;
31b59cf9 1464 struct list_head list;
1f53aee0
LG		 1465
1466 playback_active = wm8753_dai[0].playback.active;
1467 capture_active = wm8753_dai[0].capture.active;
1468 codec_active = wm8753_dai[0].active;
1469 private_data = wm8753_dai[0].private_data;
1470 pop_wait = wm8753_dai[0].pop_wait;
31b59cf9 1471 list = wm8753_dai[0].list;
1f53aee0
LG		 1472 wm8753_dai[0] = wm8753_all_dai[mode << 1];
1473 wm8753_dai[0].playback.active = playback_active;
1474 wm8753_dai[0].capture.active = capture_active;
1475 wm8753_dai[0].active = codec_active;
1476 wm8753_dai[0].private_data = private_data;
1477 wm8753_dai[0].pop_wait = pop_wait;
31b59cf9 1478 wm8753_dai[0].list = list;
1f53aee0
LG		 1479
1480 playback_active = wm8753_dai[1].playback.active;
1481 capture_active = wm8753_dai[1].capture.active;
1482 codec_active = wm8753_dai[1].active;
1483 private_data = wm8753_dai[1].private_data;
1484 pop_wait = wm8753_dai[1].pop_wait;
31b59cf9 1485 list = wm8753_dai[1].list;
1f53aee0
LG		 1486 wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
1487 wm8753_dai[1].playback.active = playback_active;
1488 wm8753_dai[1].capture.active = capture_active;
1489 wm8753_dai[1].active = codec_active;
1490 wm8753_dai[1].private_data = private_data;
1491 wm8753_dai[1].pop_wait = pop_wait;
31b59cf9 1492 wm8753_dai[1].list = list;
1f53aee0
LG		 1493 }
1494 wm8753_dai[0].codec = codec;
1495 wm8753_dai[1].codec = codec;
1496}
1497
1498static void wm8753_work(struct work_struct *work)
1499{
1500 struct snd_soc_codec *codec =
1501 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 1502 wm8753_set_bias_level(codec, codec->bias_level);
1f53aee0
LG		 1503}
1504
1505static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
1506{
1507 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1508 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1509
1510 /* we only need to suspend if we are a valid card */
60fc684a 1511 if (!codec->card)
1f53aee0 1512 return 0;
60fc684a 1513
0be9898a 1514 wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
1f53aee0
LG		 1515 return 0;
1516}
1517
1518static int wm8753_resume(struct platform_device *pdev)
1519{
1520 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 1521 struct snd_soc_codec *codec = socdev->card->codec;
1f53aee0
LG		 1522 int i;
1523 u8 data[2];
1524 u16 *cache = codec->reg_cache;
1525
1526 /* we only need to resume if we are a valid card */
60fc684a 1527 if (!codec->card)
1f53aee0
LG		 1528 return 0;
1529
1530 /* Sync reg_cache with the hardware */
1531 for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
1532 if (i + 1 == WM8753_RESET)
1533 continue;
e611bd82
MB		 1534
1535 /* No point in writing hardware default values back */
1536 if (cache[i] == wm8753_reg[i])
1537 continue;
1538
1f53aee0
LG		 1539 data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
1540 data[1] = cache[i] & 0x00ff;
1541 codec->hw_write(codec->control_data, data, 2);
1542 }
1543
0be9898a 1544 wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1f53aee0
LG		 1545
1546 /* charge wm8753 caps */
0be9898a
MB		 1547 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
1548 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1549 codec->bias_level = SND_SOC_BIAS_ON;
1f53aee0
LG		 1550 schedule_delayed_work(&codec->delayed_work,
1551 msecs_to_jiffies(caps_charge));
1552 }
1553
1554 return 0;
1555}
1556
c2bac160
MB		 1557static struct snd_soc_codec *wm8753_codec;
1558
1559static int wm8753_probe(struct platform_device *pdev)
1f53aee0 1560{
c2bac160
MB		 1561 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1562 struct snd_soc_codec *codec;
1563 int ret = 0;
1f53aee0 1564
c2bac160
MB		 1565 if (!wm8753_codec) {
1566 dev_err(&pdev->dev, "WM8753 codec not yet registered\n");
1567 return -EINVAL;
1568 }
1f53aee0 1569
c2bac160
MB		 1570 socdev->card->codec = wm8753_codec;
1571 codec = wm8753_codec;
1f53aee0
LG		 1572
1573 wm8753_set_dai_mode(codec, 0);
1574
1f53aee0
LG		 1575 /* register pcms */
1576 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1577 if (ret < 0) {
1578 printk(KERN_ERR "wm8753: failed to create pcms\n");
1579 goto pcm_err;
1580 }
1581
6d564345
TI		 1582 snd_soc_add_controls(codec, wm8753_snd_controls,
1583 ARRAY_SIZE(wm8753_snd_controls));
1f53aee0 1584 wm8753_add_widgets(codec);
968a6025 1585 ret = snd_soc_init_card(socdev);
1f53aee0 1586 if (ret < 0) {
60fc684a 1587 printk(KERN_ERR "wm8753: failed to register card\n");
1f53aee0 1588 goto card_err;
60fc684a
MB		 1589 }
1590
c2bac160 1591 return 0;
1f53aee0
LG		 1592
1593card_err:
1594 snd_soc_free_pcms(socdev);
1595 snd_soc_dapm_free(socdev);
3051e41a 1596
c2bac160 1597pcm_err:
1f53aee0
LG		 1598 return ret;
1599}
1600
1601/*
1602 * This function forces any delayed work to be queued and run.
1603 */
1604static int run_delayed_work(struct delayed_work *dwork)
1605{
1606 int ret;
1607
1608 /* cancel any work waiting to be queued. */
1609 ret = cancel_delayed_work(dwork);
1610
1611 /* if there was any work waiting then we run it now and
1612 * wait for it's completion */
1613 if (ret) {
1614 schedule_delayed_work(dwork, 0);
1615 flush_scheduled_work();
1616 }
1617 return ret;
1618}
1619
1620/* power down chip */
1621static int wm8753_remove(struct platform_device *pdev)
1622{
1623 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1f53aee0 1624
1f53aee0
LG		 1625 snd_soc_free_pcms(socdev);
1626 snd_soc_dapm_free(socdev);
1f53aee0
LG		 1627
1628 return 0;
1629}
1630
1631struct snd_soc_codec_device soc_codec_dev_wm8753 = {
1632 .probe = wm8753_probe,
1633 .remove = wm8753_remove,
1634 .suspend = wm8753_suspend,
1635 .resume = wm8753_resume,
1636};
1f53aee0
LG		 1637EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
1638
c2bac160
MB		 1639static int wm8753_register(struct wm8753_priv *wm8753)
1640{
1641 int ret, i;
1642 struct snd_soc_codec *codec = &wm8753->codec;
1643 u16 reg;
1644
1645 if (wm8753_codec) {
1646 dev_err(codec->dev, "Multiple WM8753 devices not supported\n");
1647 ret = -EINVAL;
1648 goto err;
1649 }
1650
1651 mutex_init(&codec->mutex);
1652 INIT_LIST_HEAD(&codec->dapm_widgets);
1653 INIT_LIST_HEAD(&codec->dapm_paths);
1654
1655 codec->name = "WM8753";
1656 codec->owner = THIS_MODULE;
1657 codec->read = wm8753_read_reg_cache;
1658 codec->write = wm8753_write;
1659 codec->bias_level = SND_SOC_BIAS_STANDBY;
1660 codec->set_bias_level = wm8753_set_bias_level;
1661 codec->dai = wm8753_dai;
1662 codec->num_dai = 2;
1663 codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache);
1664 codec->reg_cache = &wm8753->reg_cache;
1665 codec->private_data = wm8753;
1666
1667 memcpy(codec->reg_cache, wm8753_reg, sizeof(codec->reg_cache));
1668 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
1669
1670 ret = wm8753_reset(codec);
1671 if (ret < 0) {
1672 dev_err(codec->dev, "Failed to issue reset\n");
1673 goto err;
1674 }
1675
1676 /* charge output caps */
1677 wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
1678 schedule_delayed_work(&codec->delayed_work,
1679 msecs_to_jiffies(caps_charge));
1680
1681 /* set the update bits */
1682 reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
1683 wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
1684 reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
1685 wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
1686 reg = wm8753_read_reg_cache(codec, WM8753_LADC);
1687 wm8753_write(codec, WM8753_LADC, reg | 0x0100);
1688 reg = wm8753_read_reg_cache(codec, WM8753_RADC);
1689 wm8753_write(codec, WM8753_RADC, reg | 0x0100);
1690 reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
1691 wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
1692 reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
1693 wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
1694 reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
1695 wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
1696 reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
1697 wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
1698 reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
1699 wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
1700 reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
1701 wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
1702
1703 wm8753_codec = codec;
1704
1705 for (i = 0; i < ARRAY_SIZE(wm8753_dai); i++)
1706 wm8753_dai[i].dev = codec->dev;
1707
1708 ret = snd_soc_register_codec(codec);
1709 if (ret != 0) {
1710 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
1711 goto err;
1712 }
1713
1714 ret = snd_soc_register_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
1715 if (ret != 0) {
1716 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
1717 goto err_codec;
1718 }
1719
1720 return 0;
1721
1722err_codec:
1723 run_delayed_work(&codec->delayed_work);
1724 snd_soc_unregister_codec(codec);
1725err:
1726 kfree(wm8753);
1727 return ret;
1728}
1729
1730static void wm8753_unregister(struct wm8753_priv *wm8753)
1731{
1732 wm8753_set_bias_level(&wm8753->codec, SND_SOC_BIAS_OFF);
1733 run_delayed_work(&wm8753->codec.delayed_work);
1734 snd_soc_unregister_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
1735 snd_soc_unregister_codec(&wm8753->codec);
1736 kfree(wm8753);
1737 wm8753_codec = NULL;
1738}
1739
69e169da
MB		 1740#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1741
1742static int wm8753_i2c_probe(struct i2c_client *i2c,
1743 const struct i2c_device_id *id)
1744{
c2bac160
MB		 1745 struct snd_soc_codec *codec;
1746 struct wm8753_priv *wm8753;
69e169da 1747
c2bac160
MB		 1748 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1749 if (wm8753 == NULL)
1750 return -ENOMEM;
69e169da 1751
c2bac160
MB		 1752 codec = &wm8753->codec;
1753 codec->hw_write = (hw_write_t)i2c_master_send;
1754 codec->control_data = i2c;
1755 i2c_set_clientdata(i2c, wm8753);
69e169da 1756
c2bac160
MB		 1757 codec->dev = &i2c->dev;
1758
1759 return wm8753_register(wm8753);
69e169da
MB		 1760}
1761
1762static int wm8753_i2c_remove(struct i2c_client *client)
1763{
c2bac160
MB		 1764 struct wm8753_priv *wm8753 = i2c_get_clientdata(client);
1765 wm8753_unregister(wm8753);
1766 return 0;
69e169da
MB		 1767}
1768
1769static const struct i2c_device_id wm8753_i2c_id[] = {
1770 { "wm8753", 0 },
1771 { }
1772};
1773MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1774
1775static struct i2c_driver wm8753_i2c_driver = {
1776 .driver = {
c2bac160 1777 .name = "wm8753",
69e169da
MB		 1778 .owner = THIS_MODULE,
1779 },
1780 .probe = wm8753_i2c_probe,
1781 .remove = wm8753_i2c_remove,
1782 .id_table = wm8753_i2c_id,
1783};
1784#endif
1785
1786#if defined(CONFIG_SPI_MASTER)
1787static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
1788{
1789 struct spi_transfer t;
1790 struct spi_message m;
1791 u8 msg[2];
1792
1793 if (len <= 0)
1794 return 0;
1795
1796 msg[0] = data[0];
1797 msg[1] = data[1];
1798
1799 spi_message_init(&m);
1800 memset(&t, 0, (sizeof t));
1801
1802 t.tx_buf = &msg[0];
1803 t.len = len;
1804
1805 spi_message_add_tail(&t, &m);
1806 spi_sync(spi, &m);
1807
1808 return len;
1809}
1810
1811static int __devinit wm8753_spi_probe(struct spi_device *spi)
1812{
c2bac160
MB		 1813 struct snd_soc_codec *codec;
1814 struct wm8753_priv *wm8753;
1815
1816 wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
1817 if (wm8753 == NULL)
1818 return -ENOMEM;
69e169da 1819
c2bac160 1820 codec = &wm8753->codec;
69e169da 1821 codec->control_data = spi;
c2bac160
MB		 1822 codec->hw_write = (hw_write_t)wm8753_spi_write;
1823 codec->dev = &spi->dev;
69e169da 1824
ae31c1fb 1825 dev_set_drvdata(&spi->dev, wm8753);
69e169da 1826
c2bac160 1827 return wm8753_register(wm8753);
69e169da
MB		 1828}
1829
1830static int __devexit wm8753_spi_remove(struct spi_device *spi)
1831{
ae31c1fb 1832 struct wm8753_priv *wm8753 = dev_get_drvdata(&spi->dev);
c2bac160 1833 wm8753_unregister(wm8753);
69e169da
MB		 1834 return 0;
1835}
1836
1837static struct spi_driver wm8753_spi_driver = {
1838 .driver = {
1839 .name = "wm8753",
1840 .bus = &spi_bus_type,
1841 .owner = THIS_MODULE,
1842 },
1843 .probe = wm8753_spi_probe,
1844 .remove = __devexit_p(wm8753_spi_remove),
1845};
1846#endif
1847
c9b3a40f 1848static int __init wm8753_modinit(void)
64089b84 1849{
c2bac160
MB		 1850 int ret;
1851#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1852 ret = i2c_add_driver(&wm8753_i2c_driver);
1853 if (ret != 0)
1854 pr_err("Failed to register WM8753 I2C driver: %d\n", ret);
1855#endif
1856#if defined(CONFIG_SPI_MASTER)
1857 ret = spi_register_driver(&wm8753_spi_driver);
1858 if (ret != 0)
1859 pr_err("Failed to register WM8753 SPI driver: %d\n", ret);
1860#endif
1861 return 0;
64089b84
MB		 1862}
1863module_init(wm8753_modinit);
1864
1865static void __exit wm8753_exit(void)
1866{
c2bac160
MB		 1867#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1868 i2c_del_driver(&wm8753_i2c_driver);
1869#endif
1870#if defined(CONFIG_SPI_MASTER)
1871 spi_unregister_driver(&wm8753_spi_driver);
1872#endif
64089b84
MB		 1873}
1874module_exit(wm8753_exit);
1875
1f53aee0
LG		 1876MODULE_DESCRIPTION("ASoC WM8753 driver");
1877MODULE_AUTHOR("Liam Girdwood");
1878MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)