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abadfc92 RP |
1 | /* |
2 | * wm8750.c -- WM8750 ALSA SoC audio driver | |
3 | * | |
4 | * Copyright 2005 Openedhand Ltd. | |
5 | * | |
6 | * Author: Richard Purdie <richard@openedhand.com> | |
7 | * | |
8 | * Based on WM8753.c | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/platform_device.h> | |
2f3dfaf5 | 22 | #include <linux/spi/spi.h> |
5a0e3ad6 | 23 | #include <linux/slab.h> |
abadfc92 RP |
24 | #include <sound/core.h> |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
28 | #include <sound/soc-dapm.h> | |
29 | #include <sound/initval.h> | |
30 | ||
31 | #include "wm8750.h" | |
32 | ||
abadfc92 RP |
33 | /* |
34 | * wm8750 register cache | |
35 | * We can't read the WM8750 register space when we | |
36 | * are using 2 wire for device control, so we cache them instead. | |
37 | */ | |
38 | static const u16 wm8750_reg[] = { | |
39 | 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ | |
40 | 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ | |
41 | 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ | |
42 | 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ | |
43 | 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ | |
44 | 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ | |
45 | 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ | |
46 | 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ | |
47 | 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ | |
48 | 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ | |
49 | 0x0079, 0x0079, 0x0079, /* 40 */ | |
50 | }; | |
51 | ||
6ca0c22e MV |
52 | /* codec private data */ |
53 | struct wm8750_priv { | |
54 | unsigned int sysclk; | |
55 | struct snd_soc_codec codec; | |
56 | u16 reg_cache[ARRAY_SIZE(wm8750_reg)]; | |
57 | }; | |
58 | ||
17a52fd6 | 59 | #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0) |
abadfc92 RP |
60 | |
61 | /* | |
62 | * WM8750 Controls | |
63 | */ | |
64 | static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; | |
65 | static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; | |
66 | static const char *wm8750_treble[] = {"8kHz", "4kHz"}; | |
67 | static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"}; | |
68 | static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; | |
69 | static const char *wm8750_3d_func[] = {"Capture", "Playback"}; | |
70 | static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; | |
71 | static const char *wm8750_ng_type[] = {"Constant PGA Gain", | |
72 | "Mute ADC Output"}; | |
73 | static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", | |
74 | "Differential"}; | |
75 | static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", | |
76 | "Differential"}; | |
77 | static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", | |
78 | "ROUT1"}; | |
79 | static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"}; | |
80 | static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", | |
81 | "L + R Invert"}; | |
82 | static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; | |
83 | static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)", | |
84 | "Mono (Right)", "Digital Mono"}; | |
85 | ||
86 | static const struct soc_enum wm8750_enum[] = { | |
87 | SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), | |
88 | SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), | |
89 | SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), | |
90 | SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), | |
91 | SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), | |
92 | SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), | |
93 | SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), | |
94 | SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), | |
95 | SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), | |
96 | SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), | |
97 | SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ | |
98 | SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), | |
99 | SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), | |
100 | SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), | |
101 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), | |
102 | SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), | |
103 | SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ | |
104 | ||
105 | }; | |
106 | ||
107 | static const struct snd_kcontrol_new wm8750_snd_controls[] = { | |
108 | ||
109 | SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), | |
110 | SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), | |
111 | SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), | |
112 | ||
bd903b6e | 113 | SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V, |
abadfc92 | 114 | WM8750_ROUT1V, 7, 1, 0), |
bd903b6e | 115 | SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V, |
abadfc92 RP |
116 | WM8750_ROUT2V, 7, 1, 0), |
117 | ||
118 | SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), | |
119 | ||
120 | SOC_ENUM("Capture Polarity", wm8750_enum[14]), | |
121 | SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), | |
122 | SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), | |
123 | ||
124 | SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), | |
125 | ||
126 | SOC_ENUM("Bass Boost", wm8750_enum[0]), | |
127 | SOC_ENUM("Bass Filter", wm8750_enum[1]), | |
128 | SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), | |
129 | ||
6a7b8cf4 | 130 | SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1), |
abadfc92 RP |
131 | SOC_ENUM("Treble Cut-off", wm8750_enum[2]), |
132 | ||
133 | SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), | |
134 | SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), | |
135 | SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), | |
136 | SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), | |
137 | SOC_ENUM("3D Mode", wm8750_enum[5]), | |
138 | ||
139 | SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), | |
140 | SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), | |
141 | SOC_ENUM("ALC Capture Function", wm8750_enum[6]), | |
142 | SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), | |
143 | SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), | |
144 | SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), | |
145 | SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), | |
146 | SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), | |
147 | SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), | |
148 | SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), | |
149 | ||
150 | SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), | |
151 | SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), | |
152 | ||
153 | SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), | |
154 | SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), | |
155 | ||
bd903b6e | 156 | SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), |
abadfc92 RP |
157 | |
158 | /* Unimplemented */ | |
159 | /* ADCDAC Bit 0 - ADCHPD */ | |
160 | /* ADCDAC Bit 4 - HPOR */ | |
161 | /* ADCTL1 Bit 2,3 - DATSEL */ | |
162 | /* ADCTL1 Bit 4,5 - DMONOMIX */ | |
163 | /* ADCTL1 Bit 6,7 - VSEL */ | |
164 | /* ADCTL2 Bit 2 - LRCM */ | |
165 | /* ADCTL2 Bit 3 - TRI */ | |
166 | /* ADCTL3 Bit 5 - HPFLREN */ | |
167 | /* ADCTL3 Bit 6 - VROI */ | |
168 | /* ADCTL3 Bit 7,8 - ADCLRM */ | |
169 | /* ADCIN Bit 4 - LDCM */ | |
170 | /* ADCIN Bit 5 - RDCM */ | |
171 | ||
172 | SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), | |
173 | ||
174 | SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, | |
175 | WM8750_LOUTM2, 4, 7, 1), | |
176 | SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, | |
177 | WM8750_ROUTM2, 4, 7, 1), | |
178 | SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, | |
179 | WM8750_MOUTM2, 4, 7, 1), | |
180 | ||
181 | SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), | |
182 | ||
bd903b6e LG |
183 | SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, |
184 | 0, 127, 0), | |
185 | SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, | |
186 | 0, 127, 0), | |
abadfc92 RP |
187 | |
188 | SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), | |
189 | ||
190 | }; | |
191 | ||
abadfc92 RP |
192 | /* |
193 | * DAPM Controls | |
194 | */ | |
195 | ||
196 | /* Left Mixer */ | |
197 | static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { | |
198 | SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), | |
199 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), | |
200 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), | |
201 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), | |
202 | }; | |
203 | ||
204 | /* Right Mixer */ | |
205 | static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { | |
206 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), | |
207 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), | |
208 | SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), | |
209 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), | |
210 | }; | |
211 | ||
212 | /* Mono Mixer */ | |
213 | static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { | |
214 | SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), | |
215 | SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), | |
216 | SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), | |
217 | SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), | |
218 | }; | |
219 | ||
220 | /* Left Line Mux */ | |
221 | static const struct snd_kcontrol_new wm8750_left_line_controls = | |
222 | SOC_DAPM_ENUM("Route", wm8750_enum[8]); | |
223 | ||
224 | /* Right Line Mux */ | |
225 | static const struct snd_kcontrol_new wm8750_right_line_controls = | |
226 | SOC_DAPM_ENUM("Route", wm8750_enum[9]); | |
227 | ||
228 | /* Left PGA Mux */ | |
229 | static const struct snd_kcontrol_new wm8750_left_pga_controls = | |
230 | SOC_DAPM_ENUM("Route", wm8750_enum[10]); | |
231 | ||
232 | /* Right PGA Mux */ | |
233 | static const struct snd_kcontrol_new wm8750_right_pga_controls = | |
234 | SOC_DAPM_ENUM("Route", wm8750_enum[11]); | |
235 | ||
236 | /* Out 3 Mux */ | |
237 | static const struct snd_kcontrol_new wm8750_out3_controls = | |
238 | SOC_DAPM_ENUM("Route", wm8750_enum[12]); | |
239 | ||
240 | /* Differential Mux */ | |
241 | static const struct snd_kcontrol_new wm8750_diffmux_controls = | |
242 | SOC_DAPM_ENUM("Route", wm8750_enum[13]); | |
243 | ||
244 | /* Mono ADC Mux */ | |
245 | static const struct snd_kcontrol_new wm8750_monomux_controls = | |
246 | SOC_DAPM_ENUM("Route", wm8750_enum[16]); | |
247 | ||
248 | static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { | |
249 | SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, | |
250 | &wm8750_left_mixer_controls[0], | |
251 | ARRAY_SIZE(wm8750_left_mixer_controls)), | |
252 | SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, | |
253 | &wm8750_right_mixer_controls[0], | |
254 | ARRAY_SIZE(wm8750_right_mixer_controls)), | |
255 | SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, | |
256 | &wm8750_mono_mixer_controls[0], | |
257 | ARRAY_SIZE(wm8750_mono_mixer_controls)), | |
258 | ||
259 | SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), | |
260 | SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), | |
261 | SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), | |
262 | SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), | |
263 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), | |
264 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), | |
265 | ||
266 | SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), | |
267 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), | |
268 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), | |
269 | ||
270 | SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, | |
271 | &wm8750_left_pga_controls), | |
272 | SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, | |
273 | &wm8750_right_pga_controls), | |
274 | SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, | |
275 | &wm8750_left_line_controls), | |
276 | SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, | |
277 | &wm8750_right_line_controls), | |
278 | ||
279 | SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), | |
280 | SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), | |
281 | SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), | |
282 | ||
283 | SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, | |
284 | &wm8750_diffmux_controls), | |
285 | SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, | |
286 | &wm8750_monomux_controls), | |
287 | SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, | |
288 | &wm8750_monomux_controls), | |
289 | ||
290 | SND_SOC_DAPM_OUTPUT("LOUT1"), | |
291 | SND_SOC_DAPM_OUTPUT("ROUT1"), | |
292 | SND_SOC_DAPM_OUTPUT("LOUT2"), | |
293 | SND_SOC_DAPM_OUTPUT("ROUT2"), | |
23ba79bd | 294 | SND_SOC_DAPM_OUTPUT("MONO1"), |
abadfc92 | 295 | SND_SOC_DAPM_OUTPUT("OUT3"), |
04489eeb | 296 | SND_SOC_DAPM_OUTPUT("VREF"), |
abadfc92 RP |
297 | |
298 | SND_SOC_DAPM_INPUT("LINPUT1"), | |
299 | SND_SOC_DAPM_INPUT("LINPUT2"), | |
300 | SND_SOC_DAPM_INPUT("LINPUT3"), | |
301 | SND_SOC_DAPM_INPUT("RINPUT1"), | |
302 | SND_SOC_DAPM_INPUT("RINPUT2"), | |
303 | SND_SOC_DAPM_INPUT("RINPUT3"), | |
304 | }; | |
305 | ||
a65f0568 | 306 | static const struct snd_soc_dapm_route audio_map[] = { |
abadfc92 RP |
307 | /* left mixer */ |
308 | {"Left Mixer", "Playback Switch", "Left DAC"}, | |
309 | {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
310 | {"Left Mixer", "Right Playback Switch", "Right DAC"}, | |
311 | {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
312 | ||
313 | /* right mixer */ | |
314 | {"Right Mixer", "Left Playback Switch", "Left DAC"}, | |
315 | {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
316 | {"Right Mixer", "Playback Switch", "Right DAC"}, | |
317 | {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
318 | ||
319 | /* left out 1 */ | |
320 | {"Left Out 1", NULL, "Left Mixer"}, | |
321 | {"LOUT1", NULL, "Left Out 1"}, | |
322 | ||
323 | /* left out 2 */ | |
324 | {"Left Out 2", NULL, "Left Mixer"}, | |
325 | {"LOUT2", NULL, "Left Out 2"}, | |
326 | ||
327 | /* right out 1 */ | |
328 | {"Right Out 1", NULL, "Right Mixer"}, | |
329 | {"ROUT1", NULL, "Right Out 1"}, | |
330 | ||
331 | /* right out 2 */ | |
332 | {"Right Out 2", NULL, "Right Mixer"}, | |
333 | {"ROUT2", NULL, "Right Out 2"}, | |
334 | ||
335 | /* mono mixer */ | |
336 | {"Mono Mixer", "Left Playback Switch", "Left DAC"}, | |
337 | {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, | |
338 | {"Mono Mixer", "Right Playback Switch", "Right DAC"}, | |
339 | {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, | |
340 | ||
341 | /* mono out */ | |
342 | {"Mono Out 1", NULL, "Mono Mixer"}, | |
343 | {"MONO1", NULL, "Mono Out 1"}, | |
344 | ||
345 | /* out 3 */ | |
346 | {"Out3 Mux", "VREF", "VREF"}, | |
347 | {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, | |
348 | {"Out3 Mux", "ROUT1", "Right Mixer"}, | |
349 | {"Out3 Mux", "MonoOut", "MONO1"}, | |
350 | {"Out 3", NULL, "Out3 Mux"}, | |
351 | {"OUT3", NULL, "Out 3"}, | |
352 | ||
353 | /* Left Line Mux */ | |
354 | {"Left Line Mux", "Line 1", "LINPUT1"}, | |
355 | {"Left Line Mux", "Line 2", "LINPUT2"}, | |
356 | {"Left Line Mux", "Line 3", "LINPUT3"}, | |
357 | {"Left Line Mux", "PGA", "Left PGA Mux"}, | |
358 | {"Left Line Mux", "Differential", "Differential Mux"}, | |
359 | ||
360 | /* Right Line Mux */ | |
361 | {"Right Line Mux", "Line 1", "RINPUT1"}, | |
362 | {"Right Line Mux", "Line 2", "RINPUT2"}, | |
363 | {"Right Line Mux", "Line 3", "RINPUT3"}, | |
364 | {"Right Line Mux", "PGA", "Right PGA Mux"}, | |
365 | {"Right Line Mux", "Differential", "Differential Mux"}, | |
366 | ||
367 | /* Left PGA Mux */ | |
368 | {"Left PGA Mux", "Line 1", "LINPUT1"}, | |
369 | {"Left PGA Mux", "Line 2", "LINPUT2"}, | |
370 | {"Left PGA Mux", "Line 3", "LINPUT3"}, | |
371 | {"Left PGA Mux", "Differential", "Differential Mux"}, | |
372 | ||
373 | /* Right PGA Mux */ | |
374 | {"Right PGA Mux", "Line 1", "RINPUT1"}, | |
375 | {"Right PGA Mux", "Line 2", "RINPUT2"}, | |
376 | {"Right PGA Mux", "Line 3", "RINPUT3"}, | |
377 | {"Right PGA Mux", "Differential", "Differential Mux"}, | |
378 | ||
379 | /* Differential Mux */ | |
380 | {"Differential Mux", "Line 1", "LINPUT1"}, | |
381 | {"Differential Mux", "Line 1", "RINPUT1"}, | |
382 | {"Differential Mux", "Line 2", "LINPUT2"}, | |
383 | {"Differential Mux", "Line 2", "RINPUT2"}, | |
384 | ||
385 | /* Left ADC Mux */ | |
386 | {"Left ADC Mux", "Stereo", "Left PGA Mux"}, | |
387 | {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, | |
388 | {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, | |
389 | ||
390 | /* Right ADC Mux */ | |
391 | {"Right ADC Mux", "Stereo", "Right PGA Mux"}, | |
392 | {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, | |
393 | {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, | |
394 | ||
395 | /* ADC */ | |
396 | {"Left ADC", NULL, "Left ADC Mux"}, | |
397 | {"Right ADC", NULL, "Right ADC Mux"}, | |
abadfc92 RP |
398 | }; |
399 | ||
400 | static int wm8750_add_widgets(struct snd_soc_codec *codec) | |
401 | { | |
a65f0568 MB |
402 | snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets, |
403 | ARRAY_SIZE(wm8750_dapm_widgets)); | |
abadfc92 | 404 | |
a65f0568 | 405 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); |
abadfc92 | 406 | |
abadfc92 RP |
407 | return 0; |
408 | } | |
409 | ||
410 | struct _coeff_div { | |
411 | u32 mclk; | |
412 | u32 rate; | |
413 | u16 fs; | |
414 | u8 sr:5; | |
415 | u8 usb:1; | |
416 | }; | |
417 | ||
418 | /* codec hifi mclk clock divider coefficients */ | |
419 | static const struct _coeff_div coeff_div[] = { | |
420 | /* 8k */ | |
421 | {12288000, 8000, 1536, 0x6, 0x0}, | |
422 | {11289600, 8000, 1408, 0x16, 0x0}, | |
423 | {18432000, 8000, 2304, 0x7, 0x0}, | |
424 | {16934400, 8000, 2112, 0x17, 0x0}, | |
425 | {12000000, 8000, 1500, 0x6, 0x1}, | |
426 | ||
427 | /* 11.025k */ | |
428 | {11289600, 11025, 1024, 0x18, 0x0}, | |
429 | {16934400, 11025, 1536, 0x19, 0x0}, | |
430 | {12000000, 11025, 1088, 0x19, 0x1}, | |
431 | ||
432 | /* 16k */ | |
433 | {12288000, 16000, 768, 0xa, 0x0}, | |
434 | {18432000, 16000, 1152, 0xb, 0x0}, | |
435 | {12000000, 16000, 750, 0xa, 0x1}, | |
436 | ||
437 | /* 22.05k */ | |
438 | {11289600, 22050, 512, 0x1a, 0x0}, | |
439 | {16934400, 22050, 768, 0x1b, 0x0}, | |
440 | {12000000, 22050, 544, 0x1b, 0x1}, | |
441 | ||
442 | /* 32k */ | |
443 | {12288000, 32000, 384, 0xc, 0x0}, | |
444 | {18432000, 32000, 576, 0xd, 0x0}, | |
445 | {12000000, 32000, 375, 0xa, 0x1}, | |
446 | ||
447 | /* 44.1k */ | |
448 | {11289600, 44100, 256, 0x10, 0x0}, | |
449 | {16934400, 44100, 384, 0x11, 0x0}, | |
450 | {12000000, 44100, 272, 0x11, 0x1}, | |
451 | ||
452 | /* 48k */ | |
453 | {12288000, 48000, 256, 0x0, 0x0}, | |
454 | {18432000, 48000, 384, 0x1, 0x0}, | |
455 | {12000000, 48000, 250, 0x0, 0x1}, | |
456 | ||
457 | /* 88.2k */ | |
458 | {11289600, 88200, 128, 0x1e, 0x0}, | |
459 | {16934400, 88200, 192, 0x1f, 0x0}, | |
460 | {12000000, 88200, 136, 0x1f, 0x1}, | |
461 | ||
462 | /* 96k */ | |
463 | {12288000, 96000, 128, 0xe, 0x0}, | |
464 | {18432000, 96000, 192, 0xf, 0x0}, | |
465 | {12000000, 96000, 125, 0xe, 0x1}, | |
466 | }; | |
467 | ||
468 | static inline int get_coeff(int mclk, int rate) | |
469 | { | |
470 | int i; | |
471 | ||
472 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { | |
473 | if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) | |
474 | return i; | |
475 | } | |
a71a468a LG |
476 | |
477 | printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n", | |
478 | mclk, rate); | |
abadfc92 RP |
479 | return -EINVAL; |
480 | } | |
481 | ||
e550e17f | 482 | static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
4422b606 | 483 | int clk_id, unsigned int freq, int dir) |
abadfc92 | 484 | { |
4422b606 | 485 | struct snd_soc_codec *codec = codec_dai->codec; |
b2c812e2 | 486 | struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec); |
4422b606 LG |
487 | |
488 | switch (freq) { | |
489 | case 11289600: | |
490 | case 12000000: | |
491 | case 12288000: | |
492 | case 16934400: | |
493 | case 18432000: | |
494 | wm8750->sysclk = freq; | |
495 | return 0; | |
496 | } | |
497 | return -EINVAL; | |
abadfc92 RP |
498 | } |
499 | ||
e550e17f | 500 | static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai, |
4422b606 | 501 | unsigned int fmt) |
abadfc92 | 502 | { |
4422b606 LG |
503 | struct snd_soc_codec *codec = codec_dai->codec; |
504 | u16 iface = 0; | |
abadfc92 RP |
505 | |
506 | /* set master/slave audio interface */ | |
4422b606 | 507 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
abadfc92 RP |
508 | case SND_SOC_DAIFMT_CBM_CFM: |
509 | iface = 0x0040; | |
510 | break; | |
511 | case SND_SOC_DAIFMT_CBS_CFS: | |
512 | break; | |
4422b606 LG |
513 | default: |
514 | return -EINVAL; | |
abadfc92 RP |
515 | } |
516 | ||
517 | /* interface format */ | |
4422b606 | 518 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
abadfc92 RP |
519 | case SND_SOC_DAIFMT_I2S: |
520 | iface |= 0x0002; | |
521 | break; | |
522 | case SND_SOC_DAIFMT_RIGHT_J: | |
523 | break; | |
524 | case SND_SOC_DAIFMT_LEFT_J: | |
525 | iface |= 0x0001; | |
526 | break; | |
527 | case SND_SOC_DAIFMT_DSP_A: | |
528 | iface |= 0x0003; | |
529 | break; | |
530 | case SND_SOC_DAIFMT_DSP_B: | |
531 | iface |= 0x0013; | |
532 | break; | |
4422b606 LG |
533 | default: |
534 | return -EINVAL; | |
abadfc92 RP |
535 | } |
536 | ||
537 | /* clock inversion */ | |
4422b606 | 538 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
abadfc92 RP |
539 | case SND_SOC_DAIFMT_NB_NF: |
540 | break; | |
541 | case SND_SOC_DAIFMT_IB_IF: | |
542 | iface |= 0x0090; | |
543 | break; | |
544 | case SND_SOC_DAIFMT_IB_NF: | |
545 | iface |= 0x0080; | |
546 | break; | |
547 | case SND_SOC_DAIFMT_NB_IF: | |
548 | iface |= 0x0010; | |
549 | break; | |
4422b606 LG |
550 | default: |
551 | return -EINVAL; | |
abadfc92 RP |
552 | } |
553 | ||
17a52fd6 | 554 | snd_soc_write(codec, WM8750_IFACE, iface); |
4422b606 LG |
555 | return 0; |
556 | } | |
557 | ||
558 | static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, | |
dee89c4d MB |
559 | struct snd_pcm_hw_params *params, |
560 | struct snd_soc_dai *dai) | |
4422b606 LG |
561 | { |
562 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
563 | struct snd_soc_device *socdev = rtd->socdev; | |
6627a653 | 564 | struct snd_soc_codec *codec = socdev->card->codec; |
b2c812e2 | 565 | struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec); |
17a52fd6 MB |
566 | u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3; |
567 | u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0; | |
4422b606 LG |
568 | int coeff = get_coeff(wm8750->sysclk, params_rate(params)); |
569 | ||
570 | /* bit size */ | |
571 | switch (params_format(params)) { | |
572 | case SNDRV_PCM_FORMAT_S16_LE: | |
abadfc92 | 573 | break; |
4422b606 LG |
574 | case SNDRV_PCM_FORMAT_S20_3LE: |
575 | iface |= 0x0004; | |
abadfc92 | 576 | break; |
4422b606 LG |
577 | case SNDRV_PCM_FORMAT_S24_LE: |
578 | iface |= 0x0008; | |
abadfc92 | 579 | break; |
4422b606 LG |
580 | case SNDRV_PCM_FORMAT_S32_LE: |
581 | iface |= 0x000c; | |
abadfc92 RP |
582 | break; |
583 | } | |
584 | ||
585 | /* set iface & srate */ | |
17a52fd6 | 586 | snd_soc_write(codec, WM8750_IFACE, iface); |
4422b606 | 587 | if (coeff >= 0) |
17a52fd6 | 588 | snd_soc_write(codec, WM8750_SRATE, srate | |
4422b606 | 589 | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); |
abadfc92 RP |
590 | |
591 | return 0; | |
592 | } | |
593 | ||
e550e17f | 594 | static int wm8750_mute(struct snd_soc_dai *dai, int mute) |
abadfc92 | 595 | { |
4422b606 | 596 | struct snd_soc_codec *codec = dai->codec; |
17a52fd6 | 597 | u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7; |
4422b606 | 598 | |
abadfc92 | 599 | if (mute) |
17a52fd6 | 600 | snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8); |
abadfc92 | 601 | else |
17a52fd6 | 602 | snd_soc_write(codec, WM8750_ADCDAC, mute_reg); |
abadfc92 RP |
603 | return 0; |
604 | } | |
605 | ||
0be9898a MB |
606 | static int wm8750_set_bias_level(struct snd_soc_codec *codec, |
607 | enum snd_soc_bias_level level) | |
abadfc92 | 608 | { |
17a52fd6 | 609 | u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e; |
abadfc92 | 610 | |
0be9898a MB |
611 | switch (level) { |
612 | case SND_SOC_BIAS_ON: | |
abadfc92 | 613 | /* set vmid to 50k and unmute dac */ |
17a52fd6 | 614 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); |
abadfc92 | 615 | break; |
0be9898a | 616 | case SND_SOC_BIAS_PREPARE: |
abadfc92 | 617 | break; |
0be9898a | 618 | case SND_SOC_BIAS_STANDBY: |
dd76769d MB |
619 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
620 | /* Set VMID to 5k */ | |
621 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); | |
622 | ||
623 | /* ...and ramp */ | |
624 | msleep(1000); | |
625 | } | |
626 | ||
abadfc92 | 627 | /* mute dac and set vmid to 500k, enable VREF */ |
17a52fd6 | 628 | snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141); |
abadfc92 | 629 | break; |
0be9898a | 630 | case SND_SOC_BIAS_OFF: |
17a52fd6 | 631 | snd_soc_write(codec, WM8750_PWR1, 0x0001); |
abadfc92 RP |
632 | break; |
633 | } | |
0be9898a | 634 | codec->bias_level = level; |
abadfc92 RP |
635 | return 0; |
636 | } | |
637 | ||
4422b606 | 638 | #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ |
42f3030f MB |
639 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ |
640 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | |
4422b606 LG |
641 | |
642 | #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
643 | SNDRV_PCM_FMTBIT_S24_LE) | |
644 | ||
6335d055 EM |
645 | static struct snd_soc_dai_ops wm8750_dai_ops = { |
646 | .hw_params = wm8750_pcm_hw_params, | |
647 | .digital_mute = wm8750_mute, | |
648 | .set_fmt = wm8750_set_dai_fmt, | |
649 | .set_sysclk = wm8750_set_dai_sysclk, | |
650 | }; | |
651 | ||
e550e17f | 652 | struct snd_soc_dai wm8750_dai = { |
abadfc92 RP |
653 | .name = "WM8750", |
654 | .playback = { | |
655 | .stream_name = "Playback", | |
656 | .channels_min = 1, | |
657 | .channels_max = 2, | |
4422b606 LG |
658 | .rates = WM8750_RATES, |
659 | .formats = WM8750_FORMATS,}, | |
abadfc92 RP |
660 | .capture = { |
661 | .stream_name = "Capture", | |
662 | .channels_min = 1, | |
663 | .channels_max = 2, | |
4422b606 LG |
664 | .rates = WM8750_RATES, |
665 | .formats = WM8750_FORMATS,}, | |
6335d055 | 666 | .ops = &wm8750_dai_ops, |
abadfc92 RP |
667 | }; |
668 | EXPORT_SYMBOL_GPL(wm8750_dai); | |
669 | ||
abadfc92 RP |
670 | static int wm8750_suspend(struct platform_device *pdev, pm_message_t state) |
671 | { | |
672 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
6627a653 | 673 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 | 674 | |
0be9898a | 675 | wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); |
abadfc92 RP |
676 | return 0; |
677 | } | |
678 | ||
679 | static int wm8750_resume(struct platform_device *pdev) | |
680 | { | |
681 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
6627a653 | 682 | struct snd_soc_codec *codec = socdev->card->codec; |
abadfc92 RP |
683 | int i; |
684 | u8 data[2]; | |
685 | u16 *cache = codec->reg_cache; | |
686 | ||
687 | /* Sync reg_cache with the hardware */ | |
688 | for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { | |
689 | if (i == WM8750_RESET) | |
690 | continue; | |
691 | data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); | |
692 | data[1] = cache[i] & 0x00ff; | |
693 | codec->hw_write(codec->control_data, data, 2); | |
694 | } | |
695 | ||
0be9898a | 696 | wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
abadfc92 | 697 | |
abadfc92 RP |
698 | return 0; |
699 | } | |
700 | ||
6ca0c22e MV |
701 | static struct snd_soc_codec *wm8750_codec; |
702 | ||
703 | static int wm8750_probe(struct platform_device *pdev) | |
704 | { | |
705 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
706 | struct snd_soc_codec *codec; | |
707 | int ret = 0; | |
708 | ||
709 | if (!wm8750_codec) { | |
710 | dev_err(&pdev->dev, "WM8750 codec not yet registered\n"); | |
711 | return -EINVAL; | |
712 | } | |
713 | ||
714 | socdev->card->codec = wm8750_codec; | |
715 | codec = wm8750_codec; | |
716 | ||
717 | /* register pcms */ | |
718 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
719 | if (ret < 0) { | |
720 | printk(KERN_ERR "wm8750: failed to create pcms\n"); | |
721 | goto err; | |
abadfc92 RP |
722 | } |
723 | ||
6ca0c22e MV |
724 | snd_soc_add_controls(codec, wm8750_snd_controls, |
725 | ARRAY_SIZE(wm8750_snd_controls)); | |
726 | wm8750_add_widgets(codec); | |
727 | ||
728 | return 0; | |
729 | ||
730 | err: | |
731 | return ret; | |
732 | } | |
733 | ||
734 | /* power down chip */ | |
735 | static int wm8750_remove(struct platform_device *pdev) | |
736 | { | |
737 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
738 | ||
739 | snd_soc_free_pcms(socdev); | |
740 | snd_soc_dapm_free(socdev); | |
741 | ||
abadfc92 RP |
742 | return 0; |
743 | } | |
744 | ||
6ca0c22e MV |
745 | struct snd_soc_codec_device soc_codec_dev_wm8750 = { |
746 | .probe = wm8750_probe, | |
747 | .remove = wm8750_remove, | |
748 | .suspend = wm8750_suspend, | |
749 | .resume = wm8750_resume, | |
750 | }; | |
751 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750); | |
752 | ||
abadfc92 RP |
753 | /* |
754 | * initialise the WM8750 driver | |
755 | * register the mixer and dsp interfaces with the kernel | |
756 | */ | |
6ca0c22e MV |
757 | static int wm8750_register(struct wm8750_priv *wm8750, |
758 | enum snd_soc_control_type control) | |
abadfc92 | 759 | { |
6ca0c22e | 760 | struct snd_soc_codec *codec = &wm8750->codec; |
abadfc92 RP |
761 | int reg, ret = 0; |
762 | ||
6ca0c22e MV |
763 | if (wm8750_codec) { |
764 | dev_err(codec->dev, "Multiple WM8750 devices not supported\n"); | |
765 | ret = -EINVAL; | |
766 | goto err; | |
767 | } | |
768 | ||
769 | mutex_init(&codec->mutex); | |
770 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
771 | INIT_LIST_HEAD(&codec->dapm_paths); | |
772 | ||
abadfc92 RP |
773 | codec->name = "WM8750"; |
774 | codec->owner = THIS_MODULE; | |
6ca0c22e | 775 | codec->bias_level = SND_SOC_BIAS_STANDBY; |
0be9898a | 776 | codec->set_bias_level = wm8750_set_bias_level; |
abadfc92 RP |
777 | codec->dai = &wm8750_dai; |
778 | codec->num_dai = 1; | |
6ca0c22e MV |
779 | codec->reg_cache_size = ARRAY_SIZE(wm8750->reg_cache) + 1; |
780 | codec->reg_cache = &wm8750->reg_cache; | |
b2c812e2 | 781 | snd_soc_codec_set_drvdata(codec, wm8750); |
6ca0c22e MV |
782 | |
783 | memcpy(codec->reg_cache, wm8750_reg, sizeof(wm8750->reg_cache)); | |
abadfc92 | 784 | |
7084a42b | 785 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, control); |
17a52fd6 MB |
786 | if (ret < 0) { |
787 | printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret); | |
788 | goto err; | |
789 | } | |
790 | ||
791 | ret = wm8750_reset(codec); | |
792 | if (ret < 0) { | |
793 | printk(KERN_ERR "wm8750: failed to reset: %d\n", ret); | |
794 | goto err; | |
795 | } | |
abadfc92 | 796 | |
abadfc92 | 797 | /* charge output caps */ |
dd76769d | 798 | wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
abadfc92 RP |
799 | |
800 | /* set the update bits */ | |
17a52fd6 MB |
801 | reg = snd_soc_read(codec, WM8750_LDAC); |
802 | snd_soc_write(codec, WM8750_LDAC, reg | 0x0100); | |
803 | reg = snd_soc_read(codec, WM8750_RDAC); | |
804 | snd_soc_write(codec, WM8750_RDAC, reg | 0x0100); | |
805 | reg = snd_soc_read(codec, WM8750_LOUT1V); | |
806 | snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100); | |
807 | reg = snd_soc_read(codec, WM8750_ROUT1V); | |
808 | snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100); | |
809 | reg = snd_soc_read(codec, WM8750_LOUT2V); | |
810 | snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100); | |
811 | reg = snd_soc_read(codec, WM8750_ROUT2V); | |
812 | snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100); | |
813 | reg = snd_soc_read(codec, WM8750_LINVOL); | |
814 | snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100); | |
815 | reg = snd_soc_read(codec, WM8750_RINVOL); | |
816 | snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100); | |
abadfc92 | 817 | |
6ca0c22e | 818 | wm8750_codec = codec; |
abadfc92 | 819 | |
6ca0c22e MV |
820 | ret = snd_soc_register_codec(codec); |
821 | if (ret != 0) { | |
822 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); | |
823 | goto err; | |
824 | } | |
825 | ||
826 | ret = snd_soc_register_dais(&wm8750_dai, 1); | |
827 | if (ret != 0) { | |
828 | dev_err(codec->dev, "Failed to register DAIs: %d\n", ret); | |
829 | goto err_codec; | |
830 | } | |
831 | ||
832 | return 0; | |
833 | ||
834 | err_codec: | |
835 | snd_soc_unregister_codec(codec); | |
17a52fd6 | 836 | err: |
6ca0c22e | 837 | kfree(wm8750); |
abadfc92 RP |
838 | return ret; |
839 | } | |
840 | ||
6ca0c22e MV |
841 | static void wm8750_unregister(struct wm8750_priv *wm8750) |
842 | { | |
843 | wm8750_set_bias_level(&wm8750->codec, SND_SOC_BIAS_OFF); | |
844 | snd_soc_unregister_dais(&wm8750_dai, 1); | |
845 | snd_soc_unregister_codec(&wm8750->codec); | |
846 | kfree(wm8750); | |
847 | wm8750_codec = NULL; | |
848 | } | |
abadfc92 | 849 | |
42f3030f | 850 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 RP |
851 | |
852 | /* | |
2f3dfaf5 | 853 | * WM8750 2 wire address is determined by GPIO5 |
abadfc92 RP |
854 | * state during powerup. |
855 | * low = 0x1a | |
856 | * high = 0x1b | |
857 | */ | |
abadfc92 | 858 | |
ee1d0099 JD |
859 | static int wm8750_i2c_probe(struct i2c_client *i2c, |
860 | const struct i2c_device_id *id) | |
abadfc92 | 861 | { |
6ca0c22e MV |
862 | struct snd_soc_codec *codec; |
863 | struct wm8750_priv *wm8750; | |
abadfc92 | 864 | |
6ca0c22e MV |
865 | wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); |
866 | if (wm8750 == NULL) | |
867 | return -ENOMEM; | |
abadfc92 | 868 | |
6ca0c22e | 869 | codec = &wm8750->codec; |
abadfc92 | 870 | codec->control_data = i2c; |
6ca0c22e | 871 | i2c_set_clientdata(i2c, wm8750); |
abadfc92 | 872 | |
6ca0c22e | 873 | codec->dev = &i2c->dev; |
abadfc92 | 874 | |
6ca0c22e | 875 | return wm8750_register(wm8750, SND_SOC_I2C); |
abadfc92 RP |
876 | } |
877 | ||
ee1d0099 | 878 | static int wm8750_i2c_remove(struct i2c_client *client) |
abadfc92 | 879 | { |
6ca0c22e MV |
880 | struct wm8750_priv *wm8750 = i2c_get_clientdata(client); |
881 | wm8750_unregister(wm8750); | |
abadfc92 RP |
882 | return 0; |
883 | } | |
884 | ||
ee1d0099 JD |
885 | static const struct i2c_device_id wm8750_i2c_id[] = { |
886 | { "wm8750", 0 }, | |
0d9c15e4 | 887 | { "wm8987", 0 }, /* WM8987 is register compatible with WM8750 */ |
ee1d0099 JD |
888 | { } |
889 | }; | |
890 | MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id); | |
abadfc92 | 891 | |
abadfc92 RP |
892 | static struct i2c_driver wm8750_i2c_driver = { |
893 | .driver = { | |
894 | .name = "WM8750 I2C Codec", | |
895 | .owner = THIS_MODULE, | |
896 | }, | |
ee1d0099 JD |
897 | .probe = wm8750_i2c_probe, |
898 | .remove = wm8750_i2c_remove, | |
899 | .id_table = wm8750_i2c_id, | |
abadfc92 | 900 | }; |
abadfc92 RP |
901 | #endif |
902 | ||
2f3dfaf5 MB |
903 | #if defined(CONFIG_SPI_MASTER) |
904 | static int __devinit wm8750_spi_probe(struct spi_device *spi) | |
905 | { | |
6ca0c22e MV |
906 | struct snd_soc_codec *codec; |
907 | struct wm8750_priv *wm8750; | |
2f3dfaf5 | 908 | |
6ca0c22e MV |
909 | wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); |
910 | if (wm8750 == NULL) | |
911 | return -ENOMEM; | |
2f3dfaf5 | 912 | |
6ca0c22e | 913 | codec = &wm8750->codec; |
2f3dfaf5 | 914 | codec->control_data = spi; |
6ca0c22e | 915 | codec->dev = &spi->dev; |
2f3dfaf5 | 916 | |
6ca0c22e | 917 | dev_set_drvdata(&spi->dev, wm8750); |
2f3dfaf5 | 918 | |
6ca0c22e | 919 | return wm8750_register(wm8750, SND_SOC_SPI); |
2f3dfaf5 MB |
920 | } |
921 | ||
922 | static int __devexit wm8750_spi_remove(struct spi_device *spi) | |
923 | { | |
6ca0c22e MV |
924 | struct wm8750_priv *wm8750 = dev_get_drvdata(&spi->dev); |
925 | wm8750_unregister(wm8750); | |
2f3dfaf5 MB |
926 | return 0; |
927 | } | |
928 | ||
0d9c15e4 MC |
929 | static const struct spi_device_id wm8750_spi_id[] = { |
930 | { "wm8750", 0 }, | |
931 | { "wm8987", 0 }, | |
932 | { } | |
933 | }; | |
934 | MODULE_DEVICE_TABLE(spi, wm8750_spi_id); | |
935 | ||
2f3dfaf5 MB |
936 | static struct spi_driver wm8750_spi_driver = { |
937 | .driver = { | |
0d9c15e4 | 938 | .name = "WM8750 SPI Codec", |
2f3dfaf5 MB |
939 | .bus = &spi_bus_type, |
940 | .owner = THIS_MODULE, | |
941 | }, | |
942 | .probe = wm8750_spi_probe, | |
943 | .remove = __devexit_p(wm8750_spi_remove), | |
0d9c15e4 | 944 | .id_table = wm8750_spi_id, |
2f3dfaf5 | 945 | }; |
2f3dfaf5 MB |
946 | #endif |
947 | ||
6ca0c22e | 948 | static int __init wm8750_modinit(void) |
abadfc92 | 949 | { |
b7c9d852 | 950 | int ret; |
42f3030f | 951 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
6ca0c22e MV |
952 | ret = i2c_add_driver(&wm8750_i2c_driver); |
953 | if (ret != 0) | |
954 | pr_err("Failed to register WM8750 I2C driver: %d\n", ret); | |
abadfc92 | 955 | #endif |
2f3dfaf5 | 956 | #if defined(CONFIG_SPI_MASTER) |
6ca0c22e MV |
957 | ret = spi_register_driver(&wm8750_spi_driver); |
958 | if (ret != 0) | |
959 | pr_err("Failed to register WM8750 SPI driver: %d\n", ret); | |
2f3dfaf5 | 960 | #endif |
6ca0c22e | 961 | return 0; |
4422b606 | 962 | } |
6ca0c22e | 963 | module_init(wm8750_modinit); |
4422b606 | 964 | |
6ca0c22e | 965 | static void __exit wm8750_exit(void) |
abadfc92 | 966 | { |
42f3030f | 967 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
abadfc92 | 968 | i2c_del_driver(&wm8750_i2c_driver); |
2f3dfaf5 MB |
969 | #endif |
970 | #if defined(CONFIG_SPI_MASTER) | |
971 | spi_unregister_driver(&wm8750_spi_driver); | |
abadfc92 | 972 | #endif |
64089b84 MB |
973 | } |
974 | module_exit(wm8750_exit); | |
975 | ||
abadfc92 RP |
976 | MODULE_DESCRIPTION("ASoC WM8750 driver"); |
977 | MODULE_AUTHOR("Liam Girdwood"); | |
978 | MODULE_LICENSE("GPL"); |