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1dcf98ff MB |
1 | /* |
2 | * wm8523.c -- WM8523 ALSA SoC Audio driver | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/i2c.h> | |
1dcf98ff | 20 | #include <linux/regulator/consumer.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
bf5a85be | 22 | #include <linux/of_device.h> |
1dcf98ff MB |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/pcm_params.h> | |
26 | #include <sound/soc.h> | |
1dcf98ff MB |
27 | #include <sound/initval.h> |
28 | #include <sound/tlv.h> | |
29 | ||
30 | #include "wm8523.h" | |
31 | ||
1dcf98ff MB |
32 | #define WM8523_NUM_SUPPLIES 2 |
33 | static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = { | |
34 | "AVDD", | |
35 | "LINEVDD", | |
36 | }; | |
37 | ||
38 | #define WM8523_NUM_RATES 7 | |
39 | ||
40 | /* codec private data */ | |
41 | struct wm8523_priv { | |
f0fba2ad | 42 | enum snd_soc_control_type control_type; |
1dcf98ff MB |
43 | struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES]; |
44 | unsigned int sysclk; | |
45 | unsigned int rate_constraint_list[WM8523_NUM_RATES]; | |
46 | struct snd_pcm_hw_constraint_list rate_constraint; | |
47 | }; | |
48 | ||
49 | static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = { | |
50 | 0x8523, /* R0 - DEVICE_ID */ | |
51 | 0x0001, /* R1 - REVISION */ | |
52 | 0x0000, /* R2 - PSCTRL1 */ | |
53 | 0x1812, /* R3 - AIF_CTRL1 */ | |
54 | 0x0000, /* R4 - AIF_CTRL2 */ | |
55 | 0x0001, /* R5 - DAC_CTRL3 */ | |
56 | 0x0190, /* R6 - DAC_GAINL */ | |
57 | 0x0190, /* R7 - DAC_GAINR */ | |
58 | 0x0000, /* R8 - ZERO_DETECT */ | |
59 | }; | |
60 | ||
d4754ec9 | 61 | static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg) |
1dcf98ff MB |
62 | { |
63 | switch (reg) { | |
64 | case WM8523_DEVICE_ID: | |
65 | case WM8523_REVISION: | |
66 | return 1; | |
67 | default: | |
68 | return 0; | |
69 | } | |
70 | } | |
71 | ||
1dcf98ff MB |
72 | static int wm8523_reset(struct snd_soc_codec *codec) |
73 | { | |
8d50e447 | 74 | return snd_soc_write(codec, WM8523_DEVICE_ID, 0); |
1dcf98ff MB |
75 | } |
76 | ||
77 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0); | |
78 | ||
79 | static const char *wm8523_zd_count_text[] = { | |
80 | "1024", | |
81 | "2048", | |
82 | }; | |
83 | ||
84 | static const struct soc_enum wm8523_zc_count = | |
85 | SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text); | |
86 | ||
1661699a | 87 | static const struct snd_kcontrol_new wm8523_controls[] = { |
1dcf98ff MB |
88 | SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR, |
89 | 0, 448, 0, dac_tlv), | |
90 | SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0), | |
91 | SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0), | |
92 | SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1), | |
93 | SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0), | |
94 | SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0), | |
95 | SOC_ENUM("Zero Detect Count", wm8523_zc_count), | |
96 | }; | |
97 | ||
98 | static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = { | |
99 | SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0), | |
100 | SND_SOC_DAPM_OUTPUT("LINEVOUTL"), | |
101 | SND_SOC_DAPM_OUTPUT("LINEVOUTR"), | |
102 | }; | |
103 | ||
1661699a | 104 | static const struct snd_soc_dapm_route wm8523_dapm_routes[] = { |
1dcf98ff MB |
105 | { "LINEVOUTL", NULL, "DAC" }, |
106 | { "LINEVOUTR", NULL, "DAC" }, | |
107 | }; | |
108 | ||
1dcf98ff MB |
109 | static struct { |
110 | int value; | |
111 | int ratio; | |
112 | } lrclk_ratios[WM8523_NUM_RATES] = { | |
113 | { 1, 128 }, | |
114 | { 2, 192 }, | |
115 | { 3, 256 }, | |
116 | { 4, 384 }, | |
117 | { 5, 512 }, | |
118 | { 6, 768 }, | |
119 | { 7, 1152 }, | |
120 | }; | |
121 | ||
122 | static int wm8523_startup(struct snd_pcm_substream *substream, | |
123 | struct snd_soc_dai *dai) | |
124 | { | |
125 | struct snd_soc_codec *codec = dai->codec; | |
b2c812e2 | 126 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
127 | |
128 | /* The set of sample rates that can be supported depends on the | |
129 | * MCLK supplied to the CODEC - enforce this. | |
130 | */ | |
131 | if (!wm8523->sysclk) { | |
132 | dev_err(codec->dev, | |
133 | "No MCLK configured, call set_sysclk() on init\n"); | |
134 | return -EINVAL; | |
135 | } | |
136 | ||
1dcf98ff MB |
137 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
138 | SNDRV_PCM_HW_PARAM_RATE, | |
139 | &wm8523->rate_constraint); | |
140 | ||
141 | return 0; | |
142 | } | |
143 | ||
144 | static int wm8523_hw_params(struct snd_pcm_substream *substream, | |
145 | struct snd_pcm_hw_params *params, | |
146 | struct snd_soc_dai *dai) | |
147 | { | |
e6968a17 | 148 | struct snd_soc_codec *codec = dai->codec; |
b2c812e2 | 149 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff | 150 | int i; |
8d50e447 MB |
151 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
152 | u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2); | |
1dcf98ff MB |
153 | |
154 | /* Find a supported LRCLK ratio */ | |
155 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
156 | if (wm8523->sysclk / params_rate(params) == | |
157 | lrclk_ratios[i].ratio) | |
158 | break; | |
159 | } | |
160 | ||
161 | /* Should never happen, should be handled by constraints */ | |
162 | if (i == ARRAY_SIZE(lrclk_ratios)) { | |
163 | dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n", | |
164 | wm8523->sysclk / params_rate(params)); | |
165 | return -EINVAL; | |
166 | } | |
167 | ||
168 | aifctrl2 &= ~WM8523_SR_MASK; | |
169 | aifctrl2 |= lrclk_ratios[i].value; | |
170 | ||
171 | aifctrl1 &= ~WM8523_WL_MASK; | |
172 | switch (params_format(params)) { | |
173 | case SNDRV_PCM_FORMAT_S16_LE: | |
174 | break; | |
175 | case SNDRV_PCM_FORMAT_S20_3LE: | |
176 | aifctrl1 |= 0x8; | |
177 | break; | |
178 | case SNDRV_PCM_FORMAT_S24_LE: | |
179 | aifctrl1 |= 0x10; | |
180 | break; | |
181 | case SNDRV_PCM_FORMAT_S32_LE: | |
182 | aifctrl1 |= 0x18; | |
183 | break; | |
184 | } | |
185 | ||
8d50e447 MB |
186 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
187 | snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2); | |
1dcf98ff MB |
188 | |
189 | return 0; | |
190 | } | |
191 | ||
192 | static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
193 | int clk_id, unsigned int freq, int dir) | |
194 | { | |
195 | struct snd_soc_codec *codec = codec_dai->codec; | |
b2c812e2 | 196 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
1dcf98ff MB |
197 | unsigned int val; |
198 | int i; | |
199 | ||
200 | wm8523->sysclk = freq; | |
201 | ||
202 | wm8523->rate_constraint.count = 0; | |
203 | for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { | |
204 | val = freq / lrclk_ratios[i].ratio; | |
205 | /* Check that it's a standard rate since core can't | |
206 | * cope with others and having the odd rates confuses | |
207 | * constraint matching. | |
208 | */ | |
209 | switch (val) { | |
210 | case 8000: | |
211 | case 11025: | |
212 | case 16000: | |
213 | case 22050: | |
214 | case 32000: | |
215 | case 44100: | |
216 | case 48000: | |
217 | case 64000: | |
218 | case 88200: | |
219 | case 96000: | |
220 | case 176400: | |
221 | case 192000: | |
222 | dev_dbg(codec->dev, "Supported sample rate: %dHz\n", | |
223 | val); | |
224 | wm8523->rate_constraint_list[i] = val; | |
225 | wm8523->rate_constraint.count++; | |
226 | break; | |
227 | default: | |
228 | dev_dbg(codec->dev, "Skipping sample rate: %dHz\n", | |
229 | val); | |
230 | } | |
231 | } | |
232 | ||
233 | /* Need at least one supported rate... */ | |
234 | if (wm8523->rate_constraint.count == 0) | |
235 | return -EINVAL; | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | ||
241 | static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
242 | unsigned int fmt) | |
243 | { | |
244 | struct snd_soc_codec *codec = codec_dai->codec; | |
8d50e447 | 245 | u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); |
1dcf98ff MB |
246 | |
247 | aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK | | |
248 | WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK); | |
249 | ||
250 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
251 | case SND_SOC_DAIFMT_CBM_CFM: | |
252 | aifctrl1 |= WM8523_AIF_MSTR; | |
253 | break; | |
254 | case SND_SOC_DAIFMT_CBS_CFS: | |
255 | break; | |
256 | default: | |
257 | return -EINVAL; | |
258 | } | |
259 | ||
260 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
261 | case SND_SOC_DAIFMT_I2S: | |
262 | aifctrl1 |= 0x0002; | |
263 | break; | |
264 | case SND_SOC_DAIFMT_RIGHT_J: | |
265 | break; | |
266 | case SND_SOC_DAIFMT_LEFT_J: | |
267 | aifctrl1 |= 0x0001; | |
268 | break; | |
269 | case SND_SOC_DAIFMT_DSP_A: | |
270 | aifctrl1 |= 0x0003; | |
271 | break; | |
272 | case SND_SOC_DAIFMT_DSP_B: | |
273 | aifctrl1 |= 0x0023; | |
274 | break; | |
275 | default: | |
276 | return -EINVAL; | |
277 | } | |
278 | ||
279 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
280 | case SND_SOC_DAIFMT_NB_NF: | |
281 | break; | |
282 | case SND_SOC_DAIFMT_IB_IF: | |
283 | aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV; | |
284 | break; | |
285 | case SND_SOC_DAIFMT_IB_NF: | |
286 | aifctrl1 |= WM8523_BCLK_INV; | |
287 | break; | |
288 | case SND_SOC_DAIFMT_NB_IF: | |
289 | aifctrl1 |= WM8523_LRCLK_INV; | |
290 | break; | |
291 | default: | |
292 | return -EINVAL; | |
293 | } | |
294 | ||
8d50e447 | 295 | snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); |
1dcf98ff MB |
296 | |
297 | return 0; | |
298 | } | |
299 | ||
300 | static int wm8523_set_bias_level(struct snd_soc_codec *codec, | |
301 | enum snd_soc_bias_level level) | |
302 | { | |
b2c812e2 | 303 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
beebca31 | 304 | u16 *reg_cache = codec->reg_cache; |
1dcf98ff MB |
305 | int ret, i; |
306 | ||
307 | switch (level) { | |
308 | case SND_SOC_BIAS_ON: | |
309 | break; | |
310 | ||
311 | case SND_SOC_BIAS_PREPARE: | |
312 | /* Full power on */ | |
313 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
314 | WM8523_SYS_ENA_MASK, 3); | |
315 | break; | |
316 | ||
317 | case SND_SOC_BIAS_STANDBY: | |
ce6120cc | 318 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1dcf98ff MB |
319 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), |
320 | wm8523->supplies); | |
321 | if (ret != 0) { | |
322 | dev_err(codec->dev, | |
323 | "Failed to enable supplies: %d\n", | |
324 | ret); | |
325 | return ret; | |
326 | } | |
327 | ||
328 | /* Initial power up */ | |
329 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
330 | WM8523_SYS_ENA_MASK, 1); | |
331 | ||
332 | /* Sync back default/cached values */ | |
333 | for (i = WM8523_AIF_CTRL1; | |
334 | i < WM8523_MAX_REGISTER; i++) | |
beebca31 | 335 | snd_soc_write(codec, i, reg_cache[i]); |
1dcf98ff MB |
336 | |
337 | ||
338 | msleep(100); | |
339 | } | |
340 | ||
341 | /* Power up to mute */ | |
342 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
343 | WM8523_SYS_ENA_MASK, 2); | |
344 | ||
345 | break; | |
346 | ||
347 | case SND_SOC_BIAS_OFF: | |
348 | /* The chip runs through the power down sequence for us. */ | |
349 | snd_soc_update_bits(codec, WM8523_PSCTRL1, | |
350 | WM8523_SYS_ENA_MASK, 0); | |
351 | msleep(100); | |
352 | ||
353 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), | |
354 | wm8523->supplies); | |
355 | break; | |
356 | } | |
ce6120cc | 357 | codec->dapm.bias_level = level; |
1dcf98ff MB |
358 | return 0; |
359 | } | |
360 | ||
361 | #define WM8523_RATES SNDRV_PCM_RATE_8000_192000 | |
362 | ||
363 | #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
364 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
365 | ||
85e7652d | 366 | static const struct snd_soc_dai_ops wm8523_dai_ops = { |
1dcf98ff MB |
367 | .startup = wm8523_startup, |
368 | .hw_params = wm8523_hw_params, | |
369 | .set_sysclk = wm8523_set_dai_sysclk, | |
370 | .set_fmt = wm8523_set_dai_fmt, | |
371 | }; | |
372 | ||
f0fba2ad LG |
373 | static struct snd_soc_dai_driver wm8523_dai = { |
374 | .name = "wm8523-hifi", | |
1dcf98ff MB |
375 | .playback = { |
376 | .stream_name = "Playback", | |
377 | .channels_min = 2, /* Mono modes not yet supported */ | |
378 | .channels_max = 2, | |
379 | .rates = WM8523_RATES, | |
380 | .formats = WM8523_FORMATS, | |
381 | }, | |
382 | .ops = &wm8523_dai_ops, | |
383 | }; | |
1dcf98ff MB |
384 | |
385 | #ifdef CONFIG_PM | |
84b315ee | 386 | static int wm8523_suspend(struct snd_soc_codec *codec) |
1dcf98ff | 387 | { |
1dcf98ff MB |
388 | wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF); |
389 | return 0; | |
390 | } | |
391 | ||
f0fba2ad | 392 | static int wm8523_resume(struct snd_soc_codec *codec) |
1dcf98ff | 393 | { |
1dcf98ff | 394 | wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1dcf98ff MB |
395 | return 0; |
396 | } | |
397 | #else | |
398 | #define wm8523_suspend NULL | |
399 | #define wm8523_resume NULL | |
400 | #endif | |
401 | ||
f0fba2ad | 402 | static int wm8523_probe(struct snd_soc_codec *codec) |
1dcf98ff | 403 | { |
f0fba2ad LG |
404 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
405 | int ret, i; | |
1dcf98ff MB |
406 | |
407 | wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0]; | |
408 | wm8523->rate_constraint.count = | |
409 | ARRAY_SIZE(wm8523->rate_constraint_list); | |
410 | ||
f0fba2ad | 411 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type); |
8d50e447 MB |
412 | if (ret != 0) { |
413 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | |
f0fba2ad | 414 | return ret; |
8d50e447 MB |
415 | } |
416 | ||
1dcf98ff MB |
417 | for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++) |
418 | wm8523->supplies[i].supply = wm8523_supply_names[i]; | |
419 | ||
420 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies), | |
421 | wm8523->supplies); | |
422 | if (ret != 0) { | |
423 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | |
f0fba2ad | 424 | return ret; |
1dcf98ff MB |
425 | } |
426 | ||
427 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), | |
428 | wm8523->supplies); | |
429 | if (ret != 0) { | |
430 | dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); | |
431 | goto err_get; | |
432 | } | |
433 | ||
8d50e447 | 434 | ret = snd_soc_read(codec, WM8523_DEVICE_ID); |
1dcf98ff MB |
435 | if (ret < 0) { |
436 | dev_err(codec->dev, "Failed to read ID register\n"); | |
437 | goto err_enable; | |
438 | } | |
439 | if (ret != wm8523_reg[WM8523_DEVICE_ID]) { | |
440 | dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret); | |
441 | ret = -EINVAL; | |
442 | goto err_enable; | |
443 | } | |
444 | ||
8d50e447 | 445 | ret = snd_soc_read(codec, WM8523_REVISION); |
1dcf98ff MB |
446 | if (ret < 0) { |
447 | dev_err(codec->dev, "Failed to read revision register\n"); | |
448 | goto err_enable; | |
449 | } | |
450 | dev_info(codec->dev, "revision %c\n", | |
451 | (ret & WM8523_CHIP_REV_MASK) + 'A'); | |
452 | ||
453 | ret = wm8523_reset(codec); | |
454 | if (ret < 0) { | |
455 | dev_err(codec->dev, "Failed to issue reset\n"); | |
456 | goto err_enable; | |
457 | } | |
458 | ||
1dcf98ff | 459 | /* Change some default settings - latch VU and enable ZC */ |
a1b3b5ee MB |
460 | snd_soc_update_bits(codec, WM8523_DAC_GAINR, |
461 | WM8523_DACR_VU, WM8523_DACR_VU); | |
462 | snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC); | |
1dcf98ff MB |
463 | |
464 | wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
465 | ||
466 | /* Bias level configuration will have done an extra enable */ | |
467 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
468 | ||
1dcf98ff MB |
469 | return 0; |
470 | ||
471 | err_enable: | |
472 | regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
473 | err_get: | |
474 | regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); | |
f0fba2ad | 475 | |
1dcf98ff MB |
476 | return ret; |
477 | } | |
478 | ||
f0fba2ad | 479 | static int wm8523_remove(struct snd_soc_codec *codec) |
1dcf98ff | 480 | { |
f0fba2ad LG |
481 | struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); |
482 | ||
483 | wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
1dcf98ff | 484 | regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); |
f0fba2ad | 485 | return 0; |
1dcf98ff MB |
486 | } |
487 | ||
f0fba2ad LG |
488 | static struct snd_soc_codec_driver soc_codec_dev_wm8523 = { |
489 | .probe = wm8523_probe, | |
490 | .remove = wm8523_remove, | |
491 | .suspend = wm8523_suspend, | |
492 | .resume = wm8523_resume, | |
493 | .set_bias_level = wm8523_set_bias_level, | |
494 | .reg_cache_size = WM8523_REGISTER_COUNT, | |
495 | .reg_word_size = sizeof(u16), | |
496 | .reg_cache_default = wm8523_reg, | |
497 | .volatile_register = wm8523_volatile_register, | |
1661699a MB |
498 | |
499 | .controls = wm8523_controls, | |
500 | .num_controls = ARRAY_SIZE(wm8523_controls), | |
501 | .dapm_widgets = wm8523_dapm_widgets, | |
502 | .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets), | |
503 | .dapm_routes = wm8523_dapm_routes, | |
504 | .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes), | |
f0fba2ad LG |
505 | }; |
506 | ||
bf5a85be MB |
507 | static const struct of_device_id wm8523_of_match[] = { |
508 | { .compatible = "wlf,wm8523" }, | |
509 | { }, | |
510 | }; | |
511 | ||
1dcf98ff MB |
512 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
513 | static __devinit int wm8523_i2c_probe(struct i2c_client *i2c, | |
514 | const struct i2c_device_id *id) | |
515 | { | |
516 | struct wm8523_priv *wm8523; | |
f0fba2ad | 517 | int ret; |
1dcf98ff MB |
518 | |
519 | wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL); | |
520 | if (wm8523 == NULL) | |
521 | return -ENOMEM; | |
522 | ||
1dcf98ff | 523 | i2c_set_clientdata(i2c, wm8523); |
f0fba2ad | 524 | wm8523->control_type = SND_SOC_I2C; |
1dcf98ff | 525 | |
f0fba2ad LG |
526 | ret = snd_soc_register_codec(&i2c->dev, |
527 | &soc_codec_dev_wm8523, &wm8523_dai, 1); | |
528 | if (ret < 0) | |
529 | kfree(wm8523); | |
530 | return ret; | |
1dcf98ff | 531 | |
1dcf98ff MB |
532 | } |
533 | ||
534 | static __devexit int wm8523_i2c_remove(struct i2c_client *client) | |
535 | { | |
f0fba2ad LG |
536 | snd_soc_unregister_codec(&client->dev); |
537 | kfree(i2c_get_clientdata(client)); | |
1dcf98ff MB |
538 | return 0; |
539 | } | |
540 | ||
1dcf98ff MB |
541 | static const struct i2c_device_id wm8523_i2c_id[] = { |
542 | { "wm8523", 0 }, | |
543 | { } | |
544 | }; | |
545 | MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id); | |
546 | ||
547 | static struct i2c_driver wm8523_i2c_driver = { | |
548 | .driver = { | |
9665408e | 549 | .name = "wm8523", |
1dcf98ff | 550 | .owner = THIS_MODULE, |
bf5a85be | 551 | .of_match_table = wm8523_of_match, |
1dcf98ff MB |
552 | }, |
553 | .probe = wm8523_i2c_probe, | |
554 | .remove = __devexit_p(wm8523_i2c_remove), | |
1dcf98ff MB |
555 | .id_table = wm8523_i2c_id, |
556 | }; | |
557 | #endif | |
558 | ||
559 | static int __init wm8523_modinit(void) | |
560 | { | |
561 | int ret; | |
562 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
563 | ret = i2c_add_driver(&wm8523_i2c_driver); | |
564 | if (ret != 0) { | |
565 | printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", | |
566 | ret); | |
567 | } | |
568 | #endif | |
569 | return 0; | |
570 | } | |
571 | module_init(wm8523_modinit); | |
572 | ||
573 | static void __exit wm8523_exit(void) | |
574 | { | |
575 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
576 | i2c_del_driver(&wm8523_i2c_driver); | |
577 | #endif | |
578 | } | |
579 | module_exit(wm8523_exit); | |
580 | ||
581 | MODULE_DESCRIPTION("ASoC WM8523 driver"); | |
582 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
583 | MODULE_LICENSE("GPL"); |