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Merge remote-tracking branches 'asoc/topic/vc4_hdmi', 'asoc/topic/wl1273', 'asoc...
[linux-block.git] / sound / soc / codecs / tas2552.c
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5df7f71d
DM		 1/*
2 * tas2552.c - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Dan Murphy <dmurphy@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#include <linux/module.h>
19#include <linux/errno.h>
20#include <linux/device.h>
21#include <linux/i2c.h>
22#include <linux/gpio.h>
23#include <linux/of_gpio.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
26#include <linux/slab.h>
27
28#include <linux/gpio/consumer.h>
29#include <linux/regulator/consumer.h>
30
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/tlv.h>
36#include <sound/tas2552-plat.h>
9d87a888 37#include <dt-bindings/sound/tas2552.h>
5df7f71d
DM		 38
39#include "tas2552.h"
40
c418a84a 41static const struct reg_default tas2552_reg_defs[] = {
5df7f71d
DM		 42 {TAS2552_CFG_1, 0x22},
43 {TAS2552_CFG_3, 0x80},
44 {TAS2552_DOUT, 0x00},
45 {TAS2552_OUTPUT_DATA, 0xc0},
46 {TAS2552_PDM_CFG, 0x01},
47 {TAS2552_PGA_GAIN, 0x00},
2a9dd1db 48 {TAS2552_BOOST_APT_CTRL, 0x0f},
7d785025 49 {TAS2552_RESERVED_0D, 0xbe},
5df7f71d
DM		 50 {TAS2552_LIMIT_RATE_HYS, 0x08},
51 {TAS2552_CFG_2, 0xef},
52 {TAS2552_SER_CTRL_1, 0x00},
53 {TAS2552_SER_CTRL_2, 0x00},
54 {TAS2552_PLL_CTRL_1, 0x10},
55 {TAS2552_PLL_CTRL_2, 0x00},
56 {TAS2552_PLL_CTRL_3, 0x00},
57 {TAS2552_BTIP, 0x8f},
58 {TAS2552_BTS_CTRL, 0x80},
59 {TAS2552_LIMIT_RELEASE, 0x04},
60 {TAS2552_LIMIT_INT_COUNT, 0x00},
61 {TAS2552_EDGE_RATE_CTRL, 0x40},
62 {TAS2552_VBAT_DATA, 0x00},
63};
64
65#define TAS2552_NUM_SUPPLIES 3
66static const char *tas2552_supply_names[TAS2552_NUM_SUPPLIES] = {
67 "vbat", /* vbat voltage */
68 "iovdd", /* I/O Voltage */
69 "avdd", /* Analog DAC Voltage */
70};
71
72struct tas2552_data {
79a4ad1e 73 struct snd_soc_component *component;
5df7f71d
DM		 74 struct regmap *regmap;
75 struct i2c_client *tas2552_client;
76 struct regulator_bulk_data supplies[TAS2552_NUM_SUPPLIES];
77 struct gpio_desc *enable_gpio;
78 unsigned char regs[TAS2552_VBAT_DATA];
16bd3952 79 unsigned int pll_clkin;
1014f7ef 80 int pll_clk_id;
9d87a888 81 unsigned int pdm_clk;
1014f7ef 82 int pdm_clk_id;
3f747a81
PU		 83
84 unsigned int dai_fmt;
85 unsigned int tdm_delay;
5df7f71d
DM		 86};
87
7d785025
PU		 88static int tas2552_post_event(struct snd_soc_dapm_widget *w,
89 struct snd_kcontrol *kcontrol, int event)
90{
79a4ad1e 91 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
7d785025
PU		 92
93 switch (event) {
94 case SND_SOC_DAPM_POST_PMU:
79a4ad1e
KM		 95 snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xc0);
96 snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5),
7d785025 97 (1 << 5));
79a4ad1e
KM		 98 snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 0);
99 snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS, 0);
7d785025
PU		 100 break;
101 case SND_SOC_DAPM_POST_PMD:
79a4ad1e 102 snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_SWS,
7d785025 103 TAS2552_SWS);
79a4ad1e
KM		 104 snd_soc_component_update_bits(component, TAS2552_CFG_2, 1, 1);
105 snd_soc_component_update_bits(component, TAS2552_LIMIT_RATE_HYS, (1 << 5), 0);
106 snd_soc_component_write(component, TAS2552_RESERVED_0D, 0xbe);
7d785025
PU		 107 break;
108 }
109 return 0;
110}
a7a8e994 111
609e7131
PU		 112/* Input mux controls */
113static const char * const tas2552_input_texts[] = {
114 "Digital", "Analog" };
a7a8e994
DM		 115static SOC_ENUM_SINGLE_DECL(tas2552_input_mux_enum, TAS2552_CFG_3, 7,
116 tas2552_input_texts);
117
609e7131
PU		 118static const struct snd_kcontrol_new tas2552_input_mux_control =
119 SOC_DAPM_ENUM("Route", tas2552_input_mux_enum);
a7a8e994
DM		 120
121static const struct snd_soc_dapm_widget tas2552_dapm_widgets[] =
122{
123 SND_SOC_DAPM_INPUT("IN"),
124
125 /* MUX Controls */
126 SND_SOC_DAPM_MUX("Input selection", SND_SOC_NOPM, 0, 0,
609e7131 127 &tas2552_input_mux_control),
a7a8e994
DM		 128
129 SND_SOC_DAPM_AIF_IN("DAC IN", "DAC Playback", 0, SND_SOC_NOPM, 0, 0),
130 SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
131 SND_SOC_DAPM_OUT_DRV("ClassD", TAS2552_CFG_2, 7, 0, NULL, 0),
132 SND_SOC_DAPM_SUPPLY("PLL", TAS2552_CFG_2, 3, 0, NULL, 0),
7d785025 133 SND_SOC_DAPM_POST("Post Event", tas2552_post_event),
a7a8e994
DM		 134
135 SND_SOC_DAPM_OUTPUT("OUT")
136};
137
138static const struct snd_soc_dapm_route tas2552_audio_map[] = {
139 {"DAC", NULL, "DAC IN"},
140 {"Input selection", "Digital", "DAC"},
141 {"Input selection", "Analog", "IN"},
142 {"ClassD", NULL, "Input selection"},
143 {"OUT", NULL, "ClassD"},
144 {"ClassD", NULL, "PLL"},
145};
146
641d334b 147#ifdef CONFIG_PM
b94525bf 148static void tas2552_sw_shutdown(struct tas2552_data *tas2552, int sw_shutdown)
5df7f71d 149{
dd6e3053 150 u8 cfg1_reg = 0;
5df7f71d 151
79a4ad1e 152 if (!tas2552->component)
80ba2669
PU		 153 return;
154
5df7f71d 155 if (sw_shutdown)
7de544fd 156 cfg1_reg = TAS2552_SWS;
5df7f71d 157
79a4ad1e 158 snd_soc_component_update_bits(tas2552->component, TAS2552_CFG_1, TAS2552_SWS,
7de544fd 159 cfg1_reg);
5df7f71d 160}
be1aa3ea 161#endif
5df7f71d 162
79a4ad1e 163static int tas2552_setup_pll(struct snd_soc_component *component,
1014f7ef
PU		 164 struct snd_pcm_hw_params *params)
165{
79a4ad1e 166 struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
1014f7ef
PU		 167 bool bypass_pll = false;
168 unsigned int pll_clk = params_rate(params) * 512;
169 unsigned int pll_clkin = tas2552->pll_clkin;
170 u8 pll_enable;
171
172 if (!pll_clkin) {
173 if (tas2552->pll_clk_id != TAS2552_PLL_CLKIN_BCLK)
174 return -EINVAL;
175
176 pll_clkin = snd_soc_params_to_bclk(params);
177 pll_clkin += tas2552->tdm_delay;
178 }
179
79a4ad1e
KM		 180 pll_enable = snd_soc_component_read32(component, TAS2552_CFG_2) & TAS2552_PLL_ENABLE;
181 snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE, 0);
1014f7ef
PU		 182
183 if (pll_clkin == pll_clk)
184 bypass_pll = true;
185
186 if (bypass_pll) {
187 /* By pass the PLL configuration */
79a4ad1e 188 snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_2,
1014f7ef
PU		 189 TAS2552_PLL_BYPASS, TAS2552_PLL_BYPASS);
190 } else {
191 /* Fill in the PLL control registers for J & D
192 * pll_clk = (.5 * pll_clkin * J.D) / 2^p
193 * Need to fill in J and D here based on incoming freq
194 */
1bb7cb68 195 unsigned int d, q, t;
1014f7ef
PU		 196 u8 j;
197 u8 pll_sel = (tas2552->pll_clk_id << 3) & TAS2552_PLL_SRC_MASK;
79a4ad1e 198 u8 p = snd_soc_component_read32(component, TAS2552_PLL_CTRL_1);
1014f7ef
PU		 199
200 p = (p >> 7);
201
202recalc:
1bb7cb68
OS		 203 t = (pll_clk * 2) << p;
204 j = t / pll_clkin;
205 d = t % pll_clkin;
206 t = pll_clkin / 10000;
207 q = d / (t + 1);
208 d = q + ((9999 - pll_clkin % 10000) * (d / t - q)) / 10000;
1014f7ef
PU		 209
210 if (d && (pll_clkin < 512000 || pll_clkin > 9200000)) {
211 if (tas2552->pll_clk_id == TAS2552_PLL_CLKIN_BCLK) {
212 pll_clkin = 1800000;
213 pll_sel = (TAS2552_PLL_CLKIN_1_8_FIXED << 3) &
214 TAS2552_PLL_SRC_MASK;
215 } else {
216 pll_clkin = snd_soc_params_to_bclk(params);
217 pll_clkin += tas2552->tdm_delay;
218 pll_sel = (TAS2552_PLL_CLKIN_BCLK << 3) &
219 TAS2552_PLL_SRC_MASK;
220 }
221 goto recalc;
222 }
223
79a4ad1e 224 snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_PLL_SRC_MASK,
1014f7ef
PU		 225 pll_sel);
226
79a4ad1e 227 snd_soc_component_update_bits(component, TAS2552_PLL_CTRL_1,
1014f7ef
PU		 228 TAS2552_PLL_J_MASK, j);
229 /* Will clear the PLL_BYPASS bit */
79a4ad1e 230 snd_soc_component_write(component, TAS2552_PLL_CTRL_2,
1014f7ef 231 TAS2552_PLL_D_UPPER(d));
79a4ad1e 232 snd_soc_component_write(component, TAS2552_PLL_CTRL_3,
1014f7ef
PU		 233 TAS2552_PLL_D_LOWER(d));
234 }
235
236 /* Restore PLL status */
79a4ad1e 237 snd_soc_component_update_bits(component, TAS2552_CFG_2, TAS2552_PLL_ENABLE,
1014f7ef
PU		 238 pll_enable);
239
240 return 0;
241}
242
5df7f71d
DM		 243static int tas2552_hw_params(struct snd_pcm_substream *substream,
244 struct snd_pcm_hw_params *params,
245 struct snd_soc_dai *dai)
246{
79a4ad1e
KM		 247 struct snd_soc_component *component = dai->component;
248 struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
d20b098d 249 int cpf;
a571cb17 250 u8 ser_ctrl1_reg, wclk_rate;
d20b098d
PU		 251
252 switch (params_width(params)) {
253 case 16:
254 ser_ctrl1_reg = TAS2552_WORDLENGTH_16BIT;
255 cpf = 32 + tas2552->tdm_delay;
256 break;
257 case 20:
258 ser_ctrl1_reg = TAS2552_WORDLENGTH_20BIT;
259 cpf = 64 + tas2552->tdm_delay;
260 break;
261 case 24:
262 ser_ctrl1_reg = TAS2552_WORDLENGTH_24BIT;
263 cpf = 64 + tas2552->tdm_delay;
264 break;
265 case 32:
266 ser_ctrl1_reg = TAS2552_WORDLENGTH_32BIT;
267 cpf = 64 + tas2552->tdm_delay;
268 break;
269 default:
79a4ad1e 270 dev_err(component->dev, "Not supported sample size: %d\n",
d20b098d
PU		 271 params_width(params));
272 return -EINVAL;
273 }
274
275 if (cpf <= 32)
276 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_32;
277 else if (cpf <= 64)
278 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_64;
279 else if (cpf <= 128)
280 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_128;
281 else
282 ser_ctrl1_reg |= TAS2552_CLKSPERFRAME_256;
283
79a4ad1e 284 snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1,
d20b098d
PU		 285 TAS2552_WORDLENGTH_MASK | TAS2552_CLKSPERFRAME_MASK,
286 ser_ctrl1_reg);
5df7f71d 287
a571cb17
PU		 288 switch (params_rate(params)) {
289 case 8000:
290 wclk_rate = TAS2552_WCLK_FREQ_8KHZ;
291 break;
292 case 11025:
293 case 12000:
294 wclk_rate = TAS2552_WCLK_FREQ_11_12KHZ;
295 break;
296 case 16000:
297 wclk_rate = TAS2552_WCLK_FREQ_16KHZ;
298 break;
299 case 22050:
300 case 24000:
301 wclk_rate = TAS2552_WCLK_FREQ_22_24KHZ;
302 break;
303 case 32000:
304 wclk_rate = TAS2552_WCLK_FREQ_32KHZ;
305 break;
306 case 44100:
307 case 48000:
308 wclk_rate = TAS2552_WCLK_FREQ_44_48KHZ;
309 break;
310 case 88200:
311 case 96000:
312 wclk_rate = TAS2552_WCLK_FREQ_88_96KHZ;
313 break;
314 case 176400:
315 case 192000:
316 wclk_rate = TAS2552_WCLK_FREQ_176_192KHZ;
317 break;
318 default:
79a4ad1e 319 dev_err(component->dev, "Not supported sample rate: %d\n",
a571cb17
PU		 320 params_rate(params));
321 return -EINVAL;
322 }
323
79a4ad1e 324 snd_soc_component_update_bits(component, TAS2552_CFG_3, TAS2552_WCLK_FREQ_MASK,
a571cb17
PU		 325 wclk_rate);
326
79a4ad1e 327 return tas2552_setup_pll(component, params);
5df7f71d
DM		 328}
329
1b68c7dc
PU		 330#define TAS2552_DAI_FMT_MASK (TAS2552_BCLKDIR | \
331 TAS2552_WCLKDIR | \
332 TAS2552_DATAFORMAT_MASK)
3f747a81
PU		 333static int tas2552_prepare(struct snd_pcm_substream *substream,
334 struct snd_soc_dai *dai)
335{
79a4ad1e
KM		 336 struct snd_soc_component *component = dai->component;
337 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
3f747a81
PU		 338 int delay = 0;
339
340 /* TDM slot selection only valid in DSP_A/_B mode */
341 if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_A)
342 delay += (tas2552->tdm_delay + 1);
343 else if (tas2552->dai_fmt == SND_SOC_DAIFMT_DSP_B)
344 delay += tas2552->tdm_delay;
345
346 /* Configure data delay */
79a4ad1e 347 snd_soc_component_write(component, TAS2552_SER_CTRL_2, delay);
3f747a81
PU		 348
349 return 0;
350}
351
5df7f71d
DM		 352static int tas2552_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
353{
79a4ad1e
KM		 354 struct snd_soc_component *component = dai->component;
355 struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
5df7f71d 356 u8 serial_format;
5df7f71d
DM		 357
358 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
359 case SND_SOC_DAIFMT_CBS_CFS:
360 serial_format = 0x00;
361 break;
362 case SND_SOC_DAIFMT_CBS_CFM:
1b68c7dc 363 serial_format = TAS2552_WCLKDIR;
5df7f71d
DM		 364 break;
365 case SND_SOC_DAIFMT_CBM_CFS:
1b68c7dc 366 serial_format = TAS2552_BCLKDIR;
5df7f71d
DM		 367 break;
368 case SND_SOC_DAIFMT_CBM_CFM:
1b68c7dc 369 serial_format = (TAS2552_BCLKDIR | TAS2552_WCLKDIR);
5df7f71d
DM		 370 break;
371 default:
79a4ad1e 372 dev_vdbg(component->dev, "DAI Format master is not found\n");
5df7f71d
DM		 373 return -EINVAL;
374 }
375
4c331373
PU		 376 switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
377 SND_SOC_DAIFMT_INV_MASK)) {
378 case (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF):
5df7f71d 379 break;
4c331373 380 case (SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF):
4c331373 381 case (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF):
1b68c7dc 382 serial_format |= TAS2552_DATAFORMAT_DSP;
5df7f71d 383 break;
4c331373 384 case (SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF):
1b68c7dc 385 serial_format |= TAS2552_DATAFORMAT_RIGHT_J;
5df7f71d 386 break;
4c331373 387 case (SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF):
1b68c7dc 388 serial_format |= TAS2552_DATAFORMAT_LEFT_J;
5df7f71d
DM		 389 break;
390 default:
79a4ad1e 391 dev_vdbg(component->dev, "DAI Format is not found\n");
5df7f71d
DM		 392 return -EINVAL;
393 }
3f747a81 394 tas2552->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
5df7f71d 395
79a4ad1e 396 snd_soc_component_update_bits(component, TAS2552_SER_CTRL_1, TAS2552_DAI_FMT_MASK,
4c331373 397 serial_format);
5df7f71d
DM		 398 return 0;
399}
400
401static int tas2552_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
402 unsigned int freq, int dir)
403{
79a4ad1e
KM		 404 struct snd_soc_component *component = dai->component;
405 struct tas2552_data *tas2552 = dev_get_drvdata(component->dev);
9d87a888
PU		 406 u8 reg, mask, val;
407
408 switch (clk_id) {
409 case TAS2552_PLL_CLKIN_MCLK:
9d87a888 410 case TAS2552_PLL_CLKIN_IVCLKIN:
1014f7ef
PU		 411 if (freq < 512000 || freq > 24576000) {
412 /* out of range PLL_CLKIN, fall back to use BCLK */
79a4ad1e 413 dev_warn(component->dev, "Out of range PLL_CLKIN: %u\n",
1014f7ef
PU		 414 freq);
415 clk_id = TAS2552_PLL_CLKIN_BCLK;
416 freq = 0;
417 }
418 /* fall through */
419 case TAS2552_PLL_CLKIN_BCLK:
9d87a888
PU		 420 case TAS2552_PLL_CLKIN_1_8_FIXED:
421 mask = TAS2552_PLL_SRC_MASK;
422 val = (clk_id << 3) & mask; /* bit 4:5 in the register */
423 reg = TAS2552_CFG_1;
1014f7ef 424 tas2552->pll_clk_id = clk_id;
9d87a888
PU		 425 tas2552->pll_clkin = freq;
426 break;
427 case TAS2552_PDM_CLK_PLL:
428 case TAS2552_PDM_CLK_IVCLKIN:
429 case TAS2552_PDM_CLK_BCLK:
430 case TAS2552_PDM_CLK_MCLK:
431 mask = TAS2552_PDM_CLK_SEL_MASK;
432 val = (clk_id >> 1) & mask; /* bit 0:1 in the register */
433 reg = TAS2552_PDM_CFG;
1014f7ef 434 tas2552->pdm_clk_id = clk_id;
9d87a888
PU		 435 tas2552->pdm_clk = freq;
436 break;
437 default:
79a4ad1e 438 dev_err(component->dev, "Invalid clk id: %d\n", clk_id);
9d87a888
PU		 439 return -EINVAL;
440 }
5df7f71d 441
79a4ad1e 442 snd_soc_component_update_bits(component, reg, mask, val);
5df7f71d
DM		 443
444 return 0;
445}
446
3f747a81
PU		 447static int tas2552_set_dai_tdm_slot(struct snd_soc_dai *dai,
448 unsigned int tx_mask, unsigned int rx_mask,
449 int slots, int slot_width)
450{
79a4ad1e
KM		 451 struct snd_soc_component *component = dai->component;
452 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
3f747a81
PU		 453 unsigned int lsb;
454
455 if (unlikely(!tx_mask)) {
79a4ad1e 456 dev_err(component->dev, "tx masks need to be non 0\n");
3f747a81
PU		 457 return -EINVAL;
458 }
459
460 /* TDM based on DSP mode requires slots to be adjacent */
461 lsb = __ffs(tx_mask);
462 if ((lsb + 1) != __fls(tx_mask)) {
79a4ad1e 463 dev_err(component->dev, "Invalid mask, slots must be adjacent\n");
3f747a81
PU		 464 return -EINVAL;
465 }
466
467 tas2552->tdm_delay = lsb * slot_width;
468
469 /* DOUT in high-impedance on inactive bit clocks */
79a4ad1e 470 snd_soc_component_update_bits(component, TAS2552_DOUT,
3f747a81
PU		 471 TAS2552_SDOUT_TRISTATE, TAS2552_SDOUT_TRISTATE);
472
473 return 0;
474}
475
5df7f71d
DM		 476static int tas2552_mute(struct snd_soc_dai *dai, int mute)
477{
e3606aa4 478 u8 cfg1_reg = 0;
79a4ad1e 479 struct snd_soc_component *component = dai->component;
5df7f71d
DM		 480
481 if (mute)
e3606aa4 482 cfg1_reg |= TAS2552_MUTE;
5df7f71d 483
79a4ad1e 484 snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, cfg1_reg);
5df7f71d
DM		 485
486 return 0;
487}
488
641d334b 489#ifdef CONFIG_PM
5df7f71d
DM		 490static int tas2552_runtime_suspend(struct device *dev)
491{
492 struct tas2552_data *tas2552 = dev_get_drvdata(dev);
493
dd6e3053 494 tas2552_sw_shutdown(tas2552, 1);
5df7f71d 495
5df7f71d
DM		 496 regcache_cache_only(tas2552->regmap, true);
497 regcache_mark_dirty(tas2552->regmap);
498
82cf77a1 499 gpiod_set_value(tas2552->enable_gpio, 0);
e295a4a4 500
5df7f71d
DM		 501 return 0;
502}
503
504static int tas2552_runtime_resume(struct device *dev)
505{
506 struct tas2552_data *tas2552 = dev_get_drvdata(dev);
507
82cf77a1 508 gpiod_set_value(tas2552->enable_gpio, 1);
5df7f71d 509
dd6e3053 510 tas2552_sw_shutdown(tas2552, 0);
5df7f71d
DM		 511
512 regcache_cache_only(tas2552->regmap, false);
513 regcache_sync(tas2552->regmap);
514
515 return 0;
516}
517#endif
518
519static const struct dev_pm_ops tas2552_pm = {
520 SET_RUNTIME_PM_OPS(tas2552_runtime_suspend, tas2552_runtime_resume,
521 NULL)
522};
523
64793047 524static const struct snd_soc_dai_ops tas2552_speaker_dai_ops = {
5df7f71d 525 .hw_params = tas2552_hw_params,
3f747a81 526 .prepare = tas2552_prepare,
5df7f71d
DM		 527 .set_sysclk = tas2552_set_dai_sysclk,
528 .set_fmt = tas2552_set_dai_fmt,
3f747a81 529 .set_tdm_slot = tas2552_set_dai_tdm_slot,
5df7f71d
DM		 530 .digital_mute = tas2552_mute,
531};
532
533/* Formats supported by TAS2552 driver. */
534#define TAS2552_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
535 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
536
537/* TAS2552 dai structure. */
538static struct snd_soc_dai_driver tas2552_dai[] = {
539 {
540 .name = "tas2552-amplifier",
541 .playback = {
a7a8e994 542 .stream_name = "Playback",
5df7f71d
DM		 543 .channels_min = 2,
544 .channels_max = 2,
545 .rates = SNDRV_PCM_RATE_8000_192000,
546 .formats = TAS2552_FORMATS,
547 },
548 .ops = &tas2552_speaker_dai_ops,
549 },
550};
551
552/*
553 * DAC digital volumes. From -7 to 24 dB in 1 dB steps
554 */
e2600460 555static DECLARE_TLV_DB_SCALE(dac_tlv, -700, 100, 0);
5df7f71d 556
2962cb52
PU		 557static const char * const tas2552_din_source_select[] = {
558 "Muted",
559 "Left",
560 "Right",
561 "Left + Right average",
562};
563static SOC_ENUM_SINGLE_DECL(tas2552_din_source_enum,
564 TAS2552_CFG_3, 3,
565 tas2552_din_source_select);
566
5df7f71d
DM		 567static const struct snd_kcontrol_new tas2552_snd_controls[] = {
568 SOC_SINGLE_TLV("Speaker Driver Playback Volume",
dd6ae3bc 569 TAS2552_PGA_GAIN, 0, 0x1f, 0, dac_tlv),
2962cb52 570 SOC_ENUM("DIN source", tas2552_din_source_enum),
5df7f71d
DM		 571};
572
79a4ad1e 573static int tas2552_component_probe(struct snd_soc_component *component)
5df7f71d 574{
79a4ad1e 575 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
5df7f71d
DM		 576 int ret;
577
79a4ad1e 578 tas2552->component = component;
5df7f71d
DM		 579
580 ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
581 tas2552->supplies);
582
583 if (ret != 0) {
79a4ad1e 584 dev_err(component->dev, "Failed to enable supplies: %d\n",
5df7f71d
DM		 585 ret);
586 return ret;
587 }
588
82cf77a1 589 gpiod_set_value(tas2552->enable_gpio, 1);
5df7f71d 590
79a4ad1e 591 ret = pm_runtime_get_sync(component->dev);
5df7f71d 592 if (ret < 0) {
79a4ad1e 593 dev_err(component->dev, "Enabling device failed: %d\n",
5df7f71d
DM		 594 ret);
595 goto probe_fail;
596 }
597
79a4ad1e
KM		 598 snd_soc_component_update_bits(component, TAS2552_CFG_1, TAS2552_MUTE, TAS2552_MUTE);
599 snd_soc_component_write(component, TAS2552_CFG_3, TAS2552_I2S_OUT_SEL |
a571cb17 600 TAS2552_DIN_SRC_SEL_AVG_L_R);
79a4ad1e 601 snd_soc_component_write(component, TAS2552_OUTPUT_DATA,
b2822f19
PU		 602 TAS2552_PDM_DATA_SEL_V_I |
603 TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA));
79a4ad1e 604 snd_soc_component_write(component, TAS2552_BOOST_APT_CTRL, TAS2552_APT_DELAY_200 |
2a9dd1db 605 TAS2552_APT_THRESH_20_17);
5df7f71d 606
79a4ad1e 607 snd_soc_component_write(component, TAS2552_CFG_2, TAS2552_BOOST_EN | TAS2552_APT_EN |
4afdd89d 608 TAS2552_LIM_EN);
a7a8e994 609
5df7f71d
DM		 610 return 0;
611
5df7f71d 612probe_fail:
82cf77a1 613 gpiod_set_value(tas2552->enable_gpio, 0);
5df7f71d
DM		 614
615 regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
616 tas2552->supplies);
6f2daf82 617 return ret;
5df7f71d
DM		 618}
619
79a4ad1e 620static void tas2552_component_remove(struct snd_soc_component *component)
5df7f71d 621{
79a4ad1e 622 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
5df7f71d 623
79a4ad1e 624 pm_runtime_put(component->dev);
e295a4a4 625
82cf77a1 626 gpiod_set_value(tas2552->enable_gpio, 0);
5df7f71d
DM		 627};
628
629#ifdef CONFIG_PM
79a4ad1e 630static int tas2552_suspend(struct snd_soc_component *component)
5df7f71d 631{
79a4ad1e 632 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
5df7f71d
DM		 633 int ret;
634
635 ret = regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies),
636 tas2552->supplies);
637
638 if (ret != 0)
79a4ad1e 639 dev_err(component->dev, "Failed to disable supplies: %d\n",
5df7f71d 640 ret);
12dc0f3b 641 return ret;
5df7f71d
DM		 642}
643
79a4ad1e 644static int tas2552_resume(struct snd_soc_component *component)
5df7f71d 645{
79a4ad1e 646 struct tas2552_data *tas2552 = snd_soc_component_get_drvdata(component);
5df7f71d
DM		 647 int ret;
648
649 ret = regulator_bulk_enable(ARRAY_SIZE(tas2552->supplies),
650 tas2552->supplies);
651
652 if (ret != 0) {
79a4ad1e 653 dev_err(component->dev, "Failed to enable supplies: %d\n",
5df7f71d
DM		 654 ret);
655 }
656
12dc0f3b 657 return ret;
5df7f71d
DM		 658}
659#else
660#define tas2552_suspend NULL
661#define tas2552_resume NULL
662#endif
663
79a4ad1e
KM		 664static const struct snd_soc_component_driver soc_component_dev_tas2552 = {
665 .probe = tas2552_component_probe,
666 .remove = tas2552_component_remove,
667 .suspend = tas2552_suspend,
668 .resume = tas2552_resume,
669 .controls = tas2552_snd_controls,
670 .num_controls = ARRAY_SIZE(tas2552_snd_controls),
671 .dapm_widgets = tas2552_dapm_widgets,
672 .num_dapm_widgets = ARRAY_SIZE(tas2552_dapm_widgets),
673 .dapm_routes = tas2552_audio_map,
674 .num_dapm_routes = ARRAY_SIZE(tas2552_audio_map),
675 .idle_bias_on = 1,
676 .endianness = 1,
677 .non_legacy_dai_naming = 1,
5df7f71d
DM		 678};
679
680static const struct regmap_config tas2552_regmap_config = {
681 .reg_bits = 8,
682 .val_bits = 8,
683
684 .max_register = TAS2552_MAX_REG,
685 .reg_defaults = tas2552_reg_defs,
686 .num_reg_defaults = ARRAY_SIZE(tas2552_reg_defs),
687 .cache_type = REGCACHE_RBTREE,
688};
689
690static int tas2552_probe(struct i2c_client *client,
691 const struct i2c_device_id *id)
692{
693 struct device *dev;
694 struct tas2552_data *data;
695 int ret;
696 int i;
697
698 dev = &client->dev;
699 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
700 if (data == NULL)
701 return -ENOMEM;
702
8604bc28
AL		 703 data->enable_gpio = devm_gpiod_get_optional(dev, "enable",
704 GPIOD_OUT_LOW);
705 if (IS_ERR(data->enable_gpio))
706 return PTR_ERR(data->enable_gpio);
5df7f71d
DM		 707
708 data->tas2552_client = client;
709 data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
710 if (IS_ERR(data->regmap)) {
711 ret = PTR_ERR(data->regmap);
712 dev_err(&client->dev, "Failed to allocate register map: %d\n",
713 ret);
714 return ret;
715 }
716
717 for (i = 0; i < ARRAY_SIZE(data->supplies); i++)
718 data->supplies[i].supply = tas2552_supply_names[i];
719
720 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
721 data->supplies);
c62f9d8f 722 if (ret != 0) {
5df7f71d 723 dev_err(dev, "Failed to request supplies: %d\n", ret);
c62f9d8f
AL		 724 return ret;
725 }
5df7f71d
DM		 726
727 pm_runtime_set_active(&client->dev);
728 pm_runtime_set_autosuspend_delay(&client->dev, 1000);
729 pm_runtime_use_autosuspend(&client->dev);
730 pm_runtime_enable(&client->dev);
731 pm_runtime_mark_last_busy(&client->dev);
732 pm_runtime_put_sync_autosuspend(&client->dev);
733
734 dev_set_drvdata(&client->dev, data);
735
79a4ad1e
KM		 736 ret = devm_snd_soc_register_component(&client->dev,
737 &soc_component_dev_tas2552,
5df7f71d
DM		 738 tas2552_dai, ARRAY_SIZE(tas2552_dai));
739 if (ret < 0)
79a4ad1e 740 dev_err(&client->dev, "Failed to register component: %d\n", ret);
5df7f71d 741
c62f9d8f 742 return ret;
5df7f71d
DM		 743}
744
745static int tas2552_i2c_remove(struct i2c_client *client)
746{
4785ed89 747 pm_runtime_disable(&client->dev);
5df7f71d
DM		 748 return 0;
749}
750
751static const struct i2c_device_id tas2552_id[] = {
752 { "tas2552", 0 },
753 { }
754};
755MODULE_DEVICE_TABLE(i2c, tas2552_id);
756
757#if IS_ENABLED(CONFIG_OF)
758static const struct of_device_id tas2552_of_match[] = {
759 { .compatible = "ti,tas2552", },
760 {},
761};
762MODULE_DEVICE_TABLE(of, tas2552_of_match);
763#endif
764
765static struct i2c_driver tas2552_i2c_driver = {
766 .driver = {
767 .name = "tas2552",
5df7f71d
DM		 768 .of_match_table = of_match_ptr(tas2552_of_match),
769 .pm = &tas2552_pm,
770 },
771 .probe = tas2552_probe,
772 .remove = tas2552_i2c_remove,
773 .id_table = tas2552_id,
774};
775
776module_i2c_driver(tas2552_i2c_driver);
777
778MODULE_AUTHOR("Dan Muprhy <dmurphy@ti.com>");
779MODULE_DESCRIPTION("TAS2552 Audio amplifier driver");
780MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)