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ASoC: max98090: Include of.h
[linux-2.6-block.git] / sound / soc / codecs / rt5640.c
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997b0520
BL		 1/*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
dcad9f03 21#include <linux/of_gpio.h>
997b0520
BL		 22#include <linux/platform_device.h>
23#include <linux/spi/spi.h>
02b80773 24#include <linux/acpi.h>
997b0520
BL		 25#include <sound/core.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29#include <sound/soc-dapm.h>
30#include <sound/initval.h>
31#include <sound/tlv.h>
32
33#include "rt5640.h"
34
35#define RT5640_DEVICE_ID 0x6231
36
37#define RT5640_PR_RANGE_BASE (0xff + 1)
38#define RT5640_PR_SPACING 0x100
39
40#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
41
42static const struct regmap_range_cfg rt5640_ranges[] = {
43 { .name = "PR", .range_min = RT5640_PR_BASE,
44 .range_max = RT5640_PR_BASE + 0xb4,
45 .selector_reg = RT5640_PRIV_INDEX,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
48 .window_start = RT5640_PRIV_DATA,
49 .window_len = 0x1, },
50};
51
52static struct reg_default init_list[] = {
53 {RT5640_PR_BASE + 0x3d, 0x3600},
997b0520
BL		 54 {RT5640_PR_BASE + 0x12, 0x0aa8},
55 {RT5640_PR_BASE + 0x14, 0x0aaa},
56 {RT5640_PR_BASE + 0x20, 0x6110},
57 {RT5640_PR_BASE + 0x21, 0xe0e0},
58 {RT5640_PR_BASE + 0x23, 0x1804},
59};
60#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
61
62static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
63 { 0x00, 0x000e },
64 { 0x01, 0xc8c8 },
65 { 0x02, 0xc8c8 },
66 { 0x03, 0xc8c8 },
67 { 0x04, 0x8000 },
68 { 0x0d, 0x0000 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x19, 0xafaf },
72 { 0x1a, 0xafaf },
73 { 0x1b, 0x0000 },
74 { 0x1c, 0x2f2f },
75 { 0x1d, 0x2f2f },
76 { 0x1e, 0x0000 },
77 { 0x27, 0x7060 },
78 { 0x28, 0x7070 },
79 { 0x29, 0x8080 },
80 { 0x2a, 0x5454 },
81 { 0x2b, 0x5454 },
82 { 0x2c, 0xaa00 },
83 { 0x2d, 0x0000 },
84 { 0x2e, 0xa000 },
85 { 0x2f, 0x0000 },
86 { 0x3b, 0x0000 },
87 { 0x3c, 0x007f },
88 { 0x3d, 0x0000 },
89 { 0x3e, 0x007f },
90 { 0x45, 0xe000 },
91 { 0x46, 0x003e },
92 { 0x47, 0x003e },
93 { 0x48, 0xf800 },
94 { 0x49, 0x3800 },
95 { 0x4a, 0x0004 },
96 { 0x4c, 0xfc00 },
97 { 0x4d, 0x0000 },
98 { 0x4f, 0x01ff },
99 { 0x50, 0x0000 },
100 { 0x51, 0x0000 },
101 { 0x52, 0x01ff },
102 { 0x53, 0xf000 },
103 { 0x61, 0x0000 },
104 { 0x62, 0x0000 },
105 { 0x63, 0x00c0 },
106 { 0x64, 0x0000 },
107 { 0x65, 0x0000 },
108 { 0x66, 0x0000 },
109 { 0x6a, 0x0000 },
110 { 0x6c, 0x0000 },
111 { 0x70, 0x8000 },
112 { 0x71, 0x8000 },
113 { 0x72, 0x8000 },
114 { 0x73, 0x1114 },
115 { 0x74, 0x0c00 },
116 { 0x75, 0x1d00 },
117 { 0x80, 0x0000 },
118 { 0x81, 0x0000 },
119 { 0x82, 0x0000 },
120 { 0x83, 0x0000 },
121 { 0x84, 0x0000 },
122 { 0x85, 0x0008 },
123 { 0x89, 0x0000 },
124 { 0x8a, 0x0000 },
125 { 0x8b, 0x0600 },
126 { 0x8c, 0x0228 },
127 { 0x8d, 0xa000 },
128 { 0x8e, 0x0004 },
129 { 0x8f, 0x1100 },
130 { 0x90, 0x0646 },
131 { 0x91, 0x0c00 },
132 { 0x92, 0x0000 },
133 { 0x93, 0x3000 },
134 { 0xb0, 0x2080 },
135 { 0xb1, 0x0000 },
136 { 0xb4, 0x2206 },
137 { 0xb5, 0x1f00 },
138 { 0xb6, 0x0000 },
139 { 0xb8, 0x034b },
140 { 0xb9, 0x0066 },
141 { 0xba, 0x000b },
142 { 0xbb, 0x0000 },
143 { 0xbc, 0x0000 },
144 { 0xbd, 0x0000 },
145 { 0xbe, 0x0000 },
146 { 0xbf, 0x0000 },
147 { 0xc0, 0x0400 },
148 { 0xc2, 0x0000 },
149 { 0xc4, 0x0000 },
150 { 0xc5, 0x0000 },
151 { 0xc6, 0x2000 },
152 { 0xc8, 0x0000 },
153 { 0xc9, 0x0000 },
154 { 0xca, 0x0000 },
155 { 0xcb, 0x0000 },
156 { 0xcc, 0x0000 },
157 { 0xcf, 0x0013 },
158 { 0xd0, 0x0680 },
159 { 0xd1, 0x1c17 },
160 { 0xd2, 0x8c00 },
161 { 0xd3, 0xaa20 },
162 { 0xd6, 0x0400 },
163 { 0xd9, 0x0809 },
164 { 0xfe, 0x10ec },
165 { 0xff, 0x6231 },
166};
167
168static int rt5640_reset(struct snd_soc_codec *codec)
169{
170 return snd_soc_write(codec, RT5640_RESET, 0);
171}
172
173static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
174{
175 int i;
176
177 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
178 if ((reg >= rt5640_ranges[i].window_start &&
179 reg <= rt5640_ranges[i].window_start +
180 rt5640_ranges[i].window_len) ||
181 (reg >= rt5640_ranges[i].range_min &&
182 reg <= rt5640_ranges[i].range_max))
183 return true;
184
185 switch (reg) {
186 case RT5640_RESET:
187 case RT5640_ASRC_5:
188 case RT5640_EQ_CTRL1:
189 case RT5640_DRC_AGC_1:
190 case RT5640_ANC_CTRL1:
191 case RT5640_IRQ_CTRL2:
192 case RT5640_INT_IRQ_ST:
193 case RT5640_DSP_CTRL2:
194 case RT5640_DSP_CTRL3:
195 case RT5640_PRIV_INDEX:
196 case RT5640_PRIV_DATA:
197 case RT5640_PGM_REG_ARR1:
198 case RT5640_PGM_REG_ARR3:
199 case RT5640_VENDOR_ID:
200 case RT5640_VENDOR_ID1:
201 case RT5640_VENDOR_ID2:
202 return true;
203 default:
204 return false;
205 }
206}
207
208static bool rt5640_readable_register(struct device *dev, unsigned int reg)
209{
210 int i;
211
212 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
213 if ((reg >= rt5640_ranges[i].window_start &&
214 reg <= rt5640_ranges[i].window_start +
215 rt5640_ranges[i].window_len) ||
216 (reg >= rt5640_ranges[i].range_min &&
217 reg <= rt5640_ranges[i].range_max))
218 return true;
219
220 switch (reg) {
221 case RT5640_RESET:
222 case RT5640_SPK_VOL:
223 case RT5640_HP_VOL:
224 case RT5640_OUTPUT:
225 case RT5640_MONO_OUT:
226 case RT5640_IN1_IN2:
227 case RT5640_IN3_IN4:
228 case RT5640_INL_INR_VOL:
229 case RT5640_DAC1_DIG_VOL:
230 case RT5640_DAC2_DIG_VOL:
231 case RT5640_DAC2_CTRL:
232 case RT5640_ADC_DIG_VOL:
233 case RT5640_ADC_DATA:
234 case RT5640_ADC_BST_VOL:
235 case RT5640_STO_ADC_MIXER:
236 case RT5640_MONO_ADC_MIXER:
237 case RT5640_AD_DA_MIXER:
238 case RT5640_STO_DAC_MIXER:
239 case RT5640_MONO_DAC_MIXER:
240 case RT5640_DIG_MIXER:
241 case RT5640_DSP_PATH1:
242 case RT5640_DSP_PATH2:
243 case RT5640_DIG_INF_DATA:
244 case RT5640_REC_L1_MIXER:
245 case RT5640_REC_L2_MIXER:
246 case RT5640_REC_R1_MIXER:
247 case RT5640_REC_R2_MIXER:
248 case RT5640_HPO_MIXER:
249 case RT5640_SPK_L_MIXER:
250 case RT5640_SPK_R_MIXER:
251 case RT5640_SPO_L_MIXER:
252 case RT5640_SPO_R_MIXER:
253 case RT5640_SPO_CLSD_RATIO:
254 case RT5640_MONO_MIXER:
255 case RT5640_OUT_L1_MIXER:
256 case RT5640_OUT_L2_MIXER:
257 case RT5640_OUT_L3_MIXER:
258 case RT5640_OUT_R1_MIXER:
259 case RT5640_OUT_R2_MIXER:
260 case RT5640_OUT_R3_MIXER:
261 case RT5640_LOUT_MIXER:
262 case RT5640_PWR_DIG1:
263 case RT5640_PWR_DIG2:
264 case RT5640_PWR_ANLG1:
265 case RT5640_PWR_ANLG2:
266 case RT5640_PWR_MIXER:
267 case RT5640_PWR_VOL:
268 case RT5640_PRIV_INDEX:
269 case RT5640_PRIV_DATA:
270 case RT5640_I2S1_SDP:
271 case RT5640_I2S2_SDP:
272 case RT5640_ADDA_CLK1:
273 case RT5640_ADDA_CLK2:
274 case RT5640_DMIC:
275 case RT5640_GLB_CLK:
276 case RT5640_PLL_CTRL1:
277 case RT5640_PLL_CTRL2:
278 case RT5640_ASRC_1:
279 case RT5640_ASRC_2:
280 case RT5640_ASRC_3:
281 case RT5640_ASRC_4:
282 case RT5640_ASRC_5:
283 case RT5640_HP_OVCD:
284 case RT5640_CLS_D_OVCD:
285 case RT5640_CLS_D_OUT:
286 case RT5640_DEPOP_M1:
287 case RT5640_DEPOP_M2:
288 case RT5640_DEPOP_M3:
289 case RT5640_CHARGE_PUMP:
290 case RT5640_PV_DET_SPK_G:
291 case RT5640_MICBIAS:
292 case RT5640_EQ_CTRL1:
293 case RT5640_EQ_CTRL2:
294 case RT5640_WIND_FILTER:
295 case RT5640_DRC_AGC_1:
296 case RT5640_DRC_AGC_2:
297 case RT5640_DRC_AGC_3:
298 case RT5640_SVOL_ZC:
299 case RT5640_ANC_CTRL1:
300 case RT5640_ANC_CTRL2:
301 case RT5640_ANC_CTRL3:
302 case RT5640_JD_CTRL:
303 case RT5640_ANC_JD:
304 case RT5640_IRQ_CTRL1:
305 case RT5640_IRQ_CTRL2:
306 case RT5640_INT_IRQ_ST:
307 case RT5640_GPIO_CTRL1:
308 case RT5640_GPIO_CTRL2:
309 case RT5640_GPIO_CTRL3:
310 case RT5640_DSP_CTRL1:
311 case RT5640_DSP_CTRL2:
312 case RT5640_DSP_CTRL3:
313 case RT5640_DSP_CTRL4:
314 case RT5640_PGM_REG_ARR1:
315 case RT5640_PGM_REG_ARR2:
316 case RT5640_PGM_REG_ARR3:
317 case RT5640_PGM_REG_ARR4:
318 case RT5640_PGM_REG_ARR5:
319 case RT5640_SCB_FUNC:
320 case RT5640_SCB_CTRL:
321 case RT5640_BASE_BACK:
322 case RT5640_MP3_PLUS1:
323 case RT5640_MP3_PLUS2:
324 case RT5640_3D_HP:
325 case RT5640_ADJ_HPF:
326 case RT5640_HP_CALIB_AMP_DET:
327 case RT5640_HP_CALIB2:
328 case RT5640_SV_ZCD1:
329 case RT5640_SV_ZCD2:
330 case RT5640_DUMMY1:
331 case RT5640_DUMMY2:
332 case RT5640_DUMMY3:
333 case RT5640_VENDOR_ID:
334 case RT5640_VENDOR_ID1:
335 case RT5640_VENDOR_ID2:
336 return true;
337 default:
338 return false;
339 }
340}
341
342static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
343static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
344static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
345static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
346static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
347
348/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
349static unsigned int bst_tlv[] = {
350 TLV_DB_RANGE_HEAD(7),
351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
358};
359
360/* Interface data select */
361static const char * const rt5640_data_select[] = {
362 "Normal", "left copy to right", "right copy to left", "Swap"};
363
4c03cb6f
TI		 364static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
997b0520 366
4c03cb6f
TI		 367static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
997b0520 369
4c03cb6f
TI		 370static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
997b0520 372
4c03cb6f
TI		 373static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
997b0520
BL		 375
376/* Class D speaker gain ratio */
377static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
4c03cb6f
TI		 380static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
381 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
997b0520
BL		 382
383static const struct snd_kcontrol_new rt5640_snd_controls[] = {
384 /* Speaker Output Volume */
997b0520
BL		 385 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
386 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
387 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
388 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
389 /* Headphone Output Volume */
997b0520
BL		 390 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
391 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
392 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
393 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
394 /* OUTPUT Control */
395 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
396 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
397 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
398 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
401 /* MONO Output Control */
402 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
403 RT5640_L_MUTE_SFT, 1, 1),
404 /* DAC Digital Volume */
405 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
406 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
407 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
408 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
409 175, 0, dac_vol_tlv),
410 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
411 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
412 175, 0, dac_vol_tlv),
413 /* IN1/IN2 Control */
414 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
415 RT5640_BST_SFT1, 8, 0, bst_tlv),
416 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
417 RT5640_BST_SFT2, 8, 0, bst_tlv),
418 /* INL/INR Volume Control */
419 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
420 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
421 31, 1, in_vol_tlv),
422 /* ADC Digital Volume Control */
423 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
424 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
425 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
426 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
427 127, 0, adc_vol_tlv),
428 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
429 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
430 127, 0, adc_vol_tlv),
431 /* ADC Boost Volume Control */
432 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
433 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
434 3, 0, adc_bst_tlv),
435 /* Class D speaker gain ratio */
436 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
437
438 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
439 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
440 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
441 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
442};
443
444/**
445 * set_dmic_clk - Set parameter of dmic.
446 *
447 * @w: DAPM widget.
448 * @kcontrol: The kcontrol of this widget.
449 * @event: Event id.
450 *
451 * Choose dmic clock between 1MHz and 3MHz.
452 * It is better for clock to approximate 3MHz.
453 */
454static int set_dmic_clk(struct snd_soc_dapm_widget *w,
455 struct snd_kcontrol *kcontrol, int event)
456{
457 struct snd_soc_codec *codec = w->codec;
458 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
459 int div[] = {2, 3, 4, 6, 8, 12};
460 int idx = -EINVAL, i;
461 int rate, red, bound, temp;
462
463 rate = rt5640->sysclk;
464 red = 3000000 * 12;
465 for (i = 0; i < ARRAY_SIZE(div); i++) {
466 bound = div[i] * 3000000;
467 if (rate > bound)
468 continue;
469 temp = bound - rate;
470 if (temp < red) {
471 red = temp;
472 idx = i;
473 }
474 }
475 if (idx < 0)
476 dev_err(codec->dev, "Failed to set DMIC clock\n");
477 else
478 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
479 idx << RT5640_DMIC_CLK_SFT);
480 return idx;
481}
482
483static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
484 struct snd_soc_dapm_widget *sink)
485{
486 unsigned int val;
487
488 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
489 val &= RT5640_SCLK_SRC_MASK;
490 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
491 return 1;
492 else
493 return 0;
494}
495
496/* Digital Mixer */
497static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
498 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
499 RT5640_M_ADC_L1_SFT, 1, 1),
500 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
501 RT5640_M_ADC_L2_SFT, 1, 1),
502};
503
504static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
505 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
506 RT5640_M_ADC_R1_SFT, 1, 1),
507 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
508 RT5640_M_ADC_R2_SFT, 1, 1),
509};
510
511static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
512 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
513 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
514 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
515 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
516};
517
518static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
519 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
520 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
521 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
522 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
523};
524
525static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
526 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
527 RT5640_M_ADCMIX_L_SFT, 1, 1),
528 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
529 RT5640_M_IF1_DAC_L_SFT, 1, 1),
530};
531
532static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
533 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
534 RT5640_M_ADCMIX_R_SFT, 1, 1),
535 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
536 RT5640_M_IF1_DAC_R_SFT, 1, 1),
537};
538
539static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
540 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
541 RT5640_M_DAC_L1_SFT, 1, 1),
542 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
543 RT5640_M_DAC_L2_SFT, 1, 1),
544 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
545 RT5640_M_ANC_DAC_L_SFT, 1, 1),
546};
547
548static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
549 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
550 RT5640_M_DAC_R1_SFT, 1, 1),
551 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
552 RT5640_M_DAC_R2_SFT, 1, 1),
553 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
554 RT5640_M_ANC_DAC_R_SFT, 1, 1),
555};
556
557static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
558 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
559 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
560 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
561 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
562 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
563 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
564};
565
566static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
567 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
568 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
569 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
570 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
571 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
572 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
573};
574
575static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
576 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
577 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
578 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
579 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
580};
581
582static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
583 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
584 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
585 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
586 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
587};
588
589/* Analog Input Mixer */
590static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
591 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
592 RT5640_M_HP_L_RM_L_SFT, 1, 1),
593 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
594 RT5640_M_IN_L_RM_L_SFT, 1, 1),
595 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
596 RT5640_M_BST4_RM_L_SFT, 1, 1),
597 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
598 RT5640_M_BST1_RM_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
600 RT5640_M_OM_L_RM_L_SFT, 1, 1),
601};
602
603static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
604 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
605 RT5640_M_HP_R_RM_R_SFT, 1, 1),
606 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
607 RT5640_M_IN_R_RM_R_SFT, 1, 1),
608 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
609 RT5640_M_BST4_RM_R_SFT, 1, 1),
610 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
611 RT5640_M_BST1_RM_R_SFT, 1, 1),
612 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
613 RT5640_M_OM_R_RM_R_SFT, 1, 1),
614};
615
616/* Analog Output Mixer */
617static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
618 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
619 RT5640_M_RM_L_SM_L_SFT, 1, 1),
620 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
621 RT5640_M_IN_L_SM_L_SFT, 1, 1),
622 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
623 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
624 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
625 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
626 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
627 RT5640_M_OM_L_SM_L_SFT, 1, 1),
628};
629
630static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
631 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
632 RT5640_M_RM_R_SM_R_SFT, 1, 1),
633 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
634 RT5640_M_IN_R_SM_R_SFT, 1, 1),
635 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
636 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
637 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
638 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
639 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
640 RT5640_M_OM_R_SM_R_SFT, 1, 1),
641};
642
643static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
644 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
645 RT5640_M_SM_L_OM_L_SFT, 1, 1),
646 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
647 RT5640_M_BST1_OM_L_SFT, 1, 1),
648 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
649 RT5640_M_IN_L_OM_L_SFT, 1, 1),
650 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
651 RT5640_M_RM_L_OM_L_SFT, 1, 1),
652 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
653 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
654 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
655 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
656 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
657 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
658};
659
660static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
661 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
662 RT5640_M_SM_L_OM_R_SFT, 1, 1),
663 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
664 RT5640_M_BST4_OM_R_SFT, 1, 1),
665 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
666 RT5640_M_BST1_OM_R_SFT, 1, 1),
667 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
668 RT5640_M_IN_R_OM_R_SFT, 1, 1),
669 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
670 RT5640_M_RM_R_OM_R_SFT, 1, 1),
671 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
672 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
673 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
674 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
675 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
676 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
677};
678
679static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
680 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
681 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
682 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
683 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
684 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
685 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
686 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
687 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
688 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
689 RT5640_M_BST1_SPM_L_SFT, 1, 1),
690};
691
692static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
693 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
694 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
695 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
696 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
697 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
698 RT5640_M_BST1_SPM_R_SFT, 1, 1),
699};
700
701static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
702 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
703 RT5640_M_DAC2_HM_SFT, 1, 1),
704 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
705 RT5640_M_DAC1_HM_SFT, 1, 1),
706 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
707 RT5640_M_HPVOL_HM_SFT, 1, 1),
708};
709
710static const struct snd_kcontrol_new rt5640_lout_mix[] = {
711 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
712 RT5640_M_DAC_L1_LM_SFT, 1, 1),
713 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
714 RT5640_M_DAC_R1_LM_SFT, 1, 1),
715 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
716 RT5640_M_OV_L_LM_SFT, 1, 1),
717 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
718 RT5640_M_OV_R_LM_SFT, 1, 1),
719};
720
721static const struct snd_kcontrol_new rt5640_mono_mix[] = {
722 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
723 RT5640_M_DAC_R2_MM_SFT, 1, 1),
724 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
725 RT5640_M_DAC_L2_MM_SFT, 1, 1),
726 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
727 RT5640_M_OV_R_MM_SFT, 1, 1),
728 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
729 RT5640_M_OV_L_MM_SFT, 1, 1),
730 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
731 RT5640_M_BST1_MM_SFT, 1, 1),
732};
733
246693ba
BL		 734static const struct snd_kcontrol_new spk_l_enable_control =
735 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
736 RT5640_L_MUTE_SFT, 1, 1);
737
738static const struct snd_kcontrol_new spk_r_enable_control =
739 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
740 RT5640_R_MUTE_SFT, 1, 1);
741
742static const struct snd_kcontrol_new hp_l_enable_control =
743 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
744 RT5640_L_MUTE_SFT, 1, 1);
745
746static const struct snd_kcontrol_new hp_r_enable_control =
747 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
748 RT5640_R_MUTE_SFT, 1, 1);
749
997b0520
BL		 750/* Stereo ADC source */
751static const char * const rt5640_stereo_adc1_src[] = {
752 "DIG MIX", "ADC"
753};
754
4c03cb6f
TI		 755static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
756 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
997b0520
BL		 757
758static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
759 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
760
761static const char * const rt5640_stereo_adc2_src[] = {
762 "DMIC1", "DMIC2", "DIG MIX"
763};
764
4c03cb6f
TI		 765static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
766 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
997b0520
BL		 767
768static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
769 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
770
771/* Mono ADC source */
772static const char * const rt5640_mono_adc_l1_src[] = {
773 "Mono DAC MIXL", "ADCL"
774};
775
4c03cb6f
TI		 776static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
777 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
997b0520
BL		 778
779static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
780 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
781
782static const char * const rt5640_mono_adc_l2_src[] = {
783 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
784};
785
4c03cb6f
TI		 786static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
787 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
997b0520
BL		 788
789static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
790 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
791
792static const char * const rt5640_mono_adc_r1_src[] = {
793 "Mono DAC MIXR", "ADCR"
794};
795
4c03cb6f
TI		 796static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
797 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
997b0520
BL		 798
799static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
800 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
801
802static const char * const rt5640_mono_adc_r2_src[] = {
803 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
804};
805
4c03cb6f
TI		 806static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
807 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
997b0520
BL		 808
809static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
810 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
811
812/* DAC2 channel source */
813static const char * const rt5640_dac_l2_src[] = {
814 "IF2", "Base L/R"
815};
816
817static int rt5640_dac_l2_values[] = {
818 0,
819 3,
820};
821
4c03cb6f
TI		 822static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
823 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
824 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
997b0520
BL		 825
826static const struct snd_kcontrol_new rt5640_dac_l2_mux =
827 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
828
829static const char * const rt5640_dac_r2_src[] = {
830 "IF2",
831};
832
833static int rt5640_dac_r2_values[] = {
834 0,
835};
836
4c03cb6f
TI		 837static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
838 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
839 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
997b0520
BL		 840
841static const struct snd_kcontrol_new rt5640_dac_r2_mux =
842 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
843
844/* digital interface and iis interface map */
845static const char * const rt5640_dai_iis_map[] = {
846 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
847};
848
849static int rt5640_dai_iis_map_values[] = {
850 0,
851 5,
852 6,
853 7,
854};
855
4c03cb6f
TI		 856static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
857 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
858 0x7, rt5640_dai_iis_map,
859 rt5640_dai_iis_map_values);
997b0520
BL		 860
861static const struct snd_kcontrol_new rt5640_dai_mux =
862 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
863
864/* SDI select */
865static const char * const rt5640_sdi_sel[] = {
866 "IF1", "IF2"
867};
868
4c03cb6f
TI		 869static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
870 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
997b0520
BL		 871
872static const struct snd_kcontrol_new rt5640_sdi_mux =
873 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
874
997b0520
BL		 875static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
876 struct snd_kcontrol *kcontrol, int event)
877{
878 struct snd_soc_codec *codec = w->codec;
879
880 switch (event) {
881 case SND_SOC_DAPM_PRE_PMU:
882 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
883 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
884 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
885 snd_soc_update_bits(codec, RT5640_DMIC,
886 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
887 RT5640_DMIC_1_DP_MASK,
888 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
889 RT5640_DMIC_1_DP_IN1P);
890 break;
891
892 default:
893 return 0;
894 }
895
896 return 0;
897}
898
899static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
900 struct snd_kcontrol *kcontrol, int event)
901{
902 struct snd_soc_codec *codec = w->codec;
903
904 switch (event) {
905 case SND_SOC_DAPM_PRE_PMU:
906 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
907 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
908 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
909 snd_soc_update_bits(codec, RT5640_DMIC,
910 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
911 RT5640_DMIC_2_DP_MASK,
912 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
913 RT5640_DMIC_2_DP_IN1N);
914 break;
915
916 default:
917 return 0;
918 }
919
920 return 0;
921}
922
89d05130 923static void hp_amp_power_on(struct snd_soc_codec *codec)
246693ba
BL		 924{
925 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
926
927 /* depop parameters */
928 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
929 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
930 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
931 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
932 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
933 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
934 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
935 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
936 0x9f00);
937 /* headphone amp power on */
938 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
939 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
940 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
941 RT5640_PWR_HA,
942 RT5640_PWR_HA);
943 usleep_range(10000, 15000);
944 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
945 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
946 RT5640_PWR_FV1 | RT5640_PWR_FV2);
947}
948
949static void rt5640_pmu_depop(struct snd_soc_codec *codec)
950{
951 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
952
953 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
954 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
955 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
956 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
957 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
958
959 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
960 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
961 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
962 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
963 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
964
965 regmap_write(rt5640->regmap, RT5640_PR_BASE +
966 RT5640_MAMP_INT_REG2, 0x1c00);
967 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
968 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
969 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
970 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
971 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
972}
973
974static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
975 struct snd_kcontrol *kcontrol, int event)
976{
977 struct snd_soc_codec *codec = w->codec;
978 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
979
980 switch (event) {
981 case SND_SOC_DAPM_POST_PMU:
982 rt5640_pmu_depop(codec);
983 rt5640->hp_mute = 0;
984 break;
985
986 case SND_SOC_DAPM_PRE_PMD:
987 rt5640->hp_mute = 1;
988 usleep_range(70000, 75000);
989 break;
990
991 default:
992 return 0;
993 }
994
995 return 0;
996}
997
998static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
999 struct snd_kcontrol *kcontrol, int event)
1000{
1001 struct snd_soc_codec *codec = w->codec;
1002
1003 switch (event) {
1004 case SND_SOC_DAPM_POST_PMU:
1005 hp_amp_power_on(codec);
1006 break;
1007 default:
1008 return 0;
1009 }
1010
1011 return 0;
1012}
1013
1014static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1015 struct snd_kcontrol *kcontrol, int event)
1016{
1017 struct snd_soc_codec *codec = w->codec;
1018 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1019
1020 switch (event) {
1021 case SND_SOC_DAPM_POST_PMU:
1022 if (!rt5640->hp_mute)
1023 usleep_range(80000, 85000);
1024
1025 break;
1026
1027 default:
1028 return 0;
1029 }
1030
1031 return 0;
1032}
1033
997b0520
BL		 1034static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1035 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1036 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1037 /* Input Side */
1038 /* micbias */
1039 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1040 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1041 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
9be94aea 1042 RT5640_PWR_MB1_BIT, 0, NULL, 0),
997b0520
BL		 1043 /* Input Lines */
1044 SND_SOC_DAPM_INPUT("DMIC1"),
1045 SND_SOC_DAPM_INPUT("DMIC2"),
1046 SND_SOC_DAPM_INPUT("IN1P"),
1047 SND_SOC_DAPM_INPUT("IN1N"),
1048 SND_SOC_DAPM_INPUT("IN2P"),
1049 SND_SOC_DAPM_INPUT("IN2N"),
1050 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1051 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1052 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1053 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1054
1055 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1056 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1057 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
1058 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
1059 SND_SOC_DAPM_PRE_PMU),
1060 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
1061 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
1062 SND_SOC_DAPM_PRE_PMU),
1063 /* Boost */
1064 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1065 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1066 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1067 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1068 /* Input Volume */
1069 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1070 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1071 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1072 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
997b0520
BL		 1073 /* REC Mixer */
1074 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1075 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1076 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1077 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1078 /* ADCs */
1079 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1080 RT5640_PWR_ADC_L_BIT, 0),
1081 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1082 RT5640_PWR_ADC_R_BIT, 0),
1083 /* ADC Mux */
1084 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1085 &rt5640_sto_adc_2_mux),
1086 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1087 &rt5640_sto_adc_2_mux),
1088 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1089 &rt5640_sto_adc_1_mux),
1090 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1091 &rt5640_sto_adc_1_mux),
1092 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1093 &rt5640_mono_adc_l2_mux),
1094 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1095 &rt5640_mono_adc_l1_mux),
1096 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1097 &rt5640_mono_adc_r1_mux),
1098 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1099 &rt5640_mono_adc_r2_mux),
1100 /* ADC Mixer */
1101 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1102 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1103 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1104 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1105 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1106 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1107 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1108 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1109 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1110 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1111 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1112 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1113 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1114 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1115
1116 /* Digital Interface */
1117 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1118 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1119 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1120 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1121 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1122 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1123 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1124 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1125 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1126 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1127 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1128 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1129 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1130 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1131 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1132 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1133 /* Digital Interface Select */
1134 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1135 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1136 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1137 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1138 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1139 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1140 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1141 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1142 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1143 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1144 /* Audio Interface */
1145 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1146 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1147 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1148 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1149 /* Audio DSP */
1150 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1151 /* ANC */
1152 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1153 /* Output Side */
1154 /* DAC mixer before sound effect */
1155 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1156 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1157 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1158 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1159 /* DAC2 channel Mux */
1160 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1161 &rt5640_dac_l2_mux),
1162 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1163 &rt5640_dac_r2_mux),
1164 /* DAC Mixer */
1165 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1166 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1167 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1168 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1169 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1170 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1171 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1172 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1173 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1174 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1175 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1176 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1177 /* DACs */
1178 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1179 RT5640_PWR_DAC_L1_BIT, 0),
1180 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1181 RT5640_PWR_DAC_L2_BIT, 0),
1182 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1183 RT5640_PWR_DAC_R1_BIT, 0),
1184 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1185 RT5640_PWR_DAC_R2_BIT, 0),
1186 /* SPK/OUT Mixer */
1187 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1188 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1189 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1190 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1191 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1192 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1193 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1194 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1195 /* Ouput Volume */
1196 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1197 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1198 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1199 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1200 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1201 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1202 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1203 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1204 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1205 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1206 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1207 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1208 /* SPO/HPO/LOUT/Mono Mixer */
1209 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1210 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1211 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1212 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1213 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1214 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1215 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1216 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1217 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1218 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1219 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1220 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1221 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1222 RT5640_PWR_MA_BIT, 0, NULL, 0),
246693ba
BL		 1223 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1224 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1225 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1226 rt5640_hp_event,
1227 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1228 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
997b0520 1229 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
246693ba 1230 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
997b0520
BL		 1231 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1232 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
246693ba
BL		 1233 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1234
1235 /* Output Switch */
1236 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1237 &spk_l_enable_control),
1238 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1239 &spk_r_enable_control),
1240 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1241 &hp_l_enable_control),
1242 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1243 &hp_r_enable_control),
1244 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
997b0520
BL		 1245 /* Output Lines */
1246 SND_SOC_DAPM_OUTPUT("SPOLP"),
1247 SND_SOC_DAPM_OUTPUT("SPOLN"),
1248 SND_SOC_DAPM_OUTPUT("SPORP"),
1249 SND_SOC_DAPM_OUTPUT("SPORN"),
1250 SND_SOC_DAPM_OUTPUT("HPOL"),
1251 SND_SOC_DAPM_OUTPUT("HPOR"),
1252 SND_SOC_DAPM_OUTPUT("LOUTL"),
1253 SND_SOC_DAPM_OUTPUT("LOUTR"),
1254 SND_SOC_DAPM_OUTPUT("MONOP"),
1255 SND_SOC_DAPM_OUTPUT("MONON"),
1256};
1257
1258static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1259 {"IN1P", NULL, "LDO2"},
1260 {"IN2P", NULL, "LDO2"},
1261
1262 {"DMIC L1", NULL, "DMIC1"},
1263 {"DMIC R1", NULL, "DMIC1"},
1264 {"DMIC L2", NULL, "DMIC2"},
1265 {"DMIC R2", NULL, "DMIC2"},
1266
1267 {"BST1", NULL, "IN1P"},
1268 {"BST1", NULL, "IN1N"},
1269 {"BST2", NULL, "IN2P"},
1270 {"BST2", NULL, "IN2N"},
1271
1272 {"INL VOL", NULL, "IN2P"},
1273 {"INR VOL", NULL, "IN2N"},
1274
1275 {"RECMIXL", "HPOL Switch", "HPOL"},
1276 {"RECMIXL", "INL Switch", "INL VOL"},
1277 {"RECMIXL", "BST2 Switch", "BST2"},
1278 {"RECMIXL", "BST1 Switch", "BST1"},
1279 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1280
1281 {"RECMIXR", "HPOR Switch", "HPOR"},
1282 {"RECMIXR", "INR Switch", "INR VOL"},
1283 {"RECMIXR", "BST2 Switch", "BST2"},
1284 {"RECMIXR", "BST1 Switch", "BST1"},
1285 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1286
1287 {"ADC L", NULL, "RECMIXL"},
1288 {"ADC R", NULL, "RECMIXR"},
1289
1290 {"DMIC L1", NULL, "DMIC CLK"},
1291 {"DMIC L1", NULL, "DMIC1 Power"},
1292 {"DMIC R1", NULL, "DMIC CLK"},
1293 {"DMIC R1", NULL, "DMIC1 Power"},
1294 {"DMIC L2", NULL, "DMIC CLK"},
1295 {"DMIC L2", NULL, "DMIC2 Power"},
1296 {"DMIC R2", NULL, "DMIC CLK"},
1297 {"DMIC R2", NULL, "DMIC2 Power"},
1298
1299 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1300 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1301 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1302 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1303 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1304
1305 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1306 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1307 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1308 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1309 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1310
1311 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1312 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1313 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1314 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1315 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1316
1317 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1318 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1319 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1320 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1321 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1322
1323 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1324 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1325 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1326 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1327
1328 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1329 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1330 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1331 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1332
1333 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1334 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1335 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1336 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1337
1338 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1339 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1340 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1341 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1342
1343 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1344 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1345 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1346 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1347
1348 {"IF1 ADC", NULL, "I2S1"},
1349 {"IF1 ADC", NULL, "IF1 ADC L"},
1350 {"IF1 ADC", NULL, "IF1 ADC R"},
1351 {"IF2 ADC", NULL, "I2S2"},
1352 {"IF2 ADC", NULL, "IF2 ADC L"},
1353 {"IF2 ADC", NULL, "IF2 ADC R"},
1354
1355 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1356 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1357 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1358 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1359 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1360 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1361
1362 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1363 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1364 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1365 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1366 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1367 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1368
1369 {"AIF1TX", NULL, "DAI1 TX Mux"},
1370 {"AIF1TX", NULL, "SDI1 TX Mux"},
1371 {"AIF2TX", NULL, "DAI2 TX Mux"},
1372 {"AIF2TX", NULL, "SDI2 TX Mux"},
1373
1374 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1375 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1376 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1377 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1378
1379 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1380 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1381 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1382 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1383
1384 {"IF1 DAC", NULL, "I2S1"},
1385 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1386 {"IF2 DAC", NULL, "I2S2"},
1387 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1388
1389 {"IF1 DAC L", NULL, "IF1 DAC"},
1390 {"IF1 DAC R", NULL, "IF1 DAC"},
1391 {"IF2 DAC L", NULL, "IF2 DAC"},
1392 {"IF2 DAC R", NULL, "IF2 DAC"},
1393
1394 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1395 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1396 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1397 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1398
1399 {"ANC", NULL, "Stereo ADC MIXL"},
1400 {"ANC", NULL, "Stereo ADC MIXR"},
1401
1402 {"Audio DSP", NULL, "DAC MIXL"},
1403 {"Audio DSP", NULL, "DAC MIXR"},
1404
1405 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1406 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1407
1408 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1409
1410 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1411 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1412 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1413 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1414 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1415 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1416
1417 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1418 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1419 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1420 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1421 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1422 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1423
1424 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1425 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1426 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1427 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1428
1429 {"DAC L1", NULL, "Stereo DAC MIXL"},
1430 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1431 {"DAC R1", NULL, "Stereo DAC MIXR"},
1432 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1433 {"DAC L2", NULL, "Mono DAC MIXL"},
1434 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1435 {"DAC R2", NULL, "Mono DAC MIXR"},
1436 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1437
1438 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1439 {"SPK MIXL", "INL Switch", "INL VOL"},
1440 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1441 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1442 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1443 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1444 {"SPK MIXR", "INR Switch", "INR VOL"},
1445 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1446 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1447 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1448
1449 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1450 {"OUT MIXL", "BST1 Switch", "BST1"},
1451 {"OUT MIXL", "INL Switch", "INL VOL"},
1452 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1453 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1454 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1455 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1456
1457 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1458 {"OUT MIXR", "BST2 Switch", "BST2"},
1459 {"OUT MIXR", "BST1 Switch", "BST1"},
1460 {"OUT MIXR", "INR Switch", "INR VOL"},
1461 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1462 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1463 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1464 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1465
1466 {"SPKVOL L", NULL, "SPK MIXL"},
1467 {"SPKVOL R", NULL, "SPK MIXR"},
1468 {"HPOVOL L", NULL, "OUT MIXL"},
1469 {"HPOVOL R", NULL, "OUT MIXR"},
1470 {"OUTVOL L", NULL, "OUT MIXL"},
1471 {"OUTVOL R", NULL, "OUT MIXR"},
1472
1473 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1474 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1475 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1476 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1477 {"SPOL MIX", "BST1 Switch", "BST1"},
1478 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1479 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1480 {"SPOR MIX", "BST1 Switch", "BST1"},
1481
1482 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1483 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1484 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
246693ba 1485 {"HPO MIX L", NULL, "HP L Amp"},
997b0520
BL		 1486 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1487 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1488 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
246693ba 1489 {"HPO MIX R", NULL, "HP R Amp"},
997b0520
BL		 1490
1491 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1492 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1493 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1494 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1495
1496 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1497 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1498 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1499 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1500 {"Mono MIX", "BST1 Switch", "BST1"},
1501
246693ba
BL		 1502 {"HP Amp", NULL, "HPO MIX L"},
1503 {"HP Amp", NULL, "HPO MIX R"},
997b0520 1504
246693ba
BL		 1505 {"Speaker L Playback", "Switch", "SPOL MIX"},
1506 {"Speaker R Playback", "Switch", "SPOR MIX"},
1507 {"SPOLP", NULL, "Speaker L Playback"},
1508 {"SPOLN", NULL, "Speaker L Playback"},
1509 {"SPORP", NULL, "Speaker R Playback"},
1510 {"SPORN", NULL, "Speaker R Playback"},
997b0520
BL		 1511
1512 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1513 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1514 {"SPORP", NULL, "Improve SPK Amp Drv"},
1515 {"SPORN", NULL, "Improve SPK Amp Drv"},
1516
1517 {"HPOL", NULL, "Improve HP Amp Drv"},
1518 {"HPOR", NULL, "Improve HP Amp Drv"},
1519
246693ba
BL		 1520 {"HP L Playback", "Switch", "HP Amp"},
1521 {"HP R Playback", "Switch", "HP Amp"},
1522 {"HPOL", NULL, "HP L Playback"},
1523 {"HPOR", NULL, "HP R Playback"},
997b0520
BL		 1524 {"LOUTL", NULL, "LOUT MIX"},
1525 {"LOUTR", NULL, "LOUT MIX"},
1526 {"MONOP", NULL, "Mono MIX"},
1527 {"MONON", NULL, "Mono MIX"},
1528 {"MONOP", NULL, "Improve MONO Amp Drv"},
1529};
1530
1531static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1532{
1533 int ret = 0, val;
1534
1535 if (codec == NULL)
1536 return -EINVAL;
1537
1538 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1539 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1540 switch (dai_id) {
1541 case RT5640_AIF1:
1542 switch (val) {
1543 case RT5640_IF_123:
1544 case RT5640_IF_132:
1545 ret |= RT5640_U_IF1;
1546 break;
1547 case RT5640_IF_113:
1548 ret |= RT5640_U_IF1;
1549 case RT5640_IF_312:
1550 case RT5640_IF_213:
1551 ret |= RT5640_U_IF2;
1552 break;
1553 }
1554 break;
1555
1556 case RT5640_AIF2:
1557 switch (val) {
1558 case RT5640_IF_231:
1559 case RT5640_IF_213:
1560 ret |= RT5640_U_IF1;
1561 break;
1562 case RT5640_IF_223:
1563 ret |= RT5640_U_IF1;
1564 case RT5640_IF_123:
1565 case RT5640_IF_321:
1566 ret |= RT5640_U_IF2;
1567 break;
1568 }
1569 break;
1570
1571 default:
1572 ret = -EINVAL;
1573 break;
1574 }
1575
1576 return ret;
1577}
1578
1579static int get_clk_info(int sclk, int rate)
1580{
1581 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1582
1583 if (sclk <= 0 || rate <= 0)
1584 return -EINVAL;
1585
1586 rate = rate << 8;
1587 for (i = 0; i < ARRAY_SIZE(pd); i++)
1588 if (sclk == rate * pd[i])
1589 return i;
1590
1591 return -EINVAL;
1592}
1593
1594static int rt5640_hw_params(struct snd_pcm_substream *substream,
1595 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1596{
ab64246c 1597 struct snd_soc_codec *codec = dai->codec;
997b0520 1598 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1599 unsigned int val_len = 0, val_clk, mask_clk;
1600 int dai_sel, pre_div, bclk_ms, frame_size;
997b0520
BL		 1601
1602 rt5640->lrck[dai->id] = params_rate(params);
1603 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1604 if (pre_div < 0) {
9e9cb9b9
LG		 1605 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1606 rt5640->lrck[dai->id], dai->id);
997b0520
BL		 1607 return -EINVAL;
1608 }
1609 frame_size = snd_soc_params_to_frame_size(params);
1610 if (frame_size < 0) {
1611 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1612 return frame_size;
1613 }
1614 if (frame_size > 32)
1615 bclk_ms = 1;
1616 else
1617 bclk_ms = 0;
1618 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1619
1620 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1621 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1622 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1623 bclk_ms, pre_div, dai->id);
1624
1625 switch (params_format(params)) {
1626 case SNDRV_PCM_FORMAT_S16_LE:
1627 break;
1628 case SNDRV_PCM_FORMAT_S20_3LE:
1629 val_len |= RT5640_I2S_DL_20;
1630 break;
1631 case SNDRV_PCM_FORMAT_S24_LE:
1632 val_len |= RT5640_I2S_DL_24;
1633 break;
1634 case SNDRV_PCM_FORMAT_S8:
1635 val_len |= RT5640_I2S_DL_8;
1636 break;
1637 default:
1638 return -EINVAL;
1639 }
1640
1641 dai_sel = get_sdp_info(codec, dai->id);
1642 if (dai_sel < 0) {
1643 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1644 return -EINVAL;
1645 }
1646 if (dai_sel & RT5640_U_IF1) {
1647 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1648 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1649 pre_div << RT5640_I2S_PD1_SFT;
1650 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1651 RT5640_I2S_DL_MASK, val_len);
1652 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1653 }
1654 if (dai_sel & RT5640_U_IF2) {
1655 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1656 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1657 pre_div << RT5640_I2S_PD2_SFT;
1658 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1659 RT5640_I2S_DL_MASK, val_len);
1660 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1661 }
1662
1663 return 0;
1664}
1665
1666static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1667{
1668 struct snd_soc_codec *codec = dai->codec;
1669 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
5a7615cf
TI		 1670 unsigned int reg_val = 0;
1671 int dai_sel;
997b0520
BL		 1672
1673 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1674 case SND_SOC_DAIFMT_CBM_CFM:
1675 rt5640->master[dai->id] = 1;
1676 break;
1677 case SND_SOC_DAIFMT_CBS_CFS:
1678 reg_val |= RT5640_I2S_MS_S;
1679 rt5640->master[dai->id] = 0;
1680 break;
1681 default:
1682 return -EINVAL;
1683 }
1684
1685 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1686 case SND_SOC_DAIFMT_NB_NF:
1687 break;
1688 case SND_SOC_DAIFMT_IB_NF:
1689 reg_val |= RT5640_I2S_BP_INV;
1690 break;
1691 default:
1692 return -EINVAL;
1693 }
1694
1695 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1696 case SND_SOC_DAIFMT_I2S:
1697 break;
1698 case SND_SOC_DAIFMT_LEFT_J:
1699 reg_val |= RT5640_I2S_DF_LEFT;
1700 break;
1701 case SND_SOC_DAIFMT_DSP_A:
1702 reg_val |= RT5640_I2S_DF_PCM_A;
1703 break;
1704 case SND_SOC_DAIFMT_DSP_B:
1705 reg_val |= RT5640_I2S_DF_PCM_B;
1706 break;
1707 default:
1708 return -EINVAL;
1709 }
1710
1711 dai_sel = get_sdp_info(codec, dai->id);
1712 if (dai_sel < 0) {
1713 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1714 return -EINVAL;
1715 }
1716 if (dai_sel & RT5640_U_IF1) {
1717 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1718 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1719 RT5640_I2S_DF_MASK, reg_val);
1720 }
1721 if (dai_sel & RT5640_U_IF2) {
1722 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1723 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1724 RT5640_I2S_DF_MASK, reg_val);
1725 }
1726
1727 return 0;
1728}
1729
1730static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1731 int clk_id, unsigned int freq, int dir)
1732{
1733 struct snd_soc_codec *codec = dai->codec;
1734 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1735 unsigned int reg_val = 0;
1736
1737 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1738 return 0;
1739
1740 switch (clk_id) {
1741 case RT5640_SCLK_S_MCLK:
1742 reg_val |= RT5640_SCLK_SRC_MCLK;
1743 break;
1744 case RT5640_SCLK_S_PLL1:
1745 reg_val |= RT5640_SCLK_SRC_PLL1;
1746 break;
1747 case RT5640_SCLK_S_PLL1_TK:
1748 reg_val |= RT5640_SCLK_SRC_PLL1T;
1749 break;
1750 case RT5640_SCLK_S_RCCLK:
1751 reg_val |= RT5640_SCLK_SRC_RCCLK;
1752 break;
1753 default:
1754 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1755 return -EINVAL;
1756 }
1757 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1758 RT5640_SCLK_SRC_MASK, reg_val);
1759 rt5640->sysclk = freq;
1760 rt5640->sysclk_src = clk_id;
1761
1762 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1763 return 0;
1764}
1765
1766/**
1767 * rt5640_pll_calc - Calculate PLL M/N/K code.
1768 * @freq_in: external clock provided to codec.
1769 * @freq_out: target clock which codec works on.
1770 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1771 *
1772 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1773 * which make calculation more efficiently.
1774 *
1775 * Returns 0 for success or negative error code.
1776 */
1777static int rt5640_pll_calc(const unsigned int freq_in,
1778 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1779{
1780 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1781 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1782 int red_t = abs(freq_out - freq_in);
1783 bool bypass = false;
1784
1785 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1786 return -EINVAL;
1787
1788 for (n_t = 0; n_t <= max_n; n_t++) {
1789 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1790 if (in_t < 0)
1791 continue;
1792 if (in_t == freq_out) {
1793 bypass = true;
1794 n = n_t;
1795 goto code_find;
1796 }
1797 for (m_t = 0; m_t <= max_m; m_t++) {
1798 out_t = in_t / (m_t + 2);
1799 red = abs(out_t - freq_out);
1800 if (red < red_t) {
1801 n = n_t;
1802 m = m_t;
1803 if (red == 0)
1804 goto code_find;
1805 red_t = red;
1806 }
1807 }
1808 }
1809 pr_debug("Only get approximation about PLL\n");
1810
1811code_find:
1812 pll_code->m_bp = bypass;
1813 pll_code->m_code = m;
1814 pll_code->n_code = n;
1815 pll_code->k_code = 2;
1816 return 0;
1817}
1818
1819static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1820 unsigned int freq_in, unsigned int freq_out)
1821{
1822 struct snd_soc_codec *codec = dai->codec;
1823 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1824 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1825 int ret, dai_sel;
1826
1827 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1828 freq_out == rt5640->pll_out)
1829 return 0;
1830
1831 if (!freq_in || !freq_out) {
1832 dev_dbg(codec->dev, "PLL disabled\n");
1833
1834 rt5640->pll_in = 0;
1835 rt5640->pll_out = 0;
1836 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1837 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1838 return 0;
1839 }
1840
1841 switch (source) {
1842 case RT5640_PLL1_S_MCLK:
1843 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1844 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1845 break;
1846 case RT5640_PLL1_S_BCLK1:
1847 case RT5640_PLL1_S_BCLK2:
1848 dai_sel = get_sdp_info(codec, dai->id);
1849 if (dai_sel < 0) {
1850 dev_err(codec->dev,
1851 "Failed to get sdp info: %d\n", dai_sel);
1852 return -EINVAL;
1853 }
1854 if (dai_sel & RT5640_U_IF1) {
1855 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1856 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1857 }
1858 if (dai_sel & RT5640_U_IF2) {
1859 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1860 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1861 }
1862 break;
1863 default:
1864 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1865 return -EINVAL;
1866 }
1867
1868 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1869 if (ret < 0) {
1870 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1871 return ret;
1872 }
1873
1874 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1875 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1876
1877 snd_soc_write(codec, RT5640_PLL_CTRL1,
1878 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1879 snd_soc_write(codec, RT5640_PLL_CTRL2,
1880 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1881 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1882
1883 rt5640->pll_in = freq_in;
1884 rt5640->pll_out = freq_out;
1885 rt5640->pll_src = source;
1886
1887 return 0;
1888}
1889
1890static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1891 enum snd_soc_bias_level level)
1892{
1893 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1894 switch (level) {
1895 case SND_SOC_BIAS_STANDBY:
1896 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1897 regcache_cache_only(rt5640->regmap, false);
1898 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1899 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1900 RT5640_PWR_BG | RT5640_PWR_VREF2,
1901 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1902 RT5640_PWR_BG | RT5640_PWR_VREF2);
246693ba 1903 usleep_range(10000, 15000);
997b0520
BL		 1904 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1905 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1906 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1907 regcache_sync(rt5640->regmap);
1908 snd_soc_update_bits(codec, RT5640_DUMMY1,
1909 0x0301, 0x0301);
997b0520
BL		 1910 snd_soc_update_bits(codec, RT5640_MICBIAS,
1911 0x0030, 0x0030);
1912 }
1913 break;
1914
1915 case SND_SOC_BIAS_OFF:
1916 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1917 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1918 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1919 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1920 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1921 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1922 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1923 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1924 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1925 break;
1926
1927 default:
1928 break;
1929 }
1930 codec->dapm.bias_level = level;
1931
1932 return 0;
1933}
1934
1935static int rt5640_probe(struct snd_soc_codec *codec)
1936{
1937 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
997b0520
BL		 1938
1939 rt5640->codec = codec;
997b0520
BL		 1940
1941 codec->dapm.idle_bias_off = 1;
1942 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1943
1944 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
997b0520
BL		 1945 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1946 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1947
1948 return 0;
1949}
1950
1951static int rt5640_remove(struct snd_soc_codec *codec)
1952{
1953 rt5640_reset(codec);
1954
1955 return 0;
1956}
1957
1958#ifdef CONFIG_PM
1959static int rt5640_suspend(struct snd_soc_codec *codec)
1960{
1961 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1962
1963 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1964 rt5640_reset(codec);
1965 regcache_cache_only(rt5640->regmap, true);
1966 regcache_mark_dirty(rt5640->regmap);
e58f301e
MB		 1967 if (gpio_is_valid(rt5640->pdata.ldo1_en))
1968 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
997b0520
BL		 1969
1970 return 0;
1971}
1972
1973static int rt5640_resume(struct snd_soc_codec *codec)
1974{
e58f301e
MB		 1975 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1976
1977 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
1978 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
1979 msleep(400);
1980 }
997b0520
BL		 1981
1982 return 0;
1983}
1984#else
1985#define rt5640_suspend NULL
1986#define rt5640_resume NULL
1987#endif
1988
1989#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1990#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1991 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1992
9be94aea 1993static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
997b0520
BL		 1994 .hw_params = rt5640_hw_params,
1995 .set_fmt = rt5640_set_dai_fmt,
1996 .set_sysclk = rt5640_set_dai_sysclk,
1997 .set_pll = rt5640_set_dai_pll,
1998};
1999
9be94aea 2000static struct snd_soc_dai_driver rt5640_dai[] = {
997b0520
BL		 2001 {
2002 .name = "rt5640-aif1",
2003 .id = RT5640_AIF1,
2004 .playback = {
2005 .stream_name = "AIF1 Playback",
2006 .channels_min = 1,
2007 .channels_max = 2,
2008 .rates = RT5640_STEREO_RATES,
2009 .formats = RT5640_FORMATS,
2010 },
2011 .capture = {
2012 .stream_name = "AIF1 Capture",
2013 .channels_min = 1,
2014 .channels_max = 2,
2015 .rates = RT5640_STEREO_RATES,
2016 .formats = RT5640_FORMATS,
2017 },
2018 .ops = &rt5640_aif_dai_ops,
2019 },
2020 {
2021 .name = "rt5640-aif2",
2022 .id = RT5640_AIF2,
2023 .playback = {
2024 .stream_name = "AIF2 Playback",
2025 .channels_min = 1,
2026 .channels_max = 2,
2027 .rates = RT5640_STEREO_RATES,
2028 .formats = RT5640_FORMATS,
2029 },
2030 .capture = {
2031 .stream_name = "AIF2 Capture",
2032 .channels_min = 1,
2033 .channels_max = 2,
2034 .rates = RT5640_STEREO_RATES,
2035 .formats = RT5640_FORMATS,
2036 },
2037 .ops = &rt5640_aif_dai_ops,
2038 },
2039};
2040
2041static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2042 .probe = rt5640_probe,
2043 .remove = rt5640_remove,
2044 .suspend = rt5640_suspend,
2045 .resume = rt5640_resume,
2046 .set_bias_level = rt5640_set_bias_level,
2047 .controls = rt5640_snd_controls,
2048 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2049 .dapm_widgets = rt5640_dapm_widgets,
2050 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2051 .dapm_routes = rt5640_dapm_routes,
2052 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2053};
2054
2055static const struct regmap_config rt5640_regmap = {
2056 .reg_bits = 8,
2057 .val_bits = 16,
2058
2059 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2060 RT5640_PR_SPACING),
2061 .volatile_reg = rt5640_volatile_register,
2062 .readable_reg = rt5640_readable_register,
2063
2064 .cache_type = REGCACHE_RBTREE,
2065 .reg_defaults = rt5640_reg,
2066 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2067 .ranges = rt5640_ranges,
2068 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2069};
2070
2071static const struct i2c_device_id rt5640_i2c_id[] = {
2072 { "rt5640", 0 },
2073 { }
2074};
2075MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2076
03a620d8
SW		 2077#if defined(CONFIG_OF)
2078static const struct of_device_id rt5640_of_match[] = {
2079 { .compatible = "realtek,rt5640", },
2080 {},
2081};
2082MODULE_DEVICE_TABLE(of, rt5640_of_match);
2083#endif
2084
32fcb97b 2085#ifdef CONFIG_ACPI
02b80773
LG		 2086static struct acpi_device_id rt5640_acpi_match[] = {
2087 { "INT33CA", 0 },
b31b2b6d 2088 { "10EC5640", 0 },
02b80773
LG		 2089 { },
2090};
2091MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
32fcb97b 2092#endif
02b80773 2093
dcad9f03
SW		 2094static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2095{
2096 rt5640->pdata.in1_diff = of_property_read_bool(np,
2097 "realtek,in1-differential");
2098 rt5640->pdata.in2_diff = of_property_read_bool(np,
2099 "realtek,in2-differential");
2100
2101 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2102 "realtek,ldo1-en-gpios", 0);
2103 /*
2104 * LDO1_EN is optional (it may be statically tied on the board).
2105 * -ENOENT means that the property doesn't exist, i.e. there is no
2106 * GPIO, so is not an error. Any other error code means the property
2107 * exists, but could not be parsed.
2108 */
2109 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2110 (rt5640->pdata.ldo1_en != -ENOENT))
2111 return rt5640->pdata.ldo1_en;
2112
2113 return 0;
2114}
2115
997b0520
BL		 2116static int rt5640_i2c_probe(struct i2c_client *i2c,
2117 const struct i2c_device_id *id)
2118{
2119 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2120 struct rt5640_priv *rt5640;
2121 int ret;
2122 unsigned int val;
2123
2124 rt5640 = devm_kzalloc(&i2c->dev,
2125 sizeof(struct rt5640_priv),
2126 GFP_KERNEL);
2127 if (NULL == rt5640)
2128 return -ENOMEM;
dcad9f03
SW		 2129 i2c_set_clientdata(i2c, rt5640);
2130
2131 if (pdata) {
2132 rt5640->pdata = *pdata;
2133 /*
2134 * Translate zero'd out (default) pdata value to an invalid
2135 * GPIO ID. This makes the pdata and DT paths consistent in
2136 * terms of the value left in this field when no GPIO is
2137 * specified, but means we can't actually use GPIO 0.
2138 */
2139 if (!rt5640->pdata.ldo1_en)
2140 rt5640->pdata.ldo1_en = -EINVAL;
2141 } else if (i2c->dev.of_node) {
2142 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2143 if (ret)
2144 return ret;
2145 } else
2146 rt5640->pdata.ldo1_en = -EINVAL;
997b0520
BL		 2147
2148 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2149 if (IS_ERR(rt5640->regmap)) {
2150 ret = PTR_ERR(rt5640->regmap);
2151 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2152 ret);
2153 return ret;
2154 }
2155
dcad9f03 2156 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
997b0520
BL		 2157 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2158 GPIOF_OUT_INIT_HIGH,
2159 "RT5640 LDO1_EN");
2160 if (ret < 0) {
2161 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2162 rt5640->pdata.ldo1_en, ret);
2163 return ret;
2164 }
2165 msleep(400);
2166 }
2167
2168 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2169 if ((val != RT5640_DEVICE_ID)) {
2170 dev_err(&i2c->dev,
2171 "Device with ID register %x is not rt5640/39\n", val);
2172 return -ENODEV;
2173 }
2174
2175 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2176
2177 ret = regmap_register_patch(rt5640->regmap, init_list,
2178 ARRAY_SIZE(init_list));
2179 if (ret != 0)
2180 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2181
2182 if (rt5640->pdata.in1_diff)
2183 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2184 RT5640_IN_DF1, RT5640_IN_DF1);
2185
2186 if (rt5640->pdata.in2_diff)
2187 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2188 RT5640_IN_DF2, RT5640_IN_DF2);
2189
246693ba
BL		 2190 rt5640->hp_mute = 1;
2191
997b0520
BL		 2192 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2193 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2194 if (ret < 0)
2195 goto err;
2196
2197 return 0;
2198err:
2199 return ret;
2200}
2201
2202static int rt5640_i2c_remove(struct i2c_client *i2c)
2203{
2204 snd_soc_unregister_codec(&i2c->dev);
2205
2206 return 0;
2207}
2208
9be94aea 2209static struct i2c_driver rt5640_i2c_driver = {
997b0520
BL		 2210 .driver = {
2211 .name = "rt5640",
2212 .owner = THIS_MODULE,
02b80773 2213 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
03a620d8 2214 .of_match_table = of_match_ptr(rt5640_of_match),
997b0520
BL		 2215 },
2216 .probe = rt5640_i2c_probe,
2217 .remove = rt5640_i2c_remove,
2218 .id_table = rt5640_i2c_id,
2219};
2220module_i2c_driver(rt5640_i2c_driver);
2221
2222MODULE_DESCRIPTION("ASoC RT5640 driver");
2223MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2224MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)