projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
[linux-block.git] / sound / soc / codecs / rt5631.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
d8085222 2/*
3 * rt5631.c -- RT5631 ALSA Soc Audio driver
4 *
5 * Copyright 2011 Realtek Microelectronics
6 *
7 * Author: flove <flove@realtek.com>
8 *
9 * Based on WM8753.c
d8085222 10 */
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pm.h>
16#include <linux/i2c.h>
01476801 17#include <linux/regmap.h>
d8085222 18#include <sound/core.h>
19#include <sound/pcm.h>
20#include <sound/pcm_params.h>
21#include <sound/soc.h>
22#include <sound/soc-dapm.h>
23#include <sound/initval.h>
24#include <sound/tlv.h>
25
26#include "rt5631.h"
27
28struct rt5631_priv {
01476801 29 struct regmap *regmap;
d8085222 30 int codec_version;
31 int master;
32 int sysclk;
33 int rx_rate;
34 int bclk_rate;
35 int dmic_used_flag;
36};
37
01476801
MB		 38static const struct reg_default rt5631_reg[] = {
39 { RT5631_SPK_OUT_VOL, 0x8888 },
40 { RT5631_HP_OUT_VOL, 0x8080 },
41 { RT5631_MONO_AXO_1_2_VOL, 0xa080 },
42 { RT5631_AUX_IN_VOL, 0x0808 },
43 { RT5631_ADC_REC_MIXER, 0xf0f0 },
44 { RT5631_VDAC_DIG_VOL, 0x0010 },
45 { RT5631_OUTMIXER_L_CTRL, 0xffc0 },
46 { RT5631_OUTMIXER_R_CTRL, 0xffc0 },
47 { RT5631_AXO1MIXER_CTRL, 0x88c0 },
48 { RT5631_AXO2MIXER_CTRL, 0x88c0 },
49 { RT5631_DIG_MIC_CTRL, 0x3000 },
50 { RT5631_MONO_INPUT_VOL, 0x8808 },
51 { RT5631_SPK_MIXER_CTRL, 0xf8f8 },
52 { RT5631_SPK_MONO_OUT_CTRL, 0xfc00 },
53 { RT5631_SPK_MONO_HP_OUT_CTRL, 0x4440 },
54 { RT5631_SDP_CTRL, 0x8000 },
55 { RT5631_MONO_SDP_CTRL, 0x8000 },
56 { RT5631_STEREO_AD_DA_CLK_CTRL, 0x2010 },
57 { RT5631_GEN_PUR_CTRL_REG, 0x0e00 },
58 { RT5631_INT_ST_IRQ_CTRL_2, 0x071a },
59 { RT5631_MISC_CTRL, 0x2040 },
60 { RT5631_DEPOP_FUN_CTRL_2, 0x8000 },
61 { RT5631_SOFT_VOL_CTRL, 0x07e0 },
62 { RT5631_ALC_CTRL_1, 0x0206 },
63 { RT5631_ALC_CTRL_3, 0x2000 },
64 { RT5631_PSEUDO_SPATL_CTRL, 0x0553 },
d8085222 65};
66
67/**
68 * rt5631_write_index - write index register of 2nd layer
69 */
46295e5e 70static void rt5631_write_index(struct snd_soc_component *component,
d8085222 71 unsigned int reg, unsigned int value)
72{
46295e5e
KM		 73 snd_soc_component_write(component, RT5631_INDEX_ADD, reg);
74 snd_soc_component_write(component, RT5631_INDEX_DATA, value);
d8085222 75}
76
77/**
78 * rt5631_read_index - read index register of 2nd layer
79 */
46295e5e 80static unsigned int rt5631_read_index(struct snd_soc_component *component,
d8085222 81 unsigned int reg)
82{
83 unsigned int value;
84
46295e5e
KM		 85 snd_soc_component_write(component, RT5631_INDEX_ADD, reg);
86 value = snd_soc_component_read32(component, RT5631_INDEX_DATA);
d8085222 87
88 return value;
89}
90
46295e5e 91static int rt5631_reset(struct snd_soc_component *component)
d8085222 92{
46295e5e 93 return snd_soc_component_write(component, RT5631_RESET, 0);
d8085222 94}
95
01476801 96static bool rt5631_volatile_register(struct device *dev, unsigned int reg)
d8085222 97{
98 switch (reg) {
99 case RT5631_RESET:
100 case RT5631_INT_ST_IRQ_CTRL_2:
101 case RT5631_INDEX_ADD:
102 case RT5631_INDEX_DATA:
103 case RT5631_EQ_CTRL:
508e8641 104 return true;
d8085222 105 default:
508e8641 106 return false;
d8085222 107 }
108}
109
01476801 110static bool rt5631_readable_register(struct device *dev, unsigned int reg)
d8085222 111{
112 switch (reg) {
113 case RT5631_RESET:
114 case RT5631_SPK_OUT_VOL:
115 case RT5631_HP_OUT_VOL:
116 case RT5631_MONO_AXO_1_2_VOL:
117 case RT5631_AUX_IN_VOL:
118 case RT5631_STEREO_DAC_VOL_1:
119 case RT5631_MIC_CTRL_1:
120 case RT5631_STEREO_DAC_VOL_2:
121 case RT5631_ADC_CTRL_1:
122 case RT5631_ADC_REC_MIXER:
123 case RT5631_ADC_CTRL_2:
124 case RT5631_VDAC_DIG_VOL:
125 case RT5631_OUTMIXER_L_CTRL:
126 case RT5631_OUTMIXER_R_CTRL:
127 case RT5631_AXO1MIXER_CTRL:
128 case RT5631_AXO2MIXER_CTRL:
129 case RT5631_MIC_CTRL_2:
130 case RT5631_DIG_MIC_CTRL:
131 case RT5631_MONO_INPUT_VOL:
132 case RT5631_SPK_MIXER_CTRL:
133 case RT5631_SPK_MONO_OUT_CTRL:
134 case RT5631_SPK_MONO_HP_OUT_CTRL:
135 case RT5631_SDP_CTRL:
136 case RT5631_MONO_SDP_CTRL:
137 case RT5631_STEREO_AD_DA_CLK_CTRL:
138 case RT5631_PWR_MANAG_ADD1:
139 case RT5631_PWR_MANAG_ADD2:
140 case RT5631_PWR_MANAG_ADD3:
141 case RT5631_PWR_MANAG_ADD4:
142 case RT5631_GEN_PUR_CTRL_REG:
143 case RT5631_GLOBAL_CLK_CTRL:
144 case RT5631_PLL_CTRL:
145 case RT5631_INT_ST_IRQ_CTRL_1:
146 case RT5631_INT_ST_IRQ_CTRL_2:
147 case RT5631_GPIO_CTRL:
148 case RT5631_MISC_CTRL:
149 case RT5631_DEPOP_FUN_CTRL_1:
150 case RT5631_DEPOP_FUN_CTRL_2:
151 case RT5631_JACK_DET_CTRL:
152 case RT5631_SOFT_VOL_CTRL:
153 case RT5631_ALC_CTRL_1:
154 case RT5631_ALC_CTRL_2:
155 case RT5631_ALC_CTRL_3:
156 case RT5631_PSEUDO_SPATL_CTRL:
157 case RT5631_INDEX_ADD:
158 case RT5631_INDEX_DATA:
159 case RT5631_EQ_CTRL:
160 case RT5631_VENDOR_ID:
161 case RT5631_VENDOR_ID1:
162 case RT5631_VENDOR_ID2:
508e8641 163 return true;
d8085222 164 default:
508e8641 165 return false;
d8085222 166 }
167}
168
169static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
170static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
171static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
172/* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */
7f708abe 173static const DECLARE_TLV_DB_RANGE(mic_bst_tlv,
d8085222 174 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
175 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
176 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
177 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
178 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
179 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
7f708abe
LPC		 180 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
181);
d8085222 182
183static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
184 struct snd_ctl_elem_value *ucontrol)
185{
46295e5e
KM		 186 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
187 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 188
189 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
190
191 return 0;
192}
193
194static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
195 struct snd_ctl_elem_value *ucontrol)
196{
46295e5e
KM		 197 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
198 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 199
200 rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
201 return 0;
202}
203
204/* MIC Input Type */
205static const char *rt5631_input_mode[] = {
206 "Single ended", "Differential"};
207
f843cdf2
TI		 208static SOC_ENUM_SINGLE_DECL(rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1,
209 RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode);
d8085222 210
f843cdf2
TI		 211static SOC_ENUM_SINGLE_DECL(rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1,
212 RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode);
d8085222 213
214/* MONO Input Type */
f843cdf2
TI		 215static SOC_ENUM_SINGLE_DECL(rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL,
216 RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode);
d8085222 217
218/* SPK Ratio Gain Control */
219static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x",
220 "1.56x", "1.68x", "1.99x", "2.34x"};
221
f843cdf2
TI		 222static SOC_ENUM_SINGLE_DECL(rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG,
223 RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio);
d8085222 224
225static const struct snd_kcontrol_new rt5631_snd_controls[] = {
226 /* MIC */
227 SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum),
d77a7608 228 SOC_SINGLE_TLV("MIC1 Boost Volume", RT5631_MIC_CTRL_2,
d8085222 229 RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv),
230 SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum),
d77a7608 231 SOC_SINGLE_TLV("MIC2 Boost Volume", RT5631_MIC_CTRL_2,
d8085222 232 RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv),
233 /* MONO IN */
234 SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum),
235 SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL,
236 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
237 RT5631_VOL_MASK, 1, in_vol_tlv),
238 /* AXI */
239 SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL,
240 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
241 RT5631_VOL_MASK, 1, in_vol_tlv),
242 /* DAC */
243 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2,
244 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
245 RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
246 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1,
247 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
248 /* AXO */
249 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
250 RT5631_L_MUTE_SHIFT, 1, 1),
251 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
252 RT5631_R_VOL_SHIFT, 1, 1),
253 /* OUTVOL */
254 SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL,
255 RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0),
256
257 /* SPK */
258 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL,
259 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
260 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL,
261 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
262 /* MONO OUT */
263 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
264 RT5631_MUTE_MONO_SHIFT, 1, 1),
265 /* HP */
266 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL,
267 RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
268 SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL,
269 RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
270 RT5631_VOL_MASK, 1, out_vol_tlv),
271 /* DMIC */
272 SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0,
273 rt5631_dmic_get, rt5631_dmic_put),
274 SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL,
275 RT5631_DMIC_L_CH_MUTE_SHIFT,
276 RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1),
277
278 /* SPK Ratio Gain Control */
279 SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum),
280};
281
282static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
283 struct snd_soc_dapm_widget *sink)
284{
46295e5e 285 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 286 unsigned int reg;
287
46295e5e 288 reg = snd_soc_component_read32(component, RT5631_GLOBAL_CLK_CTRL);
d8085222 289 return reg & RT5631_SYSCLK_SOUR_SEL_PLL;
290}
291
292static int check_dmic_used(struct snd_soc_dapm_widget *source,
293 struct snd_soc_dapm_widget *sink)
294{
46295e5e
KM		 295 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
296 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 297 return rt5631->dmic_used_flag;
298}
299
300static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source,
301 struct snd_soc_dapm_widget *sink)
302{
46295e5e 303 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 304 unsigned int reg;
305
46295e5e 306 reg = snd_soc_component_read32(component, RT5631_OUTMIXER_L_CTRL);
d8085222 307 return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L);
308}
309
310static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source,
311 struct snd_soc_dapm_widget *sink)
312{
46295e5e 313 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 314 unsigned int reg;
315
46295e5e 316 reg = snd_soc_component_read32(component, RT5631_OUTMIXER_R_CTRL);
d8085222 317 return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R);
318}
319
320static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source,
321 struct snd_soc_dapm_widget *sink)
322{
46295e5e 323 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 324 unsigned int reg;
325
46295e5e 326 reg = snd_soc_component_read32(component, RT5631_SPK_MIXER_CTRL);
d8085222 327 return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L);
328}
329
330static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source,
331 struct snd_soc_dapm_widget *sink)
332{
46295e5e 333 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 334 unsigned int reg;
335
46295e5e 336 reg = snd_soc_component_read32(component, RT5631_SPK_MIXER_CTRL);
d8085222 337 return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R);
338}
339
d8085222 340static int check_adcl_select(struct snd_soc_dapm_widget *source,
341 struct snd_soc_dapm_widget *sink)
342{
46295e5e 343 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 344 unsigned int reg;
345
46295e5e 346 reg = snd_soc_component_read32(component, RT5631_ADC_REC_MIXER);
d8085222 347 return !(reg & RT5631_M_MIC1_TO_RECMIXER_L);
348}
349
350static int check_adcr_select(struct snd_soc_dapm_widget *source,
351 struct snd_soc_dapm_widget *sink)
352{
46295e5e 353 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
d8085222 354 unsigned int reg;
355
46295e5e 356 reg = snd_soc_component_read32(component, RT5631_ADC_REC_MIXER);
d8085222 357 return !(reg & RT5631_M_MIC2_TO_RECMIXER_R);
358}
359
360/**
361 * onebit_depop_power_stage - auto depop in power stage.
362 * @enable: power on/off
363 *
364 * When power on/off headphone, the depop sequence is done by hardware.
365 */
46295e5e 366static void onebit_depop_power_stage(struct snd_soc_component *component, int enable)
d8085222 367{
368 unsigned int soft_vol, hp_zc;
369
370 /* enable one-bit depop function */
46295e5e 371 snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2,
d8085222 372 RT5631_EN_ONE_BIT_DEPOP, 0);
373
374 /* keep soft volume and zero crossing setting */
46295e5e
KM		 375 soft_vol = snd_soc_component_read32(component, RT5631_SOFT_VOL_CTRL);
376 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, 0);
377 hp_zc = snd_soc_component_read32(component, RT5631_INT_ST_IRQ_CTRL_2);
378 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
d8085222 379 if (enable) {
380 /* config one-bit depop parameter */
46295e5e
KM		 381 rt5631_write_index(component, RT5631_TEST_MODE_CTRL, 0x84c0);
382 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x309f);
383 rt5631_write_index(component, RT5631_CP_INTL_REG2, 0x6530);
d8085222 384 /* power on capless block */
46295e5e 385 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_2,
d8085222 386 RT5631_EN_CAP_FREE_DEPOP);
387 } else {
388 /* power off capless block */
46295e5e 389 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_2, 0);
d8085222 390 msleep(100);
391 }
392
393 /* recover soft volume and zero crossing setting */
46295e5e
KM		 394 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, soft_vol);
395 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
d8085222 396}
397
398/**
399 * onebit_depop_mute_stage - auto depop in mute stage.
400 * @enable: mute/unmute
401 *
402 * When mute/unmute headphone, the depop sequence is done by hardware.
403 */
46295e5e 404static void onebit_depop_mute_stage(struct snd_soc_component *component, int enable)
d8085222 405{
406 unsigned int soft_vol, hp_zc;
407
408 /* enable one-bit depop function */
46295e5e 409 snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2,
d8085222 410 RT5631_EN_ONE_BIT_DEPOP, 0);
411
412 /* keep soft volume and zero crossing setting */
46295e5e
KM		 413 soft_vol = snd_soc_component_read32(component, RT5631_SOFT_VOL_CTRL);
414 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, 0);
415 hp_zc = snd_soc_component_read32(component, RT5631_INT_ST_IRQ_CTRL_2);
416 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
d8085222 417 if (enable) {
418 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
419 /* config one-bit depop parameter */
46295e5e
KM		 420 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x307f);
421 snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL,
d8085222 422 RT5631_L_MUTE | RT5631_R_MUTE, 0);
423 msleep(300);
424 } else {
46295e5e 425 snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL,
d8085222 426 RT5631_L_MUTE | RT5631_R_MUTE,
427 RT5631_L_MUTE | RT5631_R_MUTE);
428 msleep(100);
429 }
430
431 /* recover soft volume and zero crossing setting */
46295e5e
KM		 432 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, soft_vol);
433 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
d8085222 434}
435
436/**
437 * onebit_depop_power_stage - step by step depop sequence in power stage.
438 * @enable: power on/off
439 *
440 * When power on/off headphone, the depop sequence is done in step by step.
441 */
46295e5e 442static void depop_seq_power_stage(struct snd_soc_component *component, int enable)
d8085222 443{
444 unsigned int soft_vol, hp_zc;
445
446 /* depop control by register */
46295e5e 447 snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2,
d8085222 448 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
449
450 /* keep soft volume and zero crossing setting */
46295e5e
KM		 451 soft_vol = snd_soc_component_read32(component, RT5631_SOFT_VOL_CTRL);
452 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, 0);
453 hp_zc = snd_soc_component_read32(component, RT5631_INT_ST_IRQ_CTRL_2);
454 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
d8085222 455 if (enable) {
456 /* config depop sequence parameter */
46295e5e 457 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x303e);
d8085222 458
459 /* power on headphone and charge pump */
46295e5e 460 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 461 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
462 RT5631_PWR_HP_R_AMP,
463 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
464 RT5631_PWR_HP_R_AMP);
465
466 /* power on soft generator and depop mode2 */
46295e5e 467 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 468 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP);
469 msleep(100);
470
471 /* stop depop mode */
46295e5e 472 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 473 RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS);
474 } else {
475 /* config depop sequence parameter */
46295e5e
KM		 476 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x303F);
477 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 478 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
479 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
480 msleep(75);
46295e5e 481 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 482 RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP |
483 RT5631_PD_HPAMP_R_ST_UP);
484
485 /* start depop mode */
46295e5e 486 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 487 RT5631_PWR_HP_DEPOP_DIS, 0);
488
489 /* config depop sequence parameter */
46295e5e 490 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 491 RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP |
492 RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
493 msleep(80);
46295e5e 494 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 495 RT5631_POW_ON_SOFT_GEN);
496
497 /* power down headphone and charge pump */
46295e5e 498 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 499 RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
500 RT5631_PWR_HP_R_AMP, 0);
501 }
502
503 /* recover soft volume and zero crossing setting */
46295e5e
KM		 504 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, soft_vol);
505 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
d8085222 506}
507
508/**
509 * depop_seq_mute_stage - step by step depop sequence in mute stage.
510 * @enable: mute/unmute
511 *
512 * When mute/unmute headphone, the depop sequence is done in step by step.
513 */
46295e5e 514static void depop_seq_mute_stage(struct snd_soc_component *component, int enable)
d8085222 515{
516 unsigned int soft_vol, hp_zc;
517
518 /* depop control by register */
46295e5e 519 snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2,
d8085222 520 RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
521
522 /* keep soft volume and zero crossing setting */
46295e5e
KM		 523 soft_vol = snd_soc_component_read32(component, RT5631_SOFT_VOL_CTRL);
524 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, 0);
525 hp_zc = snd_soc_component_read32(component, RT5631_INT_ST_IRQ_CTRL_2);
526 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
d8085222 527 if (enable) {
528 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
529
530 /* config depop sequence parameter */
46295e5e
KM		 531 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x302f);
532 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 533 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
534 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
535 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
536
46295e5e 537 snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL,
d8085222 538 RT5631_L_MUTE | RT5631_R_MUTE, 0);
539 msleep(160);
540 } else {
541 /* config depop sequence parameter */
46295e5e
KM		 542 rt5631_write_index(component, RT5631_SPK_INTL_CTRL, 0x302f);
543 snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1,
d8085222 544 RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
545 RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
546 RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
547
46295e5e 548 snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL,
d8085222 549 RT5631_L_MUTE | RT5631_R_MUTE,
550 RT5631_L_MUTE | RT5631_R_MUTE);
551 msleep(150);
552 }
553
554 /* recover soft volume and zero crossing setting */
46295e5e
KM		 555 snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, soft_vol);
556 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
d8085222 557}
558
559static int hp_event(struct snd_soc_dapm_widget *w,
560 struct snd_kcontrol *kcontrol, int event)
561{
46295e5e
KM		 562 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
563 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 564
565 switch (event) {
566 case SND_SOC_DAPM_PRE_PMD:
567 if (rt5631->codec_version) {
46295e5e
KM		 568 onebit_depop_mute_stage(component, 0);
569 onebit_depop_power_stage(component, 0);
d8085222 570 } else {
46295e5e
KM		 571 depop_seq_mute_stage(component, 0);
572 depop_seq_power_stage(component, 0);
d8085222 573 }
574 break;
575
576 case SND_SOC_DAPM_POST_PMU:
577 if (rt5631->codec_version) {
46295e5e
KM		 578 onebit_depop_power_stage(component, 1);
579 onebit_depop_mute_stage(component, 1);
d8085222 580 } else {
46295e5e
KM		 581 depop_seq_power_stage(component, 1);
582 depop_seq_mute_stage(component, 1);
d8085222 583 }
584 break;
585
586 default:
587 break;
588 }
589
590 return 0;
591}
592
593static int set_dmic_params(struct snd_soc_dapm_widget *w,
594 struct snd_kcontrol *kcontrol, int event)
595{
46295e5e
KM		 596 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
597 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 598
599 switch (rt5631->rx_rate) {
600 case 44100:
601 case 48000:
46295e5e 602 snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL,
d8085222 603 RT5631_DMIC_CLK_CTRL_MASK,
604 RT5631_DMIC_CLK_CTRL_TO_32FS);
605 break;
606
607 case 32000:
608 case 22050:
46295e5e 609 snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL,
d8085222 610 RT5631_DMIC_CLK_CTRL_MASK,
611 RT5631_DMIC_CLK_CTRL_TO_64FS);
612 break;
613
614 case 16000:
615 case 11025:
616 case 8000:
46295e5e 617 snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL,
d8085222 618 RT5631_DMIC_CLK_CTRL_MASK,
619 RT5631_DMIC_CLK_CTRL_TO_128FS);
620 break;
621
622 default:
623 return -EINVAL;
624 }
625
626 return 0;
627}
628
629static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
630 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER,
631 RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1),
632 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER,
633 RT5631_M_MIC1_RECMIXL_BIT, 1, 1),
634 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER,
635 RT5631_M_AXIL_RECMIXL_BIT, 1, 1),
636 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
637 RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1),
638};
639
640static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
641 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
642 RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1),
643 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER,
644 RT5631_M_AXIR_RECMIXR_BIT, 1, 1),
645 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER,
646 RT5631_M_MIC2_RECMIXR_BIT, 1, 1),
647 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER,
648 RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1),
649};
650
651static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
652 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
653 RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1),
654 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL,
655 RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1),
656 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL,
657 RT5631_M_DACL_SPKMIXL_BIT, 1, 1),
658 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
659 RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1),
660};
661
662static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
663 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
664 RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1),
665 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL,
666 RT5631_M_DACR_SPKMIXR_BIT, 1, 1),
667 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL,
668 RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1),
669 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
670 RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1),
671};
672
673static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
674 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL,
675 RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1),
676 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL,
677 RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1),
678 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL,
679 RT5631_M_DACL_OUTMIXL_BIT, 1, 1),
680 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL,
681 RT5631_M_MIC1_OUTMIXL_BIT, 1, 1),
682 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL,
683 RT5631_M_MIC2_OUTMIXL_BIT, 1, 1),
684 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL,
685 RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1),
686 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
687 RT5631_M_AXIL_OUTMIXL_BIT, 1, 1),
688 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
689 RT5631_M_AXIR_OUTMIXL_BIT, 1, 1),
690 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL,
691 RT5631_M_VDAC_OUTMIXL_BIT, 1, 1),
692};
693
694static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
695 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL,
696 RT5631_M_VDAC_OUTMIXR_BIT, 1, 1),
697 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
698 RT5631_M_AXIR_OUTMIXR_BIT, 1, 1),
699 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
700 RT5631_M_AXIL_OUTMIXR_BIT, 1, 1),
701 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL,
702 RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1),
703 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL,
704 RT5631_M_MIC2_OUTMIXR_BIT, 1, 1),
705 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL,
706 RT5631_M_MIC1_OUTMIXR_BIT, 1, 1),
707 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL,
708 RT5631_M_DACR_OUTMIXR_BIT, 1, 1),
709 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL,
710 RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1),
711 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL,
712 RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1),
713};
714
715static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
716 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL,
717 RT5631_M_MIC1_AXO1MIX_BIT , 1, 1),
718 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL,
719 RT5631_M_MIC2_AXO1MIX_BIT, 1, 1),
720 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL,
721 RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1),
722 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL,
723 RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1),
724};
725
726static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
727 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL,
728 RT5631_M_MIC1_AXO2MIX_BIT, 1, 1),
729 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL,
730 RT5631_M_MIC2_AXO2MIX_BIT, 1, 1),
731 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL,
732 RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1),
733 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL,
734 RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1),
735};
736
737static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
738 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
739 RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1),
740 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
741 RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1),
742};
743
744static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
745 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
746 RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1),
747 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
748 RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1),
749};
750
751static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
752 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
753 RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1),
754 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
755 RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1),
756};
757
758/* Left SPK Volume Input */
759static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"};
760
f843cdf2
TI		 761static SOC_ENUM_SINGLE_DECL(rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL,
762 RT5631_L_EN_SHIFT, rt5631_spkvoll_sel);
d8085222 763
764static const struct snd_kcontrol_new rt5631_spkvoll_mux_control =
765 SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum);
766
767/* Left HP Volume Input */
768static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"};
769
f843cdf2
TI		 770static SOC_ENUM_SINGLE_DECL(rt5631_hpvoll_enum, RT5631_HP_OUT_VOL,
771 RT5631_L_EN_SHIFT, rt5631_hpvoll_sel);
d8085222 772
773static const struct snd_kcontrol_new rt5631_hpvoll_mux_control =
774 SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum);
775
776/* Left Out Volume Input */
777static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"};
778
f843cdf2
TI		 779static SOC_ENUM_SINGLE_DECL(rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL,
780 RT5631_L_EN_SHIFT, rt5631_outvoll_sel);
d8085222 781
782static const struct snd_kcontrol_new rt5631_outvoll_mux_control =
783 SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum);
784
785/* Right Out Volume Input */
786static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"};
787
f843cdf2
TI		 788static SOC_ENUM_SINGLE_DECL(rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL,
789 RT5631_R_EN_SHIFT, rt5631_outvolr_sel);
d8085222 790
791static const struct snd_kcontrol_new rt5631_outvolr_mux_control =
792 SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum);
793
794/* Right HP Volume Input */
795static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"};
796
f843cdf2
TI		 797static SOC_ENUM_SINGLE_DECL(rt5631_hpvolr_enum, RT5631_HP_OUT_VOL,
798 RT5631_R_EN_SHIFT, rt5631_hpvolr_sel);
d8085222 799
800static const struct snd_kcontrol_new rt5631_hpvolr_mux_control =
801 SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum);
802
803/* Right SPK Volume Input */
804static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"};
805
f843cdf2
TI		 806static SOC_ENUM_SINGLE_DECL(rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL,
807 RT5631_R_EN_SHIFT, rt5631_spkvolr_sel);
d8085222 808
809static const struct snd_kcontrol_new rt5631_spkvolr_mux_control =
810 SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum);
811
812/* SPO Left Channel Input */
813static const char *rt5631_spol_src_sel[] = {
814 "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
815
f843cdf2
TI		 816static SOC_ENUM_SINGLE_DECL(rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
817 RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel);
d8085222 818
819static const struct snd_kcontrol_new rt5631_spol_mux_control =
820 SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum);
821
822/* SPO Right Channel Input */
823static const char *rt5631_spor_src_sel[] = {
824 "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
825
f843cdf2
TI		 826static SOC_ENUM_SINGLE_DECL(rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
827 RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel);
d8085222 828
829static const struct snd_kcontrol_new rt5631_spor_mux_control =
830 SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum);
831
832/* MONO Input */
833static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
834
f843cdf2
TI		 835static SOC_ENUM_SINGLE_DECL(rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
836 RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel);
d8085222 837
838static const struct snd_kcontrol_new rt5631_mono_mux_control =
839 SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum);
840
841/* Left HPO Input */
842static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"};
843
f843cdf2
TI		 844static SOC_ENUM_SINGLE_DECL(rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
845 RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel);
d8085222 846
847static const struct snd_kcontrol_new rt5631_hpl_mux_control =
848 SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum);
849
850/* Right HPO Input */
851static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"};
852
f843cdf2
TI		 853static SOC_ENUM_SINGLE_DECL(rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
854 RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel);
d8085222 855
856static const struct snd_kcontrol_new rt5631_hpr_mux_control =
857 SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum);
858
859static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
860 /* Vmid */
861 SND_SOC_DAPM_VMID("Vmid"),
862 /* PLL1 */
863 SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2,
864 RT5631_PWR_PLL1_BIT, 0, NULL, 0),
865
866 /* Input Side */
867 /* Input Lines */
868 SND_SOC_DAPM_INPUT("MIC1"),
869 SND_SOC_DAPM_INPUT("MIC2"),
870 SND_SOC_DAPM_INPUT("AXIL"),
871 SND_SOC_DAPM_INPUT("AXIR"),
872 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
873 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
874 SND_SOC_DAPM_INPUT("DMIC"),
875
876 /* MICBIAS */
877 SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2,
878 RT5631_PWR_MICBIAS1_VOL_BIT, 0),
879 SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2,
880 RT5631_PWR_MICBIAS2_VOL_BIT, 0),
881
882 /* Boost */
883 SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2,
884 RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0),
885 SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2,
886 RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0),
887 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4,
888 RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0),
889 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4,
890 RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0),
891 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4,
892 RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0),
893 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4,
894 RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0),
895
896 /* MONO In */
897 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
898
899 /* REC Mixer */
900 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2,
901 RT5631_PWR_RECMIXER_L_BIT, 0,
902 &rt5631_recmixl_mixer_controls[0],
903 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
904 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2,
905 RT5631_PWR_RECMIXER_R_BIT, 0,
906 &rt5631_recmixr_mixer_controls[0],
907 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
908 /* Because of record duplication for L/R channel,
909 * L/R ADCs need power up at the same time */
910 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
911
912 /* DMIC */
913 SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL,
914 RT5631_DMIC_ENA_SHIFT, 0,
915 set_dmic_params, SND_SOC_DAPM_PRE_PMU),
916 /* ADC Data Srouce */
917 SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
918 RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0),
919 SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
920 RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0),
921
922 /* ADCs */
923 SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture",
924 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0),
925 SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture",
926 RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0),
927
928 /* DAC and ADC supply power */
929 SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1,
930 RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0),
931 SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1,
932 RT5631_PWR_DAC_REF_BIT, 0, NULL, 0),
933
934 /* Output Side */
935 /* DACs */
936 SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback",
937 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0),
938 SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback",
939 RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0),
940 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback",
941 SND_SOC_NOPM, 0, 0),
942 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
943 /* DAC supply power */
944 SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1,
945 RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0),
946 SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1,
947 RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0),
948
949 /* Left SPK Mixer */
950 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2,
951 RT5631_PWR_SPKMIXER_L_BIT, 0,
952 &rt5631_spkmixl_mixer_controls[0],
953 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
954 /* Left Out Mixer */
955 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2,
956 RT5631_PWR_OUTMIXER_L_BIT, 0,
957 &rt5631_outmixl_mixer_controls[0],
958 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
959 /* Right Out Mixer */
960 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2,
961 RT5631_PWR_OUTMIXER_R_BIT, 0,
962 &rt5631_outmixr_mixer_controls[0],
963 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
964 /* Right SPK Mixer */
965 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2,
966 RT5631_PWR_SPKMIXER_R_BIT, 0,
967 &rt5631_spkmixr_mixer_controls[0],
968 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
969
970 /* Volume Mux */
971 SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
972 RT5631_PWR_SPK_L_VOL_BIT, 0,
973 &rt5631_spkvoll_mux_control),
974 SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4,
975 RT5631_PWR_HP_L_OUT_VOL_BIT, 0,
976 &rt5631_hpvoll_mux_control),
977 SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
978 RT5631_PWR_LOUT_VOL_BIT, 0,
979 &rt5631_outvoll_mux_control),
980 SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
981 RT5631_PWR_ROUT_VOL_BIT, 0,
982 &rt5631_outvolr_mux_control),
983 SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4,
984 RT5631_PWR_HP_R_OUT_VOL_BIT, 0,
985 &rt5631_hpvolr_mux_control),
986 SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
987 RT5631_PWR_SPK_R_VOL_BIT, 0,
988 &rt5631_spkvolr_mux_control),
989
990 /* DAC To HP */
991 SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
992 SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
993
994 /* HP Depop */
995 SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0,
996 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
997
998 /* AXO1 Mixer */
999 SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3,
1000 RT5631_PWR_AXO1MIXER_BIT, 0,
1001 &rt5631_AXO1MIX_mixer_controls[0],
1002 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)),
1003 /* SPOL Mixer */
1004 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1005 &rt5631_spolmix_mixer_controls[0],
1006 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1007 /* MONO Mixer */
1008 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3,
1009 RT5631_PWR_MONOMIXER_BIT, 0,
1010 &rt5631_monomix_mixer_controls[0],
1011 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1012 /* SPOR Mixer */
1013 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1014 &rt5631_spormix_mixer_controls[0],
1015 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1016 /* AXO2 Mixer */
1017 SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3,
1018 RT5631_PWR_AXO2MIXER_BIT, 0,
1019 &rt5631_AXO2MIX_mixer_controls[0],
1020 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)),
1021
1022 /* Mux */
1023 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0,
1024 &rt5631_spol_mux_control),
1025 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0,
1026 &rt5631_spor_mux_control),
1027 SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0,
1028 &rt5631_mono_mux_control),
1029 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
1030 &rt5631_hpl_mux_control),
1031 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
1032 &rt5631_hpr_mux_control),
1033
1034 /* AMP supply */
1035 SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3,
1036 RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0),
1037 SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1,
1038 RT5631_PWR_CLASS_D_BIT, 0, NULL, 0),
1039
1040 /* Output Lines */
1041 SND_SOC_DAPM_OUTPUT("AUXO1"),
1042 SND_SOC_DAPM_OUTPUT("AUXO2"),
1043 SND_SOC_DAPM_OUTPUT("SPOL"),
1044 SND_SOC_DAPM_OUTPUT("SPOR"),
1045 SND_SOC_DAPM_OUTPUT("HPOL"),
1046 SND_SOC_DAPM_OUTPUT("HPOR"),
1047 SND_SOC_DAPM_OUTPUT("MONO"),
1048};
1049
1050static const struct snd_soc_dapm_route rt5631_dapm_routes[] = {
1051 {"MIC1 Boost", NULL, "MIC1"},
1052 {"MIC2 Boost", NULL, "MIC2"},
1053 {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1054 {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1055 {"AXIL Boost", NULL, "AXIL"},
1056 {"AXIR Boost", NULL, "AXIR"},
1057
1058 {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1059 {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1060
1061 {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1062 {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"},
1063 {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1064 {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1065
1066 {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1067 {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"},
1068 {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1069 {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1070
1071 {"ADC Mixer", NULL, "RECMIXL Mixer"},
1072 {"ADC Mixer", NULL, "RECMIXR Mixer"},
1073
1074 {"Left ADC", NULL, "ADC Mixer"},
1075 {"Left ADC", NULL, "Left ADC Select", check_adcl_select},
1076 {"Left ADC", NULL, "PLL1", check_sysclk1_source},
1077 {"Left ADC", NULL, "I2S"},
1078 {"Left ADC", NULL, "DAC REF"},
1079
1080 {"Right ADC", NULL, "ADC Mixer"},
1081 {"Right ADC", NULL, "Right ADC Select", check_adcr_select},
1082 {"Right ADC", NULL, "PLL1", check_sysclk1_source},
1083 {"Right ADC", NULL, "I2S"},
1084 {"Right ADC", NULL, "DAC REF"},
1085
1086 {"DMIC", NULL, "DMIC Supply", check_dmic_used},
1087 {"Left ADC", NULL, "DMIC"},
1088 {"Right ADC", NULL, "DMIC"},
1089
1090 {"Left DAC", NULL, "PLL1", check_sysclk1_source},
1091 {"Left DAC", NULL, "I2S"},
1092 {"Left DAC", NULL, "DAC REF"},
1093 {"Right DAC", NULL, "PLL1", check_sysclk1_source},
1094 {"Right DAC", NULL, "I2S"},
1095 {"Right DAC", NULL, "DAC REF"},
1096
1097 {"Voice DAC Boost", NULL, "Voice DAC"},
1098
1099 {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl},
1100 {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1101 {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1102 {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1103 {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1104
1105 {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr},
1106 {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1107 {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1108 {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1109 {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1110
1111 {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl},
1112 {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1113 {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1114 {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1115 {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1116 {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1117 {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1118 {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1119 {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1120 {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1121
1122 {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr},
1123 {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1124 {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1125 {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1126 {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1127 {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1128 {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1129 {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1130 {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1131 {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1132
1133 {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"},
1134 {"Left SPKVOL Mux", "Vmid", "Vmid"},
1135 {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1136 {"Left HPVOL Mux", "Vmid", "Vmid"},
1137 {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
1138 {"Left OUTVOL Mux", "Vmid", "Vmid"},
1139 {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1140 {"Right OUTVOL Mux", "Vmid", "Vmid"},
1141 {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
1142 {"Right HPVOL Mux", "Vmid", "Vmid"},
1143 {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"},
1144 {"Right SPKVOL Mux", "Vmid", "Vmid"},
1145
1146 {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1147 {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1148 {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1149 {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1150
1151 {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
1152 {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1153 {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1154 {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
1155
1156 {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1157 {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1158
1159 {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
1160 {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
1161
1162 {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
1163 {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
1164
1165 {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1166 {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1167 {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1168 {"SPOL Mux", "DACL", "Left DAC"},
1169
1170 {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1171 {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1172 {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1173 {"SPOR Mux", "DACR", "Right DAC"},
1174
1175 {"MONO Mux", "MONOMIX", "MONOMIX Mixer"},
1176 {"MONO Mux", "MONOIN_RX", "MONO_IN"},
1177 {"MONO Mux", "VDAC", "Voice DAC Boost"},
1178
1179 {"Right DAC_HP", NULL, "Right DAC"},
1180 {"Left DAC_HP", NULL, "Left DAC"},
1181
1182 {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"},
1183 {"HPL Mux", "Left DAC", "Left DAC_HP"},
1184 {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"},
1185 {"HPR Mux", "Right DAC", "Right DAC_HP"},
1186
1187 {"HP Depop", NULL, "HPL Mux"},
1188 {"HP Depop", NULL, "HPR Mux"},
1189
1190 {"AUXO1", NULL, "AXO1MIX Mixer"},
1191 {"AUXO2", NULL, "AXO2MIX Mixer"},
1192
1193 {"SPOL", NULL, "Class D"},
1194 {"SPOL", NULL, "SPOL Mux"},
1195 {"SPOR", NULL, "Class D"},
1196 {"SPOR", NULL, "SPOR Mux"},
1197
1198 {"HPOL", NULL, "HP Depop"},
1199 {"HPOR", NULL, "HP Depop"},
1200
1201 {"MONO", NULL, "MONO Depop"},
1202 {"MONO", NULL, "MONO Mux"},
1203};
1204
1205struct coeff_clk_div {
1206 u32 mclk;
1207 u32 bclk;
1208 u32 rate;
1209 u16 reg_val;
1210};
1211
1212/* PLL divisors */
1213struct pll_div {
1214 u32 pll_in;
1215 u32 pll_out;
1216 u16 reg_val;
1217};
1218
1219static const struct pll_div codec_master_pll_div[] = {
1220 {2048000, 8192000, 0x0ea0},
1221 {3686400, 8192000, 0x4e27},
1222 {12000000, 8192000, 0x456b},
1223 {13000000, 8192000, 0x495f},
1224 {13100000, 8192000, 0x0320},
1225 {2048000, 11289600, 0xf637},
1226 {3686400, 11289600, 0x2f22},
1227 {12000000, 11289600, 0x3e2f},
1228 {13000000, 11289600, 0x4d5b},
1229 {13100000, 11289600, 0x363b},
1230 {2048000, 16384000, 0x1ea0},
1231 {3686400, 16384000, 0x9e27},
1232 {12000000, 16384000, 0x452b},
1233 {13000000, 16384000, 0x542f},
1234 {13100000, 16384000, 0x03a0},
1235 {2048000, 16934400, 0xe625},
1236 {3686400, 16934400, 0x9126},
1237 {12000000, 16934400, 0x4d2c},
1238 {13000000, 16934400, 0x742f},
1239 {13100000, 16934400, 0x3c27},
1240 {2048000, 22579200, 0x2aa0},
1241 {3686400, 22579200, 0x2f20},
1242 {12000000, 22579200, 0x7e2f},
1243 {13000000, 22579200, 0x742f},
1244 {13100000, 22579200, 0x3c27},
1245 {2048000, 24576000, 0x2ea0},
1246 {3686400, 24576000, 0xee27},
1247 {12000000, 24576000, 0x2915},
1248 {13000000, 24576000, 0x772e},
1249 {13100000, 24576000, 0x0d20},
1250 {26000000, 24576000, 0x2027},
1251 {26000000, 22579200, 0x392f},
1252 {24576000, 22579200, 0x0921},
1253 {24576000, 24576000, 0x02a0},
1254};
1255
1256static const struct pll_div codec_slave_pll_div[] = {
1257 {256000, 2048000, 0x46f0},
1258 {256000, 4096000, 0x3ea0},
1259 {352800, 5644800, 0x3ea0},
1260 {512000, 8192000, 0x3ea0},
1261 {1024000, 8192000, 0x46f0},
1262 {705600, 11289600, 0x3ea0},
1263 {1024000, 16384000, 0x3ea0},
1264 {1411200, 22579200, 0x3ea0},
1265 {1536000, 24576000, 0x3ea0},
1266 {2048000, 16384000, 0x1ea0},
1267 {2822400, 22579200, 0x1ea0},
1268 {2822400, 45158400, 0x5ec0},
1269 {5644800, 45158400, 0x46f0},
1270 {3072000, 24576000, 0x1ea0},
1271 {3072000, 49152000, 0x5ec0},
1272 {6144000, 49152000, 0x46f0},
1273 {705600, 11289600, 0x3ea0},
1274 {705600, 8467200, 0x3ab0},
1275 {24576000, 24576000, 0x02a0},
1276 {1411200, 11289600, 0x1690},
1277 {2822400, 11289600, 0x0a90},
1278 {1536000, 12288000, 0x1690},
1279 {3072000, 12288000, 0x0a90},
1280};
1281
f79e5e8c 1282static struct coeff_clk_div coeff_div[] = {
d8085222 1283 /* sysclk is 256fs */
1284 {2048000, 8000 * 32, 8000, 0x1000},
1285 {2048000, 8000 * 64, 8000, 0x0000},
1286 {2822400, 11025 * 32, 11025, 0x1000},
1287 {2822400, 11025 * 64, 11025, 0x0000},
1288 {4096000, 16000 * 32, 16000, 0x1000},
1289 {4096000, 16000 * 64, 16000, 0x0000},
1290 {5644800, 22050 * 32, 22050, 0x1000},
1291 {5644800, 22050 * 64, 22050, 0x0000},
1292 {8192000, 32000 * 32, 32000, 0x1000},
1293 {8192000, 32000 * 64, 32000, 0x0000},
1294 {11289600, 44100 * 32, 44100, 0x1000},
1295 {11289600, 44100 * 64, 44100, 0x0000},
1296 {12288000, 48000 * 32, 48000, 0x1000},
1297 {12288000, 48000 * 64, 48000, 0x0000},
1298 {22579200, 88200 * 32, 88200, 0x1000},
1299 {22579200, 88200 * 64, 88200, 0x0000},
1300 {24576000, 96000 * 32, 96000, 0x1000},
1301 {24576000, 96000 * 64, 96000, 0x0000},
1302 /* sysclk is 512fs */
1303 {4096000, 8000 * 32, 8000, 0x3000},
1304 {4096000, 8000 * 64, 8000, 0x2000},
1305 {5644800, 11025 * 32, 11025, 0x3000},
1306 {5644800, 11025 * 64, 11025, 0x2000},
1307 {8192000, 16000 * 32, 16000, 0x3000},
1308 {8192000, 16000 * 64, 16000, 0x2000},
1309 {11289600, 22050 * 32, 22050, 0x3000},
1310 {11289600, 22050 * 64, 22050, 0x2000},
1311 {16384000, 32000 * 32, 32000, 0x3000},
1312 {16384000, 32000 * 64, 32000, 0x2000},
1313 {22579200, 44100 * 32, 44100, 0x3000},
1314 {22579200, 44100 * 64, 44100, 0x2000},
1315 {24576000, 48000 * 32, 48000, 0x3000},
1316 {24576000, 48000 * 64, 48000, 0x2000},
1317 {45158400, 88200 * 32, 88200, 0x3000},
1318 {45158400, 88200 * 64, 88200, 0x2000},
1319 {49152000, 96000 * 32, 96000, 0x3000},
1320 {49152000, 96000 * 64, 96000, 0x2000},
1321 /* sysclk is 24.576Mhz or 22.5792Mhz */
1322 {24576000, 8000 * 32, 8000, 0x7080},
1323 {24576000, 8000 * 64, 8000, 0x6080},
1324 {24576000, 16000 * 32, 16000, 0x5080},
1325 {24576000, 16000 * 64, 16000, 0x4080},
1326 {24576000, 24000 * 32, 24000, 0x5000},
1327 {24576000, 24000 * 64, 24000, 0x4000},
1328 {24576000, 32000 * 32, 32000, 0x3080},
1329 {24576000, 32000 * 64, 32000, 0x2080},
1330 {22579200, 11025 * 32, 11025, 0x7000},
1331 {22579200, 11025 * 64, 11025, 0x6000},
1332 {22579200, 22050 * 32, 22050, 0x5000},
1333 {22579200, 22050 * 64, 22050, 0x4000},
1334};
1335
1336static int get_coeff(int mclk, int rate, int timesofbclk)
1337{
1338 int i;
1339
1340 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1341 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1342 (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1343 return i;
1344 }
1345 return -EINVAL;
1346}
1347
1348static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1349 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1350{
46295e5e
KM		 1351 struct snd_soc_component *component = dai->component;
1352 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 1353 int timesofbclk = 32, coeff;
1354 unsigned int iface = 0;
1355
46295e5e 1356 dev_dbg(component->dev, "enter %s\n", __func__);
d8085222 1357
1358 rt5631->bclk_rate = snd_soc_params_to_bclk(params);
1359 if (rt5631->bclk_rate < 0) {
46295e5e 1360 dev_err(component->dev, "Fail to get BCLK rate\n");
d8085222 1361 return rt5631->bclk_rate;
1362 }
1363 rt5631->rx_rate = params_rate(params);
1364
1365 if (rt5631->master)
1366 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1367 rt5631->bclk_rate / rt5631->rx_rate);
1368 else
1369 coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
1370 timesofbclk);
1371 if (coeff < 0) {
46295e5e 1372 dev_err(component->dev, "Fail to get coeff\n");
2525808e 1373 return coeff;
d8085222 1374 }
1375
e6777ead
MB		 1376 switch (params_width(params)) {
1377 case 16:
d8085222 1378 break;
e6777ead 1379 case 20:
d8085222 1380 iface |= RT5631_SDP_I2S_DL_20;
1381 break;
e6777ead 1382 case 24:
d8085222 1383 iface |= RT5631_SDP_I2S_DL_24;
1384 break;
e6777ead 1385 case 8:
d8085222 1386 iface |= RT5631_SDP_I2S_DL_8;
1387 break;
1388 default:
1389 return -EINVAL;
1390 }
1391
46295e5e 1392 snd_soc_component_update_bits(component, RT5631_SDP_CTRL,
d8085222 1393 RT5631_SDP_I2S_DL_MASK, iface);
46295e5e 1394 snd_soc_component_write(component, RT5631_STEREO_AD_DA_CLK_CTRL,
d8085222 1395 coeff_div[coeff].reg_val);
1396
1397 return 0;
1398}
1399
1400static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1401 unsigned int fmt)
1402{
46295e5e
KM		 1403 struct snd_soc_component *component = codec_dai->component;
1404 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 1405 unsigned int iface = 0;
1406
46295e5e 1407 dev_dbg(component->dev, "enter %s\n", __func__);
d8085222 1408
1409 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1410 case SND_SOC_DAIFMT_CBM_CFM:
1411 rt5631->master = 1;
1412 break;
1413 case SND_SOC_DAIFMT_CBS_CFS:
1414 iface |= RT5631_SDP_MODE_SEL_SLAVE;
1415 rt5631->master = 0;
1416 break;
1417 default:
1418 return -EINVAL;
1419 }
1420
1421 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1422 case SND_SOC_DAIFMT_I2S:
1423 break;
1424 case SND_SOC_DAIFMT_LEFT_J:
1425 iface |= RT5631_SDP_I2S_DF_LEFT;
1426 break;
1427 case SND_SOC_DAIFMT_DSP_A:
1428 iface |= RT5631_SDP_I2S_DF_PCM_A;
1429 break;
1430 case SND_SOC_DAIFMT_DSP_B:
1431 iface |= RT5631_SDP_I2S_DF_PCM_B;
1432 break;
1433 default:
1434 return -EINVAL;
1435 }
1436
1437 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1438 case SND_SOC_DAIFMT_NB_NF:
1439 break;
1440 case SND_SOC_DAIFMT_IB_NF:
1441 iface |= RT5631_SDP_I2S_BCLK_POL_CTRL;
1442 break;
1443 default:
1444 return -EINVAL;
1445 }
1446
46295e5e 1447 snd_soc_component_write(component, RT5631_SDP_CTRL, iface);
d8085222 1448
1449 return 0;
1450}
1451
1452static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1453 int clk_id, unsigned int freq, int dir)
1454{
46295e5e
KM		 1455 struct snd_soc_component *component = codec_dai->component;
1456 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 1457
46295e5e 1458 dev_dbg(component->dev, "enter %s, syclk=%d\n", __func__, freq);
d8085222 1459
1460 if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1461 rt5631->sysclk = freq;
1462 return 0;
1463 }
1464
1465 return -EINVAL;
1466}
1467
1468static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1469 int source, unsigned int freq_in, unsigned int freq_out)
1470{
46295e5e
KM		 1471 struct snd_soc_component *component = codec_dai->component;
1472 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 1473 int i, ret = -EINVAL;
1474
46295e5e 1475 dev_dbg(component->dev, "enter %s\n", __func__);
d8085222 1476
1477 if (!freq_in || !freq_out) {
46295e5e 1478 dev_dbg(component->dev, "PLL disabled\n");
d8085222 1479
46295e5e 1480 snd_soc_component_update_bits(component, RT5631_GLOBAL_CLK_CTRL,
d8085222 1481 RT5631_SYSCLK_SOUR_SEL_MASK,
1482 RT5631_SYSCLK_SOUR_SEL_MCLK);
1483
1484 return 0;
1485 }
1486
1487 if (rt5631->master) {
1488 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1489 if (freq_in == codec_master_pll_div[i].pll_in &&
1490 freq_out == codec_master_pll_div[i].pll_out) {
46295e5e 1491 dev_info(component->dev,
d8085222 1492 "change PLL in master mode\n");
46295e5e 1493 snd_soc_component_write(component, RT5631_PLL_CTRL,
d8085222 1494 codec_master_pll_div[i].reg_val);
1495 schedule_timeout_uninterruptible(
1496 msecs_to_jiffies(20));
46295e5e 1497 snd_soc_component_update_bits(component,
d8085222 1498 RT5631_GLOBAL_CLK_CTRL,
1499 RT5631_SYSCLK_SOUR_SEL_MASK |
1500 RT5631_PLLCLK_SOUR_SEL_MASK,
1501 RT5631_SYSCLK_SOUR_SEL_PLL |
1502 RT5631_PLLCLK_SOUR_SEL_MCLK);
1503 ret = 0;
1504 break;
1505 }
1506 } else {
1507 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1508 if (freq_in == codec_slave_pll_div[i].pll_in &&
1509 freq_out == codec_slave_pll_div[i].pll_out) {
46295e5e 1510 dev_info(component->dev,
d8085222 1511 "change PLL in slave mode\n");
46295e5e 1512 snd_soc_component_write(component, RT5631_PLL_CTRL,
d8085222 1513 codec_slave_pll_div[i].reg_val);
1514 schedule_timeout_uninterruptible(
1515 msecs_to_jiffies(20));
46295e5e 1516 snd_soc_component_update_bits(component,
d8085222 1517 RT5631_GLOBAL_CLK_CTRL,
1518 RT5631_SYSCLK_SOUR_SEL_MASK |
1519 RT5631_PLLCLK_SOUR_SEL_MASK,
1520 RT5631_SYSCLK_SOUR_SEL_PLL |
1521 RT5631_PLLCLK_SOUR_SEL_BCLK);
1522 ret = 0;
1523 break;
1524 }
1525 }
1526
1527 return ret;
1528}
1529
46295e5e 1530static int rt5631_set_bias_level(struct snd_soc_component *component,
d8085222 1531 enum snd_soc_bias_level level)
1532{
46295e5e 1533 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
01476801 1534
d8085222 1535 switch (level) {
1536 case SND_SOC_BIAS_ON:
1537 case SND_SOC_BIAS_PREPARE:
46295e5e 1538 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD2,
d8085222 1539 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
1540 RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
1541 break;
1542
1543 case SND_SOC_BIAS_STANDBY:
46295e5e
KM		 1544 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1545 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 1546 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1547 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1548 msleep(80);
46295e5e 1549 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 1550 RT5631_PWR_FAST_VREF_CTRL,
1551 RT5631_PWR_FAST_VREF_CTRL);
01476801
MB		 1552 regcache_cache_only(rt5631->regmap, false);
1553 regcache_sync(rt5631->regmap);
d8085222 1554 }
1555 break;
1556
1557 case SND_SOC_BIAS_OFF:
46295e5e
KM		 1558 snd_soc_component_write(component, RT5631_PWR_MANAG_ADD1, 0x0000);
1559 snd_soc_component_write(component, RT5631_PWR_MANAG_ADD2, 0x0000);
1560 snd_soc_component_write(component, RT5631_PWR_MANAG_ADD3, 0x0000);
1561 snd_soc_component_write(component, RT5631_PWR_MANAG_ADD4, 0x0000);
d8085222 1562 break;
1563
1564 default:
1565 break;
1566 }
d8085222 1567
1568 return 0;
1569}
1570
46295e5e 1571static int rt5631_probe(struct snd_soc_component *component)
d8085222 1572{
46295e5e 1573 struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(component);
d8085222 1574 unsigned int val;
d8085222 1575
46295e5e 1576 val = rt5631_read_index(component, RT5631_ADDA_MIXER_INTL_REG3);
d8085222 1577 if (val & 0x0002)
1578 rt5631->codec_version = 1;
1579 else
1580 rt5631->codec_version = 0;
1581
46295e5e
KM		 1582 rt5631_reset(component);
1583 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 1584 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
1585 RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
1586 msleep(80);
46295e5e 1587 snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3,
d8085222 1588 RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL);
1589 /* enable HP zero cross */
46295e5e 1590 snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18);
d8085222 1591 /* power off ClassD auto Recovery */
1592 if (rt5631->codec_version)
46295e5e 1593 snd_soc_component_update_bits(component, RT5631_INT_ST_IRQ_CTRL_2,
d8085222 1594 0x2000, 0x2000);
1595 else
46295e5e 1596 snd_soc_component_update_bits(component, RT5631_INT_ST_IRQ_CTRL_2,
d8085222 1597 0x2000, 0);
1598 /* DMIC */
1599 if (rt5631->dmic_used_flag) {
46295e5e 1600 snd_soc_component_update_bits(component, RT5631_GPIO_CTRL,
d8085222 1601 RT5631_GPIO_PIN_FUN_SEL_MASK |
1602 RT5631_GPIO_DMIC_FUN_SEL_MASK,
1603 RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC |
1604 RT5631_GPIO_DMIC_FUN_SEL_DIMC);
46295e5e 1605 snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL,
d8085222 1606 RT5631_DMIC_L_CH_LATCH_MASK |
1607 RT5631_DMIC_R_CH_LATCH_MASK,
1608 RT5631_DMIC_L_CH_LATCH_FALLING |
1609 RT5631_DMIC_R_CH_LATCH_RISING);
1610 }
1611
46295e5e 1612 snd_soc_component_init_bias_level(component, SND_SOC_BIAS_STANDBY);
d8085222 1613
1614 return 0;
1615}
1616
d8085222 1617#define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1618#define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
1619 SNDRV_PCM_FMTBIT_S20_3LE | \
1620 SNDRV_PCM_FMTBIT_S24_LE | \
1621 SNDRV_PCM_FMTBIT_S8)
1622
85e7652d 1623static const struct snd_soc_dai_ops rt5631_ops = {
d8085222 1624 .hw_params = rt5631_hifi_pcm_params,
1625 .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1626 .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1627 .set_pll = rt5631_codec_set_dai_pll,
1628};
1629
51e19fb3 1630static struct snd_soc_dai_driver rt5631_dai[] = {
d8085222 1631 {
1632 .name = "rt5631-hifi",
1633 .id = 1,
1634 .playback = {
1635 .stream_name = "HIFI Playback",
1636 .channels_min = 1,
1637 .channels_max = 2,
1638 .rates = RT5631_STEREO_RATES,
1639 .formats = RT5631_FORMAT,
1640 },
1641 .capture = {
1642 .stream_name = "HIFI Capture",
1643 .channels_min = 1,
1644 .channels_max = 2,
1645 .rates = RT5631_STEREO_RATES,
1646 .formats = RT5631_FORMAT,
1647 },
1648 .ops = &rt5631_ops,
1649 },
1650};
1651
46295e5e
KM		 1652static const struct snd_soc_component_driver soc_component_dev_rt5631 = {
1653 .probe = rt5631_probe,
1654 .set_bias_level = rt5631_set_bias_level,
1655 .controls = rt5631_snd_controls,
1656 .num_controls = ARRAY_SIZE(rt5631_snd_controls),
1657 .dapm_widgets = rt5631_dapm_widgets,
1658 .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets),
1659 .dapm_routes = rt5631_dapm_routes,
1660 .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes),
1661 .suspend_bias_off = 1,
1662 .idle_bias_on = 1,
1663 .use_pmdown_time = 1,
1664 .endianness = 1,
1665 .non_legacy_dai_naming = 1,
d8085222 1666};
1667
1668static const struct i2c_device_id rt5631_i2c_id[] = {
1669 { "rt5631", 0 },
189c88ce 1670 { "alc5631", 0 },
d8085222 1671 { }
1672};
1673MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
1674
187024b3 1675#ifdef CONFIG_OF
261e43a3 1676static const struct of_device_id rt5631_i2c_dt_ids[] = {
189c88ce
KMD		 1677 { .compatible = "realtek,rt5631"},
1678 { .compatible = "realtek,alc5631"},
1679 { }
1680};
1681MODULE_DEVICE_TABLE(of, rt5631_i2c_dt_ids);
187024b3 1682#endif
189c88ce 1683
01476801
MB		 1684static const struct regmap_config rt5631_regmap_config = {
1685 .reg_bits = 8,
1686 .val_bits = 16,
1687
1688 .readable_reg = rt5631_readable_register,
1689 .volatile_reg = rt5631_volatile_register,
1690 .max_register = RT5631_VENDOR_ID2,
1691 .reg_defaults = rt5631_reg,
1692 .num_reg_defaults = ARRAY_SIZE(rt5631_reg),
1693 .cache_type = REGCACHE_RBTREE,
1694};
1695
d8085222 1696static int rt5631_i2c_probe(struct i2c_client *i2c,
1697 const struct i2c_device_id *id)
1698{
1699 struct rt5631_priv *rt5631;
1700 int ret;
1701
a92b0a08
AL		 1702 rt5631 = devm_kzalloc(&i2c->dev, sizeof(struct rt5631_priv),
1703 GFP_KERNEL);
d8085222 1704 if (NULL == rt5631)
1705 return -ENOMEM;
1706
1707 i2c_set_clientdata(i2c, rt5631);
1708
01476801
MB		 1709 rt5631->regmap = devm_regmap_init_i2c(i2c, &rt5631_regmap_config);
1710 if (IS_ERR(rt5631->regmap))
1711 return PTR_ERR(rt5631->regmap);
1712
46295e5e
KM		 1713 ret = devm_snd_soc_register_component(&i2c->dev,
1714 &soc_component_dev_rt5631,
d8085222 1715 rt5631_dai, ARRAY_SIZE(rt5631_dai));
d8085222 1716 return ret;
1717}
1718
7a79e94e 1719static int rt5631_i2c_remove(struct i2c_client *client)
d8085222 1720{
d8085222 1721 return 0;
1722}
1723
f79e5e8c 1724static struct i2c_driver rt5631_i2c_driver = {
d8085222 1725 .driver = {
1726 .name = "rt5631",
189c88ce 1727 .of_match_table = of_match_ptr(rt5631_i2c_dt_ids),
d8085222 1728 },
1729 .probe = rt5631_i2c_probe,
7a79e94e 1730 .remove = rt5631_i2c_remove,
d8085222 1731 .id_table = rt5631_i2c_id,
1732};
1733
03730b87 1734module_i2c_driver(rt5631_i2c_driver);
d8085222 1735
1736MODULE_DESCRIPTION("ASoC RT5631 driver");
1737MODULE_AUTHOR("flove <flove@realtek.com>");
1738MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)