d8085222 |
1 | /* |
2 | * rt5631.c -- RT5631 ALSA Soc Audio driver |
3 | * |
4 | * Copyright 2011 Realtek Microelectronics |
5 | * |
6 | * Author: flove <flove@realtek.com> |
7 | * |
8 | * Based on WM8753.c |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. |
13 | * |
14 | */ |
15 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> |
17 | #include <linux/init.h> |
18 | #include <linux/delay.h> |
19 | #include <linux/pm.h> |
20 | #include <linux/i2c.h> |
d8085222 |
21 | #include <linux/spi/spi.h> |
22 | #include <sound/core.h> |
23 | #include <sound/pcm.h> |
24 | #include <sound/pcm_params.h> |
25 | #include <sound/soc.h> |
26 | #include <sound/soc-dapm.h> |
27 | #include <sound/initval.h> |
28 | #include <sound/tlv.h> |
29 | |
30 | #include "rt5631.h" |
31 | |
32 | struct rt5631_priv { |
d8085222 |
33 | int codec_version; |
34 | int master; |
35 | int sysclk; |
36 | int rx_rate; |
37 | int bclk_rate; |
38 | int dmic_used_flag; |
39 | }; |
40 | |
41 | static const u16 rt5631_reg[RT5631_VENDOR_ID2 + 1] = { |
42 | [RT5631_SPK_OUT_VOL] = 0x8888, |
43 | [RT5631_HP_OUT_VOL] = 0x8080, |
44 | [RT5631_MONO_AXO_1_2_VOL] = 0xa080, |
45 | [RT5631_AUX_IN_VOL] = 0x0808, |
46 | [RT5631_ADC_REC_MIXER] = 0xf0f0, |
47 | [RT5631_VDAC_DIG_VOL] = 0x0010, |
48 | [RT5631_OUTMIXER_L_CTRL] = 0xffc0, |
49 | [RT5631_OUTMIXER_R_CTRL] = 0xffc0, |
50 | [RT5631_AXO1MIXER_CTRL] = 0x88c0, |
51 | [RT5631_AXO2MIXER_CTRL] = 0x88c0, |
52 | [RT5631_DIG_MIC_CTRL] = 0x3000, |
53 | [RT5631_MONO_INPUT_VOL] = 0x8808, |
54 | [RT5631_SPK_MIXER_CTRL] = 0xf8f8, |
55 | [RT5631_SPK_MONO_OUT_CTRL] = 0xfc00, |
56 | [RT5631_SPK_MONO_HP_OUT_CTRL] = 0x4440, |
57 | [RT5631_SDP_CTRL] = 0x8000, |
58 | [RT5631_MONO_SDP_CTRL] = 0x8000, |
59 | [RT5631_STEREO_AD_DA_CLK_CTRL] = 0x2010, |
60 | [RT5631_GEN_PUR_CTRL_REG] = 0x0e00, |
61 | [RT5631_INT_ST_IRQ_CTRL_2] = 0x071a, |
62 | [RT5631_MISC_CTRL] = 0x2040, |
63 | [RT5631_DEPOP_FUN_CTRL_2] = 0x8000, |
64 | [RT5631_SOFT_VOL_CTRL] = 0x07e0, |
65 | [RT5631_ALC_CTRL_1] = 0x0206, |
66 | [RT5631_ALC_CTRL_3] = 0x2000, |
67 | [RT5631_PSEUDO_SPATL_CTRL] = 0x0553, |
68 | }; |
69 | |
70 | /** |
71 | * rt5631_write_index - write index register of 2nd layer |
72 | */ |
73 | static void rt5631_write_index(struct snd_soc_codec *codec, |
74 | unsigned int reg, unsigned int value) |
75 | { |
76 | snd_soc_write(codec, RT5631_INDEX_ADD, reg); |
77 | snd_soc_write(codec, RT5631_INDEX_DATA, value); |
78 | } |
79 | |
80 | /** |
81 | * rt5631_read_index - read index register of 2nd layer |
82 | */ |
83 | static unsigned int rt5631_read_index(struct snd_soc_codec *codec, |
84 | unsigned int reg) |
85 | { |
86 | unsigned int value; |
87 | |
88 | snd_soc_write(codec, RT5631_INDEX_ADD, reg); |
89 | value = snd_soc_read(codec, RT5631_INDEX_DATA); |
90 | |
91 | return value; |
92 | } |
93 | |
94 | static int rt5631_reset(struct snd_soc_codec *codec) |
95 | { |
96 | return snd_soc_write(codec, RT5631_RESET, 0); |
97 | } |
98 | |
99 | static int rt5631_volatile_register(struct snd_soc_codec *codec, |
100 | unsigned int reg) |
101 | { |
102 | switch (reg) { |
103 | case RT5631_RESET: |
104 | case RT5631_INT_ST_IRQ_CTRL_2: |
105 | case RT5631_INDEX_ADD: |
106 | case RT5631_INDEX_DATA: |
107 | case RT5631_EQ_CTRL: |
108 | return 1; |
109 | default: |
110 | return 0; |
111 | } |
112 | } |
113 | |
114 | static int rt5631_readable_register(struct snd_soc_codec *codec, |
115 | unsigned int reg) |
116 | { |
117 | switch (reg) { |
118 | case RT5631_RESET: |
119 | case RT5631_SPK_OUT_VOL: |
120 | case RT5631_HP_OUT_VOL: |
121 | case RT5631_MONO_AXO_1_2_VOL: |
122 | case RT5631_AUX_IN_VOL: |
123 | case RT5631_STEREO_DAC_VOL_1: |
124 | case RT5631_MIC_CTRL_1: |
125 | case RT5631_STEREO_DAC_VOL_2: |
126 | case RT5631_ADC_CTRL_1: |
127 | case RT5631_ADC_REC_MIXER: |
128 | case RT5631_ADC_CTRL_2: |
129 | case RT5631_VDAC_DIG_VOL: |
130 | case RT5631_OUTMIXER_L_CTRL: |
131 | case RT5631_OUTMIXER_R_CTRL: |
132 | case RT5631_AXO1MIXER_CTRL: |
133 | case RT5631_AXO2MIXER_CTRL: |
134 | case RT5631_MIC_CTRL_2: |
135 | case RT5631_DIG_MIC_CTRL: |
136 | case RT5631_MONO_INPUT_VOL: |
137 | case RT5631_SPK_MIXER_CTRL: |
138 | case RT5631_SPK_MONO_OUT_CTRL: |
139 | case RT5631_SPK_MONO_HP_OUT_CTRL: |
140 | case RT5631_SDP_CTRL: |
141 | case RT5631_MONO_SDP_CTRL: |
142 | case RT5631_STEREO_AD_DA_CLK_CTRL: |
143 | case RT5631_PWR_MANAG_ADD1: |
144 | case RT5631_PWR_MANAG_ADD2: |
145 | case RT5631_PWR_MANAG_ADD3: |
146 | case RT5631_PWR_MANAG_ADD4: |
147 | case RT5631_GEN_PUR_CTRL_REG: |
148 | case RT5631_GLOBAL_CLK_CTRL: |
149 | case RT5631_PLL_CTRL: |
150 | case RT5631_INT_ST_IRQ_CTRL_1: |
151 | case RT5631_INT_ST_IRQ_CTRL_2: |
152 | case RT5631_GPIO_CTRL: |
153 | case RT5631_MISC_CTRL: |
154 | case RT5631_DEPOP_FUN_CTRL_1: |
155 | case RT5631_DEPOP_FUN_CTRL_2: |
156 | case RT5631_JACK_DET_CTRL: |
157 | case RT5631_SOFT_VOL_CTRL: |
158 | case RT5631_ALC_CTRL_1: |
159 | case RT5631_ALC_CTRL_2: |
160 | case RT5631_ALC_CTRL_3: |
161 | case RT5631_PSEUDO_SPATL_CTRL: |
162 | case RT5631_INDEX_ADD: |
163 | case RT5631_INDEX_DATA: |
164 | case RT5631_EQ_CTRL: |
165 | case RT5631_VENDOR_ID: |
166 | case RT5631_VENDOR_ID1: |
167 | case RT5631_VENDOR_ID2: |
168 | return 1; |
169 | default: |
170 | return 0; |
171 | } |
172 | } |
173 | |
174 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); |
175 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0); |
176 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
177 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */ |
178 | static unsigned int mic_bst_tlv[] = { |
a19ea0b8 |
179 | TLV_DB_RANGE_HEAD(7), |
d8085222 |
180 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
181 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), |
182 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
183 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), |
184 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), |
185 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), |
186 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), |
187 | }; |
188 | |
189 | static int rt5631_dmic_get(struct snd_kcontrol *kcontrol, |
190 | struct snd_ctl_elem_value *ucontrol) |
191 | { |
192 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
193 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
194 | |
195 | ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; |
196 | |
197 | return 0; |
198 | } |
199 | |
200 | static int rt5631_dmic_put(struct snd_kcontrol *kcontrol, |
201 | struct snd_ctl_elem_value *ucontrol) |
202 | { |
203 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
204 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
205 | |
206 | rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; |
207 | return 0; |
208 | } |
209 | |
210 | /* MIC Input Type */ |
211 | static const char *rt5631_input_mode[] = { |
212 | "Single ended", "Differential"}; |
213 | |
214 | static const SOC_ENUM_SINGLE_DECL( |
215 | rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1, |
216 | RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode); |
217 | |
218 | static const SOC_ENUM_SINGLE_DECL( |
219 | rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1, |
220 | RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode); |
221 | |
222 | /* MONO Input Type */ |
223 | static const SOC_ENUM_SINGLE_DECL( |
224 | rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL, |
225 | RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode); |
226 | |
227 | /* SPK Ratio Gain Control */ |
228 | static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x", |
229 | "1.56x", "1.68x", "1.99x", "2.34x"}; |
230 | |
231 | static const SOC_ENUM_SINGLE_DECL( |
232 | rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG, |
233 | RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio); |
234 | |
235 | static const struct snd_kcontrol_new rt5631_snd_controls[] = { |
236 | /* MIC */ |
237 | SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum), |
238 | SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2, |
239 | RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
240 | SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum), |
241 | SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2, |
242 | RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
243 | /* MONO IN */ |
244 | SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum), |
245 | SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL, |
246 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
247 | RT5631_VOL_MASK, 1, in_vol_tlv), |
248 | /* AXI */ |
249 | SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL, |
250 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
251 | RT5631_VOL_MASK, 1, in_vol_tlv), |
252 | /* DAC */ |
253 | SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2, |
254 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
255 | RT5631_DAC_VOL_MASK, 1, dac_vol_tlv), |
256 | SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1, |
257 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
258 | /* AXO */ |
259 | SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
260 | RT5631_L_MUTE_SHIFT, 1, 1), |
261 | SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
262 | RT5631_R_VOL_SHIFT, 1, 1), |
263 | /* OUTVOL */ |
264 | SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL, |
265 | RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0), |
266 | |
267 | /* SPK */ |
268 | SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL, |
269 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
270 | SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL, |
271 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv), |
272 | /* MONO OUT */ |
273 | SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL, |
274 | RT5631_MUTE_MONO_SHIFT, 1, 1), |
275 | /* HP */ |
276 | SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL, |
277 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
278 | SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL, |
279 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
280 | RT5631_VOL_MASK, 1, out_vol_tlv), |
281 | /* DMIC */ |
282 | SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0, |
283 | rt5631_dmic_get, rt5631_dmic_put), |
284 | SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL, |
285 | RT5631_DMIC_L_CH_MUTE_SHIFT, |
286 | RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1), |
287 | |
288 | /* SPK Ratio Gain Control */ |
289 | SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum), |
290 | }; |
291 | |
292 | static int check_sysclk1_source(struct snd_soc_dapm_widget *source, |
293 | struct snd_soc_dapm_widget *sink) |
294 | { |
295 | unsigned int reg; |
296 | |
297 | reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL); |
298 | return reg & RT5631_SYSCLK_SOUR_SEL_PLL; |
299 | } |
300 | |
301 | static int check_dmic_used(struct snd_soc_dapm_widget *source, |
302 | struct snd_soc_dapm_widget *sink) |
303 | { |
304 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(source->codec); |
305 | return rt5631->dmic_used_flag; |
306 | } |
307 | |
308 | static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source, |
309 | struct snd_soc_dapm_widget *sink) |
310 | { |
311 | unsigned int reg; |
312 | |
313 | reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL); |
314 | return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L); |
315 | } |
316 | |
317 | static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source, |
318 | struct snd_soc_dapm_widget *sink) |
319 | { |
320 | unsigned int reg; |
321 | |
322 | reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL); |
323 | return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R); |
324 | } |
325 | |
326 | static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source, |
327 | struct snd_soc_dapm_widget *sink) |
328 | { |
329 | unsigned int reg; |
330 | |
331 | reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL); |
332 | return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L); |
333 | } |
334 | |
335 | static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source, |
336 | struct snd_soc_dapm_widget *sink) |
337 | { |
338 | unsigned int reg; |
339 | |
340 | reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL); |
341 | return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R); |
342 | } |
343 | |
d8085222 |
344 | static int check_adcl_select(struct snd_soc_dapm_widget *source, |
345 | struct snd_soc_dapm_widget *sink) |
346 | { |
347 | unsigned int reg; |
348 | |
349 | reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER); |
350 | return !(reg & RT5631_M_MIC1_TO_RECMIXER_L); |
351 | } |
352 | |
353 | static int check_adcr_select(struct snd_soc_dapm_widget *source, |
354 | struct snd_soc_dapm_widget *sink) |
355 | { |
356 | unsigned int reg; |
357 | |
358 | reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER); |
359 | return !(reg & RT5631_M_MIC2_TO_RECMIXER_R); |
360 | } |
361 | |
362 | /** |
363 | * onebit_depop_power_stage - auto depop in power stage. |
364 | * @enable: power on/off |
365 | * |
366 | * When power on/off headphone, the depop sequence is done by hardware. |
367 | */ |
368 | static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable) |
369 | { |
370 | unsigned int soft_vol, hp_zc; |
371 | |
372 | /* enable one-bit depop function */ |
373 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
374 | RT5631_EN_ONE_BIT_DEPOP, 0); |
375 | |
376 | /* keep soft volume and zero crossing setting */ |
377 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
378 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
379 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
380 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
381 | if (enable) { |
382 | /* config one-bit depop parameter */ |
383 | rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0); |
384 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f); |
385 | rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530); |
386 | /* power on capless block */ |
387 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, |
388 | RT5631_EN_CAP_FREE_DEPOP); |
389 | } else { |
390 | /* power off capless block */ |
391 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0); |
392 | msleep(100); |
393 | } |
394 | |
395 | /* recover soft volume and zero crossing setting */ |
396 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
397 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
398 | } |
399 | |
400 | /** |
401 | * onebit_depop_mute_stage - auto depop in mute stage. |
402 | * @enable: mute/unmute |
403 | * |
404 | * When mute/unmute headphone, the depop sequence is done by hardware. |
405 | */ |
406 | static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable) |
407 | { |
408 | unsigned int soft_vol, hp_zc; |
409 | |
410 | /* enable one-bit depop function */ |
411 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
412 | RT5631_EN_ONE_BIT_DEPOP, 0); |
413 | |
414 | /* keep soft volume and zero crossing setting */ |
415 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
416 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
417 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
418 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
419 | if (enable) { |
420 | schedule_timeout_uninterruptible(msecs_to_jiffies(10)); |
421 | /* config one-bit depop parameter */ |
422 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f); |
423 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
424 | RT5631_L_MUTE | RT5631_R_MUTE, 0); |
425 | msleep(300); |
426 | } else { |
427 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
428 | RT5631_L_MUTE | RT5631_R_MUTE, |
429 | RT5631_L_MUTE | RT5631_R_MUTE); |
430 | msleep(100); |
431 | } |
432 | |
433 | /* recover soft volume and zero crossing setting */ |
434 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
435 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
436 | } |
437 | |
438 | /** |
439 | * onebit_depop_power_stage - step by step depop sequence in power stage. |
440 | * @enable: power on/off |
441 | * |
442 | * When power on/off headphone, the depop sequence is done in step by step. |
443 | */ |
444 | static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable) |
445 | { |
446 | unsigned int soft_vol, hp_zc; |
447 | |
448 | /* depop control by register */ |
449 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
450 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
451 | |
452 | /* keep soft volume and zero crossing setting */ |
453 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
454 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
455 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
456 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
457 | if (enable) { |
458 | /* config depop sequence parameter */ |
459 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e); |
460 | |
461 | /* power on headphone and charge pump */ |
462 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
463 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
464 | RT5631_PWR_HP_R_AMP, |
465 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
466 | RT5631_PWR_HP_R_AMP); |
467 | |
468 | /* power on soft generator and depop mode2 */ |
469 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
470 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP); |
471 | msleep(100); |
472 | |
473 | /* stop depop mode */ |
474 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
475 | RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS); |
476 | } else { |
477 | /* config depop sequence parameter */ |
478 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F); |
479 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
480 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
481 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
482 | msleep(75); |
483 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
484 | RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP | |
485 | RT5631_PD_HPAMP_R_ST_UP); |
486 | |
487 | /* start depop mode */ |
488 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
489 | RT5631_PWR_HP_DEPOP_DIS, 0); |
490 | |
491 | /* config depop sequence parameter */ |
492 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
493 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP | |
494 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
495 | msleep(80); |
496 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
497 | RT5631_POW_ON_SOFT_GEN); |
498 | |
499 | /* power down headphone and charge pump */ |
500 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
501 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
502 | RT5631_PWR_HP_R_AMP, 0); |
503 | } |
504 | |
505 | /* recover soft volume and zero crossing setting */ |
506 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
507 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
508 | } |
509 | |
510 | /** |
511 | * depop_seq_mute_stage - step by step depop sequence in mute stage. |
512 | * @enable: mute/unmute |
513 | * |
514 | * When mute/unmute headphone, the depop sequence is done in step by step. |
515 | */ |
516 | static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable) |
517 | { |
518 | unsigned int soft_vol, hp_zc; |
519 | |
520 | /* depop control by register */ |
521 | snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2, |
522 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
523 | |
524 | /* keep soft volume and zero crossing setting */ |
525 | soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL); |
526 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0); |
527 | hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2); |
528 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff); |
529 | if (enable) { |
530 | schedule_timeout_uninterruptible(msecs_to_jiffies(10)); |
531 | |
532 | /* config depop sequence parameter */ |
533 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f); |
534 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
535 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
536 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
537 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
538 | |
539 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
540 | RT5631_L_MUTE | RT5631_R_MUTE, 0); |
541 | msleep(160); |
542 | } else { |
543 | /* config depop sequence parameter */ |
544 | rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f); |
545 | snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1, |
546 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
547 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
548 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
549 | |
550 | snd_soc_update_bits(codec, RT5631_HP_OUT_VOL, |
551 | RT5631_L_MUTE | RT5631_R_MUTE, |
552 | RT5631_L_MUTE | RT5631_R_MUTE); |
553 | msleep(150); |
554 | } |
555 | |
556 | /* recover soft volume and zero crossing setting */ |
557 | snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol); |
558 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc); |
559 | } |
560 | |
561 | static int hp_event(struct snd_soc_dapm_widget *w, |
562 | struct snd_kcontrol *kcontrol, int event) |
563 | { |
564 | struct snd_soc_codec *codec = w->codec; |
565 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
566 | |
567 | switch (event) { |
568 | case SND_SOC_DAPM_PRE_PMD: |
569 | if (rt5631->codec_version) { |
570 | onebit_depop_mute_stage(codec, 0); |
571 | onebit_depop_power_stage(codec, 0); |
572 | } else { |
573 | depop_seq_mute_stage(codec, 0); |
574 | depop_seq_power_stage(codec, 0); |
575 | } |
576 | break; |
577 | |
578 | case SND_SOC_DAPM_POST_PMU: |
579 | if (rt5631->codec_version) { |
580 | onebit_depop_power_stage(codec, 1); |
581 | onebit_depop_mute_stage(codec, 1); |
582 | } else { |
583 | depop_seq_power_stage(codec, 1); |
584 | depop_seq_mute_stage(codec, 1); |
585 | } |
586 | break; |
587 | |
588 | default: |
589 | break; |
590 | } |
591 | |
592 | return 0; |
593 | } |
594 | |
595 | static int set_dmic_params(struct snd_soc_dapm_widget *w, |
596 | struct snd_kcontrol *kcontrol, int event) |
597 | { |
598 | struct snd_soc_codec *codec = w->codec; |
599 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
600 | |
601 | switch (rt5631->rx_rate) { |
602 | case 44100: |
603 | case 48000: |
604 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
605 | RT5631_DMIC_CLK_CTRL_MASK, |
606 | RT5631_DMIC_CLK_CTRL_TO_32FS); |
607 | break; |
608 | |
609 | case 32000: |
610 | case 22050: |
611 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
612 | RT5631_DMIC_CLK_CTRL_MASK, |
613 | RT5631_DMIC_CLK_CTRL_TO_64FS); |
614 | break; |
615 | |
616 | case 16000: |
617 | case 11025: |
618 | case 8000: |
619 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
620 | RT5631_DMIC_CLK_CTRL_MASK, |
621 | RT5631_DMIC_CLK_CTRL_TO_128FS); |
622 | break; |
623 | |
624 | default: |
625 | return -EINVAL; |
626 | } |
627 | |
628 | return 0; |
629 | } |
630 | |
631 | static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = { |
632 | SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER, |
633 | RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1), |
634 | SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER, |
635 | RT5631_M_MIC1_RECMIXL_BIT, 1, 1), |
636 | SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER, |
637 | RT5631_M_AXIL_RECMIXL_BIT, 1, 1), |
638 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, |
639 | RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1), |
640 | }; |
641 | |
642 | static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = { |
643 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, |
644 | RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1), |
645 | SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER, |
646 | RT5631_M_AXIR_RECMIXR_BIT, 1, 1), |
647 | SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER, |
648 | RT5631_M_MIC2_RECMIXR_BIT, 1, 1), |
649 | SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER, |
650 | RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1), |
651 | }; |
652 | |
653 | static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = { |
654 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, |
655 | RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1), |
656 | SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL, |
657 | RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1), |
658 | SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL, |
659 | RT5631_M_DACL_SPKMIXL_BIT, 1, 1), |
660 | SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, |
661 | RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1), |
662 | }; |
663 | |
664 | static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = { |
665 | SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, |
666 | RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1), |
667 | SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL, |
668 | RT5631_M_DACR_SPKMIXR_BIT, 1, 1), |
669 | SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL, |
670 | RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1), |
671 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, |
672 | RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1), |
673 | }; |
674 | |
675 | static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = { |
676 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
677 | RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1), |
678 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL, |
679 | RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1), |
680 | SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
681 | RT5631_M_DACL_OUTMIXL_BIT, 1, 1), |
682 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL, |
683 | RT5631_M_MIC1_OUTMIXL_BIT, 1, 1), |
684 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL, |
685 | RT5631_M_MIC2_OUTMIXL_BIT, 1, 1), |
686 | SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL, |
687 | RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1), |
688 | SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
689 | RT5631_M_AXIL_OUTMIXL_BIT, 1, 1), |
690 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, |
691 | RT5631_M_AXIR_OUTMIXL_BIT, 1, 1), |
692 | SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL, |
693 | RT5631_M_VDAC_OUTMIXL_BIT, 1, 1), |
694 | }; |
695 | |
696 | static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = { |
697 | SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL, |
698 | RT5631_M_VDAC_OUTMIXR_BIT, 1, 1), |
699 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
700 | RT5631_M_AXIR_OUTMIXR_BIT, 1, 1), |
701 | SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
702 | RT5631_M_AXIL_OUTMIXR_BIT, 1, 1), |
703 | SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL, |
704 | RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1), |
705 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL, |
706 | RT5631_M_MIC2_OUTMIXR_BIT, 1, 1), |
707 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL, |
708 | RT5631_M_MIC1_OUTMIXR_BIT, 1, 1), |
709 | SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL, |
710 | RT5631_M_DACR_OUTMIXR_BIT, 1, 1), |
711 | SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL, |
712 | RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1), |
713 | SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL, |
714 | RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1), |
715 | }; |
716 | |
717 | static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = { |
718 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL, |
719 | RT5631_M_MIC1_AXO1MIX_BIT , 1, 1), |
720 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL, |
721 | RT5631_M_MIC2_AXO1MIX_BIT, 1, 1), |
722 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL, |
723 | RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1), |
724 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL, |
725 | RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1), |
726 | }; |
727 | |
728 | static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = { |
729 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL, |
730 | RT5631_M_MIC1_AXO2MIX_BIT, 1, 1), |
731 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL, |
732 | RT5631_M_MIC2_AXO2MIX_BIT, 1, 1), |
733 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL, |
734 | RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1), |
735 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL, |
736 | RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1), |
737 | }; |
738 | |
739 | static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = { |
740 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
741 | RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1), |
742 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
743 | RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1), |
744 | }; |
745 | |
746 | static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = { |
747 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
748 | RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1), |
749 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
750 | RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1), |
751 | }; |
752 | |
753 | static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = { |
754 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
755 | RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1), |
756 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, |
757 | RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1), |
758 | }; |
759 | |
760 | /* Left SPK Volume Input */ |
761 | static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"}; |
762 | |
763 | static const SOC_ENUM_SINGLE_DECL( |
764 | rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL, |
765 | RT5631_L_EN_SHIFT, rt5631_spkvoll_sel); |
766 | |
767 | static const struct snd_kcontrol_new rt5631_spkvoll_mux_control = |
768 | SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum); |
769 | |
770 | /* Left HP Volume Input */ |
771 | static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"}; |
772 | |
773 | static const SOC_ENUM_SINGLE_DECL( |
774 | rt5631_hpvoll_enum, RT5631_HP_OUT_VOL, |
775 | RT5631_L_EN_SHIFT, rt5631_hpvoll_sel); |
776 | |
777 | static const struct snd_kcontrol_new rt5631_hpvoll_mux_control = |
778 | SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum); |
779 | |
780 | /* Left Out Volume Input */ |
781 | static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"}; |
782 | |
783 | static const SOC_ENUM_SINGLE_DECL( |
784 | rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL, |
785 | RT5631_L_EN_SHIFT, rt5631_outvoll_sel); |
786 | |
787 | static const struct snd_kcontrol_new rt5631_outvoll_mux_control = |
788 | SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum); |
789 | |
790 | /* Right Out Volume Input */ |
791 | static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"}; |
792 | |
793 | static const SOC_ENUM_SINGLE_DECL( |
794 | rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL, |
795 | RT5631_R_EN_SHIFT, rt5631_outvolr_sel); |
796 | |
797 | static const struct snd_kcontrol_new rt5631_outvolr_mux_control = |
798 | SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum); |
799 | |
800 | /* Right HP Volume Input */ |
801 | static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"}; |
802 | |
803 | static const SOC_ENUM_SINGLE_DECL( |
804 | rt5631_hpvolr_enum, RT5631_HP_OUT_VOL, |
805 | RT5631_R_EN_SHIFT, rt5631_hpvolr_sel); |
806 | |
807 | static const struct snd_kcontrol_new rt5631_hpvolr_mux_control = |
808 | SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum); |
809 | |
810 | /* Right SPK Volume Input */ |
811 | static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"}; |
812 | |
813 | static const SOC_ENUM_SINGLE_DECL( |
814 | rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL, |
815 | RT5631_R_EN_SHIFT, rt5631_spkvolr_sel); |
816 | |
817 | static const struct snd_kcontrol_new rt5631_spkvolr_mux_control = |
818 | SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum); |
819 | |
820 | /* SPO Left Channel Input */ |
821 | static const char *rt5631_spol_src_sel[] = { |
822 | "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"}; |
823 | |
824 | static const SOC_ENUM_SINGLE_DECL( |
825 | rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
826 | RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel); |
827 | |
828 | static const struct snd_kcontrol_new rt5631_spol_mux_control = |
829 | SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum); |
830 | |
831 | /* SPO Right Channel Input */ |
832 | static const char *rt5631_spor_src_sel[] = { |
833 | "SPORMIX", "MONOIN_RX", "VDAC", "DACR"}; |
834 | |
835 | static const SOC_ENUM_SINGLE_DECL( |
836 | rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
837 | RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel); |
838 | |
839 | static const struct snd_kcontrol_new rt5631_spor_mux_control = |
840 | SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum); |
841 | |
842 | /* MONO Input */ |
843 | static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"}; |
844 | |
845 | static const SOC_ENUM_SINGLE_DECL( |
846 | rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
847 | RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel); |
848 | |
849 | static const struct snd_kcontrol_new rt5631_mono_mux_control = |
850 | SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum); |
851 | |
852 | /* Left HPO Input */ |
853 | static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"}; |
854 | |
855 | static const SOC_ENUM_SINGLE_DECL( |
856 | rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
857 | RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel); |
858 | |
859 | static const struct snd_kcontrol_new rt5631_hpl_mux_control = |
860 | SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum); |
861 | |
862 | /* Right HPO Input */ |
863 | static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"}; |
864 | |
865 | static const SOC_ENUM_SINGLE_DECL( |
866 | rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
867 | RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel); |
868 | |
869 | static const struct snd_kcontrol_new rt5631_hpr_mux_control = |
870 | SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum); |
871 | |
872 | static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = { |
873 | /* Vmid */ |
874 | SND_SOC_DAPM_VMID("Vmid"), |
875 | /* PLL1 */ |
876 | SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2, |
877 | RT5631_PWR_PLL1_BIT, 0, NULL, 0), |
878 | |
879 | /* Input Side */ |
880 | /* Input Lines */ |
881 | SND_SOC_DAPM_INPUT("MIC1"), |
882 | SND_SOC_DAPM_INPUT("MIC2"), |
883 | SND_SOC_DAPM_INPUT("AXIL"), |
884 | SND_SOC_DAPM_INPUT("AXIR"), |
885 | SND_SOC_DAPM_INPUT("MONOIN_RXN"), |
886 | SND_SOC_DAPM_INPUT("MONOIN_RXP"), |
887 | SND_SOC_DAPM_INPUT("DMIC"), |
888 | |
889 | /* MICBIAS */ |
890 | SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2, |
891 | RT5631_PWR_MICBIAS1_VOL_BIT, 0), |
892 | SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2, |
893 | RT5631_PWR_MICBIAS2_VOL_BIT, 0), |
894 | |
895 | /* Boost */ |
896 | SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2, |
897 | RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0), |
898 | SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2, |
899 | RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0), |
900 | SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4, |
901 | RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0), |
902 | SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4, |
903 | RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0), |
904 | SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4, |
905 | RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0), |
906 | SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4, |
907 | RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0), |
908 | |
909 | /* MONO In */ |
910 | SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0), |
911 | |
912 | /* REC Mixer */ |
913 | SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
914 | RT5631_PWR_RECMIXER_L_BIT, 0, |
915 | &rt5631_recmixl_mixer_controls[0], |
916 | ARRAY_SIZE(rt5631_recmixl_mixer_controls)), |
917 | SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
918 | RT5631_PWR_RECMIXER_R_BIT, 0, |
919 | &rt5631_recmixr_mixer_controls[0], |
920 | ARRAY_SIZE(rt5631_recmixr_mixer_controls)), |
921 | /* Because of record duplication for L/R channel, |
922 | * L/R ADCs need power up at the same time */ |
923 | SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
924 | |
925 | /* DMIC */ |
926 | SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL, |
927 | RT5631_DMIC_ENA_SHIFT, 0, |
928 | set_dmic_params, SND_SOC_DAPM_PRE_PMU), |
929 | /* ADC Data Srouce */ |
930 | SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2, |
931 | RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0), |
932 | SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2, |
933 | RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0), |
934 | |
935 | /* ADCs */ |
936 | SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture", |
937 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0), |
938 | SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture", |
939 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0), |
940 | |
941 | /* DAC and ADC supply power */ |
942 | SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1, |
943 | RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0), |
944 | SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1, |
945 | RT5631_PWR_DAC_REF_BIT, 0, NULL, 0), |
946 | |
947 | /* Output Side */ |
948 | /* DACs */ |
949 | SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback", |
950 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0), |
951 | SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback", |
952 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0), |
953 | SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback", |
954 | SND_SOC_NOPM, 0, 0), |
955 | SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0), |
956 | /* DAC supply power */ |
957 | SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1, |
958 | RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0), |
959 | SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1, |
960 | RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0), |
961 | |
962 | /* Left SPK Mixer */ |
963 | SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
964 | RT5631_PWR_SPKMIXER_L_BIT, 0, |
965 | &rt5631_spkmixl_mixer_controls[0], |
966 | ARRAY_SIZE(rt5631_spkmixl_mixer_controls)), |
967 | /* Left Out Mixer */ |
968 | SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2, |
969 | RT5631_PWR_OUTMIXER_L_BIT, 0, |
970 | &rt5631_outmixl_mixer_controls[0], |
971 | ARRAY_SIZE(rt5631_outmixl_mixer_controls)), |
972 | /* Right Out Mixer */ |
973 | SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
974 | RT5631_PWR_OUTMIXER_R_BIT, 0, |
975 | &rt5631_outmixr_mixer_controls[0], |
976 | ARRAY_SIZE(rt5631_outmixr_mixer_controls)), |
977 | /* Right SPK Mixer */ |
978 | SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2, |
979 | RT5631_PWR_SPKMIXER_R_BIT, 0, |
980 | &rt5631_spkmixr_mixer_controls[0], |
981 | ARRAY_SIZE(rt5631_spkmixr_mixer_controls)), |
982 | |
983 | /* Volume Mux */ |
984 | SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4, |
985 | RT5631_PWR_SPK_L_VOL_BIT, 0, |
986 | &rt5631_spkvoll_mux_control), |
987 | SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4, |
988 | RT5631_PWR_HP_L_OUT_VOL_BIT, 0, |
989 | &rt5631_hpvoll_mux_control), |
990 | SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4, |
991 | RT5631_PWR_LOUT_VOL_BIT, 0, |
992 | &rt5631_outvoll_mux_control), |
993 | SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4, |
994 | RT5631_PWR_ROUT_VOL_BIT, 0, |
995 | &rt5631_outvolr_mux_control), |
996 | SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4, |
997 | RT5631_PWR_HP_R_OUT_VOL_BIT, 0, |
998 | &rt5631_hpvolr_mux_control), |
999 | SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4, |
1000 | RT5631_PWR_SPK_R_VOL_BIT, 0, |
1001 | &rt5631_spkvolr_mux_control), |
1002 | |
1003 | /* DAC To HP */ |
1004 | SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
1005 | SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
1006 | |
1007 | /* HP Depop */ |
1008 | SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0, |
1009 | hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
1010 | |
1011 | /* AXO1 Mixer */ |
1012 | SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3, |
1013 | RT5631_PWR_AXO1MIXER_BIT, 0, |
1014 | &rt5631_AXO1MIX_mixer_controls[0], |
1015 | ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)), |
1016 | /* SPOL Mixer */ |
1017 | SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0, |
1018 | &rt5631_spolmix_mixer_controls[0], |
1019 | ARRAY_SIZE(rt5631_spolmix_mixer_controls)), |
1020 | /* MONO Mixer */ |
1021 | SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3, |
1022 | RT5631_PWR_MONOMIXER_BIT, 0, |
1023 | &rt5631_monomix_mixer_controls[0], |
1024 | ARRAY_SIZE(rt5631_monomix_mixer_controls)), |
1025 | /* SPOR Mixer */ |
1026 | SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0, |
1027 | &rt5631_spormix_mixer_controls[0], |
1028 | ARRAY_SIZE(rt5631_spormix_mixer_controls)), |
1029 | /* AXO2 Mixer */ |
1030 | SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3, |
1031 | RT5631_PWR_AXO2MIXER_BIT, 0, |
1032 | &rt5631_AXO2MIX_mixer_controls[0], |
1033 | ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)), |
1034 | |
1035 | /* Mux */ |
1036 | SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0, |
1037 | &rt5631_spol_mux_control), |
1038 | SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0, |
1039 | &rt5631_spor_mux_control), |
1040 | SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0, |
1041 | &rt5631_mono_mux_control), |
1042 | SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, |
1043 | &rt5631_hpl_mux_control), |
1044 | SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, |
1045 | &rt5631_hpr_mux_control), |
1046 | |
1047 | /* AMP supply */ |
1048 | SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3, |
1049 | RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0), |
1050 | SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1, |
1051 | RT5631_PWR_CLASS_D_BIT, 0, NULL, 0), |
1052 | |
1053 | /* Output Lines */ |
1054 | SND_SOC_DAPM_OUTPUT("AUXO1"), |
1055 | SND_SOC_DAPM_OUTPUT("AUXO2"), |
1056 | SND_SOC_DAPM_OUTPUT("SPOL"), |
1057 | SND_SOC_DAPM_OUTPUT("SPOR"), |
1058 | SND_SOC_DAPM_OUTPUT("HPOL"), |
1059 | SND_SOC_DAPM_OUTPUT("HPOR"), |
1060 | SND_SOC_DAPM_OUTPUT("MONO"), |
1061 | }; |
1062 | |
1063 | static const struct snd_soc_dapm_route rt5631_dapm_routes[] = { |
1064 | {"MIC1 Boost", NULL, "MIC1"}, |
1065 | {"MIC2 Boost", NULL, "MIC2"}, |
1066 | {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"}, |
1067 | {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"}, |
1068 | {"AXIL Boost", NULL, "AXIL"}, |
1069 | {"AXIR Boost", NULL, "AXIR"}, |
1070 | |
1071 | {"MONO_IN", NULL, "MONOIN_RXP Boost"}, |
1072 | {"MONO_IN", NULL, "MONOIN_RXN Boost"}, |
1073 | |
1074 | {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"}, |
1075 | {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"}, |
1076 | {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"}, |
1077 | {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"}, |
1078 | |
1079 | {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"}, |
1080 | {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"}, |
1081 | {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"}, |
1082 | {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"}, |
1083 | |
1084 | {"ADC Mixer", NULL, "RECMIXL Mixer"}, |
1085 | {"ADC Mixer", NULL, "RECMIXR Mixer"}, |
1086 | |
1087 | {"Left ADC", NULL, "ADC Mixer"}, |
1088 | {"Left ADC", NULL, "Left ADC Select", check_adcl_select}, |
1089 | {"Left ADC", NULL, "PLL1", check_sysclk1_source}, |
1090 | {"Left ADC", NULL, "I2S"}, |
1091 | {"Left ADC", NULL, "DAC REF"}, |
1092 | |
1093 | {"Right ADC", NULL, "ADC Mixer"}, |
1094 | {"Right ADC", NULL, "Right ADC Select", check_adcr_select}, |
1095 | {"Right ADC", NULL, "PLL1", check_sysclk1_source}, |
1096 | {"Right ADC", NULL, "I2S"}, |
1097 | {"Right ADC", NULL, "DAC REF"}, |
1098 | |
1099 | {"DMIC", NULL, "DMIC Supply", check_dmic_used}, |
1100 | {"Left ADC", NULL, "DMIC"}, |
1101 | {"Right ADC", NULL, "DMIC"}, |
1102 | |
1103 | {"Left DAC", NULL, "PLL1", check_sysclk1_source}, |
1104 | {"Left DAC", NULL, "I2S"}, |
1105 | {"Left DAC", NULL, "DAC REF"}, |
1106 | {"Right DAC", NULL, "PLL1", check_sysclk1_source}, |
1107 | {"Right DAC", NULL, "I2S"}, |
1108 | {"Right DAC", NULL, "DAC REF"}, |
1109 | |
1110 | {"Voice DAC Boost", NULL, "Voice DAC"}, |
1111 | |
1112 | {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl}, |
1113 | {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1114 | {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"}, |
1115 | {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"}, |
1116 | {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"}, |
1117 | |
1118 | {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr}, |
1119 | {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"}, |
1120 | {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"}, |
1121 | {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"}, |
1122 | {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1123 | |
1124 | {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl}, |
1125 | {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1126 | {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1127 | {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"}, |
1128 | {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1129 | {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1130 | {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"}, |
1131 | {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"}, |
1132 | {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"}, |
1133 | {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"}, |
1134 | |
1135 | {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr}, |
1136 | {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"}, |
1137 | {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"}, |
1138 | {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"}, |
1139 | {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1140 | {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1141 | {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"}, |
1142 | {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"}, |
1143 | {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"}, |
1144 | {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"}, |
1145 | |
1146 | {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"}, |
1147 | {"Left SPKVOL Mux", "Vmid", "Vmid"}, |
1148 | {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"}, |
1149 | {"Left HPVOL Mux", "Vmid", "Vmid"}, |
1150 | {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"}, |
1151 | {"Left OUTVOL Mux", "Vmid", "Vmid"}, |
1152 | {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"}, |
1153 | {"Right OUTVOL Mux", "Vmid", "Vmid"}, |
1154 | {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"}, |
1155 | {"Right HPVOL Mux", "Vmid", "Vmid"}, |
1156 | {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"}, |
1157 | {"Right SPKVOL Mux", "Vmid", "Vmid"}, |
1158 | |
1159 | {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1160 | {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1161 | {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1162 | {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1163 | |
1164 | {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"}, |
1165 | {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1166 | {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1167 | {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"}, |
1168 | |
1169 | {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"}, |
1170 | {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"}, |
1171 | |
1172 | {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"}, |
1173 | {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"}, |
1174 | |
1175 | {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"}, |
1176 | {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"}, |
1177 | |
1178 | {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"}, |
1179 | {"SPOL Mux", "MONOIN_RX", "MONO_IN"}, |
1180 | {"SPOL Mux", "VDAC", "Voice DAC Boost"}, |
1181 | {"SPOL Mux", "DACL", "Left DAC"}, |
1182 | |
1183 | {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"}, |
1184 | {"SPOR Mux", "MONOIN_RX", "MONO_IN"}, |
1185 | {"SPOR Mux", "VDAC", "Voice DAC Boost"}, |
1186 | {"SPOR Mux", "DACR", "Right DAC"}, |
1187 | |
1188 | {"MONO Mux", "MONOMIX", "MONOMIX Mixer"}, |
1189 | {"MONO Mux", "MONOIN_RX", "MONO_IN"}, |
1190 | {"MONO Mux", "VDAC", "Voice DAC Boost"}, |
1191 | |
1192 | {"Right DAC_HP", NULL, "Right DAC"}, |
1193 | {"Left DAC_HP", NULL, "Left DAC"}, |
1194 | |
1195 | {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"}, |
1196 | {"HPL Mux", "Left DAC", "Left DAC_HP"}, |
1197 | {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"}, |
1198 | {"HPR Mux", "Right DAC", "Right DAC_HP"}, |
1199 | |
1200 | {"HP Depop", NULL, "HPL Mux"}, |
1201 | {"HP Depop", NULL, "HPR Mux"}, |
1202 | |
1203 | {"AUXO1", NULL, "AXO1MIX Mixer"}, |
1204 | {"AUXO2", NULL, "AXO2MIX Mixer"}, |
1205 | |
1206 | {"SPOL", NULL, "Class D"}, |
1207 | {"SPOL", NULL, "SPOL Mux"}, |
1208 | {"SPOR", NULL, "Class D"}, |
1209 | {"SPOR", NULL, "SPOR Mux"}, |
1210 | |
1211 | {"HPOL", NULL, "HP Depop"}, |
1212 | {"HPOR", NULL, "HP Depop"}, |
1213 | |
1214 | {"MONO", NULL, "MONO Depop"}, |
1215 | {"MONO", NULL, "MONO Mux"}, |
1216 | }; |
1217 | |
1218 | struct coeff_clk_div { |
1219 | u32 mclk; |
1220 | u32 bclk; |
1221 | u32 rate; |
1222 | u16 reg_val; |
1223 | }; |
1224 | |
1225 | /* PLL divisors */ |
1226 | struct pll_div { |
1227 | u32 pll_in; |
1228 | u32 pll_out; |
1229 | u16 reg_val; |
1230 | }; |
1231 | |
1232 | static const struct pll_div codec_master_pll_div[] = { |
1233 | {2048000, 8192000, 0x0ea0}, |
1234 | {3686400, 8192000, 0x4e27}, |
1235 | {12000000, 8192000, 0x456b}, |
1236 | {13000000, 8192000, 0x495f}, |
1237 | {13100000, 8192000, 0x0320}, |
1238 | {2048000, 11289600, 0xf637}, |
1239 | {3686400, 11289600, 0x2f22}, |
1240 | {12000000, 11289600, 0x3e2f}, |
1241 | {13000000, 11289600, 0x4d5b}, |
1242 | {13100000, 11289600, 0x363b}, |
1243 | {2048000, 16384000, 0x1ea0}, |
1244 | {3686400, 16384000, 0x9e27}, |
1245 | {12000000, 16384000, 0x452b}, |
1246 | {13000000, 16384000, 0x542f}, |
1247 | {13100000, 16384000, 0x03a0}, |
1248 | {2048000, 16934400, 0xe625}, |
1249 | {3686400, 16934400, 0x9126}, |
1250 | {12000000, 16934400, 0x4d2c}, |
1251 | {13000000, 16934400, 0x742f}, |
1252 | {13100000, 16934400, 0x3c27}, |
1253 | {2048000, 22579200, 0x2aa0}, |
1254 | {3686400, 22579200, 0x2f20}, |
1255 | {12000000, 22579200, 0x7e2f}, |
1256 | {13000000, 22579200, 0x742f}, |
1257 | {13100000, 22579200, 0x3c27}, |
1258 | {2048000, 24576000, 0x2ea0}, |
1259 | {3686400, 24576000, 0xee27}, |
1260 | {12000000, 24576000, 0x2915}, |
1261 | {13000000, 24576000, 0x772e}, |
1262 | {13100000, 24576000, 0x0d20}, |
1263 | {26000000, 24576000, 0x2027}, |
1264 | {26000000, 22579200, 0x392f}, |
1265 | {24576000, 22579200, 0x0921}, |
1266 | {24576000, 24576000, 0x02a0}, |
1267 | }; |
1268 | |
1269 | static const struct pll_div codec_slave_pll_div[] = { |
1270 | {256000, 2048000, 0x46f0}, |
1271 | {256000, 4096000, 0x3ea0}, |
1272 | {352800, 5644800, 0x3ea0}, |
1273 | {512000, 8192000, 0x3ea0}, |
1274 | {1024000, 8192000, 0x46f0}, |
1275 | {705600, 11289600, 0x3ea0}, |
1276 | {1024000, 16384000, 0x3ea0}, |
1277 | {1411200, 22579200, 0x3ea0}, |
1278 | {1536000, 24576000, 0x3ea0}, |
1279 | {2048000, 16384000, 0x1ea0}, |
1280 | {2822400, 22579200, 0x1ea0}, |
1281 | {2822400, 45158400, 0x5ec0}, |
1282 | {5644800, 45158400, 0x46f0}, |
1283 | {3072000, 24576000, 0x1ea0}, |
1284 | {3072000, 49152000, 0x5ec0}, |
1285 | {6144000, 49152000, 0x46f0}, |
1286 | {705600, 11289600, 0x3ea0}, |
1287 | {705600, 8467200, 0x3ab0}, |
1288 | {24576000, 24576000, 0x02a0}, |
1289 | {1411200, 11289600, 0x1690}, |
1290 | {2822400, 11289600, 0x0a90}, |
1291 | {1536000, 12288000, 0x1690}, |
1292 | {3072000, 12288000, 0x0a90}, |
1293 | }; |
1294 | |
f79e5e8c |
1295 | static struct coeff_clk_div coeff_div[] = { |
d8085222 |
1296 | /* sysclk is 256fs */ |
1297 | {2048000, 8000 * 32, 8000, 0x1000}, |
1298 | {2048000, 8000 * 64, 8000, 0x0000}, |
1299 | {2822400, 11025 * 32, 11025, 0x1000}, |
1300 | {2822400, 11025 * 64, 11025, 0x0000}, |
1301 | {4096000, 16000 * 32, 16000, 0x1000}, |
1302 | {4096000, 16000 * 64, 16000, 0x0000}, |
1303 | {5644800, 22050 * 32, 22050, 0x1000}, |
1304 | {5644800, 22050 * 64, 22050, 0x0000}, |
1305 | {8192000, 32000 * 32, 32000, 0x1000}, |
1306 | {8192000, 32000 * 64, 32000, 0x0000}, |
1307 | {11289600, 44100 * 32, 44100, 0x1000}, |
1308 | {11289600, 44100 * 64, 44100, 0x0000}, |
1309 | {12288000, 48000 * 32, 48000, 0x1000}, |
1310 | {12288000, 48000 * 64, 48000, 0x0000}, |
1311 | {22579200, 88200 * 32, 88200, 0x1000}, |
1312 | {22579200, 88200 * 64, 88200, 0x0000}, |
1313 | {24576000, 96000 * 32, 96000, 0x1000}, |
1314 | {24576000, 96000 * 64, 96000, 0x0000}, |
1315 | /* sysclk is 512fs */ |
1316 | {4096000, 8000 * 32, 8000, 0x3000}, |
1317 | {4096000, 8000 * 64, 8000, 0x2000}, |
1318 | {5644800, 11025 * 32, 11025, 0x3000}, |
1319 | {5644800, 11025 * 64, 11025, 0x2000}, |
1320 | {8192000, 16000 * 32, 16000, 0x3000}, |
1321 | {8192000, 16000 * 64, 16000, 0x2000}, |
1322 | {11289600, 22050 * 32, 22050, 0x3000}, |
1323 | {11289600, 22050 * 64, 22050, 0x2000}, |
1324 | {16384000, 32000 * 32, 32000, 0x3000}, |
1325 | {16384000, 32000 * 64, 32000, 0x2000}, |
1326 | {22579200, 44100 * 32, 44100, 0x3000}, |
1327 | {22579200, 44100 * 64, 44100, 0x2000}, |
1328 | {24576000, 48000 * 32, 48000, 0x3000}, |
1329 | {24576000, 48000 * 64, 48000, 0x2000}, |
1330 | {45158400, 88200 * 32, 88200, 0x3000}, |
1331 | {45158400, 88200 * 64, 88200, 0x2000}, |
1332 | {49152000, 96000 * 32, 96000, 0x3000}, |
1333 | {49152000, 96000 * 64, 96000, 0x2000}, |
1334 | /* sysclk is 24.576Mhz or 22.5792Mhz */ |
1335 | {24576000, 8000 * 32, 8000, 0x7080}, |
1336 | {24576000, 8000 * 64, 8000, 0x6080}, |
1337 | {24576000, 16000 * 32, 16000, 0x5080}, |
1338 | {24576000, 16000 * 64, 16000, 0x4080}, |
1339 | {24576000, 24000 * 32, 24000, 0x5000}, |
1340 | {24576000, 24000 * 64, 24000, 0x4000}, |
1341 | {24576000, 32000 * 32, 32000, 0x3080}, |
1342 | {24576000, 32000 * 64, 32000, 0x2080}, |
1343 | {22579200, 11025 * 32, 11025, 0x7000}, |
1344 | {22579200, 11025 * 64, 11025, 0x6000}, |
1345 | {22579200, 22050 * 32, 22050, 0x5000}, |
1346 | {22579200, 22050 * 64, 22050, 0x4000}, |
1347 | }; |
1348 | |
1349 | static int get_coeff(int mclk, int rate, int timesofbclk) |
1350 | { |
1351 | int i; |
1352 | |
1353 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { |
1354 | if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate && |
1355 | (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk) |
1356 | return i; |
1357 | } |
1358 | return -EINVAL; |
1359 | } |
1360 | |
1361 | static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream, |
1362 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
1363 | { |
1364 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
1365 | struct snd_soc_codec *codec = rtd->codec; |
1366 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1367 | int timesofbclk = 32, coeff; |
1368 | unsigned int iface = 0; |
1369 | |
1370 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1371 | |
1372 | rt5631->bclk_rate = snd_soc_params_to_bclk(params); |
1373 | if (rt5631->bclk_rate < 0) { |
1374 | dev_err(codec->dev, "Fail to get BCLK rate\n"); |
1375 | return rt5631->bclk_rate; |
1376 | } |
1377 | rt5631->rx_rate = params_rate(params); |
1378 | |
1379 | if (rt5631->master) |
1380 | coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate, |
1381 | rt5631->bclk_rate / rt5631->rx_rate); |
1382 | else |
1383 | coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate, |
1384 | timesofbclk); |
1385 | if (coeff < 0) { |
1386 | dev_err(codec->dev, "Fail to get coeff\n"); |
1387 | return -EINVAL; |
1388 | } |
1389 | |
1390 | switch (params_format(params)) { |
1391 | case SNDRV_PCM_FORMAT_S16_LE: |
1392 | break; |
1393 | case SNDRV_PCM_FORMAT_S20_3LE: |
1394 | iface |= RT5631_SDP_I2S_DL_20; |
1395 | break; |
1396 | case SNDRV_PCM_FORMAT_S24_LE: |
1397 | iface |= RT5631_SDP_I2S_DL_24; |
1398 | break; |
1399 | case SNDRV_PCM_FORMAT_S8: |
1400 | iface |= RT5631_SDP_I2S_DL_8; |
1401 | break; |
1402 | default: |
1403 | return -EINVAL; |
1404 | } |
1405 | |
1406 | snd_soc_update_bits(codec, RT5631_SDP_CTRL, |
1407 | RT5631_SDP_I2S_DL_MASK, iface); |
1408 | snd_soc_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL, |
1409 | coeff_div[coeff].reg_val); |
1410 | |
1411 | return 0; |
1412 | } |
1413 | |
1414 | static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, |
1415 | unsigned int fmt) |
1416 | { |
1417 | struct snd_soc_codec *codec = codec_dai->codec; |
1418 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1419 | unsigned int iface = 0; |
1420 | |
1421 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1422 | |
1423 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
1424 | case SND_SOC_DAIFMT_CBM_CFM: |
1425 | rt5631->master = 1; |
1426 | break; |
1427 | case SND_SOC_DAIFMT_CBS_CFS: |
1428 | iface |= RT5631_SDP_MODE_SEL_SLAVE; |
1429 | rt5631->master = 0; |
1430 | break; |
1431 | default: |
1432 | return -EINVAL; |
1433 | } |
1434 | |
1435 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
1436 | case SND_SOC_DAIFMT_I2S: |
1437 | break; |
1438 | case SND_SOC_DAIFMT_LEFT_J: |
1439 | iface |= RT5631_SDP_I2S_DF_LEFT; |
1440 | break; |
1441 | case SND_SOC_DAIFMT_DSP_A: |
1442 | iface |= RT5631_SDP_I2S_DF_PCM_A; |
1443 | break; |
1444 | case SND_SOC_DAIFMT_DSP_B: |
1445 | iface |= RT5631_SDP_I2S_DF_PCM_B; |
1446 | break; |
1447 | default: |
1448 | return -EINVAL; |
1449 | } |
1450 | |
1451 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
1452 | case SND_SOC_DAIFMT_NB_NF: |
1453 | break; |
1454 | case SND_SOC_DAIFMT_IB_NF: |
1455 | iface |= RT5631_SDP_I2S_BCLK_POL_CTRL; |
1456 | break; |
1457 | default: |
1458 | return -EINVAL; |
1459 | } |
1460 | |
1461 | snd_soc_write(codec, RT5631_SDP_CTRL, iface); |
1462 | |
1463 | return 0; |
1464 | } |
1465 | |
1466 | static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
1467 | int clk_id, unsigned int freq, int dir) |
1468 | { |
1469 | struct snd_soc_codec *codec = codec_dai->codec; |
1470 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1471 | |
1472 | dev_dbg(codec->dev, "enter %s, syclk=%d\n", __func__, freq); |
1473 | |
1474 | if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) { |
1475 | rt5631->sysclk = freq; |
1476 | return 0; |
1477 | } |
1478 | |
1479 | return -EINVAL; |
1480 | } |
1481 | |
1482 | static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
1483 | int source, unsigned int freq_in, unsigned int freq_out) |
1484 | { |
1485 | struct snd_soc_codec *codec = codec_dai->codec; |
1486 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1487 | int i, ret = -EINVAL; |
1488 | |
1489 | dev_dbg(codec->dev, "enter %s\n", __func__); |
1490 | |
1491 | if (!freq_in || !freq_out) { |
1492 | dev_dbg(codec->dev, "PLL disabled\n"); |
1493 | |
1494 | snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL, |
1495 | RT5631_SYSCLK_SOUR_SEL_MASK, |
1496 | RT5631_SYSCLK_SOUR_SEL_MCLK); |
1497 | |
1498 | return 0; |
1499 | } |
1500 | |
1501 | if (rt5631->master) { |
1502 | for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) |
1503 | if (freq_in == codec_master_pll_div[i].pll_in && |
1504 | freq_out == codec_master_pll_div[i].pll_out) { |
1505 | dev_info(codec->dev, |
1506 | "change PLL in master mode\n"); |
1507 | snd_soc_write(codec, RT5631_PLL_CTRL, |
1508 | codec_master_pll_div[i].reg_val); |
1509 | schedule_timeout_uninterruptible( |
1510 | msecs_to_jiffies(20)); |
1511 | snd_soc_update_bits(codec, |
1512 | RT5631_GLOBAL_CLK_CTRL, |
1513 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1514 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1515 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1516 | RT5631_PLLCLK_SOUR_SEL_MCLK); |
1517 | ret = 0; |
1518 | break; |
1519 | } |
1520 | } else { |
1521 | for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) |
1522 | if (freq_in == codec_slave_pll_div[i].pll_in && |
1523 | freq_out == codec_slave_pll_div[i].pll_out) { |
1524 | dev_info(codec->dev, |
1525 | "change PLL in slave mode\n"); |
1526 | snd_soc_write(codec, RT5631_PLL_CTRL, |
1527 | codec_slave_pll_div[i].reg_val); |
1528 | schedule_timeout_uninterruptible( |
1529 | msecs_to_jiffies(20)); |
1530 | snd_soc_update_bits(codec, |
1531 | RT5631_GLOBAL_CLK_CTRL, |
1532 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1533 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1534 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1535 | RT5631_PLLCLK_SOUR_SEL_BCLK); |
1536 | ret = 0; |
1537 | break; |
1538 | } |
1539 | } |
1540 | |
1541 | return ret; |
1542 | } |
1543 | |
1544 | static int rt5631_set_bias_level(struct snd_soc_codec *codec, |
1545 | enum snd_soc_bias_level level) |
1546 | { |
1547 | switch (level) { |
1548 | case SND_SOC_BIAS_ON: |
1549 | case SND_SOC_BIAS_PREPARE: |
1550 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2, |
1551 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL, |
1552 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL); |
1553 | break; |
1554 | |
1555 | case SND_SOC_BIAS_STANDBY: |
1556 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1557 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1558 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1559 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1560 | msleep(80); |
1561 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1562 | RT5631_PWR_FAST_VREF_CTRL, |
1563 | RT5631_PWR_FAST_VREF_CTRL); |
1564 | codec->cache_only = false; |
1565 | snd_soc_cache_sync(codec); |
1566 | } |
1567 | break; |
1568 | |
1569 | case SND_SOC_BIAS_OFF: |
1570 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000); |
1571 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000); |
1572 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000); |
1573 | snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000); |
1574 | break; |
1575 | |
1576 | default: |
1577 | break; |
1578 | } |
1579 | codec->dapm.bias_level = level; |
1580 | |
1581 | return 0; |
1582 | } |
1583 | |
1584 | static int rt5631_probe(struct snd_soc_codec *codec) |
1585 | { |
1586 | struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec); |
1587 | unsigned int val; |
1588 | int ret; |
1589 | |
1590 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); |
1591 | if (ret != 0) { |
1592 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
1593 | return ret; |
1594 | } |
1595 | |
1596 | val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3); |
1597 | if (val & 0x0002) |
1598 | rt5631->codec_version = 1; |
1599 | else |
1600 | rt5631->codec_version = 0; |
1601 | |
1602 | rt5631_reset(codec); |
1603 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1604 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1605 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1606 | msleep(80); |
1607 | snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3, |
1608 | RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL); |
1609 | /* enable HP zero cross */ |
1610 | snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18); |
1611 | /* power off ClassD auto Recovery */ |
1612 | if (rt5631->codec_version) |
1613 | snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2, |
1614 | 0x2000, 0x2000); |
1615 | else |
1616 | snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2, |
1617 | 0x2000, 0); |
1618 | /* DMIC */ |
1619 | if (rt5631->dmic_used_flag) { |
1620 | snd_soc_update_bits(codec, RT5631_GPIO_CTRL, |
1621 | RT5631_GPIO_PIN_FUN_SEL_MASK | |
1622 | RT5631_GPIO_DMIC_FUN_SEL_MASK, |
1623 | RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC | |
1624 | RT5631_GPIO_DMIC_FUN_SEL_DIMC); |
1625 | snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL, |
1626 | RT5631_DMIC_L_CH_LATCH_MASK | |
1627 | RT5631_DMIC_R_CH_LATCH_MASK, |
1628 | RT5631_DMIC_L_CH_LATCH_FALLING | |
1629 | RT5631_DMIC_R_CH_LATCH_RISING); |
1630 | } |
1631 | |
1632 | codec->dapm.bias_level = SND_SOC_BIAS_STANDBY; |
d8085222 |
1633 | |
1634 | return 0; |
1635 | } |
1636 | |
1637 | static int rt5631_remove(struct snd_soc_codec *codec) |
1638 | { |
1639 | rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1640 | return 0; |
1641 | } |
1642 | |
1643 | #ifdef CONFIG_PM |
1644 | static int rt5631_suspend(struct snd_soc_codec *codec, pm_message_t state) |
1645 | { |
1646 | rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF); |
1647 | return 0; |
1648 | } |
1649 | |
1650 | static int rt5631_resume(struct snd_soc_codec *codec) |
1651 | { |
1652 | rt5631_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1653 | return 0; |
1654 | } |
1655 | #else |
1656 | #define rt5631_suspend NULL |
1657 | #define rt5631_resume NULL |
1658 | #endif |
1659 | |
1660 | #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000 |
1661 | #define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \ |
1662 | SNDRV_PCM_FMTBIT_S20_3LE | \ |
1663 | SNDRV_PCM_FMTBIT_S24_LE | \ |
1664 | SNDRV_PCM_FMTBIT_S8) |
1665 | |
85e7652d |
1666 | static const struct snd_soc_dai_ops rt5631_ops = { |
d8085222 |
1667 | .hw_params = rt5631_hifi_pcm_params, |
1668 | .set_fmt = rt5631_hifi_codec_set_dai_fmt, |
1669 | .set_sysclk = rt5631_hifi_codec_set_dai_sysclk, |
1670 | .set_pll = rt5631_codec_set_dai_pll, |
1671 | }; |
1672 | |
51e19fb3 |
1673 | static struct snd_soc_dai_driver rt5631_dai[] = { |
d8085222 |
1674 | { |
1675 | .name = "rt5631-hifi", |
1676 | .id = 1, |
1677 | .playback = { |
1678 | .stream_name = "HIFI Playback", |
1679 | .channels_min = 1, |
1680 | .channels_max = 2, |
1681 | .rates = RT5631_STEREO_RATES, |
1682 | .formats = RT5631_FORMAT, |
1683 | }, |
1684 | .capture = { |
1685 | .stream_name = "HIFI Capture", |
1686 | .channels_min = 1, |
1687 | .channels_max = 2, |
1688 | .rates = RT5631_STEREO_RATES, |
1689 | .formats = RT5631_FORMAT, |
1690 | }, |
1691 | .ops = &rt5631_ops, |
1692 | }, |
1693 | }; |
1694 | |
1695 | static struct snd_soc_codec_driver soc_codec_dev_rt5631 = { |
1696 | .probe = rt5631_probe, |
1697 | .remove = rt5631_remove, |
1698 | .suspend = rt5631_suspend, |
1699 | .resume = rt5631_resume, |
1700 | .set_bias_level = rt5631_set_bias_level, |
1701 | .reg_cache_size = RT5631_VENDOR_ID2 + 1, |
1702 | .reg_word_size = sizeof(u16), |
1703 | .reg_cache_default = rt5631_reg, |
1704 | .volatile_register = rt5631_volatile_register, |
1705 | .readable_register = rt5631_readable_register, |
1706 | .reg_cache_step = 1, |
1707 | .controls = rt5631_snd_controls, |
1708 | .num_controls = ARRAY_SIZE(rt5631_snd_controls), |
1709 | .dapm_widgets = rt5631_dapm_widgets, |
1710 | .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets), |
1711 | .dapm_routes = rt5631_dapm_routes, |
1712 | .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes), |
1713 | }; |
1714 | |
1715 | static const struct i2c_device_id rt5631_i2c_id[] = { |
1716 | { "rt5631", 0 }, |
1717 | { } |
1718 | }; |
1719 | MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id); |
1720 | |
1721 | static int rt5631_i2c_probe(struct i2c_client *i2c, |
1722 | const struct i2c_device_id *id) |
1723 | { |
1724 | struct rt5631_priv *rt5631; |
1725 | int ret; |
1726 | |
1727 | rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL); |
1728 | if (NULL == rt5631) |
1729 | return -ENOMEM; |
1730 | |
1731 | i2c_set_clientdata(i2c, rt5631); |
1732 | |
1733 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631, |
1734 | rt5631_dai, ARRAY_SIZE(rt5631_dai)); |
1735 | if (ret < 0) |
1736 | kfree(rt5631); |
1737 | |
1738 | return ret; |
1739 | } |
1740 | |
1741 | static __devexit int rt5631_i2c_remove(struct i2c_client *client) |
1742 | { |
1743 | snd_soc_unregister_codec(&client->dev); |
1744 | kfree(i2c_get_clientdata(client)); |
1745 | return 0; |
1746 | } |
1747 | |
f79e5e8c |
1748 | static struct i2c_driver rt5631_i2c_driver = { |
d8085222 |
1749 | .driver = { |
1750 | .name = "rt5631", |
1751 | .owner = THIS_MODULE, |
1752 | }, |
1753 | .probe = rt5631_i2c_probe, |
1754 | .remove = __devexit_p(rt5631_i2c_remove), |
1755 | .id_table = rt5631_i2c_id, |
1756 | }; |
1757 | |
1758 | static int __init rt5631_modinit(void) |
1759 | { |
1760 | return i2c_add_driver(&rt5631_i2c_driver); |
1761 | } |
1762 | module_init(rt5631_modinit); |
1763 | |
1764 | static void __exit rt5631_modexit(void) |
1765 | { |
1766 | i2c_del_driver(&rt5631_i2c_driver); |
1767 | } |
1768 | module_exit(rt5631_modexit); |
1769 | |
1770 | MODULE_DESCRIPTION("ASoC RT5631 driver"); |
1771 | MODULE_AUTHOR("flove <flove@realtek.com>"); |
1772 | MODULE_LICENSE("GPL"); |