projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: rt5616: trivial: fix the typo
[linux-block.git] / sound / soc / codecs / rt5616.c
CommitLineData
b1d15059
BL		 1/*
2 * rt5616.c -- RT5616 ALSA SoC audio codec driver
3 *
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24#include <sound/soc-dapm.h>
25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "rl6231.h"
29#include "rt5616.h"
30
31#define RT5616_PR_RANGE_BASE (0xff + 1)
32#define RT5616_PR_SPACING 0x100
33
34#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
35
36static const struct regmap_range_cfg rt5616_ranges[] = {
37 {
38 .name = "PR",
39 .range_min = RT5616_PR_BASE,
40 .range_max = RT5616_PR_BASE + 0xf8,
41 .selector_reg = RT5616_PRIV_INDEX,
42 .selector_mask = 0xff,
43 .selector_shift = 0x0,
44 .window_start = RT5616_PRIV_DATA,
45 .window_len = 0x1,
46 },
47};
48
49static const struct reg_sequence init_list[] = {
50 {RT5616_PR_BASE + 0x3d, 0x3e00},
51 {RT5616_PR_BASE + 0x25, 0x6110},
52 {RT5616_PR_BASE + 0x20, 0x611f},
53 {RT5616_PR_BASE + 0x21, 0x4040},
54 {RT5616_PR_BASE + 0x23, 0x0004},
55};
99081589 56
b1d15059
BL		 57#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
58
59static const struct reg_default rt5616_reg[] = {
60 { 0x00, 0x0021 },
61 { 0x02, 0xc8c8 },
62 { 0x03, 0xc8c8 },
63 { 0x05, 0x0000 },
64 { 0x0d, 0x0000 },
65 { 0x0f, 0x0808 },
66 { 0x19, 0xafaf },
67 { 0x1c, 0x2f2f },
68 { 0x1e, 0x0000 },
69 { 0x27, 0x7860 },
70 { 0x29, 0x8080 },
71 { 0x2a, 0x5252 },
72 { 0x3b, 0x0000 },
73 { 0x3c, 0x006f },
74 { 0x3d, 0x0000 },
75 { 0x3e, 0x006f },
76 { 0x45, 0x6000 },
77 { 0x4d, 0x0000 },
78 { 0x4e, 0x0000 },
79 { 0x4f, 0x0279 },
80 { 0x50, 0x0000 },
81 { 0x51, 0x0000 },
82 { 0x52, 0x0279 },
83 { 0x53, 0xf000 },
84 { 0x61, 0x0000 },
85 { 0x62, 0x0000 },
86 { 0x63, 0x00c0 },
87 { 0x64, 0x0000 },
88 { 0x65, 0x0000 },
89 { 0x66, 0x0000 },
90 { 0x70, 0x8000 },
91 { 0x73, 0x1104 },
92 { 0x74, 0x0c00 },
93 { 0x80, 0x0000 },
94 { 0x81, 0x0000 },
95 { 0x82, 0x0000 },
96 { 0x8b, 0x0600 },
97 { 0x8e, 0x0004 },
98 { 0x8f, 0x1100 },
99 { 0x90, 0x0000 },
100 { 0x91, 0x0000 },
101 { 0x92, 0x0000 },
102 { 0x93, 0x2000 },
103 { 0x94, 0x0200 },
104 { 0x95, 0x0000 },
105 { 0xb0, 0x2080 },
106 { 0xb1, 0x0000 },
107 { 0xb2, 0x0000 },
108 { 0xb4, 0x2206 },
109 { 0xb5, 0x1f00 },
110 { 0xb6, 0x0000 },
111 { 0xb7, 0x0000 },
112 { 0xbb, 0x0000 },
113 { 0xbc, 0x0000 },
114 { 0xbd, 0x0000 },
115 { 0xbe, 0x0000 },
116 { 0xbf, 0x0000 },
117 { 0xc0, 0x0100 },
118 { 0xc1, 0x0000 },
119 { 0xc2, 0x0000 },
120 { 0xc8, 0x0000 },
121 { 0xc9, 0x0000 },
122 { 0xca, 0x0000 },
123 { 0xcb, 0x0000 },
124 { 0xcc, 0x0000 },
125 { 0xcd, 0x0000 },
126 { 0xce, 0x0000 },
127 { 0xcf, 0x0013 },
128 { 0xd0, 0x0680 },
129 { 0xd1, 0x1c17 },
130 { 0xd3, 0xb320 },
131 { 0xd4, 0x0000 },
132 { 0xd6, 0x0000 },
133 { 0xd7, 0x0000 },
134 { 0xd9, 0x0809 },
135 { 0xda, 0x0000 },
136 { 0xfa, 0x0010 },
137 { 0xfb, 0x0000 },
138 { 0xfc, 0x0000 },
139 { 0xfe, 0x10ec },
140 { 0xff, 0x6281 },
141};
142
143struct rt5616_priv {
144 struct snd_soc_codec *codec;
145 struct delayed_work patch_work;
146 struct regmap *regmap;
147
148 int sysclk;
149 int sysclk_src;
150 int lrck[RT5616_AIFS];
151 int bclk[RT5616_AIFS];
152 int master[RT5616_AIFS];
153
154 int pll_src;
155 int pll_in;
156 int pll_out;
157
158};
159
160static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
161{
162 int i;
163
164 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
165 if (reg >= rt5616_ranges[i].range_min &&
99081589 166 reg <= rt5616_ranges[i].range_max)
b1d15059 167 return true;
b1d15059
BL		 168 }
169
170 switch (reg) {
171 case RT5616_RESET:
172 case RT5616_PRIV_DATA:
173 case RT5616_EQ_CTRL1:
174 case RT5616_DRC_AGC_1:
175 case RT5616_IRQ_CTRL2:
176 case RT5616_INT_IRQ_ST:
177 case RT5616_PGM_REG_ARR1:
178 case RT5616_PGM_REG_ARR3:
179 case RT5616_VENDOR_ID:
180 case RT5616_DEVICE_ID:
181 return true;
182 default:
183 return false;
184 }
185}
186
187static bool rt5616_readable_register(struct device *dev, unsigned int reg)
188{
189 int i;
190
191 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
192 if (reg >= rt5616_ranges[i].range_min &&
99081589 193 reg <= rt5616_ranges[i].range_max)
b1d15059 194 return true;
b1d15059
BL		 195 }
196
197 switch (reg) {
198 case RT5616_RESET:
199 case RT5616_VERSION_ID:
200 case RT5616_VENDOR_ID:
201 case RT5616_DEVICE_ID:
202 case RT5616_HP_VOL:
203 case RT5616_LOUT_CTRL1:
204 case RT5616_LOUT_CTRL2:
205 case RT5616_IN1_IN2:
206 case RT5616_INL1_INR1_VOL:
207 case RT5616_DAC1_DIG_VOL:
208 case RT5616_ADC_DIG_VOL:
209 case RT5616_ADC_BST_VOL:
210 case RT5616_STO1_ADC_MIXER:
211 case RT5616_AD_DA_MIXER:
212 case RT5616_STO_DAC_MIXER:
213 case RT5616_REC_L1_MIXER:
214 case RT5616_REC_L2_MIXER:
215 case RT5616_REC_R1_MIXER:
216 case RT5616_REC_R2_MIXER:
217 case RT5616_HPO_MIXER:
218 case RT5616_OUT_L1_MIXER:
219 case RT5616_OUT_L2_MIXER:
220 case RT5616_OUT_L3_MIXER:
221 case RT5616_OUT_R1_MIXER:
222 case RT5616_OUT_R2_MIXER:
223 case RT5616_OUT_R3_MIXER:
224 case RT5616_LOUT_MIXER:
225 case RT5616_PWR_DIG1:
226 case RT5616_PWR_DIG2:
227 case RT5616_PWR_ANLG1:
228 case RT5616_PWR_ANLG2:
229 case RT5616_PWR_MIXER:
230 case RT5616_PWR_VOL:
231 case RT5616_PRIV_INDEX:
232 case RT5616_PRIV_DATA:
233 case RT5616_I2S1_SDP:
234 case RT5616_ADDA_CLK1:
235 case RT5616_ADDA_CLK2:
236 case RT5616_GLB_CLK:
237 case RT5616_PLL_CTRL1:
238 case RT5616_PLL_CTRL2:
239 case RT5616_HP_OVCD:
240 case RT5616_DEPOP_M1:
241 case RT5616_DEPOP_M2:
242 case RT5616_DEPOP_M3:
243 case RT5616_CHARGE_PUMP:
244 case RT5616_PV_DET_SPK_G:
245 case RT5616_MICBIAS:
246 case RT5616_A_JD_CTL1:
247 case RT5616_A_JD_CTL2:
248 case RT5616_EQ_CTRL1:
249 case RT5616_EQ_CTRL2:
250 case RT5616_WIND_FILTER:
251 case RT5616_DRC_AGC_1:
252 case RT5616_DRC_AGC_2:
253 case RT5616_DRC_AGC_3:
254 case RT5616_SVOL_ZC:
255 case RT5616_JD_CTRL1:
256 case RT5616_JD_CTRL2:
257 case RT5616_IRQ_CTRL1:
258 case RT5616_IRQ_CTRL2:
259 case RT5616_INT_IRQ_ST:
260 case RT5616_GPIO_CTRL1:
261 case RT5616_GPIO_CTRL2:
262 case RT5616_GPIO_CTRL3:
263 case RT5616_PGM_REG_ARR1:
264 case RT5616_PGM_REG_ARR2:
265 case RT5616_PGM_REG_ARR3:
266 case RT5616_PGM_REG_ARR4:
267 case RT5616_PGM_REG_ARR5:
268 case RT5616_SCB_FUNC:
269 case RT5616_SCB_CTRL:
270 case RT5616_BASE_BACK:
271 case RT5616_MP3_PLUS1:
272 case RT5616_MP3_PLUS2:
273 case RT5616_ADJ_HPF_CTRL1:
274 case RT5616_ADJ_HPF_CTRL2:
275 case RT5616_HP_CALIB_AMP_DET:
276 case RT5616_HP_CALIB2:
277 case RT5616_SV_ZCD1:
278 case RT5616_SV_ZCD2:
279 case RT5616_D_MISC:
280 case RT5616_DUMMY2:
281 case RT5616_DUMMY3:
282 return true;
283 default:
284 return false;
285 }
286}
287
288static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
289static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
290static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
291static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
292static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
293
294/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
295static unsigned int bst_tlv[] = {
296 TLV_DB_RANGE_HEAD(7),
297 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
298 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
299 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
300 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
301 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
302 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
303 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
304};
305
306static const struct snd_kcontrol_new rt5616_snd_controls[] = {
307 /* Headphone Output Volume */
308 SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
99081589 309 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
b1d15059 310 SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
99081589 311 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
b1d15059
BL		 312 /* OUTPUT Control */
313 SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
99081589 314 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
b1d15059 315 SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
99081589 316 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
b1d15059 317 SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
99081589 318 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
b1d15059
BL		 319
320 /* DAC Digital Volume */
321 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
99081589
CW		 322 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
323 175, 0, dac_vol_tlv),
b1d15059 324 /* IN1/IN2 Control */
e2133b64 325 SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
99081589 326 RT5616_BST_SFT1, 8, 0, bst_tlv),
e2133b64 327 SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
99081589 328 RT5616_BST_SFT2, 8, 0, bst_tlv),
b1d15059
BL		 329 /* INL/INR Volume Control */
330 SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
99081589
CW		 331 RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
332 31, 1, in_vol_tlv),
b1d15059
BL		 333 /* ADC Digital Volume Control */
334 SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
99081589 335 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
b1d15059 336 SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
99081589
CW		 337 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
338 127, 0, adc_vol_tlv),
b1d15059
BL		 339
340 /* ADC Boost Volume Control */
e2133b64 341 SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
99081589
CW		 342 RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
343 3, 0, adc_bst_tlv),
b1d15059
BL		 344};
345
346static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
99081589 347 struct snd_soc_dapm_widget *sink)
b1d15059
BL		 348{
349 unsigned int val;
350
351 val = snd_soc_read(snd_soc_dapm_to_codec(source->dapm), RT5616_GLB_CLK);
352 val &= RT5616_SCLK_SRC_MASK;
353 if (val == RT5616_SCLK_SRC_PLL1)
354 return 1;
355 else
356 return 0;
357}
358
359/* Digital Mixer */
360static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
361 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
362 RT5616_M_STO1_ADC_L1_SFT, 1, 1),
363};
364
365static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
366 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
367 RT5616_M_STO1_ADC_R1_SFT, 1, 1),
368};
369
370static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
371 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
372 RT5616_M_ADCMIX_L_SFT, 1, 1),
373 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
374 RT5616_M_IF1_DAC_L_SFT, 1, 1),
375};
376
377static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
378 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
379 RT5616_M_ADCMIX_R_SFT, 1, 1),
380 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
381 RT5616_M_IF1_DAC_R_SFT, 1, 1),
382};
383
384static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
385 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
386 RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
387 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
388 RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
389};
390
391static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
392 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
393 RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
394 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
395 RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
396};
397
398/* Analog Input Mixer */
399static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
400 SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
401 RT5616_M_IN1_L_RM_L_SFT, 1, 1),
402 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
403 RT5616_M_BST2_RM_L_SFT, 1, 1),
404 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
405 RT5616_M_BST1_RM_L_SFT, 1, 1),
406};
407
408static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
409 SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
410 RT5616_M_IN1_R_RM_R_SFT, 1, 1),
411 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
412 RT5616_M_BST2_RM_R_SFT, 1, 1),
413 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
414 RT5616_M_BST1_RM_R_SFT, 1, 1),
415};
416
417/* Analog Output Mixer */
418
419static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
420 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
421 RT5616_M_BST1_OM_L_SFT, 1, 1),
422 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
423 RT5616_M_BST2_OM_L_SFT, 1, 1),
424 SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
425 RT5616_M_IN1_L_OM_L_SFT, 1, 1),
426 SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
427 RT5616_M_RM_L_OM_L_SFT, 1, 1),
428 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
429 RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
430};
431
432static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
433 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
434 RT5616_M_BST2_OM_R_SFT, 1, 1),
435 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
436 RT5616_M_BST1_OM_R_SFT, 1, 1),
437 SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
438 RT5616_M_IN1_R_OM_R_SFT, 1, 1),
439 SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
440 RT5616_M_RM_R_OM_R_SFT, 1, 1),
441 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
442 RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
443};
444
445static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
446 SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
447 RT5616_M_DAC1_HM_SFT, 1, 1),
448 SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
449 RT5616_M_HPVOL_HM_SFT, 1, 1),
450};
451
452static const struct snd_kcontrol_new rt5616_lout_mix[] = {
453 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
454 RT5616_M_DAC_L1_LM_SFT, 1, 1),
455 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
456 RT5616_M_DAC_R1_LM_SFT, 1, 1),
457 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
458 RT5616_M_OV_L_LM_SFT, 1, 1),
459 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
460 RT5616_M_OV_R_LM_SFT, 1, 1),
461};
462
463static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
99081589 464 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 465{
466 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
467
468 switch (event) {
469 case SND_SOC_DAPM_POST_PMU:
470 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
99081589 471 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 472 break;
473
474 case SND_SOC_DAPM_POST_PMD:
475 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
99081589
CW		 476 RT5616_L_MUTE | RT5616_R_MUTE,
477 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059
BL		 478 break;
479
480 default:
481 return 0;
482 }
483
484 return 0;
485}
486
487static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
99081589 488 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 489{
490 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
491
492 switch (event) {
493 case SND_SOC_DAPM_POST_PMU:
494 /* depop parameters */
495 snd_soc_update_bits(codec, RT5616_DEPOP_M2,
99081589 496 RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
b1d15059 497 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 498 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
499 RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
500 RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
b1d15059 501 snd_soc_write(codec, RT5616_PR_BASE +
99081589 502 RT5616_HP_DCC_INT1, 0x9f00);
b1d15059
BL		 503 /* headphone amp power on */
504 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 505 RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
b1d15059 506 snd_soc_update_bits(codec, RT5616_PWR_VOL,
99081589
CW		 507 RT5616_PWR_HV_L | RT5616_PWR_HV_R,
508 RT5616_PWR_HV_L | RT5616_PWR_HV_R);
b1d15059 509 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 510 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
511 RT5616_PWR_HA, RT5616_PWR_HP_L |
512 RT5616_PWR_HP_R | RT5616_PWR_HA);
b1d15059
BL		 513 msleep(50);
514 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 515 RT5616_PWR_FV1 | RT5616_PWR_FV2,
516 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059
BL		 517
518 snd_soc_update_bits(codec, RT5616_CHARGE_PUMP,
99081589 519 RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
b1d15059 520 snd_soc_update_bits(codec, RT5616_PR_BASE +
99081589 521 RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
b1d15059 522 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 523 RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
524 RT5616_HP_CO_EN | RT5616_HP_SG_EN);
b1d15059
BL		 525 break;
526 case SND_SOC_DAPM_PRE_PMD:
527 snd_soc_update_bits(codec, RT5616_PR_BASE +
99081589 528 RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
b1d15059 529 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 530 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
531 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
532 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
b1d15059
BL		 533 /* headphone amp power down */
534 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 535 RT5616_SMT_TRIG_MASK |
536 RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
537 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
538 RT5616_HP_CB_MASK,
539 RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
540 RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
541 RT5616_HP_SG_EN | RT5616_HP_CB_PD);
b1d15059 542 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 543 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
544 RT5616_PWR_HA, 0);
b1d15059
BL		 545 break;
546 default:
547 return 0;
548 }
549
550 return 0;
551}
552
553static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
99081589 554 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 555{
556 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
557
558 switch (event) {
559 case SND_SOC_DAPM_POST_PMU:
560 /* headphone unmute sequence */
561 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
99081589
CW		 562 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
563 RT5616_CP_FQ3_MASK,
564 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
565 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
566 RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
b1d15059 567 snd_soc_write(codec, RT5616_PR_BASE +
99081589 568 RT5616_MAMP_INT_REG2, 0xfc00);
b1d15059 569 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 570 RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
b1d15059 571 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 572 RT5616_RSTN_MASK, RT5616_RSTN_EN);
b1d15059 573 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 574 RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
575 RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
576 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
b1d15059 577 snd_soc_update_bits(codec, RT5616_HP_VOL,
99081589 578 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 579 msleep(100);
580 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 581 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
582 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
583 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
b1d15059
BL		 584 msleep(20);
585 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
99081589 586 RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
b1d15059
BL		 587 break;
588
589 case SND_SOC_DAPM_PRE_PMD:
590 /* headphone mute sequence */
591 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
99081589
CW		 592 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
593 RT5616_CP_FQ3_MASK,
594 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
595 RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
596 RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
b1d15059 597 snd_soc_write(codec, RT5616_PR_BASE +
99081589 598 RT5616_MAMP_INT_REG2, 0xfc00);
b1d15059 599 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 600 RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
b1d15059 601 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589 602 RT5616_RSTP_MASK, RT5616_RSTP_EN);
b1d15059 603 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
99081589
CW		 604 RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
605 RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
606 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
b1d15059 607 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
99081589 608 RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
b1d15059
BL		 609 msleep(90);
610 snd_soc_update_bits(codec, RT5616_HP_VOL,
99081589
CW		 611 RT5616_L_MUTE | RT5616_R_MUTE,
612 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059
BL		 613 msleep(30);
614 break;
615
616 default:
617 return 0;
618 }
619
620 return 0;
621}
622
623static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
99081589 624 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 625{
626 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
627
628 switch (event) {
629 case SND_SOC_DAPM_POST_PMU:
630 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 631 RT5616_PWR_LM, RT5616_PWR_LM);
b1d15059 632 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
99081589 633 RT5616_L_MUTE | RT5616_R_MUTE, 0);
b1d15059
BL		 634 break;
635
636 case SND_SOC_DAPM_PRE_PMD:
637 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
99081589
CW		 638 RT5616_L_MUTE | RT5616_R_MUTE,
639 RT5616_L_MUTE | RT5616_R_MUTE);
b1d15059 640 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589 641 RT5616_PWR_LM, 0);
b1d15059
BL		 642 break;
643
644 default:
645 return 0;
646 }
647
648 return 0;
649}
650
651static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
99081589 652 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 653{
654 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
655
656 switch (event) {
657 case SND_SOC_DAPM_POST_PMU:
658 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 659 RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
b1d15059
BL		 660 break;
661
662 case SND_SOC_DAPM_PRE_PMD:
663 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 664 RT5616_PWR_BST1_OP2, 0);
b1d15059
BL		 665 break;
666
667 default:
668 return 0;
669 }
670
671 return 0;
672}
673
674static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
99081589 675 struct snd_kcontrol *kcontrol, int event)
b1d15059
BL		 676{
677 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
678
679 switch (event) {
680 case SND_SOC_DAPM_POST_PMU:
681 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 682 RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
b1d15059
BL		 683 break;
684
685 case SND_SOC_DAPM_PRE_PMD:
686 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
99081589 687 RT5616_PWR_BST2_OP2, 0);
b1d15059
BL		 688 break;
689
690 default:
691 return 0;
692 }
693
694 return 0;
695}
696
697static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
698 SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
99081589 699 RT5616_PWR_PLL_BIT, 0, NULL, 0),
b1d15059
BL		 700 /* Input Side */
701 /* micbias */
702 SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
99081589 703 RT5616_PWR_LDO_BIT, 0, NULL, 0),
b1d15059 704 SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
99081589 705 RT5616_PWR_MB1_BIT, 0, NULL, 0),
b1d15059
BL		 706
707 /* Input Lines */
708 SND_SOC_DAPM_INPUT("MIC1"),
709 SND_SOC_DAPM_INPUT("MIC2"),
710
711 SND_SOC_DAPM_INPUT("IN1P"),
712 SND_SOC_DAPM_INPUT("IN2P"),
713 SND_SOC_DAPM_INPUT("IN2N"),
714
715 /* Boost */
716 SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
99081589
CW		 717 RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
718 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059 719 SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
99081589
CW		 720 RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
721 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 722 /* Input Volume */
723 SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
99081589 724 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
b1d15059 725 SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
99081589 726 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
b1d15059 727 SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
99081589 728 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
b1d15059 729 SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
99081589 730 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
b1d15059
BL		 731
732 /* REC Mixer */
733 SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
99081589 734 rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
b1d15059 735 SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
99081589 736 rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
b1d15059
BL		 737 /* ADCs */
738 SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
99081589
CW		 739 RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
740 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059 741 SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
99081589
CW		 742 RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
743 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 744
745 /* ADC Mixer */
746 SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
99081589 747 RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
b1d15059 748 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
99081589
CW		 749 rt5616_sto1_adc_l_mix,
750 ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
b1d15059 751 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
99081589
CW		 752 rt5616_sto1_adc_r_mix,
753 ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
b1d15059
BL		 754
755 /* Digital Interface */
756 SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
99081589 757 RT5616_PWR_I2S1_BIT, 0, NULL, 0),
b1d15059
BL		 758 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
759 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
760 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
761 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
762
763 /* Digital Interface Select */
764
765 /* Audio Interface */
766 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
767 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
768
769 /* Audio DSP */
770 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
771
772 /* Output Side */
773 /* DAC mixer before sound effect */
774 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
99081589 775 rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
b1d15059 776 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
99081589 777 rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
b1d15059
BL		 778
779 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
99081589 780 RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
b1d15059
BL		 781
782 /* DAC Mixer */
783 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
99081589
CW		 784 rt5616_sto_dac_l_mix,
785 ARRAY_SIZE(rt5616_sto_dac_l_mix)),
b1d15059 786 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
99081589
CW		 787 rt5616_sto_dac_r_mix,
788 ARRAY_SIZE(rt5616_sto_dac_r_mix)),
b1d15059
BL		 789
790 /* DACs */
791 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
99081589 792 RT5616_PWR_DAC_L1_BIT, 0),
b1d15059 793 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
99081589 794 RT5616_PWR_DAC_R1_BIT, 0),
b1d15059
BL		 795 /* OUT Mixer */
796 SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
99081589 797 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
b1d15059 798 SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
99081589 799 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
b1d15059
BL		 800 /* Output Volume */
801 SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
99081589 802 RT5616_PWR_OV_L_BIT, 0, NULL, 0),
b1d15059 803 SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
99081589 804 RT5616_PWR_OV_R_BIT, 0, NULL, 0),
b1d15059 805 SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
99081589 806 RT5616_PWR_HV_L_BIT, 0, NULL, 0),
b1d15059 807 SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
99081589 808 RT5616_PWR_HV_R_BIT, 0, NULL, 0),
b1d15059 809 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
99081589 810 0, 0, NULL, 0),
b1d15059 811 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
99081589 812 0, 0, NULL, 0),
b1d15059 813 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
99081589 814 0, 0, NULL, 0),
b1d15059 815 SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
99081589 816 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
b1d15059 817 SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
99081589 818 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
b1d15059 819 SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
99081589 820 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
b1d15059 821 SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
99081589 822 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
b1d15059
BL		 823 /* HPO/LOUT/Mono Mixer */
824 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
99081589 825 rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
b1d15059 826 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
99081589 827 rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
b1d15059
BL		 828
829 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 830 rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
831 SND_SOC_DAPM_POST_PMU),
b1d15059 832 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 833 rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
834 SND_SOC_DAPM_POST_PMU),
b1d15059
BL		 835
836 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
99081589
CW		 837 rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
838 SND_SOC_DAPM_PRE_PMD),
b1d15059
BL		 839
840 /* Output Lines */
841 SND_SOC_DAPM_OUTPUT("HPOL"),
842 SND_SOC_DAPM_OUTPUT("HPOR"),
843 SND_SOC_DAPM_OUTPUT("LOUTL"),
844 SND_SOC_DAPM_OUTPUT("LOUTR"),
845};
846
847static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
848 {"IN1P", NULL, "LDO"},
849 {"IN2P", NULL, "LDO"},
850
851 {"IN1P", NULL, "MIC1"},
852 {"IN2P", NULL, "MIC2"},
853 {"IN2N", NULL, "MIC2"},
854
855 {"BST1", NULL, "IN1P"},
856 {"BST2", NULL, "IN2P"},
857 {"BST2", NULL, "IN2N"},
858 {"BST1", NULL, "micbias1"},
859 {"BST2", NULL, "micbias1"},
860
861 {"INL1 VOL", NULL, "IN2P"},
862 {"INR1 VOL", NULL, "IN2N"},
863
864 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
865 {"RECMIXL", "BST2 Switch", "BST2"},
866 {"RECMIXL", "BST1 Switch", "BST1"},
867
868 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
869 {"RECMIXR", "BST2 Switch", "BST2"},
870 {"RECMIXR", "BST1 Switch", "BST1"},
871
872 {"ADC L", NULL, "RECMIXL"},
873 {"ADC R", NULL, "RECMIXR"},
874
875 {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
876 {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
877 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
878
879 {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
880 {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
881 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
882
883 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
884 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
885 {"IF1 ADC1", NULL, "I2S1"},
886
887 {"AIF1TX", NULL, "IF1 ADC1"},
888
889 {"IF1 DAC", NULL, "AIF1RX"},
890 {"IF1 DAC", NULL, "I2S1"},
891
892 {"IF1 DAC1 L", NULL, "IF1 DAC"},
893 {"IF1 DAC1 R", NULL, "IF1 DAC"},
894
895 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
896 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
897 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
898 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
899
900 {"Audio DSP", NULL, "DAC MIXL"},
901 {"Audio DSP", NULL, "DAC MIXR"},
902
903 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
904 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
905 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
906 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
907 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
908 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
909
910 {"DAC L1", NULL, "Stereo DAC MIXL"},
911 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
912 {"DAC R1", NULL, "Stereo DAC MIXR"},
913 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
914
915 {"OUT MIXL", "BST1 Switch", "BST1"},
916 {"OUT MIXL", "BST2 Switch", "BST2"},
917 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
918 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
919 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
920
921 {"OUT MIXR", "BST2 Switch", "BST2"},
922 {"OUT MIXR", "BST1 Switch", "BST1"},
923 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
924 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
925 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
926
927 {"HPOVOL L", NULL, "OUT MIXL"},
928 {"HPOVOL R", NULL, "OUT MIXR"},
929 {"OUTVOL L", NULL, "OUT MIXL"},
930 {"OUTVOL R", NULL, "OUT MIXR"},
931
932 {"DAC 1", NULL, "DAC L1"},
933 {"DAC 1", NULL, "DAC R1"},
934 {"HPOVOL", NULL, "HPOVOL L"},
935 {"HPOVOL", NULL, "HPOVOL R"},
936 {"HPO MIX", "DAC1 Switch", "DAC 1"},
937 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
938
939 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
940 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
941 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
942 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
943
944 {"HP amp", NULL, "HPO MIX"},
945 {"HP amp", NULL, "Charge Pump"},
946 {"HPOL", NULL, "HP amp"},
947 {"HPOR", NULL, "HP amp"},
948
949 {"LOUT amp", NULL, "LOUT MIX"},
950 {"LOUT amp", NULL, "Charge Pump"},
951 {"LOUTL", NULL, "LOUT amp"},
952 {"LOUTR", NULL, "LOUT amp"},
953
954};
955
956static int rt5616_hw_params(struct snd_pcm_substream *substream,
99081589
CW		 957 struct snd_pcm_hw_params *params,
958 struct snd_soc_dai *dai)
b1d15059
BL		 959{
960 struct snd_soc_pcm_runtime *rtd = substream->private_data;
961 struct snd_soc_codec *codec = rtd->codec;
962 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
963 unsigned int val_len = 0, val_clk, mask_clk;
964 int pre_div, bclk_ms, frame_size;
965
966 rt5616->lrck[dai->id] = params_rate(params);
967
968 pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
969
970 if (pre_div < 0) {
971 dev_err(codec->dev, "Unsupported clock setting\n");
972 return -EINVAL;
973 }
974 frame_size = snd_soc_params_to_frame_size(params);
975 if (frame_size < 0) {
976 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
977 return -EINVAL;
978 }
979 bclk_ms = frame_size > 32 ? 1 : 0;
980 rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
981
982 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
983 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
984 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
99081589 985 bclk_ms, pre_div, dai->id);
b1d15059
BL		 986
987 switch (params_format(params)) {
988 case SNDRV_PCM_FORMAT_S16_LE:
989 break;
990 case SNDRV_PCM_FORMAT_S20_3LE:
991 val_len |= RT5616_I2S_DL_20;
992 break;
993 case SNDRV_PCM_FORMAT_S24_LE:
994 val_len |= RT5616_I2S_DL_24;
995 break;
996 case SNDRV_PCM_FORMAT_S8:
997 val_len |= RT5616_I2S_DL_8;
998 break;
999 default:
1000 return -EINVAL;
1001 }
1002
1003 mask_clk = RT5616_I2S_PD1_MASK;
1004 val_clk = pre_div << RT5616_I2S_PD1_SFT;
1005 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
99081589 1006 RT5616_I2S_DL_MASK, val_len);
b1d15059
BL		 1007 snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk);
1008
b1d15059
BL		 1009 return 0;
1010}
1011
1012static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1013{
1014 struct snd_soc_codec *codec = dai->codec;
1015 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1016 unsigned int reg_val = 0;
1017
1018 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1019 case SND_SOC_DAIFMT_CBM_CFM:
1020 rt5616->master[dai->id] = 1;
1021 break;
1022 case SND_SOC_DAIFMT_CBS_CFS:
1023 reg_val |= RT5616_I2S_MS_S;
1024 rt5616->master[dai->id] = 0;
1025 break;
1026 default:
1027 return -EINVAL;
1028 }
1029
1030 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1031 case SND_SOC_DAIFMT_NB_NF:
1032 break;
1033 case SND_SOC_DAIFMT_IB_NF:
1034 reg_val |= RT5616_I2S_BP_INV;
1035 break;
1036 default:
1037 return -EINVAL;
1038 }
1039
1040 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1041 case SND_SOC_DAIFMT_I2S:
1042 break;
1043 case SND_SOC_DAIFMT_LEFT_J:
1044 reg_val |= RT5616_I2S_DF_LEFT;
1045 break;
1046 case SND_SOC_DAIFMT_DSP_A:
1047 reg_val |= RT5616_I2S_DF_PCM_A;
1048 break;
1049 case SND_SOC_DAIFMT_DSP_B:
1050 reg_val |= RT5616_I2S_DF_PCM_B;
1051 break;
1052 default:
1053 return -EINVAL;
1054 }
1055
1056 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
99081589
CW		 1057 RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1058 RT5616_I2S_DF_MASK, reg_val);
b1d15059
BL		 1059
1060 return 0;
1061}
1062
1063static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
99081589 1064 int clk_id, unsigned int freq, int dir)
b1d15059
BL		 1065{
1066 struct snd_soc_codec *codec = dai->codec;
1067 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1068 unsigned int reg_val = 0;
1069
1070 if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1071 return 0;
1072
1073 switch (clk_id) {
1074 case RT5616_SCLK_S_MCLK:
1075 reg_val |= RT5616_SCLK_SRC_MCLK;
1076 break;
1077 case RT5616_SCLK_S_PLL1:
1078 reg_val |= RT5616_SCLK_SRC_PLL1;
1079 break;
1080 default:
1081 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1082 return -EINVAL;
1083 }
99081589 1084
b1d15059 1085 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589 1086 RT5616_SCLK_SRC_MASK, reg_val);
b1d15059
BL		 1087 rt5616->sysclk = freq;
1088 rt5616->sysclk_src = clk_id;
1089
1090 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1091
1092 return 0;
1093}
1094
1095static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
99081589 1096 unsigned int freq_in, unsigned int freq_out)
b1d15059
BL		 1097{
1098 struct snd_soc_codec *codec = dai->codec;
1099 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1100 struct rl6231_pll_code pll_code;
1101 int ret;
1102
1103 if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1104 freq_out == rt5616->pll_out)
1105 return 0;
1106
1107 if (!freq_in || !freq_out) {
1108 dev_dbg(codec->dev, "PLL disabled\n");
1109
1110 rt5616->pll_in = 0;
1111 rt5616->pll_out = 0;
1112 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1113 RT5616_SCLK_SRC_MASK,
1114 RT5616_SCLK_SRC_MCLK);
b1d15059
BL		 1115 return 0;
1116 }
1117
1118 switch (source) {
1119 case RT5616_PLL1_S_MCLK:
1120 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1121 RT5616_PLL1_SRC_MASK,
1122 RT5616_PLL1_SRC_MCLK);
b1d15059
BL		 1123 break;
1124 case RT5616_PLL1_S_BCLK1:
1125 case RT5616_PLL1_S_BCLK2:
1126 snd_soc_update_bits(codec, RT5616_GLB_CLK,
99081589
CW		 1127 RT5616_PLL1_SRC_MASK,
1128 RT5616_PLL1_SRC_BCLK1);
b1d15059
BL		 1129 break;
1130 default:
1131 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1132 return -EINVAL;
1133 }
1134
1135 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1136 if (ret < 0) {
1137 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1138 return ret;
1139 }
1140
1141 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1142 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1143 pll_code.n_code, pll_code.k_code);
1144
1145 snd_soc_write(codec, RT5616_PLL_CTRL1,
99081589 1146 pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
b1d15059 1147 snd_soc_write(codec, RT5616_PLL_CTRL2,
99081589
CW		 1148 (pll_code.m_bp ? 0 : pll_code.m_code) <<
1149 RT5616_PLL_M_SFT |
1150 pll_code.m_bp << RT5616_PLL_M_BP_SFT);
b1d15059
BL		 1151
1152 rt5616->pll_in = freq_in;
1153 rt5616->pll_out = freq_out;
1154 rt5616->pll_src = source;
1155
1156 return 0;
1157}
1158
1159static int rt5616_set_bias_level(struct snd_soc_codec *codec,
99081589 1160 enum snd_soc_bias_level level)
b1d15059
BL		 1161{
1162 switch (level) {
1163 case SND_SOC_BIAS_STANDBY:
1164 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1165 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 1166 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1167 RT5616_PWR_BG | RT5616_PWR_VREF2,
1168 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1169 RT5616_PWR_BG | RT5616_PWR_VREF2);
b1d15059
BL		 1170 mdelay(10);
1171 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
99081589
CW		 1172 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1173 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059 1174 snd_soc_update_bits(codec, RT5616_D_MISC,
99081589
CW		 1175 RT5616_D_GATE_EN,
1176 RT5616_D_GATE_EN);
b1d15059
BL		 1177 }
1178 break;
1179
1180 case SND_SOC_BIAS_OFF:
1181 snd_soc_update_bits(codec, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1182 snd_soc_write(codec, RT5616_PWR_DIG1, 0x0000);
1183 snd_soc_write(codec, RT5616_PWR_DIG2, 0x0000);
1184 snd_soc_write(codec, RT5616_PWR_VOL, 0x0000);
1185 snd_soc_write(codec, RT5616_PWR_MIXER, 0x0000);
1186 snd_soc_write(codec, RT5616_PWR_ANLG1, 0x0000);
1187 snd_soc_write(codec, RT5616_PWR_ANLG2, 0x0000);
1188 break;
1189
1190 default:
1191 break;
1192 }
1193
1194 return 0;
1195}
1196
1197static int rt5616_probe(struct snd_soc_codec *codec)
1198{
1199 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1200
1201 rt5616->codec = codec;
1202
1203 return 0;
1204}
1205
1206#ifdef CONFIG_PM
1207static int rt5616_suspend(struct snd_soc_codec *codec)
1208{
1209 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1210
1211 regcache_cache_only(rt5616->regmap, true);
1212 regcache_mark_dirty(rt5616->regmap);
1213
1214 return 0;
1215}
1216
1217static int rt5616_resume(struct snd_soc_codec *codec)
1218{
1219 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1220
1221 regcache_cache_only(rt5616->regmap, false);
1222 regcache_sync(rt5616->regmap);
1223 return 0;
1224}
1225#else
1226#define rt5616_suspend NULL
1227#define rt5616_resume NULL
1228#endif
1229
1230#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1231#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1232 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1233
b1d15059
BL		 1234struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1235 .hw_params = rt5616_hw_params,
1236 .set_fmt = rt5616_set_dai_fmt,
1237 .set_sysclk = rt5616_set_dai_sysclk,
1238 .set_pll = rt5616_set_dai_pll,
1239};
1240
1241struct snd_soc_dai_driver rt5616_dai[] = {
1242 {
1243 .name = "rt5616-aif1",
1244 .id = RT5616_AIF1,
1245 .playback = {
1246 .stream_name = "AIF1 Playback",
1247 .channels_min = 1,
1248 .channels_max = 2,
1249 .rates = RT5616_STEREO_RATES,
1250 .formats = RT5616_FORMATS,
1251 },
1252 .capture = {
1253 .stream_name = "AIF1 Capture",
1254 .channels_min = 1,
1255 .channels_max = 2,
1256 .rates = RT5616_STEREO_RATES,
1257 .formats = RT5616_FORMATS,
1258 },
1259 .ops = &rt5616_aif_dai_ops,
1260 },
1261};
1262
1263static struct snd_soc_codec_driver soc_codec_dev_rt5616 = {
1264 .probe = rt5616_probe,
1265 .suspend = rt5616_suspend,
1266 .resume = rt5616_resume,
1267 .set_bias_level = rt5616_set_bias_level,
1268 .idle_bias_off = true,
1269 .controls = rt5616_snd_controls,
1270 .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1271 .dapm_widgets = rt5616_dapm_widgets,
1272 .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1273 .dapm_routes = rt5616_dapm_routes,
1274 .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1275};
1276
1277static const struct regmap_config rt5616_regmap = {
1278 .reg_bits = 8,
1279 .val_bits = 16,
1280 .use_single_rw = true,
1281 .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1282 RT5616_PR_SPACING),
1283 .volatile_reg = rt5616_volatile_register,
1284 .readable_reg = rt5616_readable_register,
1285 .cache_type = REGCACHE_RBTREE,
1286 .reg_defaults = rt5616_reg,
1287 .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1288 .ranges = rt5616_ranges,
1289 .num_ranges = ARRAY_SIZE(rt5616_ranges),
1290};
1291
1292static const struct i2c_device_id rt5616_i2c_id[] = {
1293 { "rt5616", 0 },
1294 { }
1295};
1296MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1297
e17ff2de
CW		 1298#if defined(CONFIG_OF)
1299static const struct of_device_id rt5616_of_match[] = {
1300 { .compatible = "realtek,rt5616", },
1301 {},
1302};
1303MODULE_DEVICE_TABLE(of, rt5616_of_match);
1304#endif
1305
b1d15059 1306static int rt5616_i2c_probe(struct i2c_client *i2c,
99081589 1307 const struct i2c_device_id *id)
b1d15059
BL		 1308{
1309 struct rt5616_priv *rt5616;
1310 unsigned int val;
1311 int ret;
1312
1313 rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
99081589
CW		 1314 GFP_KERNEL);
1315 if (!rt5616)
b1d15059
BL		 1316 return -ENOMEM;
1317
1318 i2c_set_clientdata(i2c, rt5616);
1319
1320 rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1321 if (IS_ERR(rt5616->regmap)) {
1322 ret = PTR_ERR(rt5616->regmap);
1323 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1324 ret);
1325 return ret;
1326 }
1327
1328 regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1329 if (val != 0x6281) {
1330 dev_err(&i2c->dev,
1331 "Device with ID register %#x is not rt5616\n",
1332 val);
36ddd489 1333 return -ENODEV;
b1d15059
BL		 1334 }
1335 regmap_write(rt5616->regmap, RT5616_RESET, 0);
1336 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589
CW		 1337 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1338 RT5616_PWR_BG | RT5616_PWR_VREF2,
1339 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1340 RT5616_PWR_BG | RT5616_PWR_VREF2);
b1d15059
BL		 1341 mdelay(10);
1342 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589
CW		 1343 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1344 RT5616_PWR_FV1 | RT5616_PWR_FV2);
b1d15059
BL		 1345
1346 ret = regmap_register_patch(rt5616->regmap, init_list,
1347 ARRAY_SIZE(init_list));
1348 if (ret != 0)
1349 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1350
1351 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
99081589 1352 RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
b1d15059
BL		 1353
1354 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616,
99081589 1355 rt5616_dai, ARRAY_SIZE(rt5616_dai));
b1d15059
BL		 1356}
1357
1358static int rt5616_i2c_remove(struct i2c_client *i2c)
1359{
1360 snd_soc_unregister_codec(&i2c->dev);
1361
1362 return 0;
1363}
1364
1365static void rt5616_i2c_shutdown(struct i2c_client *client)
1366{
1367 struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1368
1369 regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1370 regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
b1d15059
BL		 1371}
1372
1373static struct i2c_driver rt5616_i2c_driver = {
1374 .driver = {
1375 .name = "rt5616",
e17ff2de 1376 .of_match_table = of_match_ptr(rt5616_of_match),
b1d15059
BL		 1377 },
1378 .probe = rt5616_i2c_probe,
1379 .remove = rt5616_i2c_remove,
1380 .shutdown = rt5616_i2c_shutdown,
1381 .id_table = rt5616_i2c_id,
1382};
1383module_i2c_driver(rt5616_i2c_driver);
1384
1385MODULE_DESCRIPTION("ASoC RT5616 driver");
1386MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1387MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)