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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
b1d15059 BL |
2 | /* |
3 | * rt5616.c -- RT5616 ALSA SoC audio codec driver | |
4 | * | |
5 | * Copyright 2015 Realtek Semiconductor Corp. | |
6 | * Author: Bard Liao <bardliao@realtek.com> | |
b1d15059 BL |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/moduleparam.h> | |
11 | #include <linux/init.h> | |
76d3204e | 12 | #include <linux/clk.h> |
b1d15059 BL |
13 | #include <linux/delay.h> |
14 | #include <linux/pm.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/spi/spi.h> | |
18 | #include <sound/core.h> | |
19 | #include <sound/pcm.h> | |
20 | #include <sound/pcm_params.h> | |
21 | #include <sound/soc.h> | |
22 | #include <sound/soc-dapm.h> | |
23 | #include <sound/initval.h> | |
24 | #include <sound/tlv.h> | |
25 | ||
26 | #include "rl6231.h" | |
27 | #include "rt5616.h" | |
28 | ||
29 | #define RT5616_PR_RANGE_BASE (0xff + 1) | |
30 | #define RT5616_PR_SPACING 0x100 | |
31 | ||
32 | #define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING)) | |
33 | ||
34 | static const struct regmap_range_cfg rt5616_ranges[] = { | |
35 | { | |
36 | .name = "PR", | |
37 | .range_min = RT5616_PR_BASE, | |
38 | .range_max = RT5616_PR_BASE + 0xf8, | |
39 | .selector_reg = RT5616_PRIV_INDEX, | |
40 | .selector_mask = 0xff, | |
41 | .selector_shift = 0x0, | |
42 | .window_start = RT5616_PRIV_DATA, | |
43 | .window_len = 0x1, | |
44 | }, | |
45 | }; | |
46 | ||
47 | static const struct reg_sequence init_list[] = { | |
48 | {RT5616_PR_BASE + 0x3d, 0x3e00}, | |
49 | {RT5616_PR_BASE + 0x25, 0x6110}, | |
50 | {RT5616_PR_BASE + 0x20, 0x611f}, | |
51 | {RT5616_PR_BASE + 0x21, 0x4040}, | |
52 | {RT5616_PR_BASE + 0x23, 0x0004}, | |
53 | }; | |
99081589 | 54 | |
b1d15059 BL |
55 | #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list) |
56 | ||
57 | static const struct reg_default rt5616_reg[] = { | |
58 | { 0x00, 0x0021 }, | |
59 | { 0x02, 0xc8c8 }, | |
60 | { 0x03, 0xc8c8 }, | |
61 | { 0x05, 0x0000 }, | |
62 | { 0x0d, 0x0000 }, | |
63 | { 0x0f, 0x0808 }, | |
64 | { 0x19, 0xafaf }, | |
65 | { 0x1c, 0x2f2f }, | |
66 | { 0x1e, 0x0000 }, | |
67 | { 0x27, 0x7860 }, | |
68 | { 0x29, 0x8080 }, | |
69 | { 0x2a, 0x5252 }, | |
70 | { 0x3b, 0x0000 }, | |
71 | { 0x3c, 0x006f }, | |
72 | { 0x3d, 0x0000 }, | |
73 | { 0x3e, 0x006f }, | |
74 | { 0x45, 0x6000 }, | |
75 | { 0x4d, 0x0000 }, | |
76 | { 0x4e, 0x0000 }, | |
77 | { 0x4f, 0x0279 }, | |
78 | { 0x50, 0x0000 }, | |
79 | { 0x51, 0x0000 }, | |
80 | { 0x52, 0x0279 }, | |
81 | { 0x53, 0xf000 }, | |
82 | { 0x61, 0x0000 }, | |
83 | { 0x62, 0x0000 }, | |
84 | { 0x63, 0x00c0 }, | |
85 | { 0x64, 0x0000 }, | |
86 | { 0x65, 0x0000 }, | |
87 | { 0x66, 0x0000 }, | |
88 | { 0x70, 0x8000 }, | |
89 | { 0x73, 0x1104 }, | |
90 | { 0x74, 0x0c00 }, | |
91 | { 0x80, 0x0000 }, | |
92 | { 0x81, 0x0000 }, | |
93 | { 0x82, 0x0000 }, | |
94 | { 0x8b, 0x0600 }, | |
95 | { 0x8e, 0x0004 }, | |
96 | { 0x8f, 0x1100 }, | |
97 | { 0x90, 0x0000 }, | |
ea968da7 | 98 | { 0x91, 0x0c00 }, |
b1d15059 BL |
99 | { 0x92, 0x0000 }, |
100 | { 0x93, 0x2000 }, | |
101 | { 0x94, 0x0200 }, | |
102 | { 0x95, 0x0000 }, | |
103 | { 0xb0, 0x2080 }, | |
104 | { 0xb1, 0x0000 }, | |
105 | { 0xb2, 0x0000 }, | |
106 | { 0xb4, 0x2206 }, | |
107 | { 0xb5, 0x1f00 }, | |
108 | { 0xb6, 0x0000 }, | |
109 | { 0xb7, 0x0000 }, | |
110 | { 0xbb, 0x0000 }, | |
111 | { 0xbc, 0x0000 }, | |
112 | { 0xbd, 0x0000 }, | |
113 | { 0xbe, 0x0000 }, | |
114 | { 0xbf, 0x0000 }, | |
115 | { 0xc0, 0x0100 }, | |
116 | { 0xc1, 0x0000 }, | |
117 | { 0xc2, 0x0000 }, | |
118 | { 0xc8, 0x0000 }, | |
119 | { 0xc9, 0x0000 }, | |
120 | { 0xca, 0x0000 }, | |
121 | { 0xcb, 0x0000 }, | |
122 | { 0xcc, 0x0000 }, | |
123 | { 0xcd, 0x0000 }, | |
124 | { 0xce, 0x0000 }, | |
125 | { 0xcf, 0x0013 }, | |
126 | { 0xd0, 0x0680 }, | |
127 | { 0xd1, 0x1c17 }, | |
128 | { 0xd3, 0xb320 }, | |
129 | { 0xd4, 0x0000 }, | |
130 | { 0xd6, 0x0000 }, | |
131 | { 0xd7, 0x0000 }, | |
132 | { 0xd9, 0x0809 }, | |
133 | { 0xda, 0x0000 }, | |
134 | { 0xfa, 0x0010 }, | |
135 | { 0xfb, 0x0000 }, | |
136 | { 0xfc, 0x0000 }, | |
137 | { 0xfe, 0x10ec }, | |
138 | { 0xff, 0x6281 }, | |
139 | }; | |
140 | ||
141 | struct rt5616_priv { | |
01f8902f | 142 | struct snd_soc_component *component; |
b1d15059 BL |
143 | struct delayed_work patch_work; |
144 | struct regmap *regmap; | |
76d3204e | 145 | struct clk *mclk; |
b1d15059 BL |
146 | |
147 | int sysclk; | |
148 | int sysclk_src; | |
149 | int lrck[RT5616_AIFS]; | |
150 | int bclk[RT5616_AIFS]; | |
151 | int master[RT5616_AIFS]; | |
152 | ||
153 | int pll_src; | |
154 | int pll_in; | |
155 | int pll_out; | |
156 | ||
157 | }; | |
158 | ||
159 | static bool rt5616_volatile_register(struct device *dev, unsigned int reg) | |
160 | { | |
161 | int i; | |
162 | ||
163 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { | |
164 | if (reg >= rt5616_ranges[i].range_min && | |
99081589 | 165 | reg <= rt5616_ranges[i].range_max) |
b1d15059 | 166 | return true; |
b1d15059 BL |
167 | } |
168 | ||
169 | switch (reg) { | |
170 | case RT5616_RESET: | |
171 | case RT5616_PRIV_DATA: | |
172 | case RT5616_EQ_CTRL1: | |
173 | case RT5616_DRC_AGC_1: | |
174 | case RT5616_IRQ_CTRL2: | |
175 | case RT5616_INT_IRQ_ST: | |
176 | case RT5616_PGM_REG_ARR1: | |
177 | case RT5616_PGM_REG_ARR3: | |
178 | case RT5616_VENDOR_ID: | |
179 | case RT5616_DEVICE_ID: | |
180 | return true; | |
181 | default: | |
182 | return false; | |
183 | } | |
184 | } | |
185 | ||
186 | static bool rt5616_readable_register(struct device *dev, unsigned int reg) | |
187 | { | |
188 | int i; | |
189 | ||
190 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { | |
191 | if (reg >= rt5616_ranges[i].range_min && | |
99081589 | 192 | reg <= rt5616_ranges[i].range_max) |
b1d15059 | 193 | return true; |
b1d15059 BL |
194 | } |
195 | ||
196 | switch (reg) { | |
197 | case RT5616_RESET: | |
198 | case RT5616_VERSION_ID: | |
199 | case RT5616_VENDOR_ID: | |
200 | case RT5616_DEVICE_ID: | |
201 | case RT5616_HP_VOL: | |
202 | case RT5616_LOUT_CTRL1: | |
203 | case RT5616_LOUT_CTRL2: | |
204 | case RT5616_IN1_IN2: | |
205 | case RT5616_INL1_INR1_VOL: | |
206 | case RT5616_DAC1_DIG_VOL: | |
207 | case RT5616_ADC_DIG_VOL: | |
208 | case RT5616_ADC_BST_VOL: | |
209 | case RT5616_STO1_ADC_MIXER: | |
210 | case RT5616_AD_DA_MIXER: | |
211 | case RT5616_STO_DAC_MIXER: | |
212 | case RT5616_REC_L1_MIXER: | |
213 | case RT5616_REC_L2_MIXER: | |
214 | case RT5616_REC_R1_MIXER: | |
215 | case RT5616_REC_R2_MIXER: | |
216 | case RT5616_HPO_MIXER: | |
217 | case RT5616_OUT_L1_MIXER: | |
218 | case RT5616_OUT_L2_MIXER: | |
219 | case RT5616_OUT_L3_MIXER: | |
220 | case RT5616_OUT_R1_MIXER: | |
221 | case RT5616_OUT_R2_MIXER: | |
222 | case RT5616_OUT_R3_MIXER: | |
223 | case RT5616_LOUT_MIXER: | |
224 | case RT5616_PWR_DIG1: | |
225 | case RT5616_PWR_DIG2: | |
226 | case RT5616_PWR_ANLG1: | |
227 | case RT5616_PWR_ANLG2: | |
228 | case RT5616_PWR_MIXER: | |
229 | case RT5616_PWR_VOL: | |
230 | case RT5616_PRIV_INDEX: | |
231 | case RT5616_PRIV_DATA: | |
232 | case RT5616_I2S1_SDP: | |
233 | case RT5616_ADDA_CLK1: | |
234 | case RT5616_ADDA_CLK2: | |
235 | case RT5616_GLB_CLK: | |
236 | case RT5616_PLL_CTRL1: | |
237 | case RT5616_PLL_CTRL2: | |
238 | case RT5616_HP_OVCD: | |
239 | case RT5616_DEPOP_M1: | |
240 | case RT5616_DEPOP_M2: | |
241 | case RT5616_DEPOP_M3: | |
242 | case RT5616_CHARGE_PUMP: | |
243 | case RT5616_PV_DET_SPK_G: | |
244 | case RT5616_MICBIAS: | |
245 | case RT5616_A_JD_CTL1: | |
246 | case RT5616_A_JD_CTL2: | |
247 | case RT5616_EQ_CTRL1: | |
248 | case RT5616_EQ_CTRL2: | |
249 | case RT5616_WIND_FILTER: | |
250 | case RT5616_DRC_AGC_1: | |
251 | case RT5616_DRC_AGC_2: | |
252 | case RT5616_DRC_AGC_3: | |
253 | case RT5616_SVOL_ZC: | |
254 | case RT5616_JD_CTRL1: | |
255 | case RT5616_JD_CTRL2: | |
256 | case RT5616_IRQ_CTRL1: | |
257 | case RT5616_IRQ_CTRL2: | |
258 | case RT5616_INT_IRQ_ST: | |
259 | case RT5616_GPIO_CTRL1: | |
260 | case RT5616_GPIO_CTRL2: | |
261 | case RT5616_GPIO_CTRL3: | |
262 | case RT5616_PGM_REG_ARR1: | |
263 | case RT5616_PGM_REG_ARR2: | |
264 | case RT5616_PGM_REG_ARR3: | |
265 | case RT5616_PGM_REG_ARR4: | |
266 | case RT5616_PGM_REG_ARR5: | |
267 | case RT5616_SCB_FUNC: | |
268 | case RT5616_SCB_CTRL: | |
269 | case RT5616_BASE_BACK: | |
270 | case RT5616_MP3_PLUS1: | |
271 | case RT5616_MP3_PLUS2: | |
272 | case RT5616_ADJ_HPF_CTRL1: | |
273 | case RT5616_ADJ_HPF_CTRL2: | |
274 | case RT5616_HP_CALIB_AMP_DET: | |
275 | case RT5616_HP_CALIB2: | |
276 | case RT5616_SV_ZCD1: | |
277 | case RT5616_SV_ZCD2: | |
278 | case RT5616_D_MISC: | |
279 | case RT5616_DUMMY2: | |
280 | case RT5616_DUMMY3: | |
281 | return true; | |
282 | default: | |
283 | return false; | |
284 | } | |
285 | } | |
286 | ||
287 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); | |
288 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); | |
289 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); | |
290 | static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); | |
291 | static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); | |
292 | ||
293 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ | |
51a57640 | 294 | static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(bst_tlv, |
b1d15059 BL |
295 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
296 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), | |
297 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), | |
298 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), | |
299 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), | |
300 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), | |
301 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), | |
51a57640 | 302 | ); |
b1d15059 BL |
303 | |
304 | static const struct snd_kcontrol_new rt5616_snd_controls[] = { | |
305 | /* Headphone Output Volume */ | |
306 | SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL, | |
99081589 | 307 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
d7fcd136 JL |
308 | SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL, |
309 | RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), | |
b1d15059 | 310 | SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL, |
99081589 | 311 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), |
b1d15059 BL |
312 | /* OUTPUT Control */ |
313 | SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1, | |
99081589 | 314 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
b1d15059 | 315 | SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1, |
99081589 | 316 | RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), |
b1d15059 | 317 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1, |
99081589 | 318 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), |
b1d15059 BL |
319 | |
320 | /* DAC Digital Volume */ | |
321 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL, | |
99081589 CW |
322 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, |
323 | 175, 0, dac_vol_tlv), | |
b1d15059 | 324 | /* IN1/IN2 Control */ |
e2133b64 | 325 | SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2, |
99081589 | 326 | RT5616_BST_SFT1, 8, 0, bst_tlv), |
e2133b64 | 327 | SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2, |
99081589 | 328 | RT5616_BST_SFT2, 8, 0, bst_tlv), |
b1d15059 BL |
329 | /* INL/INR Volume Control */ |
330 | SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL, | |
99081589 CW |
331 | RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT, |
332 | 31, 1, in_vol_tlv), | |
b1d15059 BL |
333 | /* ADC Digital Volume Control */ |
334 | SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL, | |
99081589 | 335 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
b1d15059 | 336 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL, |
99081589 CW |
337 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, |
338 | 127, 0, adc_vol_tlv), | |
b1d15059 BL |
339 | |
340 | /* ADC Boost Volume Control */ | |
e2133b64 | 341 | SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL, |
99081589 CW |
342 | RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT, |
343 | 3, 0, adc_bst_tlv), | |
b1d15059 BL |
344 | }; |
345 | ||
346 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, | |
99081589 | 347 | struct snd_soc_dapm_widget *sink) |
b1d15059 BL |
348 | { |
349 | unsigned int val; | |
350 | ||
467a2553 | 351 | val = snd_soc_component_read(snd_soc_dapm_to_component(source->dapm), RT5616_GLB_CLK); |
b1d15059 BL |
352 | val &= RT5616_SCLK_SRC_MASK; |
353 | if (val == RT5616_SCLK_SRC_PLL1) | |
354 | return 1; | |
355 | else | |
356 | return 0; | |
357 | } | |
358 | ||
359 | /* Digital Mixer */ | |
360 | static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = { | |
361 | SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER, | |
362 | RT5616_M_STO1_ADC_L1_SFT, 1, 1), | |
363 | }; | |
364 | ||
365 | static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = { | |
366 | SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER, | |
367 | RT5616_M_STO1_ADC_R1_SFT, 1, 1), | |
368 | }; | |
369 | ||
370 | static const struct snd_kcontrol_new rt5616_dac_l_mix[] = { | |
371 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER, | |
372 | RT5616_M_ADCMIX_L_SFT, 1, 1), | |
373 | SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER, | |
374 | RT5616_M_IF1_DAC_L_SFT, 1, 1), | |
375 | }; | |
376 | ||
377 | static const struct snd_kcontrol_new rt5616_dac_r_mix[] = { | |
378 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER, | |
379 | RT5616_M_ADCMIX_R_SFT, 1, 1), | |
380 | SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER, | |
381 | RT5616_M_IF1_DAC_R_SFT, 1, 1), | |
382 | }; | |
383 | ||
384 | static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = { | |
385 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER, | |
386 | RT5616_M_DAC_L1_MIXL_SFT, 1, 1), | |
387 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER, | |
388 | RT5616_M_DAC_R1_MIXL_SFT, 1, 1), | |
389 | }; | |
390 | ||
391 | static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = { | |
392 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER, | |
393 | RT5616_M_DAC_R1_MIXR_SFT, 1, 1), | |
394 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER, | |
395 | RT5616_M_DAC_L1_MIXR_SFT, 1, 1), | |
396 | }; | |
397 | ||
398 | /* Analog Input Mixer */ | |
399 | static const struct snd_kcontrol_new rt5616_rec_l_mix[] = { | |
400 | SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER, | |
401 | RT5616_M_IN1_L_RM_L_SFT, 1, 1), | |
402 | SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER, | |
403 | RT5616_M_BST2_RM_L_SFT, 1, 1), | |
404 | SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER, | |
405 | RT5616_M_BST1_RM_L_SFT, 1, 1), | |
406 | }; | |
407 | ||
408 | static const struct snd_kcontrol_new rt5616_rec_r_mix[] = { | |
409 | SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER, | |
410 | RT5616_M_IN1_R_RM_R_SFT, 1, 1), | |
411 | SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER, | |
412 | RT5616_M_BST2_RM_R_SFT, 1, 1), | |
413 | SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER, | |
414 | RT5616_M_BST1_RM_R_SFT, 1, 1), | |
415 | }; | |
416 | ||
417 | /* Analog Output Mixer */ | |
418 | ||
419 | static const struct snd_kcontrol_new rt5616_out_l_mix[] = { | |
420 | SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER, | |
421 | RT5616_M_BST1_OM_L_SFT, 1, 1), | |
422 | SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER, | |
423 | RT5616_M_BST2_OM_L_SFT, 1, 1), | |
424 | SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER, | |
425 | RT5616_M_IN1_L_OM_L_SFT, 1, 1), | |
426 | SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER, | |
427 | RT5616_M_RM_L_OM_L_SFT, 1, 1), | |
428 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER, | |
429 | RT5616_M_DAC_L1_OM_L_SFT, 1, 1), | |
430 | }; | |
431 | ||
432 | static const struct snd_kcontrol_new rt5616_out_r_mix[] = { | |
433 | SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER, | |
434 | RT5616_M_BST2_OM_R_SFT, 1, 1), | |
435 | SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER, | |
436 | RT5616_M_BST1_OM_R_SFT, 1, 1), | |
437 | SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER, | |
438 | RT5616_M_IN1_R_OM_R_SFT, 1, 1), | |
439 | SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER, | |
440 | RT5616_M_RM_R_OM_R_SFT, 1, 1), | |
441 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER, | |
442 | RT5616_M_DAC_R1_OM_R_SFT, 1, 1), | |
443 | }; | |
444 | ||
445 | static const struct snd_kcontrol_new rt5616_hpo_mix[] = { | |
446 | SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER, | |
447 | RT5616_M_DAC1_HM_SFT, 1, 1), | |
448 | SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER, | |
449 | RT5616_M_HPVOL_HM_SFT, 1, 1), | |
450 | }; | |
451 | ||
452 | static const struct snd_kcontrol_new rt5616_lout_mix[] = { | |
453 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER, | |
454 | RT5616_M_DAC_L1_LM_SFT, 1, 1), | |
455 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER, | |
456 | RT5616_M_DAC_R1_LM_SFT, 1, 1), | |
457 | SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER, | |
458 | RT5616_M_OV_L_LM_SFT, 1, 1), | |
459 | SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER, | |
460 | RT5616_M_OV_R_LM_SFT, 1, 1), | |
461 | }; | |
462 | ||
463 | static int rt5616_adc_event(struct snd_soc_dapm_widget *w, | |
99081589 | 464 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 465 | { |
01f8902f | 466 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
467 | |
468 | switch (event) { | |
469 | case SND_SOC_DAPM_POST_PMU: | |
01f8902f | 470 | snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL, |
99081589 | 471 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
b1d15059 BL |
472 | break; |
473 | ||
474 | case SND_SOC_DAPM_POST_PMD: | |
01f8902f | 475 | snd_soc_component_update_bits(component, RT5616_ADC_DIG_VOL, |
99081589 CW |
476 | RT5616_L_MUTE | RT5616_R_MUTE, |
477 | RT5616_L_MUTE | RT5616_R_MUTE); | |
b1d15059 BL |
478 | break; |
479 | ||
480 | default: | |
481 | return 0; | |
482 | } | |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
487 | static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, | |
99081589 | 488 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 489 | { |
01f8902f | 490 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
491 | |
492 | switch (event) { | |
493 | case SND_SOC_DAPM_POST_PMU: | |
494 | /* depop parameters */ | |
01f8902f | 495 | snd_soc_component_update_bits(component, RT5616_DEPOP_M2, |
99081589 | 496 | RT5616_DEPOP_MASK, RT5616_DEPOP_MAN); |
01f8902f | 497 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
498 | RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | |
499 | RT5616_HP_CB_MASK, RT5616_HP_CP_PU | | |
500 | RT5616_HP_SG_DIS | RT5616_HP_CB_PU); | |
01f8902f | 501 | snd_soc_component_write(component, RT5616_PR_BASE + |
99081589 | 502 | RT5616_HP_DCC_INT1, 0x9f00); |
b1d15059 | 503 | /* headphone amp power on */ |
01f8902f | 504 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 | 505 | RT5616_PWR_FV1 | RT5616_PWR_FV2, 0); |
01f8902f | 506 | snd_soc_component_update_bits(component, RT5616_PWR_VOL, |
99081589 CW |
507 | RT5616_PWR_HV_L | RT5616_PWR_HV_R, |
508 | RT5616_PWR_HV_L | RT5616_PWR_HV_R); | |
01f8902f | 509 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 CW |
510 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | |
511 | RT5616_PWR_HA, RT5616_PWR_HP_L | | |
512 | RT5616_PWR_HP_R | RT5616_PWR_HA); | |
b1d15059 | 513 | msleep(50); |
01f8902f | 514 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 CW |
515 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
516 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | |
b1d15059 | 517 | |
01f8902f | 518 | snd_soc_component_update_bits(component, RT5616_CHARGE_PUMP, |
99081589 | 519 | RT5616_PM_HP_MASK, RT5616_PM_HP_HV); |
01f8902f | 520 | snd_soc_component_update_bits(component, RT5616_PR_BASE + |
99081589 | 521 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0200); |
01f8902f | 522 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
523 | RT5616_HP_CO_MASK | RT5616_HP_SG_MASK, |
524 | RT5616_HP_CO_EN | RT5616_HP_SG_EN); | |
b1d15059 BL |
525 | break; |
526 | case SND_SOC_DAPM_PRE_PMD: | |
01f8902f | 527 | snd_soc_component_update_bits(component, RT5616_PR_BASE + |
99081589 | 528 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0); |
01f8902f | 529 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
530 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | |
531 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | | |
532 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); | |
b1d15059 | 533 | /* headphone amp power down */ |
01f8902f | 534 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
535 | RT5616_SMT_TRIG_MASK | |
536 | RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK | | |
537 | RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | | |
538 | RT5616_HP_CB_MASK, | |
539 | RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN | | |
540 | RT5616_HP_CO_DIS | RT5616_HP_CP_PD | | |
541 | RT5616_HP_SG_EN | RT5616_HP_CB_PD); | |
01f8902f | 542 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 CW |
543 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | |
544 | RT5616_PWR_HA, 0); | |
b1d15059 BL |
545 | break; |
546 | default: | |
547 | return 0; | |
548 | } | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static int rt5616_hp_event(struct snd_soc_dapm_widget *w, | |
99081589 | 554 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 555 | { |
01f8902f | 556 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
557 | |
558 | switch (event) { | |
559 | case SND_SOC_DAPM_POST_PMU: | |
560 | /* headphone unmute sequence */ | |
01f8902f | 561 | snd_soc_component_update_bits(component, RT5616_DEPOP_M3, |
99081589 CW |
562 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | |
563 | RT5616_CP_FQ3_MASK, | |
564 | RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT | | |
565 | RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT | | |
566 | RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT); | |
01f8902f | 567 | snd_soc_component_write(component, RT5616_PR_BASE + |
99081589 | 568 | RT5616_MAMP_INT_REG2, 0xfc00); |
01f8902f | 569 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 | 570 | RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN); |
01f8902f | 571 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 | 572 | RT5616_RSTN_MASK, RT5616_RSTN_EN); |
01f8902f | 573 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
574 | RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK | |
575 | RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS | | |
576 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); | |
01f8902f | 577 | snd_soc_component_update_bits(component, RT5616_HP_VOL, |
99081589 | 578 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
b1d15059 | 579 | msleep(100); |
01f8902f | 580 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
581 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | |
582 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | | |
583 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); | |
b1d15059 | 584 | msleep(20); |
01f8902f | 585 | snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET, |
99081589 | 586 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN); |
b1d15059 BL |
587 | break; |
588 | ||
589 | case SND_SOC_DAPM_PRE_PMD: | |
590 | /* headphone mute sequence */ | |
01f8902f | 591 | snd_soc_component_update_bits(component, RT5616_DEPOP_M3, |
99081589 CW |
592 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | |
593 | RT5616_CP_FQ3_MASK, | |
594 | RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT | | |
595 | RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT | | |
596 | RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT); | |
01f8902f | 597 | snd_soc_component_write(component, RT5616_PR_BASE + |
99081589 | 598 | RT5616_MAMP_INT_REG2, 0xfc00); |
01f8902f | 599 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 | 600 | RT5616_HP_SG_MASK, RT5616_HP_SG_EN); |
01f8902f | 601 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 | 602 | RT5616_RSTP_MASK, RT5616_RSTP_EN); |
01f8902f | 603 | snd_soc_component_update_bits(component, RT5616_DEPOP_M1, |
99081589 CW |
604 | RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK | |
605 | RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS | | |
606 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); | |
01f8902f | 607 | snd_soc_component_update_bits(component, RT5616_HP_CALIB_AMP_DET, |
99081589 | 608 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS); |
b1d15059 | 609 | msleep(90); |
01f8902f | 610 | snd_soc_component_update_bits(component, RT5616_HP_VOL, |
99081589 CW |
611 | RT5616_L_MUTE | RT5616_R_MUTE, |
612 | RT5616_L_MUTE | RT5616_R_MUTE); | |
b1d15059 BL |
613 | msleep(30); |
614 | break; | |
615 | ||
616 | default: | |
617 | return 0; | |
618 | } | |
619 | ||
620 | return 0; | |
621 | } | |
622 | ||
623 | static int rt5616_lout_event(struct snd_soc_dapm_widget *w, | |
99081589 | 624 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 625 | { |
01f8902f | 626 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
627 | |
628 | switch (event) { | |
629 | case SND_SOC_DAPM_POST_PMU: | |
01f8902f | 630 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 | 631 | RT5616_PWR_LM, RT5616_PWR_LM); |
01f8902f | 632 | snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1, |
99081589 | 633 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
b1d15059 BL |
634 | break; |
635 | ||
636 | case SND_SOC_DAPM_PRE_PMD: | |
01f8902f | 637 | snd_soc_component_update_bits(component, RT5616_LOUT_CTRL1, |
99081589 CW |
638 | RT5616_L_MUTE | RT5616_R_MUTE, |
639 | RT5616_L_MUTE | RT5616_R_MUTE); | |
01f8902f | 640 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 | 641 | RT5616_PWR_LM, 0); |
b1d15059 BL |
642 | break; |
643 | ||
644 | default: | |
645 | return 0; | |
646 | } | |
647 | ||
648 | return 0; | |
649 | } | |
650 | ||
651 | static int rt5616_bst1_event(struct snd_soc_dapm_widget *w, | |
99081589 | 652 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 653 | { |
01f8902f | 654 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
655 | |
656 | switch (event) { | |
657 | case SND_SOC_DAPM_POST_PMU: | |
01f8902f | 658 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG2, |
99081589 | 659 | RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2); |
b1d15059 BL |
660 | break; |
661 | ||
662 | case SND_SOC_DAPM_PRE_PMD: | |
01f8902f | 663 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG2, |
99081589 | 664 | RT5616_PWR_BST1_OP2, 0); |
b1d15059 BL |
665 | break; |
666 | ||
667 | default: | |
668 | return 0; | |
669 | } | |
670 | ||
671 | return 0; | |
672 | } | |
673 | ||
674 | static int rt5616_bst2_event(struct snd_soc_dapm_widget *w, | |
99081589 | 675 | struct snd_kcontrol *kcontrol, int event) |
b1d15059 | 676 | { |
01f8902f | 677 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
b1d15059 BL |
678 | |
679 | switch (event) { | |
680 | case SND_SOC_DAPM_POST_PMU: | |
01f8902f | 681 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG2, |
99081589 | 682 | RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2); |
b1d15059 BL |
683 | break; |
684 | ||
685 | case SND_SOC_DAPM_PRE_PMD: | |
01f8902f | 686 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG2, |
99081589 | 687 | RT5616_PWR_BST2_OP2, 0); |
b1d15059 BL |
688 | break; |
689 | ||
690 | default: | |
691 | return 0; | |
692 | } | |
693 | ||
694 | return 0; | |
695 | } | |
696 | ||
697 | static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { | |
698 | SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2, | |
99081589 | 699 | RT5616_PWR_PLL_BIT, 0, NULL, 0), |
b1d15059 BL |
700 | /* Input Side */ |
701 | /* micbias */ | |
702 | SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1, | |
99081589 | 703 | RT5616_PWR_LDO_BIT, 0, NULL, 0), |
b1d15059 | 704 | SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2, |
99081589 | 705 | RT5616_PWR_MB1_BIT, 0, NULL, 0), |
b1d15059 BL |
706 | |
707 | /* Input Lines */ | |
708 | SND_SOC_DAPM_INPUT("MIC1"), | |
709 | SND_SOC_DAPM_INPUT("MIC2"), | |
710 | ||
711 | SND_SOC_DAPM_INPUT("IN1P"), | |
712 | SND_SOC_DAPM_INPUT("IN2P"), | |
713 | SND_SOC_DAPM_INPUT("IN2N"), | |
714 | ||
715 | /* Boost */ | |
716 | SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2, | |
99081589 CW |
717 | RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event, |
718 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
b1d15059 | 719 | SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2, |
99081589 CW |
720 | RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event, |
721 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
b1d15059 BL |
722 | /* Input Volume */ |
723 | SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL, | |
99081589 | 724 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), |
b1d15059 | 725 | SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL, |
99081589 | 726 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), |
b1d15059 | 727 | SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL, |
99081589 | 728 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), |
b1d15059 | 729 | SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL, |
99081589 | 730 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), |
b1d15059 BL |
731 | |
732 | /* REC Mixer */ | |
733 | SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0, | |
99081589 | 734 | rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)), |
b1d15059 | 735 | SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0, |
99081589 | 736 | rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)), |
b1d15059 BL |
737 | /* ADCs */ |
738 | SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1, | |
99081589 CW |
739 | RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event, |
740 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), | |
b1d15059 | 741 | SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1, |
99081589 CW |
742 | RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event, |
743 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), | |
b1d15059 BL |
744 | |
745 | /* ADC Mixer */ | |
746 | SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2, | |
99081589 | 747 | RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0), |
b1d15059 | 748 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, |
99081589 CW |
749 | rt5616_sto1_adc_l_mix, |
750 | ARRAY_SIZE(rt5616_sto1_adc_l_mix)), | |
b1d15059 | 751 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, |
99081589 CW |
752 | rt5616_sto1_adc_r_mix, |
753 | ARRAY_SIZE(rt5616_sto1_adc_r_mix)), | |
b1d15059 BL |
754 | |
755 | /* Digital Interface */ | |
756 | SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1, | |
99081589 | 757 | RT5616_PWR_I2S1_BIT, 0, NULL, 0), |
b1d15059 BL |
758 | SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
759 | SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), | |
760 | SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), | |
761 | SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), | |
762 | ||
763 | /* Digital Interface Select */ | |
764 | ||
765 | /* Audio Interface */ | |
766 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), | |
767 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), | |
768 | ||
769 | /* Audio DSP */ | |
770 | SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), | |
771 | ||
772 | /* Output Side */ | |
773 | /* DAC mixer before sound effect */ | |
774 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, | |
99081589 | 775 | rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)), |
b1d15059 | 776 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, |
99081589 | 777 | rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)), |
b1d15059 BL |
778 | |
779 | SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2, | |
99081589 | 780 | RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0), |
b1d15059 BL |
781 | |
782 | /* DAC Mixer */ | |
783 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, | |
99081589 CW |
784 | rt5616_sto_dac_l_mix, |
785 | ARRAY_SIZE(rt5616_sto_dac_l_mix)), | |
b1d15059 | 786 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
99081589 CW |
787 | rt5616_sto_dac_r_mix, |
788 | ARRAY_SIZE(rt5616_sto_dac_r_mix)), | |
b1d15059 BL |
789 | |
790 | /* DACs */ | |
791 | SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1, | |
99081589 | 792 | RT5616_PWR_DAC_L1_BIT, 0), |
b1d15059 | 793 | SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1, |
99081589 | 794 | RT5616_PWR_DAC_R1_BIT, 0), |
b1d15059 BL |
795 | /* OUT Mixer */ |
796 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT, | |
99081589 | 797 | 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)), |
b1d15059 | 798 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT, |
99081589 | 799 | 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)), |
b1d15059 BL |
800 | /* Output Volume */ |
801 | SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL, | |
99081589 | 802 | RT5616_PWR_OV_L_BIT, 0, NULL, 0), |
b1d15059 | 803 | SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL, |
99081589 | 804 | RT5616_PWR_OV_R_BIT, 0, NULL, 0), |
b1d15059 | 805 | SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL, |
99081589 | 806 | RT5616_PWR_HV_L_BIT, 0, NULL, 0), |
b1d15059 | 807 | SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL, |
99081589 | 808 | RT5616_PWR_HV_R_BIT, 0, NULL, 0), |
b1d15059 | 809 | SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, |
99081589 | 810 | 0, 0, NULL, 0), |
b1d15059 | 811 | SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, |
99081589 | 812 | 0, 0, NULL, 0), |
b1d15059 | 813 | SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, |
99081589 | 814 | 0, 0, NULL, 0), |
b1d15059 | 815 | SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL, |
99081589 | 816 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), |
b1d15059 | 817 | SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL, |
99081589 | 818 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), |
b1d15059 | 819 | SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL, |
99081589 | 820 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), |
b1d15059 | 821 | SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL, |
99081589 | 822 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), |
b1d15059 BL |
823 | /* HPO/LOUT/Mono Mixer */ |
824 | SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, | |
99081589 | 825 | rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)), |
b1d15059 | 826 | SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, |
99081589 | 827 | rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)), |
b1d15059 BL |
828 | |
829 | SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, | |
99081589 CW |
830 | rt5616_hp_event, SND_SOC_DAPM_PRE_PMD | |
831 | SND_SOC_DAPM_POST_PMU), | |
b1d15059 | 832 | SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, |
99081589 CW |
833 | rt5616_lout_event, SND_SOC_DAPM_PRE_PMD | |
834 | SND_SOC_DAPM_POST_PMU), | |
b1d15059 BL |
835 | |
836 | SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0, | |
99081589 CW |
837 | rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU | |
838 | SND_SOC_DAPM_PRE_PMD), | |
b1d15059 BL |
839 | |
840 | /* Output Lines */ | |
841 | SND_SOC_DAPM_OUTPUT("HPOL"), | |
842 | SND_SOC_DAPM_OUTPUT("HPOR"), | |
843 | SND_SOC_DAPM_OUTPUT("LOUTL"), | |
844 | SND_SOC_DAPM_OUTPUT("LOUTR"), | |
845 | }; | |
846 | ||
847 | static const struct snd_soc_dapm_route rt5616_dapm_routes[] = { | |
848 | {"IN1P", NULL, "LDO"}, | |
849 | {"IN2P", NULL, "LDO"}, | |
850 | ||
851 | {"IN1P", NULL, "MIC1"}, | |
852 | {"IN2P", NULL, "MIC2"}, | |
853 | {"IN2N", NULL, "MIC2"}, | |
854 | ||
855 | {"BST1", NULL, "IN1P"}, | |
856 | {"BST2", NULL, "IN2P"}, | |
857 | {"BST2", NULL, "IN2N"}, | |
858 | {"BST1", NULL, "micbias1"}, | |
859 | {"BST2", NULL, "micbias1"}, | |
860 | ||
861 | {"INL1 VOL", NULL, "IN2P"}, | |
862 | {"INR1 VOL", NULL, "IN2N"}, | |
863 | ||
864 | {"RECMIXL", "INL1 Switch", "INL1 VOL"}, | |
865 | {"RECMIXL", "BST2 Switch", "BST2"}, | |
866 | {"RECMIXL", "BST1 Switch", "BST1"}, | |
867 | ||
868 | {"RECMIXR", "INR1 Switch", "INR1 VOL"}, | |
869 | {"RECMIXR", "BST2 Switch", "BST2"}, | |
870 | {"RECMIXR", "BST1 Switch", "BST1"}, | |
871 | ||
872 | {"ADC L", NULL, "RECMIXL"}, | |
873 | {"ADC R", NULL, "RECMIXR"}, | |
874 | ||
875 | {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"}, | |
876 | {"Stereo1 ADC MIXL", NULL, "stereo1 filter"}, | |
877 | {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll}, | |
878 | ||
879 | {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"}, | |
880 | {"Stereo1 ADC MIXR", NULL, "stereo1 filter"}, | |
881 | {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll}, | |
882 | ||
883 | {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, | |
884 | {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, | |
885 | {"IF1 ADC1", NULL, "I2S1"}, | |
886 | ||
887 | {"AIF1TX", NULL, "IF1 ADC1"}, | |
888 | ||
889 | {"IF1 DAC", NULL, "AIF1RX"}, | |
890 | {"IF1 DAC", NULL, "I2S1"}, | |
891 | ||
892 | {"IF1 DAC1 L", NULL, "IF1 DAC"}, | |
893 | {"IF1 DAC1 R", NULL, "IF1 DAC"}, | |
894 | ||
895 | {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, | |
896 | {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, | |
897 | {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, | |
898 | {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, | |
899 | ||
900 | {"Audio DSP", NULL, "DAC MIXL"}, | |
901 | {"Audio DSP", NULL, "DAC MIXR"}, | |
902 | ||
903 | {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, | |
904 | {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, | |
905 | {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, | |
906 | {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, | |
907 | {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, | |
908 | {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, | |
909 | ||
910 | {"DAC L1", NULL, "Stereo DAC MIXL"}, | |
911 | {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll}, | |
912 | {"DAC R1", NULL, "Stereo DAC MIXR"}, | |
913 | {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll}, | |
914 | ||
915 | {"OUT MIXL", "BST1 Switch", "BST1"}, | |
916 | {"OUT MIXL", "BST2 Switch", "BST2"}, | |
917 | {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, | |
918 | {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, | |
919 | {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, | |
920 | ||
921 | {"OUT MIXR", "BST2 Switch", "BST2"}, | |
922 | {"OUT MIXR", "BST1 Switch", "BST1"}, | |
923 | {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, | |
924 | {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, | |
925 | {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, | |
926 | ||
927 | {"HPOVOL L", NULL, "OUT MIXL"}, | |
928 | {"HPOVOL R", NULL, "OUT MIXR"}, | |
929 | {"OUTVOL L", NULL, "OUT MIXL"}, | |
930 | {"OUTVOL R", NULL, "OUT MIXR"}, | |
931 | ||
932 | {"DAC 1", NULL, "DAC L1"}, | |
933 | {"DAC 1", NULL, "DAC R1"}, | |
934 | {"HPOVOL", NULL, "HPOVOL L"}, | |
935 | {"HPOVOL", NULL, "HPOVOL R"}, | |
936 | {"HPO MIX", "DAC1 Switch", "DAC 1"}, | |
937 | {"HPO MIX", "HPVOL Switch", "HPOVOL"}, | |
938 | ||
939 | {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, | |
940 | {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, | |
941 | {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, | |
942 | {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, | |
943 | ||
944 | {"HP amp", NULL, "HPO MIX"}, | |
945 | {"HP amp", NULL, "Charge Pump"}, | |
946 | {"HPOL", NULL, "HP amp"}, | |
947 | {"HPOR", NULL, "HP amp"}, | |
948 | ||
949 | {"LOUT amp", NULL, "LOUT MIX"}, | |
950 | {"LOUT amp", NULL, "Charge Pump"}, | |
951 | {"LOUTL", NULL, "LOUT amp"}, | |
952 | {"LOUTR", NULL, "LOUT amp"}, | |
953 | ||
954 | }; | |
955 | ||
956 | static int rt5616_hw_params(struct snd_pcm_substream *substream, | |
99081589 CW |
957 | struct snd_pcm_hw_params *params, |
958 | struct snd_soc_dai *dai) | |
b1d15059 | 959 | { |
01f8902f KM |
960 | struct snd_soc_component *component = dai->component; |
961 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); | |
b1d15059 BL |
962 | unsigned int val_len = 0, val_clk, mask_clk; |
963 | int pre_div, bclk_ms, frame_size; | |
964 | ||
965 | rt5616->lrck[dai->id] = params_rate(params); | |
966 | ||
967 | pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]); | |
968 | ||
969 | if (pre_div < 0) { | |
01f8902f | 970 | dev_err(component->dev, "Unsupported clock setting\n"); |
b1d15059 BL |
971 | return -EINVAL; |
972 | } | |
973 | frame_size = snd_soc_params_to_frame_size(params); | |
974 | if (frame_size < 0) { | |
01f8902f | 975 | dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); |
b1d15059 BL |
976 | return -EINVAL; |
977 | } | |
978 | bclk_ms = frame_size > 32 ? 1 : 0; | |
979 | rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms); | |
980 | ||
981 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", | |
982 | rt5616->bclk[dai->id], rt5616->lrck[dai->id]); | |
983 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", | |
99081589 | 984 | bclk_ms, pre_div, dai->id); |
b1d15059 BL |
985 | |
986 | switch (params_format(params)) { | |
987 | case SNDRV_PCM_FORMAT_S16_LE: | |
988 | break; | |
989 | case SNDRV_PCM_FORMAT_S20_3LE: | |
990 | val_len |= RT5616_I2S_DL_20; | |
991 | break; | |
992 | case SNDRV_PCM_FORMAT_S24_LE: | |
993 | val_len |= RT5616_I2S_DL_24; | |
994 | break; | |
995 | case SNDRV_PCM_FORMAT_S8: | |
996 | val_len |= RT5616_I2S_DL_8; | |
997 | break; | |
998 | default: | |
999 | return -EINVAL; | |
1000 | } | |
1001 | ||
1002 | mask_clk = RT5616_I2S_PD1_MASK; | |
1003 | val_clk = pre_div << RT5616_I2S_PD1_SFT; | |
01f8902f | 1004 | snd_soc_component_update_bits(component, RT5616_I2S1_SDP, |
99081589 | 1005 | RT5616_I2S_DL_MASK, val_len); |
01f8902f | 1006 | snd_soc_component_update_bits(component, RT5616_ADDA_CLK1, mask_clk, val_clk); |
b1d15059 | 1007 | |
b1d15059 BL |
1008 | return 0; |
1009 | } | |
1010 | ||
1011 | static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |
1012 | { | |
01f8902f KM |
1013 | struct snd_soc_component *component = dai->component; |
1014 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); | |
b1d15059 BL |
1015 | unsigned int reg_val = 0; |
1016 | ||
1017 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
1018 | case SND_SOC_DAIFMT_CBM_CFM: | |
1019 | rt5616->master[dai->id] = 1; | |
1020 | break; | |
1021 | case SND_SOC_DAIFMT_CBS_CFS: | |
1022 | reg_val |= RT5616_I2S_MS_S; | |
1023 | rt5616->master[dai->id] = 0; | |
1024 | break; | |
1025 | default: | |
1026 | return -EINVAL; | |
1027 | } | |
1028 | ||
1029 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1030 | case SND_SOC_DAIFMT_NB_NF: | |
1031 | break; | |
1032 | case SND_SOC_DAIFMT_IB_NF: | |
1033 | reg_val |= RT5616_I2S_BP_INV; | |
1034 | break; | |
1035 | default: | |
1036 | return -EINVAL; | |
1037 | } | |
1038 | ||
1039 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
1040 | case SND_SOC_DAIFMT_I2S: | |
1041 | break; | |
1042 | case SND_SOC_DAIFMT_LEFT_J: | |
1043 | reg_val |= RT5616_I2S_DF_LEFT; | |
1044 | break; | |
1045 | case SND_SOC_DAIFMT_DSP_A: | |
1046 | reg_val |= RT5616_I2S_DF_PCM_A; | |
1047 | break; | |
1048 | case SND_SOC_DAIFMT_DSP_B: | |
1049 | reg_val |= RT5616_I2S_DF_PCM_B; | |
1050 | break; | |
1051 | default: | |
1052 | return -EINVAL; | |
1053 | } | |
1054 | ||
01f8902f | 1055 | snd_soc_component_update_bits(component, RT5616_I2S1_SDP, |
99081589 CW |
1056 | RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK | |
1057 | RT5616_I2S_DF_MASK, reg_val); | |
b1d15059 BL |
1058 | |
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, | |
99081589 | 1063 | int clk_id, unsigned int freq, int dir) |
b1d15059 | 1064 | { |
01f8902f KM |
1065 | struct snd_soc_component *component = dai->component; |
1066 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); | |
b1d15059 BL |
1067 | unsigned int reg_val = 0; |
1068 | ||
1069 | if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src) | |
1070 | return 0; | |
1071 | ||
1072 | switch (clk_id) { | |
1073 | case RT5616_SCLK_S_MCLK: | |
1074 | reg_val |= RT5616_SCLK_SRC_MCLK; | |
1075 | break; | |
1076 | case RT5616_SCLK_S_PLL1: | |
1077 | reg_val |= RT5616_SCLK_SRC_PLL1; | |
1078 | break; | |
1079 | default: | |
01f8902f | 1080 | dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); |
b1d15059 BL |
1081 | return -EINVAL; |
1082 | } | |
99081589 | 1083 | |
01f8902f | 1084 | snd_soc_component_update_bits(component, RT5616_GLB_CLK, |
99081589 | 1085 | RT5616_SCLK_SRC_MASK, reg_val); |
b1d15059 BL |
1086 | rt5616->sysclk = freq; |
1087 | rt5616->sysclk_src = clk_id; | |
1088 | ||
1089 | dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); | |
1090 | ||
1091 | return 0; | |
1092 | } | |
1093 | ||
1094 | static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |
99081589 | 1095 | unsigned int freq_in, unsigned int freq_out) |
b1d15059 | 1096 | { |
01f8902f KM |
1097 | struct snd_soc_component *component = dai->component; |
1098 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); | |
b1d15059 BL |
1099 | struct rl6231_pll_code pll_code; |
1100 | int ret; | |
1101 | ||
1102 | if (source == rt5616->pll_src && freq_in == rt5616->pll_in && | |
1103 | freq_out == rt5616->pll_out) | |
1104 | return 0; | |
1105 | ||
1106 | if (!freq_in || !freq_out) { | |
01f8902f | 1107 | dev_dbg(component->dev, "PLL disabled\n"); |
b1d15059 BL |
1108 | |
1109 | rt5616->pll_in = 0; | |
1110 | rt5616->pll_out = 0; | |
01f8902f | 1111 | snd_soc_component_update_bits(component, RT5616_GLB_CLK, |
99081589 CW |
1112 | RT5616_SCLK_SRC_MASK, |
1113 | RT5616_SCLK_SRC_MCLK); | |
b1d15059 BL |
1114 | return 0; |
1115 | } | |
1116 | ||
1117 | switch (source) { | |
1118 | case RT5616_PLL1_S_MCLK: | |
01f8902f | 1119 | snd_soc_component_update_bits(component, RT5616_GLB_CLK, |
99081589 CW |
1120 | RT5616_PLL1_SRC_MASK, |
1121 | RT5616_PLL1_SRC_MCLK); | |
b1d15059 BL |
1122 | break; |
1123 | case RT5616_PLL1_S_BCLK1: | |
1124 | case RT5616_PLL1_S_BCLK2: | |
01f8902f | 1125 | snd_soc_component_update_bits(component, RT5616_GLB_CLK, |
99081589 CW |
1126 | RT5616_PLL1_SRC_MASK, |
1127 | RT5616_PLL1_SRC_BCLK1); | |
b1d15059 BL |
1128 | break; |
1129 | default: | |
01f8902f | 1130 | dev_err(component->dev, "Unknown PLL source %d\n", source); |
b1d15059 BL |
1131 | return -EINVAL; |
1132 | } | |
1133 | ||
1134 | ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); | |
1135 | if (ret < 0) { | |
a4db95b2 | 1136 | dev_err(component->dev, "Unsupported input clock %d\n", freq_in); |
b1d15059 BL |
1137 | return ret; |
1138 | } | |
1139 | ||
01f8902f | 1140 | dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", |
b1d15059 BL |
1141 | pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), |
1142 | pll_code.n_code, pll_code.k_code); | |
1143 | ||
01f8902f | 1144 | snd_soc_component_write(component, RT5616_PLL_CTRL1, |
99081589 | 1145 | pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code); |
01f8902f | 1146 | snd_soc_component_write(component, RT5616_PLL_CTRL2, |
99081589 CW |
1147 | (pll_code.m_bp ? 0 : pll_code.m_code) << |
1148 | RT5616_PLL_M_SFT | | |
1149 | pll_code.m_bp << RT5616_PLL_M_BP_SFT); | |
b1d15059 BL |
1150 | |
1151 | rt5616->pll_in = freq_in; | |
1152 | rt5616->pll_out = freq_out; | |
1153 | rt5616->pll_src = source; | |
1154 | ||
1155 | return 0; | |
1156 | } | |
1157 | ||
01f8902f | 1158 | static int rt5616_set_bias_level(struct snd_soc_component *component, |
99081589 | 1159 | enum snd_soc_bias_level level) |
b1d15059 | 1160 | { |
01f8902f | 1161 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); |
76d3204e CW |
1162 | int ret; |
1163 | ||
b1d15059 | 1164 | switch (level) { |
76d3204e CW |
1165 | |
1166 | case SND_SOC_BIAS_ON: | |
1167 | break; | |
1168 | ||
1169 | case SND_SOC_BIAS_PREPARE: | |
1170 | /* | |
1171 | * SND_SOC_BIAS_PREPARE is called while preparing for a | |
1172 | * transition to ON or away from ON. If current bias_level | |
1173 | * is SND_SOC_BIAS_ON, then it is preparing for a transition | |
1174 | * away from ON. Disable the clock in that case, otherwise | |
1175 | * enable it. | |
1176 | */ | |
1177 | if (IS_ERR(rt5616->mclk)) | |
1178 | break; | |
1179 | ||
01f8902f | 1180 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) { |
76d3204e CW |
1181 | clk_disable_unprepare(rt5616->mclk); |
1182 | } else { | |
1183 | ret = clk_prepare_enable(rt5616->mclk); | |
1184 | if (ret) | |
1185 | return ret; | |
1186 | } | |
1187 | break; | |
1188 | ||
b1d15059 | 1189 | case SND_SOC_BIAS_STANDBY: |
01f8902f KM |
1190 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
1191 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, | |
99081589 CW |
1192 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1193 | RT5616_PWR_BG | RT5616_PWR_VREF2, | |
1194 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | |
1195 | RT5616_PWR_BG | RT5616_PWR_VREF2); | |
b1d15059 | 1196 | mdelay(10); |
01f8902f | 1197 | snd_soc_component_update_bits(component, RT5616_PWR_ANLG1, |
99081589 CW |
1198 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
1199 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | |
01f8902f | 1200 | snd_soc_component_update_bits(component, RT5616_D_MISC, |
99081589 CW |
1201 | RT5616_D_GATE_EN, |
1202 | RT5616_D_GATE_EN); | |
b1d15059 BL |
1203 | } |
1204 | break; | |
1205 | ||
1206 | case SND_SOC_BIAS_OFF: | |
01f8902f KM |
1207 | snd_soc_component_update_bits(component, RT5616_D_MISC, RT5616_D_GATE_EN, 0); |
1208 | snd_soc_component_write(component, RT5616_PWR_DIG1, 0x0000); | |
1209 | snd_soc_component_write(component, RT5616_PWR_DIG2, 0x0000); | |
1210 | snd_soc_component_write(component, RT5616_PWR_VOL, 0x0000); | |
1211 | snd_soc_component_write(component, RT5616_PWR_MIXER, 0x0000); | |
1212 | snd_soc_component_write(component, RT5616_PWR_ANLG1, 0x0000); | |
1213 | snd_soc_component_write(component, RT5616_PWR_ANLG2, 0x0000); | |
b1d15059 BL |
1214 | break; |
1215 | ||
1216 | default: | |
1217 | break; | |
1218 | } | |
1219 | ||
1220 | return 0; | |
1221 | } | |
1222 | ||
01f8902f | 1223 | static int rt5616_probe(struct snd_soc_component *component) |
b1d15059 | 1224 | { |
01f8902f | 1225 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); |
b1d15059 | 1226 | |
76d3204e | 1227 | /* Check if MCLK provided */ |
01f8902f | 1228 | rt5616->mclk = devm_clk_get(component->dev, "mclk"); |
76d3204e CW |
1229 | if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER) |
1230 | return -EPROBE_DEFER; | |
1231 | ||
01f8902f | 1232 | rt5616->component = component; |
b1d15059 BL |
1233 | |
1234 | return 0; | |
1235 | } | |
1236 | ||
1237 | #ifdef CONFIG_PM | |
01f8902f | 1238 | static int rt5616_suspend(struct snd_soc_component *component) |
b1d15059 | 1239 | { |
01f8902f | 1240 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); |
b1d15059 BL |
1241 | |
1242 | regcache_cache_only(rt5616->regmap, true); | |
1243 | regcache_mark_dirty(rt5616->regmap); | |
1244 | ||
1245 | return 0; | |
1246 | } | |
1247 | ||
01f8902f | 1248 | static int rt5616_resume(struct snd_soc_component *component) |
b1d15059 | 1249 | { |
01f8902f | 1250 | struct rt5616_priv *rt5616 = snd_soc_component_get_drvdata(component); |
b1d15059 BL |
1251 | |
1252 | regcache_cache_only(rt5616->regmap, false); | |
1253 | regcache_sync(rt5616->regmap); | |
1254 | return 0; | |
1255 | } | |
1256 | #else | |
1257 | #define rt5616_suspend NULL | |
1258 | #define rt5616_resume NULL | |
1259 | #endif | |
1260 | ||
4e26ad80 | 1261 | #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000 |
b1d15059 BL |
1262 | #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
1263 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) | |
1264 | ||
eb59d73c | 1265 | static const struct snd_soc_dai_ops rt5616_aif_dai_ops = { |
b1d15059 BL |
1266 | .hw_params = rt5616_hw_params, |
1267 | .set_fmt = rt5616_set_dai_fmt, | |
1268 | .set_sysclk = rt5616_set_dai_sysclk, | |
1269 | .set_pll = rt5616_set_dai_pll, | |
1270 | }; | |
1271 | ||
b74e7a26 | 1272 | static struct snd_soc_dai_driver rt5616_dai[] = { |
b1d15059 BL |
1273 | { |
1274 | .name = "rt5616-aif1", | |
1275 | .id = RT5616_AIF1, | |
1276 | .playback = { | |
1277 | .stream_name = "AIF1 Playback", | |
1278 | .channels_min = 1, | |
1279 | .channels_max = 2, | |
1280 | .rates = RT5616_STEREO_RATES, | |
1281 | .formats = RT5616_FORMATS, | |
1282 | }, | |
1283 | .capture = { | |
1284 | .stream_name = "AIF1 Capture", | |
1285 | .channels_min = 1, | |
1286 | .channels_max = 2, | |
1287 | .rates = RT5616_STEREO_RATES, | |
1288 | .formats = RT5616_FORMATS, | |
1289 | }, | |
1290 | .ops = &rt5616_aif_dai_ops, | |
1291 | }, | |
1292 | }; | |
1293 | ||
01f8902f KM |
1294 | static const struct snd_soc_component_driver soc_component_dev_rt5616 = { |
1295 | .probe = rt5616_probe, | |
1296 | .suspend = rt5616_suspend, | |
1297 | .resume = rt5616_resume, | |
1298 | .set_bias_level = rt5616_set_bias_level, | |
1299 | .controls = rt5616_snd_controls, | |
1300 | .num_controls = ARRAY_SIZE(rt5616_snd_controls), | |
1301 | .dapm_widgets = rt5616_dapm_widgets, | |
1302 | .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets), | |
1303 | .dapm_routes = rt5616_dapm_routes, | |
1304 | .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes), | |
1305 | .use_pmdown_time = 1, | |
1306 | .endianness = 1, | |
1307 | .non_legacy_dai_naming = 1, | |
b1d15059 BL |
1308 | }; |
1309 | ||
1310 | static const struct regmap_config rt5616_regmap = { | |
1311 | .reg_bits = 8, | |
1312 | .val_bits = 16, | |
1c96a2f6 DF |
1313 | .use_single_read = true, |
1314 | .use_single_write = true, | |
b1d15059 BL |
1315 | .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) * |
1316 | RT5616_PR_SPACING), | |
1317 | .volatile_reg = rt5616_volatile_register, | |
1318 | .readable_reg = rt5616_readable_register, | |
1319 | .cache_type = REGCACHE_RBTREE, | |
1320 | .reg_defaults = rt5616_reg, | |
1321 | .num_reg_defaults = ARRAY_SIZE(rt5616_reg), | |
1322 | .ranges = rt5616_ranges, | |
1323 | .num_ranges = ARRAY_SIZE(rt5616_ranges), | |
1324 | }; | |
1325 | ||
1326 | static const struct i2c_device_id rt5616_i2c_id[] = { | |
1327 | { "rt5616", 0 }, | |
1328 | { } | |
1329 | }; | |
1330 | MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id); | |
1331 | ||
e17ff2de CW |
1332 | #if defined(CONFIG_OF) |
1333 | static const struct of_device_id rt5616_of_match[] = { | |
1334 | { .compatible = "realtek,rt5616", }, | |
1335 | {}, | |
1336 | }; | |
1337 | MODULE_DEVICE_TABLE(of, rt5616_of_match); | |
1338 | #endif | |
1339 | ||
b1d15059 | 1340 | static int rt5616_i2c_probe(struct i2c_client *i2c, |
99081589 | 1341 | const struct i2c_device_id *id) |
b1d15059 BL |
1342 | { |
1343 | struct rt5616_priv *rt5616; | |
1344 | unsigned int val; | |
1345 | int ret; | |
1346 | ||
1347 | rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv), | |
99081589 CW |
1348 | GFP_KERNEL); |
1349 | if (!rt5616) | |
b1d15059 BL |
1350 | return -ENOMEM; |
1351 | ||
1352 | i2c_set_clientdata(i2c, rt5616); | |
1353 | ||
1354 | rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap); | |
1355 | if (IS_ERR(rt5616->regmap)) { | |
1356 | ret = PTR_ERR(rt5616->regmap); | |
1357 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", | |
1358 | ret); | |
1359 | return ret; | |
1360 | } | |
1361 | ||
1362 | regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val); | |
1363 | if (val != 0x6281) { | |
1364 | dev_err(&i2c->dev, | |
1365 | "Device with ID register %#x is not rt5616\n", | |
1366 | val); | |
36ddd489 | 1367 | return -ENODEV; |
b1d15059 BL |
1368 | } |
1369 | regmap_write(rt5616->regmap, RT5616_RESET, 0); | |
1370 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | |
99081589 CW |
1371 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1372 | RT5616_PWR_BG | RT5616_PWR_VREF2, | |
1373 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | |
1374 | RT5616_PWR_BG | RT5616_PWR_VREF2); | |
b1d15059 BL |
1375 | mdelay(10); |
1376 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | |
99081589 CW |
1377 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
1378 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | |
b1d15059 BL |
1379 | |
1380 | ret = regmap_register_patch(rt5616->regmap, init_list, | |
1381 | ARRAY_SIZE(init_list)); | |
1382 | if (ret != 0) | |
1383 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); | |
1384 | ||
1385 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | |
99081589 | 1386 | RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V); |
b1d15059 | 1387 | |
01f8902f KM |
1388 | return devm_snd_soc_register_component(&i2c->dev, |
1389 | &soc_component_dev_rt5616, | |
99081589 | 1390 | rt5616_dai, ARRAY_SIZE(rt5616_dai)); |
b1d15059 BL |
1391 | } |
1392 | ||
1393 | static int rt5616_i2c_remove(struct i2c_client *i2c) | |
1394 | { | |
b1d15059 BL |
1395 | return 0; |
1396 | } | |
1397 | ||
1398 | static void rt5616_i2c_shutdown(struct i2c_client *client) | |
1399 | { | |
1400 | struct rt5616_priv *rt5616 = i2c_get_clientdata(client); | |
1401 | ||
1402 | regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8); | |
1403 | regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8); | |
b1d15059 BL |
1404 | } |
1405 | ||
1406 | static struct i2c_driver rt5616_i2c_driver = { | |
1407 | .driver = { | |
1408 | .name = "rt5616", | |
e17ff2de | 1409 | .of_match_table = of_match_ptr(rt5616_of_match), |
b1d15059 BL |
1410 | }, |
1411 | .probe = rt5616_i2c_probe, | |
1412 | .remove = rt5616_i2c_remove, | |
1413 | .shutdown = rt5616_i2c_shutdown, | |
1414 | .id_table = rt5616_i2c_id, | |
1415 | }; | |
1416 | module_i2c_driver(rt5616_i2c_driver); | |
1417 | ||
1418 | MODULE_DESCRIPTION("ASoC RT5616 driver"); | |
1419 | MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); | |
1420 | MODULE_LICENSE("GPL"); |