Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
6eebf35b OC |
2 | /* |
3 | * rt5514-spi.c -- RT5514 SPI driver | |
4 | * | |
5 | * Copyright 2015 Realtek Semiconductor Corp. | |
6 | * Author: Oder Chiou <oder_chiou@realtek.com> | |
6eebf35b OC |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/input.h> | |
11 | #include <linux/spi/spi.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/irq.h> | |
17 | #include <linux/slab.h> | |
6eebf35b | 18 | #include <linux/sched.h> |
6eebf35b | 19 | #include <linux/uaccess.h> |
6eebf35b OC |
20 | #include <linux/regulator/consumer.h> |
21 | #include <linux/pm_qos.h> | |
22 | #include <linux/sysfs.h> | |
23 | #include <linux/clk.h> | |
24 | #include <sound/core.h> | |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
28 | #include <sound/soc-dapm.h> | |
29 | #include <sound/initval.h> | |
30 | #include <sound/tlv.h> | |
31 | ||
32 | #include "rt5514-spi.h" | |
33 | ||
9fe3b2ba KM |
34 | #define DRV_NAME "rt5514-spi" |
35 | ||
6eebf35b OC |
36 | static struct spi_device *rt5514_spi; |
37 | ||
38 | struct rt5514_dsp { | |
39 | struct device *dev; | |
40 | struct delayed_work copy_work; | |
41 | struct mutex dma_lock; | |
42 | struct snd_pcm_substream *substream; | |
43 | unsigned int buf_base, buf_limit, buf_rp; | |
173f4612 | 44 | size_t buf_size, get_size, dma_offset; |
6eebf35b OC |
45 | }; |
46 | ||
47 | static const struct snd_pcm_hardware rt5514_spi_pcm_hardware = { | |
48 | .info = SNDRV_PCM_INFO_MMAP | | |
49 | SNDRV_PCM_INFO_MMAP_VALID | | |
50 | SNDRV_PCM_INFO_INTERLEAVED, | |
51 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
52 | .period_bytes_min = PAGE_SIZE, | |
53 | .period_bytes_max = 0x20000 / 8, | |
54 | .periods_min = 8, | |
55 | .periods_max = 8, | |
56 | .channels_min = 1, | |
57 | .channels_max = 1, | |
58 | .buffer_bytes_max = 0x20000, | |
59 | }; | |
60 | ||
61 | static struct snd_soc_dai_driver rt5514_spi_dai = { | |
62 | .name = "rt5514-dsp-cpu-dai", | |
63 | .id = 0, | |
64 | .capture = { | |
65 | .stream_name = "DSP Capture", | |
66 | .channels_min = 1, | |
67 | .channels_max = 1, | |
68 | .rates = SNDRV_PCM_RATE_16000, | |
69 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
70 | }, | |
71 | }; | |
72 | ||
73 | static void rt5514_spi_copy_work(struct work_struct *work) | |
74 | { | |
75 | struct rt5514_dsp *rt5514_dsp = | |
76 | container_of(work, struct rt5514_dsp, copy_work.work); | |
b63d4d13 | 77 | struct snd_pcm_runtime *runtime; |
6eebf35b | 78 | size_t period_bytes, truncated_bytes = 0; |
173f4612 | 79 | unsigned int cur_wp, remain_data; |
80 | u8 buf[8]; | |
6eebf35b OC |
81 | |
82 | mutex_lock(&rt5514_dsp->dma_lock); | |
83 | if (!rt5514_dsp->substream) { | |
84 | dev_err(rt5514_dsp->dev, "No pcm substream\n"); | |
85 | goto done; | |
86 | } | |
87 | ||
b63d4d13 | 88 | runtime = rt5514_dsp->substream->runtime; |
6eebf35b | 89 | period_bytes = snd_pcm_lib_period_bytes(rt5514_dsp->substream); |
fbb673f7 OC |
90 | if (!period_bytes) { |
91 | schedule_delayed_work(&rt5514_dsp->copy_work, 5); | |
92 | goto done; | |
93 | } | |
94 | ||
95 | if (rt5514_dsp->buf_size % period_bytes) | |
96 | rt5514_dsp->buf_size = (rt5514_dsp->buf_size / period_bytes) * | |
97 | period_bytes; | |
6eebf35b | 98 | |
173f4612 | 99 | if (rt5514_dsp->get_size >= rt5514_dsp->buf_size) { |
100 | rt5514_spi_burst_read(RT5514_BUFFER_VOICE_WP, (u8 *)&buf, | |
101 | sizeof(buf)); | |
102 | cur_wp = buf[0] | buf[1] << 8 | buf[2] << 16 | | |
103 | buf[3] << 24; | |
104 | ||
105 | if (cur_wp >= rt5514_dsp->buf_rp) | |
106 | remain_data = (cur_wp - rt5514_dsp->buf_rp); | |
107 | else | |
108 | remain_data = | |
109 | (rt5514_dsp->buf_limit - rt5514_dsp->buf_rp) + | |
110 | (cur_wp - rt5514_dsp->buf_base); | |
111 | ||
112 | if (remain_data < period_bytes) { | |
113 | schedule_delayed_work(&rt5514_dsp->copy_work, 5); | |
114 | goto done; | |
115 | } | |
116 | } | |
6eebf35b OC |
117 | |
118 | if (rt5514_dsp->buf_rp + period_bytes <= rt5514_dsp->buf_limit) { | |
119 | rt5514_spi_burst_read(rt5514_dsp->buf_rp, | |
120 | runtime->dma_area + rt5514_dsp->dma_offset, | |
121 | period_bytes); | |
122 | ||
123 | if (rt5514_dsp->buf_rp + period_bytes == rt5514_dsp->buf_limit) | |
124 | rt5514_dsp->buf_rp = rt5514_dsp->buf_base; | |
125 | else | |
126 | rt5514_dsp->buf_rp += period_bytes; | |
127 | } else { | |
128 | truncated_bytes = rt5514_dsp->buf_limit - rt5514_dsp->buf_rp; | |
129 | rt5514_spi_burst_read(rt5514_dsp->buf_rp, | |
130 | runtime->dma_area + rt5514_dsp->dma_offset, | |
131 | truncated_bytes); | |
132 | ||
133 | rt5514_spi_burst_read(rt5514_dsp->buf_base, | |
134 | runtime->dma_area + rt5514_dsp->dma_offset + | |
135 | truncated_bytes, period_bytes - truncated_bytes); | |
136 | ||
173f4612 | 137 | rt5514_dsp->buf_rp = rt5514_dsp->buf_base + period_bytes - |
138 | truncated_bytes; | |
6eebf35b OC |
139 | } |
140 | ||
173f4612 | 141 | rt5514_dsp->get_size += period_bytes; |
6eebf35b OC |
142 | rt5514_dsp->dma_offset += period_bytes; |
143 | if (rt5514_dsp->dma_offset >= runtime->dma_bytes) | |
144 | rt5514_dsp->dma_offset = 0; | |
145 | ||
6eebf35b OC |
146 | snd_pcm_period_elapsed(rt5514_dsp->substream); |
147 | ||
173f4612 | 148 | schedule_delayed_work(&rt5514_dsp->copy_work, 5); |
149 | ||
6eebf35b OC |
150 | done: |
151 | mutex_unlock(&rt5514_dsp->dma_lock); | |
152 | } | |
153 | ||
659178f5 | 154 | static void rt5514_schedule_copy(struct rt5514_dsp *rt5514_dsp) |
173f4612 | 155 | { |
173f4612 | 156 | u8 buf[8]; |
157 | ||
c4a71ff7 OC |
158 | if (!rt5514_dsp->substream) |
159 | return; | |
160 | ||
173f4612 | 161 | rt5514_dsp->get_size = 0; |
173f4612 | 162 | |
163 | /** | |
164 | * The address area x1800XXXX is the register address, and it cannot | |
165 | * support spi burst read perfectly. So we use the spi burst read | |
166 | * individually to make sure the data correctly. | |
167 | */ | |
168 | rt5514_spi_burst_read(RT5514_BUFFER_VOICE_BASE, (u8 *)&buf, | |
169 | sizeof(buf)); | |
170 | rt5514_dsp->buf_base = buf[0] | buf[1] << 8 | buf[2] << 16 | | |
171 | buf[3] << 24; | |
172 | ||
173 | rt5514_spi_burst_read(RT5514_BUFFER_VOICE_LIMIT, (u8 *)&buf, | |
174 | sizeof(buf)); | |
175 | rt5514_dsp->buf_limit = buf[0] | buf[1] << 8 | buf[2] << 16 | | |
176 | buf[3] << 24; | |
177 | ||
178 | rt5514_spi_burst_read(RT5514_BUFFER_VOICE_WP, (u8 *)&buf, | |
179 | sizeof(buf)); | |
180 | rt5514_dsp->buf_rp = buf[0] | buf[1] << 8 | buf[2] << 16 | | |
181 | buf[3] << 24; | |
182 | ||
818010da | 183 | if (rt5514_dsp->buf_rp % 8) |
184 | rt5514_dsp->buf_rp = (rt5514_dsp->buf_rp / 8) * 8; | |
185 | ||
173f4612 | 186 | rt5514_dsp->buf_size = rt5514_dsp->buf_limit - rt5514_dsp->buf_base; |
187 | ||
818010da | 188 | if (rt5514_dsp->buf_base && rt5514_dsp->buf_limit && |
189 | rt5514_dsp->buf_rp && rt5514_dsp->buf_size) | |
190 | schedule_delayed_work(&rt5514_dsp->copy_work, 0); | |
659178f5 HYC |
191 | } |
192 | ||
193 | static irqreturn_t rt5514_spi_irq(int irq, void *data) | |
194 | { | |
195 | struct rt5514_dsp *rt5514_dsp = data; | |
196 | ||
197 | rt5514_schedule_copy(rt5514_dsp); | |
173f4612 | 198 | |
199 | return IRQ_HANDLED; | |
200 | } | |
201 | ||
6eebf35b | 202 | /* PCM for streaming audio from the DSP buffer */ |
85efbc91 KM |
203 | static int rt5514_spi_pcm_open(struct snd_soc_component *component, |
204 | struct snd_pcm_substream *substream) | |
6eebf35b OC |
205 | { |
206 | snd_soc_set_runtime_hwparams(substream, &rt5514_spi_pcm_hardware); | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
85efbc91 KM |
211 | static int rt5514_spi_hw_params(struct snd_soc_component *component, |
212 | struct snd_pcm_substream *substream, | |
213 | struct snd_pcm_hw_params *hw_params) | |
6eebf35b | 214 | { |
6eebf35b | 215 | struct rt5514_dsp *rt5514_dsp = |
9fe3b2ba | 216 | snd_soc_component_get_drvdata(component); |
659178f5 | 217 | u8 buf[8]; |
6eebf35b OC |
218 | |
219 | mutex_lock(&rt5514_dsp->dma_lock); | |
6eebf35b | 220 | rt5514_dsp->substream = substream; |
b56bff43 | 221 | rt5514_dsp->dma_offset = 0; |
659178f5 HYC |
222 | |
223 | /* Read IRQ status and schedule copy accordingly. */ | |
224 | rt5514_spi_burst_read(RT5514_IRQ_CTRL, (u8 *)&buf, sizeof(buf)); | |
225 | if (buf[0] & RT5514_IRQ_STATUS_BIT) | |
226 | rt5514_schedule_copy(rt5514_dsp); | |
227 | ||
6eebf35b OC |
228 | mutex_unlock(&rt5514_dsp->dma_lock); |
229 | ||
cae8055e | 230 | return 0; |
6eebf35b OC |
231 | } |
232 | ||
85efbc91 KM |
233 | static int rt5514_spi_hw_free(struct snd_soc_component *component, |
234 | struct snd_pcm_substream *substream) | |
6eebf35b | 235 | { |
6eebf35b | 236 | struct rt5514_dsp *rt5514_dsp = |
9fe3b2ba | 237 | snd_soc_component_get_drvdata(component); |
6eebf35b OC |
238 | |
239 | mutex_lock(&rt5514_dsp->dma_lock); | |
240 | rt5514_dsp->substream = NULL; | |
241 | mutex_unlock(&rt5514_dsp->dma_lock); | |
242 | ||
243 | cancel_delayed_work_sync(&rt5514_dsp->copy_work); | |
244 | ||
cae8055e | 245 | return 0; |
6eebf35b OC |
246 | } |
247 | ||
6eebf35b | 248 | static snd_pcm_uframes_t rt5514_spi_pcm_pointer( |
85efbc91 | 249 | struct snd_soc_component *component, |
6eebf35b OC |
250 | struct snd_pcm_substream *substream) |
251 | { | |
252 | struct snd_pcm_runtime *runtime = substream->runtime; | |
6eebf35b | 253 | struct rt5514_dsp *rt5514_dsp = |
9fe3b2ba | 254 | snd_soc_component_get_drvdata(component); |
6eebf35b OC |
255 | |
256 | return bytes_to_frames(runtime, rt5514_dsp->dma_offset); | |
257 | } | |
258 | ||
6eebf35b | 259 | |
9fe3b2ba | 260 | static int rt5514_spi_pcm_probe(struct snd_soc_component *component) |
6eebf35b OC |
261 | { |
262 | struct rt5514_dsp *rt5514_dsp; | |
173f4612 | 263 | int ret; |
6eebf35b | 264 | |
9fe3b2ba | 265 | rt5514_dsp = devm_kzalloc(component->dev, sizeof(*rt5514_dsp), |
6eebf35b | 266 | GFP_KERNEL); |
060d0bf4 GS |
267 | if (!rt5514_dsp) |
268 | return -ENOMEM; | |
6eebf35b OC |
269 | |
270 | rt5514_dsp->dev = &rt5514_spi->dev; | |
271 | mutex_init(&rt5514_dsp->dma_lock); | |
272 | INIT_DELAYED_WORK(&rt5514_dsp->copy_work, rt5514_spi_copy_work); | |
9fe3b2ba | 273 | snd_soc_component_set_drvdata(component, rt5514_dsp); |
6eebf35b | 274 | |
173f4612 | 275 | if (rt5514_spi->irq) { |
276 | ret = devm_request_threaded_irq(&rt5514_spi->dev, | |
277 | rt5514_spi->irq, NULL, rt5514_spi_irq, | |
278 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, "rt5514-spi", | |
279 | rt5514_dsp); | |
280 | if (ret) | |
281 | dev_err(&rt5514_spi->dev, | |
00933c49 | 282 | "%s Failed to request IRQ: %d\n", __func__, |
173f4612 | 283 | ret); |
20220945 BN |
284 | else |
285 | device_init_wakeup(rt5514_dsp->dev, true); | |
173f4612 | 286 | } |
287 | ||
6eebf35b OC |
288 | return 0; |
289 | } | |
290 | ||
26105a6f TI |
291 | static int rt5514_spi_pcm_new(struct snd_soc_component *component, |
292 | struct snd_soc_pcm_runtime *rtd) | |
293 | { | |
cae8055e TI |
294 | snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC, |
295 | NULL, 0, 0); | |
26105a6f TI |
296 | return 0; |
297 | } | |
298 | ||
9fe3b2ba | 299 | static const struct snd_soc_component_driver rt5514_spi_component = { |
392cc13c JM |
300 | .name = DRV_NAME, |
301 | .probe = rt5514_spi_pcm_probe, | |
302 | .open = rt5514_spi_pcm_open, | |
303 | .hw_params = rt5514_spi_hw_params, | |
304 | .hw_free = rt5514_spi_hw_free, | |
305 | .pointer = rt5514_spi_pcm_pointer, | |
306 | .pcm_construct = rt5514_spi_pcm_new, | |
307 | .legacy_dai_naming = 1, | |
6eebf35b OC |
308 | }; |
309 | ||
6eebf35b OC |
310 | /** |
311 | * rt5514_spi_burst_read - Read data from SPI by rt5514 address. | |
312 | * @addr: Start address. | |
313 | * @rxbuf: Data Buffer for reading. | |
314 | * @len: Data length, it must be a multiple of 8. | |
315 | * | |
316 | * | |
317 | * Returns true for success. | |
318 | */ | |
319 | int rt5514_spi_burst_read(unsigned int addr, u8 *rxbuf, size_t len) | |
320 | { | |
321 | u8 spi_cmd = RT5514_SPI_CMD_BURST_READ; | |
322 | int status; | |
323 | u8 write_buf[8]; | |
324 | unsigned int i, end, offset = 0; | |
325 | ||
326 | struct spi_message message; | |
327 | struct spi_transfer x[3]; | |
328 | ||
329 | while (offset < len) { | |
330 | if (offset + RT5514_SPI_BUF_LEN <= len) | |
331 | end = RT5514_SPI_BUF_LEN; | |
332 | else | |
333 | end = len % RT5514_SPI_BUF_LEN; | |
334 | ||
335 | write_buf[0] = spi_cmd; | |
336 | write_buf[1] = ((addr + offset) & 0xff000000) >> 24; | |
337 | write_buf[2] = ((addr + offset) & 0x00ff0000) >> 16; | |
338 | write_buf[3] = ((addr + offset) & 0x0000ff00) >> 8; | |
339 | write_buf[4] = ((addr + offset) & 0x000000ff) >> 0; | |
340 | ||
341 | spi_message_init(&message); | |
342 | memset(x, 0, sizeof(x)); | |
343 | ||
344 | x[0].len = 5; | |
345 | x[0].tx_buf = write_buf; | |
346 | spi_message_add_tail(&x[0], &message); | |
347 | ||
348 | x[1].len = 4; | |
349 | x[1].tx_buf = write_buf; | |
350 | spi_message_add_tail(&x[1], &message); | |
351 | ||
352 | x[2].len = end; | |
353 | x[2].rx_buf = rxbuf + offset; | |
354 | spi_message_add_tail(&x[2], &message); | |
355 | ||
356 | status = spi_sync(rt5514_spi, &message); | |
357 | ||
358 | if (status) | |
359 | return false; | |
360 | ||
361 | offset += RT5514_SPI_BUF_LEN; | |
362 | } | |
363 | ||
364 | for (i = 0; i < len; i += 8) { | |
365 | write_buf[0] = rxbuf[i + 0]; | |
366 | write_buf[1] = rxbuf[i + 1]; | |
367 | write_buf[2] = rxbuf[i + 2]; | |
368 | write_buf[3] = rxbuf[i + 3]; | |
369 | write_buf[4] = rxbuf[i + 4]; | |
370 | write_buf[5] = rxbuf[i + 5]; | |
371 | write_buf[6] = rxbuf[i + 6]; | |
372 | write_buf[7] = rxbuf[i + 7]; | |
373 | ||
374 | rxbuf[i + 0] = write_buf[7]; | |
375 | rxbuf[i + 1] = write_buf[6]; | |
376 | rxbuf[i + 2] = write_buf[5]; | |
377 | rxbuf[i + 3] = write_buf[4]; | |
378 | rxbuf[i + 4] = write_buf[3]; | |
379 | rxbuf[i + 5] = write_buf[2]; | |
380 | rxbuf[i + 6] = write_buf[1]; | |
381 | rxbuf[i + 7] = write_buf[0]; | |
382 | } | |
383 | ||
384 | return true; | |
385 | } | |
fc9cab05 | 386 | EXPORT_SYMBOL_GPL(rt5514_spi_burst_read); |
6eebf35b OC |
387 | |
388 | /** | |
389 | * rt5514_spi_burst_write - Write data to SPI by rt5514 address. | |
390 | * @addr: Start address. | |
391 | * @txbuf: Data Buffer for writng. | |
392 | * @len: Data length, it must be a multiple of 8. | |
393 | * | |
394 | * | |
395 | * Returns true for success. | |
396 | */ | |
397 | int rt5514_spi_burst_write(u32 addr, const u8 *txbuf, size_t len) | |
398 | { | |
399 | u8 spi_cmd = RT5514_SPI_CMD_BURST_WRITE; | |
400 | u8 *write_buf; | |
401 | unsigned int i, end, offset = 0; | |
402 | ||
403 | write_buf = kmalloc(RT5514_SPI_BUF_LEN + 6, GFP_KERNEL); | |
404 | ||
405 | if (write_buf == NULL) | |
406 | return -ENOMEM; | |
407 | ||
408 | while (offset < len) { | |
409 | if (offset + RT5514_SPI_BUF_LEN <= len) | |
410 | end = RT5514_SPI_BUF_LEN; | |
411 | else | |
412 | end = len % RT5514_SPI_BUF_LEN; | |
413 | ||
414 | write_buf[0] = spi_cmd; | |
415 | write_buf[1] = ((addr + offset) & 0xff000000) >> 24; | |
416 | write_buf[2] = ((addr + offset) & 0x00ff0000) >> 16; | |
417 | write_buf[3] = ((addr + offset) & 0x0000ff00) >> 8; | |
418 | write_buf[4] = ((addr + offset) & 0x000000ff) >> 0; | |
419 | ||
420 | for (i = 0; i < end; i += 8) { | |
421 | write_buf[i + 12] = txbuf[offset + i + 0]; | |
422 | write_buf[i + 11] = txbuf[offset + i + 1]; | |
423 | write_buf[i + 10] = txbuf[offset + i + 2]; | |
424 | write_buf[i + 9] = txbuf[offset + i + 3]; | |
425 | write_buf[i + 8] = txbuf[offset + i + 4]; | |
426 | write_buf[i + 7] = txbuf[offset + i + 5]; | |
427 | write_buf[i + 6] = txbuf[offset + i + 6]; | |
428 | write_buf[i + 5] = txbuf[offset + i + 7]; | |
429 | } | |
430 | ||
431 | write_buf[end + 5] = spi_cmd; | |
432 | ||
433 | spi_write(rt5514_spi, write_buf, end + 6); | |
434 | ||
435 | offset += RT5514_SPI_BUF_LEN; | |
436 | } | |
437 | ||
438 | kfree(write_buf); | |
439 | ||
440 | return 0; | |
441 | } | |
442 | EXPORT_SYMBOL_GPL(rt5514_spi_burst_write); | |
443 | ||
444 | static int rt5514_spi_probe(struct spi_device *spi) | |
445 | { | |
446 | int ret; | |
447 | ||
448 | rt5514_spi = spi; | |
449 | ||
e9802c57 | 450 | ret = devm_snd_soc_register_component(&spi->dev, |
9fe3b2ba | 451 | &rt5514_spi_component, |
e9802c57 | 452 | &rt5514_spi_dai, 1); |
6eebf35b OC |
453 | if (ret < 0) { |
454 | dev_err(&spi->dev, "Failed to register component.\n"); | |
e9802c57 | 455 | return ret; |
6eebf35b OC |
456 | } |
457 | ||
58f1c07d | 458 | return 0; |
459 | } | |
460 | ||
7e6358ec | 461 | static int __maybe_unused rt5514_suspend(struct device *dev) |
58f1c07d | 462 | { |
463 | int irq = to_spi_device(dev)->irq; | |
464 | ||
465 | if (device_may_wakeup(dev)) | |
466 | enable_irq_wake(irq); | |
467 | ||
6eebf35b OC |
468 | return 0; |
469 | } | |
470 | ||
7e6358ec | 471 | static int __maybe_unused rt5514_resume(struct device *dev) |
58f1c07d | 472 | { |
7f80e137 | 473 | struct rt5514_dsp *rt5514_dsp = dev_get_drvdata(dev); |
58f1c07d | 474 | int irq = to_spi_device(dev)->irq; |
e9c50aa6 | 475 | u8 buf[8]; |
58f1c07d | 476 | |
477 | if (device_may_wakeup(dev)) | |
478 | disable_irq_wake(irq); | |
479 | ||
346cccf8 | 480 | if (rt5514_dsp) { |
481 | if (rt5514_dsp->substream) { | |
482 | rt5514_spi_burst_read(RT5514_IRQ_CTRL, (u8 *)&buf, | |
483 | sizeof(buf)); | |
484 | if (buf[0] & RT5514_IRQ_STATUS_BIT) | |
485 | rt5514_schedule_copy(rt5514_dsp); | |
486 | } | |
e9c50aa6 | 487 | } |
488 | ||
58f1c07d | 489 | return 0; |
490 | } | |
491 | ||
492 | static const struct dev_pm_ops rt5514_pm_ops = { | |
493 | SET_SYSTEM_SLEEP_PM_OPS(rt5514_suspend, rt5514_resume) | |
494 | }; | |
495 | ||
6eebf35b OC |
496 | static const struct of_device_id rt5514_of_match[] = { |
497 | { .compatible = "realtek,rt5514", }, | |
498 | {}, | |
499 | }; | |
500 | MODULE_DEVICE_TABLE(of, rt5514_of_match); | |
501 | ||
502 | static struct spi_driver rt5514_spi_driver = { | |
503 | .driver = { | |
504 | .name = "rt5514", | |
58f1c07d | 505 | .pm = &rt5514_pm_ops, |
6eebf35b OC |
506 | .of_match_table = of_match_ptr(rt5514_of_match), |
507 | }, | |
508 | .probe = rt5514_spi_probe, | |
6eebf35b OC |
509 | }; |
510 | module_spi_driver(rt5514_spi_driver); | |
511 | ||
512 | MODULE_DESCRIPTION("RT5514 SPI driver"); | |
513 | MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); | |
514 | MODULE_LICENSE("GPL v2"); |