projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 4d50934a AT |
1 | /* |
| 2 | * da7218.h - DA7218 ALSA SoC Codec Driver | |
| 3 | * | |
| 4 | * Copyright (c) 2015 Dialog Semiconductor | |
| 5 | * | |
| 6 | * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify it | |
| 9 | * under the terms of the GNU General Public License as published by the | |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 11 | * option) any later version. | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef _DA7218_H | |
| 15 | #define _DA7218_H | |
| 16 | ||
| 17 | #include <linux/regmap.h> | |
| 18 | #include <linux/regulator/consumer.h> | |
| 19 | #include <sound/da7218.h> | |
| 20 | ||
| 21 | ||
| 22 | /* | |
| 23 | * Registers | |
| 24 | */ | |
| 25 | #define DA7218_SYSTEM_ACTIVE 0x0 | |
| 26 | #define DA7218_CIF_CTRL 0x1 | |
| 27 | #define DA7218_CHIP_ID1 0x4 | |
| 28 | #define DA7218_CHIP_ID2 0x5 | |
| 29 | #define DA7218_CHIP_REVISION 0x6 | |
| 30 | #define DA7218_SPARE1 0x7 | |
| 31 | #define DA7218_STATUS1 0x8 | |
| 32 | #define DA7218_SOFT_RESET 0x9 | |
| 33 | #define DA7218_SR 0xB | |
| 34 | #define DA7218_PC_COUNT 0xC | |
| 35 | #define DA7218_GAIN_RAMP_CTRL 0xD | |
| 36 | #define DA7218_CIF_TIMEOUT_CTRL 0x10 | |
| 37 | #define DA7218_SYSTEM_MODES_INPUT 0x14 | |
| 38 | #define DA7218_SYSTEM_MODES_OUTPUT 0x15 | |
| 39 | #define DA7218_SYSTEM_STATUS 0x16 | |
| 40 | #define DA7218_IN_1L_FILTER_CTRL 0x18 | |
| 41 | #define DA7218_IN_1R_FILTER_CTRL 0x19 | |
| 42 | #define DA7218_IN_2L_FILTER_CTRL 0x1A | |
| 43 | #define DA7218_IN_2R_FILTER_CTRL 0x1B | |
| 44 | #define DA7218_OUT_1L_FILTER_CTRL 0x20 | |
| 45 | #define DA7218_OUT_1R_FILTER_CTRL 0x21 | |
| 46 | #define DA7218_OUT_1_HPF_FILTER_CTRL 0x24 | |
| 47 | #define DA7218_OUT_1_EQ_12_FILTER_CTRL 0x25 | |
| 48 | #define DA7218_OUT_1_EQ_34_FILTER_CTRL 0x26 | |
| 49 | #define DA7218_OUT_1_EQ_5_FILTER_CTRL 0x27 | |
| 50 | #define DA7218_OUT_1_BIQ_5STAGE_CTRL 0x28 | |
| 51 | #define DA7218_OUT_1_BIQ_5STAGE_DATA 0x29 | |
| 52 | #define DA7218_OUT_1_BIQ_5STAGE_ADDR 0x2A | |
| 53 | #define DA7218_MIXIN_1_CTRL 0x2C | |
| 54 | #define DA7218_MIXIN_1_GAIN 0x2D | |
| 55 | #define DA7218_MIXIN_2_CTRL 0x2E | |
| 56 | #define DA7218_MIXIN_2_GAIN 0x2F | |
| 57 | #define DA7218_ALC_CTRL1 0x30 | |
| 58 | #define DA7218_ALC_CTRL2 0x31 | |
| 59 | #define DA7218_ALC_CTRL3 0x32 | |
| 60 | #define DA7218_ALC_NOISE 0x33 | |
| 61 | #define DA7218_ALC_TARGET_MIN 0x34 | |
| 62 | #define DA7218_ALC_TARGET_MAX 0x35 | |
| 63 | #define DA7218_ALC_GAIN_LIMITS 0x36 | |
| 64 | #define DA7218_ALC_ANA_GAIN_LIMITS 0x37 | |
| 65 | #define DA7218_ALC_ANTICLIP_CTRL 0x38 | |
| 66 | #define DA7218_AGS_ENABLE 0x3C | |
| 67 | #define DA7218_AGS_TRIGGER 0x3D | |
| 68 | #define DA7218_AGS_ATT_MAX 0x3E | |
| 69 | #define DA7218_AGS_TIMEOUT 0x3F | |
| 70 | #define DA7218_AGS_ANTICLIP_CTRL 0x40 | |
| 71 | #define DA7218_CALIB_CTRL 0x44 | |
| 72 | #define DA7218_CALIB_OFFSET_AUTO_M_1 0x45 | |
| 73 | #define DA7218_CALIB_OFFSET_AUTO_U_1 0x46 | |
| 74 | #define DA7218_CALIB_OFFSET_AUTO_M_2 0x47 | |
| 75 | #define DA7218_CALIB_OFFSET_AUTO_U_2 0x48 | |
| 76 | #define DA7218_ENV_TRACK_CTRL 0x4C | |
| 77 | #define DA7218_LVL_DET_CTRL 0x50 | |
| 78 | #define DA7218_LVL_DET_LEVEL 0x51 | |
| 79 | #define DA7218_DGS_TRIGGER 0x54 | |
| 80 | #define DA7218_DGS_ENABLE 0x55 | |
| 81 | #define DA7218_DGS_RISE_FALL 0x56 | |
| 82 | #define DA7218_DGS_SYNC_DELAY 0x57 | |
| 83 | #define DA7218_DGS_SYNC_DELAY2 0x58 | |
| 84 | #define DA7218_DGS_SYNC_DELAY3 0x59 | |
| 85 | #define DA7218_DGS_LEVELS 0x5A | |
| 86 | #define DA7218_DGS_GAIN_CTRL 0x5B | |
| 87 | #define DA7218_DROUTING_OUTDAI_1L 0x5C | |
| 88 | #define DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN 0x5D | |
| 89 | #define DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN 0x5E | |
| 90 | #define DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN 0x5F | |
| 91 | #define DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN 0x60 | |
| 92 | #define DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN 0x61 | |
| 93 | #define DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN 0x62 | |
| 94 | #define DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN 0x63 | |
| 95 | #define DA7218_DROUTING_OUTDAI_1R 0x64 | |
| 96 | #define DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN 0x65 | |
| 97 | #define DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN 0x66 | |
| 98 | #define DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN 0x67 | |
| 99 | #define DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN 0x68 | |
| 100 | #define DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN 0x69 | |
| 101 | #define DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN 0x6A | |
| 102 | #define DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN 0x6B | |
| 103 | #define DA7218_DROUTING_OUTFILT_1L 0x6C | |
| 104 | #define DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN 0x6D | |
| 105 | #define DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN 0x6E | |
| 106 | #define DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN 0x6F | |
| 107 | #define DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN 0x70 | |
| 108 | #define DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN 0x71 | |
| 109 | #define DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN 0x72 | |
| 110 | #define DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN 0x73 | |
| 111 | #define DA7218_DROUTING_OUTFILT_1R 0x74 | |
| 112 | #define DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN 0x75 | |
| 113 | #define DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN 0x76 | |
| 114 | #define DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN 0x77 | |
| 115 | #define DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN 0x78 | |
| 116 | #define DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN 0x79 | |
| 117 | #define DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN 0x7A | |
| 118 | #define DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN 0x7B | |
| 119 | #define DA7218_DROUTING_OUTDAI_2L 0x7C | |
| 120 | #define DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN 0x7D | |
| 121 | #define DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN 0x7E | |
| 122 | #define DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN 0x7F | |
| 123 | #define DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN 0x80 | |
| 124 | #define DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN 0x81 | |
| 125 | #define DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN 0x82 | |
| 126 | #define DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN 0x83 | |
| 127 | #define DA7218_DROUTING_OUTDAI_2R 0x84 | |
| 128 | #define DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN 0x85 | |
| 129 | #define DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN 0x86 | |
| 130 | #define DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN 0x87 | |
| 131 | #define DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN 0x88 | |
| 132 | #define DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN 0x89 | |
| 133 | #define DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN 0x8A | |
| 134 | #define DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN 0x8B | |
| 135 | #define DA7218_DAI_CTRL 0x8C | |
| 136 | #define DA7218_DAI_TDM_CTRL 0x8D | |
| 137 | #define DA7218_DAI_OFFSET_LOWER 0x8E | |
| 138 | #define DA7218_DAI_OFFSET_UPPER 0x8F | |
| 139 | #define DA7218_DAI_CLK_MODE 0x90 | |
| 140 | #define DA7218_PLL_CTRL 0x91 | |
| 141 | #define DA7218_PLL_FRAC_TOP 0x92 | |
| 142 | #define DA7218_PLL_FRAC_BOT 0x93 | |
| 143 | #define DA7218_PLL_INTEGER 0x94 | |
| 144 | #define DA7218_PLL_STATUS 0x95 | |
| 145 | #define DA7218_PLL_REFOSC_CAL 0x98 | |
| 146 | #define DA7218_DAC_NG_CTRL 0x9C | |
| 147 | #define DA7218_DAC_NG_SETUP_TIME 0x9D | |
| 148 | #define DA7218_DAC_NG_OFF_THRESH 0x9E | |
| 149 | #define DA7218_DAC_NG_ON_THRESH 0x9F | |
| 150 | #define DA7218_TONE_GEN_CFG1 0xA0 | |
| 151 | #define DA7218_TONE_GEN_CFG2 0xA1 | |
| 152 | #define DA7218_TONE_GEN_FREQ1_L 0xA2 | |
| 153 | #define DA7218_TONE_GEN_FREQ1_U 0xA3 | |
| 154 | #define DA7218_TONE_GEN_FREQ2_L 0xA4 | |
| 155 | #define DA7218_TONE_GEN_FREQ2_U 0xA5 | |
| 156 | #define DA7218_TONE_GEN_CYCLES 0xA6 | |
| 157 | #define DA7218_TONE_GEN_ON_PER 0xA7 | |
| 158 | #define DA7218_TONE_GEN_OFF_PER 0xA8 | |
| 159 | #define DA7218_CP_CTRL 0xAC | |
| 160 | #define DA7218_CP_DELAY 0xAD | |
| 161 | #define DA7218_CP_VOL_THRESHOLD1 0xAE | |
| 162 | #define DA7218_MIC_1_CTRL 0xB4 | |
| 163 | #define DA7218_MIC_1_GAIN 0xB5 | |
| 164 | #define DA7218_MIC_1_SELECT 0xB7 | |
| 165 | #define DA7218_MIC_2_CTRL 0xB8 | |
| 166 | #define DA7218_MIC_2_GAIN 0xB9 | |
| 167 | #define DA7218_MIC_2_SELECT 0xBB | |
| 168 | #define DA7218_IN_1_HPF_FILTER_CTRL 0xBC | |
| 169 | #define DA7218_IN_2_HPF_FILTER_CTRL 0xBD | |
| 170 | #define DA7218_ADC_1_CTRL 0xC0 | |
| 171 | #define DA7218_ADC_2_CTRL 0xC1 | |
| 172 | #define DA7218_ADC_MODE 0xC2 | |
| 173 | #define DA7218_MIXOUT_L_CTRL 0xCC | |
| 174 | #define DA7218_MIXOUT_L_GAIN 0xCD | |
| 175 | #define DA7218_MIXOUT_R_CTRL 0xCE | |
| 176 | #define DA7218_MIXOUT_R_GAIN 0xCF | |
| 177 | #define DA7218_HP_L_CTRL 0xD0 | |
| 178 | #define DA7218_HP_L_GAIN 0xD1 | |
| 179 | #define DA7218_HP_R_CTRL 0xD2 | |
| 180 | #define DA7218_HP_R_GAIN 0xD3 | |
| 181 | #define DA7218_HP_SNGL_CTRL 0xD4 | |
| 182 | #define DA7218_HP_DIFF_CTRL 0xD5 | |
| 183 | #define DA7218_HP_DIFF_UNLOCK 0xD7 | |
| 184 | #define DA7218_HPLDET_JACK 0xD8 | |
| 185 | #define DA7218_HPLDET_CTRL 0xD9 | |
| 186 | #define DA7218_HPLDET_TEST 0xDA | |
| 187 | #define DA7218_REFERENCES 0xDC | |
| 188 | #define DA7218_IO_CTRL 0xE0 | |
| 189 | #define DA7218_LDO_CTRL 0xE1 | |
| 190 | #define DA7218_SIDETONE_CTRL 0xE4 | |
| 191 | #define DA7218_SIDETONE_IN_SELECT 0xE5 | |
| 192 | #define DA7218_SIDETONE_GAIN 0xE6 | |
| 193 | #define DA7218_DROUTING_ST_OUTFILT_1L 0xE8 | |
| 194 | #define DA7218_DROUTING_ST_OUTFILT_1R 0xE9 | |
| 195 | #define DA7218_SIDETONE_BIQ_3STAGE_DATA 0xEA | |
| 196 | #define DA7218_SIDETONE_BIQ_3STAGE_ADDR 0xEB | |
| 197 | #define DA7218_EVENT_STATUS 0xEC | |
| 198 | #define DA7218_EVENT 0xED | |
| 199 | #define DA7218_EVENT_MASK 0xEE | |
| 200 | #define DA7218_DMIC_1_CTRL 0xF0 | |
| 201 | #define DA7218_DMIC_2_CTRL 0xF1 | |
| 202 | #define DA7218_IN_1L_GAIN 0xF4 | |
| 203 | #define DA7218_IN_1R_GAIN 0xF5 | |
| 204 | #define DA7218_IN_2L_GAIN 0xF6 | |
| 205 | #define DA7218_IN_2R_GAIN 0xF7 | |
| 206 | #define DA7218_OUT_1L_GAIN 0xF8 | |
| 207 | #define DA7218_OUT_1R_GAIN 0xF9 | |
| 208 | #define DA7218_MICBIAS_CTRL 0xFC | |
| 209 | #define DA7218_MICBIAS_EN 0xFD | |
| 210 | ||
| 211 | ||
| 212 | /* | |
| 213 | * Bit Fields | |
| 214 | */ | |
| 215 | ||
| 216 | #define DA7218_SWITCH_EN_MAX 0x1 | |
| 217 | ||
| 218 | /* DA7218_SYSTEM_ACTIVE = 0x0 */ | |
| 219 | #define DA7218_SYSTEM_ACTIVE_SHIFT 0 | |
| 220 | #define DA7218_SYSTEM_ACTIVE_MASK (0x1 << 0) | |
| 221 | ||
| 222 | /* DA7218_CIF_CTRL = 0x1 */ | |
| 223 | #define DA7218_CIF_I2C_WRITE_MODE_SHIFT 0 | |
| 224 | #define DA7218_CIF_I2C_WRITE_MODE_MASK (0x1 << 0) | |
| 225 | ||
| 226 | /* DA7218_CHIP_ID1 = 0x4 */ | |
| 227 | #define DA7218_CHIP_ID1_SHIFT 0 | |
| 228 | #define DA7218_CHIP_ID1_MASK (0xFF << 0) | |
| 229 | ||
| 230 | /* DA7218_CHIP_ID2 = 0x5 */ | |
| 231 | #define DA7218_CHIP_ID2_SHIFT 0 | |
| 232 | #define DA7218_CHIP_ID2_MASK (0xFF << 0) | |
| 233 | ||
| 234 | /* DA7218_CHIP_REVISION = 0x6 */ | |
| 235 | #define DA7218_CHIP_MINOR_SHIFT 0 | |
| 236 | #define DA7218_CHIP_MINOR_MASK (0xF << 0) | |
| 237 | #define DA7218_CHIP_MAJOR_SHIFT 4 | |
| 238 | #define DA7218_CHIP_MAJOR_MASK (0xF << 4) | |
| 239 | ||
| 240 | /* DA7218_SPARE1 = 0x7 */ | |
| 241 | #define DA7218_SPARE1_SHIFT 0 | |
| 242 | #define DA7218_SPARE1_MASK (0xFF << 0) | |
| 243 | ||
| 244 | /* DA7218_STATUS1 = 0x8 */ | |
| 245 | #define DA7218_STATUS_SPARE1_SHIFT 0 | |
| 246 | #define DA7218_STATUS_SPARE1_MASK (0xFF << 0) | |
| 247 | ||
| 248 | /* DA7218_SOFT_RESET = 0x9 */ | |
| 249 | #define DA7218_CIF_REG_SOFT_RESET_SHIFT 7 | |
| 250 | #define DA7218_CIF_REG_SOFT_RESET_MASK (0x1 << 7) | |
| 251 | ||
| 252 | /* DA7218_SR = 0xB */ | |
| 253 | #define DA7218_SR_ADC_SHIFT 0 | |
| 254 | #define DA7218_SR_ADC_MASK (0xF << 0) | |
| 255 | #define DA7218_SR_DAC_SHIFT 4 | |
| 256 | #define DA7218_SR_DAC_MASK (0xF << 4) | |
| 257 | #define DA7218_SR_8000 0x01 | |
| 258 | #define DA7218_SR_11025 0x02 | |
| 259 | #define DA7218_SR_12000 0x03 | |
| 260 | #define DA7218_SR_16000 0x05 | |
| 261 | #define DA7218_SR_22050 0x06 | |
| 262 | #define DA7218_SR_24000 0x07 | |
| 263 | #define DA7218_SR_32000 0x09 | |
| 264 | #define DA7218_SR_44100 0x0A | |
| 265 | #define DA7218_SR_48000 0x0B | |
| 266 | #define DA7218_SR_88200 0x0E | |
| 267 | #define DA7218_SR_96000 0x0F | |
| 268 | ||
| 269 | /* DA7218_PC_COUNT = 0xC */ | |
| 270 | #define DA7218_PC_FREERUN_SHIFT 0 | |
| 271 | #define DA7218_PC_FREERUN_MASK (0x1 << 0) | |
| 272 | #define DA7218_PC_RESYNC_AUTO_SHIFT 1 | |
| 273 | #define DA7218_PC_RESYNC_AUTO_MASK (0x1 << 1) | |
| 274 | ||
| 275 | /* DA7218_GAIN_RAMP_CTRL = 0xD */ | |
| 276 | #define DA7218_GAIN_RAMP_RATE_SHIFT 0 | |
| 277 | #define DA7218_GAIN_RAMP_RATE_MASK (0x3 << 0) | |
| 278 | #define DA7218_GAIN_RAMP_RATE_MAX 4 | |
| 279 | ||
| 280 | /* DA7218_CIF_TIMEOUT_CTRL = 0x10 */ | |
| 281 | #define DA7218_I2C_TIMEOUT_EN_SHIFT 0 | |
| 282 | #define DA7218_I2C_TIMEOUT_EN_MASK (0x1 << 0) | |
| 283 | ||
| 284 | /* DA7218_SYSTEM_MODES_INPUT = 0x14 */ | |
| 285 | #define DA7218_MODE_SUBMIT_SHIFT 0 | |
| 286 | #define DA7218_MODE_SUBMIT_MASK (0x1 << 0) | |
| 287 | #define DA7218_ADC_MODE_SHIFT 1 | |
| 288 | #define DA7218_ADC_MODE_MASK (0x7F << 1) | |
| 289 | ||
| 290 | /* DA7218_SYSTEM_MODES_OUTPUT = 0x15 */ | |
| 291 | #define DA7218_MODE_SUBMIT_SHIFT 0 | |
| 292 | #define DA7218_MODE_SUBMIT_MASK (0x1 << 0) | |
| 293 | #define DA7218_DAC_MODE_SHIFT 1 | |
| 294 | #define DA7218_DAC_MODE_MASK (0x7F << 1) | |
| 295 | ||
| 296 | /* DA7218_SYSTEM_STATUS = 0x16 */ | |
| 297 | #define DA7218_SC1_BUSY_SHIFT 0 | |
| 298 | #define DA7218_SC1_BUSY_MASK (0x1 << 0) | |
| 299 | #define DA7218_SC2_BUSY_SHIFT 1 | |
| 300 | #define DA7218_SC2_BUSY_MASK (0x1 << 1) | |
| 301 | ||
| 302 | /* DA7218_IN_1L_FILTER_CTRL = 0x18 */ | |
| 303 | #define DA7218_IN_1L_RAMP_EN_SHIFT 5 | |
| 304 | #define DA7218_IN_1L_RAMP_EN_MASK (0x1 << 5) | |
| 305 | #define DA7218_IN_1L_MUTE_EN_SHIFT 6 | |
| 306 | #define DA7218_IN_1L_MUTE_EN_MASK (0x1 << 6) | |
| 307 | #define DA7218_IN_1L_FILTER_EN_SHIFT 7 | |
| 308 | #define DA7218_IN_1L_FILTER_EN_MASK (0x1 << 7) | |
| 309 | ||
| 310 | /* DA7218_IN_1R_FILTER_CTRL = 0x19 */ | |
| 311 | #define DA7218_IN_1R_RAMP_EN_SHIFT 5 | |
| 312 | #define DA7218_IN_1R_RAMP_EN_MASK (0x1 << 5) | |
| 313 | #define DA7218_IN_1R_MUTE_EN_SHIFT 6 | |
| 314 | #define DA7218_IN_1R_MUTE_EN_MASK (0x1 << 6) | |
| 315 | #define DA7218_IN_1R_FILTER_EN_SHIFT 7 | |
| 316 | #define DA7218_IN_1R_FILTER_EN_MASK (0x1 << 7) | |
| 317 | ||
| 318 | /* DA7218_IN_2L_FILTER_CTRL = 0x1A */ | |
| 319 | #define DA7218_IN_2L_RAMP_EN_SHIFT 5 | |
| 320 | #define DA7218_IN_2L_RAMP_EN_MASK (0x1 << 5) | |
| 321 | #define DA7218_IN_2L_MUTE_EN_SHIFT 6 | |
| 322 | #define DA7218_IN_2L_MUTE_EN_MASK (0x1 << 6) | |
| 323 | #define DA7218_IN_2L_FILTER_EN_SHIFT 7 | |
| 324 | #define DA7218_IN_2L_FILTER_EN_MASK (0x1 << 7) | |
| 325 | ||
| 326 | /* DA7218_IN_2R_FILTER_CTRL = 0x1B */ | |
| 327 | #define DA7218_IN_2R_RAMP_EN_SHIFT 5 | |
| 328 | #define DA7218_IN_2R_RAMP_EN_MASK (0x1 << 5) | |
| 329 | #define DA7218_IN_2R_MUTE_EN_SHIFT 6 | |
| 330 | #define DA7218_IN_2R_MUTE_EN_MASK (0x1 << 6) | |
| 331 | #define DA7218_IN_2R_FILTER_EN_SHIFT 7 | |
| 332 | #define DA7218_IN_2R_FILTER_EN_MASK (0x1 << 7) | |
| 333 | ||
| 334 | /* DA7218_OUT_1L_FILTER_CTRL = 0x20 */ | |
| 335 | #define DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT 3 | |
| 336 | #define DA7218_OUT_1L_BIQ_5STAGE_SEL_MASK (0x1 << 3) | |
| 337 | #define DA7218_OUT_BIQ_5STAGE_SEL_MAX 2 | |
| 338 | #define DA7218_OUT_1L_SUBRANGE_EN_SHIFT 4 | |
| 339 | #define DA7218_OUT_1L_SUBRANGE_EN_MASK (0x1 << 4) | |
| 340 | #define DA7218_OUT_1L_RAMP_EN_SHIFT 5 | |
| 341 | #define DA7218_OUT_1L_RAMP_EN_MASK (0x1 << 5) | |
| 342 | #define DA7218_OUT_1L_MUTE_EN_SHIFT 6 | |
| 343 | #define DA7218_OUT_1L_MUTE_EN_MASK (0x1 << 6) | |
| 344 | #define DA7218_OUT_1L_FILTER_EN_SHIFT 7 | |
| 345 | #define DA7218_OUT_1L_FILTER_EN_MASK (0x1 << 7) | |
| 346 | ||
| 347 | /* DA7218_OUT_1R_FILTER_CTRL = 0x21 */ | |
| 348 | #define DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT 3 | |
| 349 | #define DA7218_OUT_1R_BIQ_5STAGE_SEL_MASK (0x1 << 3) | |
| 350 | #define DA7218_OUT_1R_SUBRANGE_EN_SHIFT 4 | |
| 351 | #define DA7218_OUT_1R_SUBRANGE_EN_MASK (0x1 << 4) | |
| 352 | #define DA7218_OUT_1R_RAMP_EN_SHIFT 5 | |
| 353 | #define DA7218_OUT_1R_RAMP_EN_MASK (0x1 << 5) | |
| 354 | #define DA7218_OUT_1R_MUTE_EN_SHIFT 6 | |
| 355 | #define DA7218_OUT_1R_MUTE_EN_MASK (0x1 << 6) | |
| 356 | #define DA7218_OUT_1R_FILTER_EN_SHIFT 7 | |
| 357 | #define DA7218_OUT_1R_FILTER_EN_MASK (0x1 << 7) | |
| 358 | ||
| 359 | /* DA7218_OUT_1_HPF_FILTER_CTRL = 0x24 */ | |
| 360 | #define DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT 0 | |
| 361 | #define DA7218_OUT_1_VOICE_HPF_CORNER_MASK (0x7 << 0) | |
| 362 | #define DA7218_VOICE_HPF_CORNER_MAX 8 | |
| 363 | #define DA7218_OUT_1_VOICE_EN_SHIFT 3 | |
| 364 | #define DA7218_OUT_1_VOICE_EN_MASK (0x1 << 3) | |
| 365 | #define DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT 4 | |
| 366 | #define DA7218_OUT_1_AUDIO_HPF_CORNER_MASK (0x3 << 4) | |
| 367 | #define DA7218_AUDIO_HPF_CORNER_MAX 4 | |
| 368 | #define DA7218_OUT_1_HPF_EN_SHIFT 7 | |
| 369 | #define DA7218_OUT_1_HPF_EN_MASK (0x1 << 7) | |
| 370 | #define DA7218_HPF_MODE_SHIFT 0 | |
| 371 | #define DA7218_HPF_DISABLED ((0x0 << 3) | (0x0 << 7)) | |
| 372 | #define DA7218_HPF_AUDIO_EN ((0x0 << 3) | (0x1 << 7)) | |
| 373 | #define DA7218_HPF_VOICE_EN ((0x1 << 3) | (0x1 << 7)) | |
| 374 | #define DA7218_HPF_MODE_MASK ((0x1 << 3) | (0x1 << 7)) | |
| 375 | #define DA7218_HPF_MODE_MAX 3 | |
| 376 | ||
| 377 | /* DA7218_OUT_1_EQ_12_FILTER_CTRL = 0x25 */ | |
| 378 | #define DA7218_OUT_1_EQ_BAND1_SHIFT 0 | |
| 379 | #define DA7218_OUT_1_EQ_BAND1_MASK (0xF << 0) | |
| 380 | #define DA7218_OUT_EQ_BAND_MAX 0xF | |
| 381 | #define DA7218_OUT_1_EQ_BAND2_SHIFT 4 | |
| 382 | #define DA7218_OUT_1_EQ_BAND2_MASK (0xF << 4) | |
| 383 | ||
| 384 | /* DA7218_OUT_1_EQ_34_FILTER_CTRL = 0x26 */ | |
| 385 | #define DA7218_OUT_1_EQ_BAND3_SHIFT 0 | |
| 386 | #define DA7218_OUT_1_EQ_BAND3_MASK (0xF << 0) | |
| 387 | #define DA7218_OUT_1_EQ_BAND4_SHIFT 4 | |
| 388 | #define DA7218_OUT_1_EQ_BAND4_MASK (0xF << 4) | |
| 389 | ||
| 390 | /* DA7218_OUT_1_EQ_5_FILTER_CTRL = 0x27 */ | |
| 391 | #define DA7218_OUT_1_EQ_BAND5_SHIFT 0 | |
| 392 | #define DA7218_OUT_1_EQ_BAND5_MASK (0xF << 0) | |
| 393 | #define DA7218_OUT_1_EQ_EN_SHIFT 7 | |
| 394 | #define DA7218_OUT_1_EQ_EN_MASK (0x1 << 7) | |
| 395 | ||
| 396 | /* DA7218_OUT_1_BIQ_5STAGE_CTRL = 0x28 */ | |
| 397 | #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT 6 | |
| 398 | #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_MASK (0x1 << 6) | |
| 399 | #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT 7 | |
| 400 | #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_MASK (0x1 << 7) | |
| 401 | ||
| 402 | /* DA7218_OUT_1_BIQ_5STAGE_DATA = 0x29 */ | |
| 403 | #define DA7218_OUT_1_BIQ_5STAGE_DATA_SHIFT 0 | |
| 404 | #define DA7218_OUT_1_BIQ_5STAGE_DATA_MASK (0xFF << 0) | |
| 405 | ||
| 406 | /* DA7218_OUT_1_BIQ_5STAGE_ADDR = 0x2A */ | |
| 407 | #define DA7218_OUT_1_BIQ_5STAGE_ADDR_SHIFT 0 | |
| 408 | #define DA7218_OUT_1_BIQ_5STAGE_ADDR_MASK (0x3F << 0) | |
| 409 | #define DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE 50 | |
| 410 | ||
| 411 | /* DA7218_MIXIN_1_CTRL = 0x2C */ | |
| 412 | #define DA7218_MIXIN_1_MIX_SEL_SHIFT 3 | |
| 413 | #define DA7218_MIXIN_1_MIX_SEL_MASK (0x1 << 3) | |
| 414 | #define DA7218_MIXIN_1_AMP_ZC_EN_SHIFT 4 | |
| 415 | #define DA7218_MIXIN_1_AMP_ZC_EN_MASK (0x1 << 4) | |
| 416 | #define DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT 5 | |
| 417 | #define DA7218_MIXIN_1_AMP_RAMP_EN_MASK (0x1 << 5) | |
| 418 | #define DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT 6 | |
| 419 | #define DA7218_MIXIN_1_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 420 | #define DA7218_MIXIN_1_AMP_EN_SHIFT 7 | |
| 421 | #define DA7218_MIXIN_1_AMP_EN_MASK (0x1 << 7) | |
| 422 | ||
| 423 | /* DA7218_MIXIN_1_GAIN = 0x2D */ | |
| 424 | #define DA7218_MIXIN_1_AMP_GAIN_SHIFT 0 | |
| 425 | #define DA7218_MIXIN_1_AMP_GAIN_MASK (0xF << 0) | |
| 426 | #define DA7218_MIXIN_AMP_GAIN_MAX 0xF | |
| 427 | ||
| 428 | /* DA7218_MIXIN_2_CTRL = 0x2E */ | |
| 429 | #define DA7218_MIXIN_2_MIX_SEL_SHIFT 3 | |
| 430 | #define DA7218_MIXIN_2_MIX_SEL_MASK (0x1 << 3) | |
| 431 | #define DA7218_MIXIN_2_AMP_ZC_EN_SHIFT 4 | |
| 432 | #define DA7218_MIXIN_2_AMP_ZC_EN_MASK (0x1 << 4) | |
| 433 | #define DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT 5 | |
| 434 | #define DA7218_MIXIN_2_AMP_RAMP_EN_MASK (0x1 << 5) | |
| 435 | #define DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT 6 | |
| 436 | #define DA7218_MIXIN_2_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 437 | #define DA7218_MIXIN_2_AMP_EN_SHIFT 7 | |
| 438 | #define DA7218_MIXIN_2_AMP_EN_MASK (0x1 << 7) | |
| 439 | ||
| 440 | /* DA7218_MIXIN_2_GAIN = 0x2F */ | |
| 441 | #define DA7218_MIXIN_2_AMP_GAIN_SHIFT 0 | |
| 442 | #define DA7218_MIXIN_2_AMP_GAIN_MASK (0xF << 0) | |
| 443 | ||
| 444 | /* DA7218_ALC_CTRL1 = 0x30 */ | |
| 445 | #define DA7218_ALC_EN_SHIFT 0 | |
| 446 | #define DA7218_ALC_EN_MASK (0xF << 0) | |
| 447 | #define DA7218_ALC_CHAN1_L_EN_SHIFT 0 | |
| 448 | #define DA7218_ALC_CHAN1_R_EN_SHIFT 1 | |
| 449 | #define DA7218_ALC_CHAN2_L_EN_SHIFT 2 | |
| 450 | #define DA7218_ALC_CHAN2_R_EN_SHIFT 3 | |
| 451 | #define DA7218_ALC_SYNC_MODE_SHIFT 4 | |
| 452 | #define DA7218_ALC_SYNC_MODE_MASK (0xF << 4) | |
| 453 | #define DA7218_ALC_SYNC_MODE_CH1 (0x1 << 4) | |
| 454 | #define DA7218_ALC_SYNC_MODE_CH2 (0x4 << 4) | |
| 455 | ||
| 456 | /* DA7218_ALC_CTRL2 = 0x31 */ | |
| 457 | #define DA7218_ALC_ATTACK_SHIFT 0 | |
| 458 | #define DA7218_ALC_ATTACK_MASK (0xF << 0) | |
| 459 | #define DA7218_ALC_ATTACK_MAX 13 | |
| 460 | #define DA7218_ALC_RELEASE_SHIFT 4 | |
| 461 | #define DA7218_ALC_RELEASE_MASK (0xF << 4) | |
| 462 | #define DA7218_ALC_RELEASE_MAX 11 | |
| 463 | ||
| 464 | /* DA7218_ALC_CTRL3 = 0x32 */ | |
| 465 | #define DA7218_ALC_HOLD_SHIFT 0 | |
| 466 | #define DA7218_ALC_HOLD_MASK (0xF << 0) | |
| 467 | #define DA7218_ALC_HOLD_MAX 16 | |
| 468 | ||
| 469 | /* DA7218_ALC_NOISE = 0x33 */ | |
| 470 | #define DA7218_ALC_NOISE_SHIFT 0 | |
| 471 | #define DA7218_ALC_NOISE_MASK (0x3F << 0) | |
| 472 | #define DA7218_ALC_THRESHOLD_MAX 0x3F | |
| 473 | ||
| 474 | /* DA7218_ALC_TARGET_MIN = 0x34 */ | |
| 475 | #define DA7218_ALC_THRESHOLD_MIN_SHIFT 0 | |
| 476 | #define DA7218_ALC_THRESHOLD_MIN_MASK (0x3F << 0) | |
| 477 | ||
| 478 | /* DA7218_ALC_TARGET_MAX = 0x35 */ | |
| 479 | #define DA7218_ALC_THRESHOLD_MAX_SHIFT 0 | |
| 480 | #define DA7218_ALC_THRESHOLD_MAX_MASK (0x3F << 0) | |
| 481 | ||
| 482 | /* DA7218_ALC_GAIN_LIMITS = 0x36 */ | |
| 483 | #define DA7218_ALC_ATTEN_MAX_SHIFT 0 | |
| 484 | #define DA7218_ALC_ATTEN_MAX_MASK (0xF << 0) | |
| 485 | #define DA7218_ALC_ATTEN_GAIN_MAX 0xF | |
| 486 | #define DA7218_ALC_GAIN_MAX_SHIFT 4 | |
| 487 | #define DA7218_ALC_GAIN_MAX_MASK (0xF << 4) | |
| 488 | ||
| 489 | /* DA7218_ALC_ANA_GAIN_LIMITS = 0x37 */ | |
| 490 | #define DA7218_ALC_ANA_GAIN_MIN_SHIFT 0 | |
| 491 | #define DA7218_ALC_ANA_GAIN_MIN_MASK (0x7 << 0) | |
| 492 | #define DA7218_ALC_ANA_GAIN_MIN 0x1 | |
| 493 | #define DA7218_ALC_ANA_GAIN_MAX 0x7 | |
| 494 | #define DA7218_ALC_ANA_GAIN_MAX_SHIFT 4 | |
| 495 | #define DA7218_ALC_ANA_GAIN_MAX_MASK (0x7 << 4) | |
| 496 | ||
| 497 | /* DA7218_ALC_ANTICLIP_CTRL = 0x38 */ | |
| 498 | #define DA7218_ALC_ANTICLIP_STEP_SHIFT 0 | |
| 499 | #define DA7218_ALC_ANTICLIP_STEP_MASK (0x3 << 0) | |
| 500 | #define DA7218_ALC_ANTICLIP_STEP_MAX 4 | |
| 501 | #define DA7218_ALC_ANTICLIP_EN_SHIFT 7 | |
| 502 | #define DA7218_ALC_ANTICLIP_EN_MASK (0x1 << 7) | |
| 503 | ||
| 504 | /* DA7218_AGS_ENABLE = 0x3C */ | |
| 505 | #define DA7218_AGS_ENABLE_SHIFT 0 | |
| 506 | #define DA7218_AGS_ENABLE_MASK (0x3 << 0) | |
| 507 | #define DA7218_AGS_ENABLE_CHAN1_SHIFT 0 | |
| 508 | #define DA7218_AGS_ENABLE_CHAN2_SHIFT 1 | |
| 509 | ||
| 510 | /* DA7218_AGS_TRIGGER = 0x3D */ | |
| 511 | #define DA7218_AGS_TRIGGER_SHIFT 0 | |
| 512 | #define DA7218_AGS_TRIGGER_MASK (0xF << 0) | |
| 513 | #define DA7218_AGS_TRIGGER_MAX 0xF | |
| 514 | ||
| 515 | /* DA7218_AGS_ATT_MAX = 0x3E */ | |
| 516 | #define DA7218_AGS_ATT_MAX_SHIFT 0 | |
| 517 | #define DA7218_AGS_ATT_MAX_MASK (0x7 << 0) | |
| 518 | #define DA7218_AGS_ATT_MAX_MAX 0x7 | |
| 519 | ||
| 520 | /* DA7218_AGS_TIMEOUT = 0x3F */ | |
| 521 | #define DA7218_AGS_TIMEOUT_EN_SHIFT 0 | |
| 522 | #define DA7218_AGS_TIMEOUT_EN_MASK (0x1 << 0) | |
| 523 | ||
| 524 | /* DA7218_AGS_ANTICLIP_CTRL = 0x40 */ | |
| 525 | #define DA7218_AGS_ANTICLIP_EN_SHIFT 7 | |
| 526 | #define DA7218_AGS_ANTICLIP_EN_MASK (0x1 << 7) | |
| 527 | ||
| 528 | /* DA7218_CALIB_CTRL = 0x44 */ | |
| 529 | #define DA7218_CALIB_OFFSET_EN_SHIFT 0 | |
| 530 | #define DA7218_CALIB_OFFSET_EN_MASK (0x1 << 0) | |
| 531 | #define DA7218_CALIB_AUTO_EN_SHIFT 2 | |
| 532 | #define DA7218_CALIB_AUTO_EN_MASK (0x1 << 2) | |
| 533 | #define DA7218_CALIB_OVERFLOW_SHIFT 3 | |
| 534 | #define DA7218_CALIB_OVERFLOW_MASK (0x1 << 3) | |
| 535 | ||
| 536 | /* DA7218_CALIB_OFFSET_AUTO_M_1 = 0x45 */ | |
| 537 | #define DA7218_CALIB_OFFSET_AUTO_M_1_SHIFT 0 | |
| 538 | #define DA7218_CALIB_OFFSET_AUTO_M_1_MASK (0xFF << 0) | |
| 539 | ||
| 540 | /* DA7218_CALIB_OFFSET_AUTO_U_1 = 0x46 */ | |
| 541 | #define DA7218_CALIB_OFFSET_AUTO_U_1_SHIFT 0 | |
| 542 | #define DA7218_CALIB_OFFSET_AUTO_U_1_MASK (0xF << 0) | |
| 543 | ||
| 544 | /* DA7218_CALIB_OFFSET_AUTO_M_2 = 0x47 */ | |
| 545 | #define DA7218_CALIB_OFFSET_AUTO_M_2_SHIFT 0 | |
| 546 | #define DA7218_CALIB_OFFSET_AUTO_M_2_MASK (0xFF << 0) | |
| 547 | ||
| 548 | /* DA7218_CALIB_OFFSET_AUTO_U_2 = 0x48 */ | |
| 549 | #define DA7218_CALIB_OFFSET_AUTO_U_2_SHIFT 0 | |
| 550 | #define DA7218_CALIB_OFFSET_AUTO_U_2_MASK (0xF << 0) | |
| 551 | ||
| 552 | /* DA7218_ENV_TRACK_CTRL = 0x4C */ | |
| 553 | #define DA7218_INTEG_ATTACK_SHIFT 0 | |
| 554 | #define DA7218_INTEG_ATTACK_MASK (0x3 << 0) | |
| 555 | #define DA7218_INTEG_RELEASE_SHIFT 4 | |
| 556 | #define DA7218_INTEG_RELEASE_MASK (0x3 << 4) | |
| 557 | #define DA7218_INTEG_MAX 4 | |
| 558 | ||
| 559 | /* DA7218_LVL_DET_CTRL = 0x50 */ | |
| 560 | #define DA7218_LVL_DET_EN_SHIFT 0 | |
| 561 | #define DA7218_LVL_DET_EN_MASK (0xF << 0) | |
| 562 | #define DA7218_LVL_DET_EN_CHAN1L_SHIFT 0 | |
| 563 | #define DA7218_LVL_DET_EN_CHAN1R_SHIFT 1 | |
| 564 | #define DA7218_LVL_DET_EN_CHAN2L_SHIFT 2 | |
| 565 | #define DA7218_LVL_DET_EN_CHAN2R_SHIFT 3 | |
| 566 | ||
| 567 | /* DA7218_LVL_DET_LEVEL = 0x51 */ | |
| 568 | #define DA7218_LVL_DET_LEVEL_SHIFT 0 | |
| 569 | #define DA7218_LVL_DET_LEVEL_MASK (0x7F << 0) | |
| 570 | #define DA7218_LVL_DET_LEVEL_MAX 0x7F | |
| 571 | ||
| 572 | /* DA7218_DGS_TRIGGER = 0x54 */ | |
| 573 | #define DA7218_DGS_TRIGGER_LVL_SHIFT 0 | |
| 574 | #define DA7218_DGS_TRIGGER_LVL_MASK (0x3F << 0) | |
| 575 | #define DA7218_DGS_TRIGGER_MAX 0x3F | |
| 576 | ||
| 577 | /* DA7218_DGS_ENABLE = 0x55 */ | |
| 578 | #define DA7218_DGS_ENABLE_SHIFT 0 | |
| 579 | #define DA7218_DGS_ENABLE_MASK (0x3 << 0) | |
| 580 | #define DA7218_DGS_ENABLE_L_SHIFT 0 | |
| 581 | #define DA7218_DGS_ENABLE_R_SHIFT 1 | |
| 582 | ||
| 583 | /* DA7218_DGS_RISE_FALL = 0x56 */ | |
| 584 | #define DA7218_DGS_RISE_COEFF_SHIFT 0 | |
| 585 | #define DA7218_DGS_RISE_COEFF_MASK (0x7 << 0) | |
| 586 | #define DA7218_DGS_RISE_COEFF_MAX 7 | |
| 587 | #define DA7218_DGS_FALL_COEFF_SHIFT 4 | |
| 588 | #define DA7218_DGS_FALL_COEFF_MASK (0x7 << 4) | |
| 589 | #define DA7218_DGS_FALL_COEFF_MAX 8 | |
| 590 | ||
| 591 | /* DA7218_DGS_SYNC_DELAY = 0x57 */ | |
| 592 | #define DA7218_DGS_SYNC_DELAY_SHIFT 0 | |
| 593 | #define DA7218_DGS_SYNC_DELAY_MASK (0xFF << 0) | |
| 594 | #define DA7218_DGS_SYNC_DELAY_MAX 0xFF | |
| 595 | ||
| 596 | /* DA7218_DGS_SYNC_DELAY2 = 0x58 */ | |
| 597 | #define DA7218_DGS_SYNC_DELAY2_SHIFT 0 | |
| 598 | #define DA7218_DGS_SYNC_DELAY2_MASK (0xFF << 0) | |
| 599 | ||
| 600 | /* DA7218_DGS_SYNC_DELAY3 = 0x59 */ | |
| 601 | #define DA7218_DGS_SYNC_DELAY3_SHIFT 0 | |
| 602 | #define DA7218_DGS_SYNC_DELAY3_MASK (0x7F << 0) | |
| 603 | #define DA7218_DGS_SYNC_DELAY3_MAX 0x7F | |
| 604 | ||
| 605 | /* DA7218_DGS_LEVELS = 0x5A */ | |
| 606 | #define DA7218_DGS_ANTICLIP_LVL_SHIFT 0 | |
| 607 | #define DA7218_DGS_ANTICLIP_LVL_MASK (0x7 << 0) | |
| 608 | #define DA7218_DGS_ANTICLIP_LVL_MAX 0x7 | |
| 609 | #define DA7218_DGS_SIGNAL_LVL_SHIFT 4 | |
| 610 | #define DA7218_DGS_SIGNAL_LVL_MASK (0xF << 4) | |
| 611 | #define DA7218_DGS_SIGNAL_LVL_MAX 0xF | |
| 612 | ||
| 613 | /* DA7218_DGS_GAIN_CTRL = 0x5B */ | |
| 614 | #define DA7218_DGS_STEPS_SHIFT 0 | |
| 615 | #define DA7218_DGS_STEPS_MASK (0x1F << 0) | |
| 616 | #define DA7218_DGS_STEPS_MAX 0x1F | |
| 617 | #define DA7218_DGS_RAMP_EN_SHIFT 5 | |
| 618 | #define DA7218_DGS_RAMP_EN_MASK (0x1 << 5) | |
| 619 | #define DA7218_DGS_SUBR_EN_SHIFT 6 | |
| 620 | #define DA7218_DGS_SUBR_EN_MASK (0x1 << 6) | |
| 621 | ||
| 622 | /* DA7218_DROUTING_OUTDAI_1L = 0x5C */ | |
| 623 | #define DA7218_OUTDAI_1L_SRC_SHIFT 0 | |
| 624 | #define DA7218_OUTDAI_1L_SRC_MASK (0x7F << 0) | |
| 625 | #define DA7218_DMIX_SRC_INFILT1L 0 | |
| 626 | #define DA7218_DMIX_SRC_INFILT1R 1 | |
| 627 | #define DA7218_DMIX_SRC_INFILT2L 2 | |
| 628 | #define DA7218_DMIX_SRC_INFILT2R 3 | |
| 629 | #define DA7218_DMIX_SRC_TONEGEN 4 | |
| 630 | #define DA7218_DMIX_SRC_DAIL 5 | |
| 631 | #define DA7218_DMIX_SRC_DAIR 6 | |
| 632 | ||
| 633 | /* DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN = 0x5D */ | |
| 634 | #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT 0 | |
| 635 | #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 636 | #define DA7218_DMIX_GAIN_MAX 0x1F | |
| 637 | ||
| 638 | /* DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN = 0x5E */ | |
| 639 | #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT 0 | |
| 640 | #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 641 | ||
| 642 | /* DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN = 0x5F */ | |
| 643 | #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT 0 | |
| 644 | #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 645 | ||
| 646 | /* DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN = 0x60 */ | |
| 647 | #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT 0 | |
| 648 | #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 649 | ||
| 650 | /* DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN = 0x61 */ | |
| 651 | #define DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT 0 | |
| 652 | #define DA7218_OUTDAI_1L_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 653 | ||
| 654 | /* DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN = 0x62 */ | |
| 655 | #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT 0 | |
| 656 | #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 657 | ||
| 658 | /* DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN = 0x63 */ | |
| 659 | #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT 0 | |
| 660 | #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 661 | ||
| 662 | /* DA7218_DROUTING_OUTDAI_1R = 0x64 */ | |
| 663 | #define DA7218_OUTDAI_1R_SRC_SHIFT 0 | |
| 664 | #define DA7218_OUTDAI_1R_SRC_MASK (0x7F << 0) | |
| 665 | ||
| 666 | /* DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN = 0x65 */ | |
| 667 | #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT 0 | |
| 668 | #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 669 | ||
| 670 | /* DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN = 0x66 */ | |
| 671 | #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT 0 | |
| 672 | #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 673 | ||
| 674 | /* DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN = 0x67 */ | |
| 675 | #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT 0 | |
| 676 | #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 677 | ||
| 678 | /* DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN = 0x68 */ | |
| 679 | #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT 0 | |
| 680 | #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 681 | ||
| 682 | /* DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN = 0x69 */ | |
| 683 | #define DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT 0 | |
| 684 | #define DA7218_OUTDAI_1R_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 685 | ||
| 686 | /* DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN = 0x6A */ | |
| 687 | #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT 0 | |
| 688 | #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 689 | ||
| 690 | /* DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN = 0x6B */ | |
| 691 | #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT 0 | |
| 692 | #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 693 | ||
| 694 | /* DA7218_DROUTING_OUTFILT_1L = 0x6C */ | |
| 695 | #define DA7218_OUTFILT_1L_SRC_SHIFT 0 | |
| 696 | #define DA7218_OUTFILT_1L_SRC_MASK (0x7F << 0) | |
| 697 | ||
| 698 | /* DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN = 0x6D */ | |
| 699 | #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT 0 | |
| 700 | #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 701 | ||
| 702 | /* DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN = 0x6E */ | |
| 703 | #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT 0 | |
| 704 | #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 705 | ||
| 706 | /* DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN = 0x6F */ | |
| 707 | #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT 0 | |
| 708 | #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 709 | ||
| 710 | /* DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN = 0x70 */ | |
| 711 | #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT 0 | |
| 712 | #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 713 | ||
| 714 | /* DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN = 0x71 */ | |
| 715 | #define DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT 0 | |
| 716 | #define DA7218_OUTFILT_1L_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 717 | ||
| 718 | /* DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN = 0x72 */ | |
| 719 | #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT 0 | |
| 720 | #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 721 | ||
| 722 | /* DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN = 0x73 */ | |
| 723 | #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT 0 | |
| 724 | #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 725 | ||
| 726 | /* DA7218_DROUTING_OUTFILT_1R = 0x74 */ | |
| 727 | #define DA7218_OUTFILT_1R_SRC_SHIFT 0 | |
| 728 | #define DA7218_OUTFILT_1R_SRC_MASK (0x7F << 0) | |
| 729 | ||
| 730 | /* DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN = 0x75 */ | |
| 731 | #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT 0 | |
| 732 | #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 733 | ||
| 734 | /* DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN = 0x76 */ | |
| 735 | #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT 0 | |
| 736 | #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 737 | ||
| 738 | /* DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN = 0x77 */ | |
| 739 | #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT 0 | |
| 740 | #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 741 | ||
| 742 | /* DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN = 0x78 */ | |
| 743 | #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT 0 | |
| 744 | #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 745 | ||
| 746 | /* DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN = 0x79 */ | |
| 747 | #define DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT 0 | |
| 748 | #define DA7218_OUTFILT_1R_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 749 | ||
| 750 | /* DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN = 0x7A */ | |
| 751 | #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT 0 | |
| 752 | #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 753 | ||
| 754 | /* DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN = 0x7B */ | |
| 755 | #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT 0 | |
| 756 | #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 757 | ||
| 758 | /* DA7218_DROUTING_OUTDAI_2L = 0x7C */ | |
| 759 | #define DA7218_OUTDAI_2L_SRC_SHIFT 0 | |
| 760 | #define DA7218_OUTDAI_2L_SRC_MASK (0x7F << 0) | |
| 761 | ||
| 762 | /* DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN = 0x7D */ | |
| 763 | #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT 0 | |
| 764 | #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 765 | ||
| 766 | /* DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN = 0x7E */ | |
| 767 | #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT 0 | |
| 768 | #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 769 | ||
| 770 | /* DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN = 0x7F */ | |
| 771 | #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT 0 | |
| 772 | #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 773 | ||
| 774 | /* DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN = 0x80 */ | |
| 775 | #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT 0 | |
| 776 | #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 777 | ||
| 778 | /* DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN = 0x81 */ | |
| 779 | #define DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT 0 | |
| 780 | #define DA7218_OUTDAI_2L_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 781 | ||
| 782 | /* DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN = 0x82 */ | |
| 783 | #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT 0 | |
| 784 | #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 785 | ||
| 786 | /* DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN = 0x83 */ | |
| 787 | #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT 0 | |
| 788 | #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 789 | ||
| 790 | /* DA7218_DROUTING_OUTDAI_2R = 0x84 */ | |
| 791 | #define DA7218_OUTDAI_2R_SRC_SHIFT 0 | |
| 792 | #define DA7218_OUTDAI_2R_SRC_MASK (0x7F << 0) | |
| 793 | ||
| 794 | /* DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN = 0x85 */ | |
| 795 | #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT 0 | |
| 796 | #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_MASK (0x1F << 0) | |
| 797 | ||
| 798 | /* DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN = 0x86 */ | |
| 799 | #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT 0 | |
| 800 | #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_MASK (0x1F << 0) | |
| 801 | ||
| 802 | /* DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN = 0x87 */ | |
| 803 | #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT 0 | |
| 804 | #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_MASK (0x1F << 0) | |
| 805 | ||
| 806 | /* DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN = 0x88 */ | |
| 807 | #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT 0 | |
| 808 | #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_MASK (0x1F << 0) | |
| 809 | ||
| 810 | /* DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN = 0x89 */ | |
| 811 | #define DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT 0 | |
| 812 | #define DA7218_OUTDAI_2R_TONEGEN_GAIN_MASK (0x1F << 0) | |
| 813 | ||
| 814 | /* DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN = 0x8A */ | |
| 815 | #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT 0 | |
| 816 | #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_MASK (0x1F << 0) | |
| 817 | ||
| 818 | /* DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN = 0x8B */ | |
| 819 | #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT 0 | |
| 820 | #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_MASK (0x1F << 0) | |
| 821 | ||
| 822 | /* DA7218_DAI_CTRL = 0x8C */ | |
| 823 | #define DA7218_DAI_FORMAT_SHIFT 0 | |
| 824 | #define DA7218_DAI_FORMAT_MASK (0x3 << 0) | |
| 825 | #define DA7218_DAI_FORMAT_I2S (0x0 << 0) | |
| 826 | #define DA7218_DAI_FORMAT_LEFT_J (0x1 << 0) | |
| 827 | #define DA7218_DAI_FORMAT_RIGHT_J (0x2 << 0) | |
| 828 | #define DA7218_DAI_FORMAT_DSP (0x3 << 0) | |
| 829 | #define DA7218_DAI_WORD_LENGTH_SHIFT 2 | |
| 830 | #define DA7218_DAI_WORD_LENGTH_MASK (0x3 << 2) | |
| 831 | #define DA7218_DAI_WORD_LENGTH_S16_LE (0x0 << 2) | |
| 832 | #define DA7218_DAI_WORD_LENGTH_S20_LE (0x1 << 2) | |
| 833 | #define DA7218_DAI_WORD_LENGTH_S24_LE (0x2 << 2) | |
| 834 | #define DA7218_DAI_WORD_LENGTH_S32_LE (0x3 << 2) | |
| 835 | #define DA7218_DAI_CH_NUM_SHIFT 4 | |
| 836 | #define DA7218_DAI_CH_NUM_MASK (0x7 << 4) | |
| 837 | #define DA7218_DAI_CH_NUM_MAX 4 | |
| 838 | #define DA7218_DAI_EN_SHIFT 7 | |
| 839 | #define DA7218_DAI_EN_MASK (0x1 << 7) | |
| 840 | ||
| 841 | /* DA7218_DAI_TDM_CTRL = 0x8D */ | |
| 842 | #define DA7218_DAI_TDM_CH_EN_SHIFT 0 | |
| 843 | #define DA7218_DAI_TDM_CH_EN_MASK (0xF << 0) | |
| 844 | #define DA7218_DAI_TDM_MAX_SLOTS 4 | |
| 845 | #define DA7218_DAI_OE_SHIFT 6 | |
| 846 | #define DA7218_DAI_OE_MASK (0x1 << 6) | |
| 847 | #define DA7218_DAI_TDM_MODE_EN_SHIFT 7 | |
| 848 | #define DA7218_DAI_TDM_MODE_EN_MASK (0x1 << 7) | |
| 849 | ||
| 850 | /* DA7218_DAI_OFFSET_LOWER = 0x8E */ | |
| 851 | #define DA7218_DAI_OFFSET_LOWER_SHIFT 0 | |
| 852 | #define DA7218_DAI_OFFSET_LOWER_MASK (0xFF << 0) | |
| 853 | ||
| 854 | /* DA7218_DAI_OFFSET_UPPER = 0x8F */ | |
| 855 | #define DA7218_DAI_OFFSET_UPPER_SHIFT 0 | |
| 856 | #define DA7218_DAI_OFFSET_UPPER_MASK (0x7 << 0) | |
| 857 | ||
| 858 | /* DA7218_DAI_CLK_MODE = 0x90 */ | |
| 859 | #define DA7218_DAI_BCLKS_PER_WCLK_SHIFT 0 | |
| 860 | #define DA7218_DAI_BCLKS_PER_WCLK_MASK (0x3 << 0) | |
| 861 | #define DA7218_DAI_BCLKS_PER_WCLK_32 (0x0 << 0) | |
| 862 | #define DA7218_DAI_BCLKS_PER_WCLK_64 (0x1 << 0) | |
| 863 | #define DA7218_DAI_BCLKS_PER_WCLK_128 (0x2 << 0) | |
| 864 | #define DA7218_DAI_BCLKS_PER_WCLK_256 (0x3 << 0) | |
| 865 | #define DA7218_DAI_CLK_POL_SHIFT 2 | |
| 866 | #define DA7218_DAI_CLK_POL_MASK (0x1 << 2) | |
| 867 | #define DA7218_DAI_CLK_POL_INV (0x1 << 2) | |
| 868 | #define DA7218_DAI_WCLK_POL_SHIFT 3 | |
| 869 | #define DA7218_DAI_WCLK_POL_MASK (0x1 << 3) | |
| 870 | #define DA7218_DAI_WCLK_POL_INV (0x1 << 3) | |
| 871 | #define DA7218_DAI_WCLK_TRI_STATE_SHIFT 4 | |
| 872 | #define DA7218_DAI_WCLK_TRI_STATE_MASK (0x1 << 4) | |
| 873 | #define DA7218_DAI_CLK_EN_SHIFT 7 | |
| 874 | #define DA7218_DAI_CLK_EN_MASK (0x1 << 7) | |
| 875 | ||
| 876 | /* DA7218_PLL_CTRL = 0x91 */ | |
| 877 | #define DA7218_PLL_INDIV_SHIFT 0 | |
| 878 | #define DA7218_PLL_INDIV_MASK (0x7 << 0) | |
| 879 | #define DA7218_PLL_INDIV_2_5_MHZ (0x0 << 0) | |
| 880 | #define DA7218_PLL_INDIV_5_10_MHZ (0x1 << 0) | |
| 881 | #define DA7218_PLL_INDIV_10_20_MHZ (0x2 << 0) | |
| 882 | #define DA7218_PLL_INDIV_20_40_MHZ (0x3 << 0) | |
| 883 | #define DA7218_PLL_INDIV_40_54_MHZ (0x4 << 0) | |
| 884 | #define DA7218_PLL_INDIV_2_10_MHZ_VAL 2 | |
| 885 | #define DA7218_PLL_INDIV_10_20_MHZ_VAL 4 | |
| 886 | #define DA7218_PLL_INDIV_20_40_MHZ_VAL 8 | |
| 887 | #define DA7218_PLL_INDIV_40_54_MHZ_VAL 16 | |
| 888 | #define DA7218_PLL_MCLK_SQR_EN_SHIFT 4 | |
| 889 | #define DA7218_PLL_MCLK_SQR_EN_MASK (0x1 << 4) | |
| 890 | #define DA7218_PLL_MODE_SHIFT 6 | |
| 891 | #define DA7218_PLL_MODE_MASK (0x3 << 6) | |
| 892 | #define DA7218_PLL_MODE_BYPASS (0x0 << 6) | |
| 893 | #define DA7218_PLL_MODE_NORMAL (0x1 << 6) | |
| 894 | #define DA7218_PLL_MODE_SRM (0x2 << 6) | |
| 895 | #define DA7218_PLL_MODE_32KHZ (0x3 << 6) | |
| 896 | ||
| 897 | /* DA7218_PLL_FRAC_TOP = 0x92 */ | |
| 898 | #define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0 | |
| 899 | #define DA7218_PLL_FBDIV_FRAC_TOP_MASK (0x1F << 0) | |
| 900 | ||
| 901 | /* DA7218_PLL_FRAC_BOT = 0x93 */ | |
| 902 | #define DA7218_PLL_FBDIV_FRAC_BOT_SHIFT 0 | |
| 903 | #define DA7218_PLL_FBDIV_FRAC_BOT_MASK (0xFF << 0) | |
| 904 | ||
| 905 | /* DA7218_PLL_INTEGER = 0x94 */ | |
| 906 | #define DA7218_PLL_FBDIV_INTEGER_SHIFT 0 | |
| 907 | #define DA7218_PLL_FBDIV_INTEGER_MASK (0x7F << 0) | |
| 908 | ||
| 909 | /* DA7218_PLL_STATUS = 0x95 */ | |
| 910 | #define DA7218_PLL_SRM_STATUS_SHIFT 0 | |
| 911 | #define DA7218_PLL_SRM_STATUS_MASK (0xFF << 0) | |
| 912 | #define DA7218_PLL_SRM_STATUS_SRM_LOCK (0x1 << 7) | |
| 913 | ||
| 914 | /* DA7218_PLL_REFOSC_CAL = 0x98 */ | |
| 915 | #define DA7218_PLL_REFOSC_CAL_CTRL_SHIFT 0 | |
| 916 | #define DA7218_PLL_REFOSC_CAL_CTRL_MASK (0x1F << 0) | |
| 917 | #define DA7218_PLL_REFOSC_CAL_START_SHIFT 6 | |
| 918 | #define DA7218_PLL_REFOSC_CAL_START_MASK (0x1 << 6) | |
| 919 | #define DA7218_PLL_REFOSC_CAL_EN_SHIFT 7 | |
| 920 | #define DA7218_PLL_REFOSC_CAL_EN_MASK (0x1 << 7) | |
| 921 | ||
| 922 | /* DA7218_DAC_NG_CTRL = 0x9C */ | |
| 923 | #define DA7218_DAC_NG_EN_SHIFT 7 | |
| 924 | #define DA7218_DAC_NG_EN_MASK (0x1 << 7) | |
| 925 | ||
| 926 | /* DA7218_DAC_NG_SETUP_TIME = 0x9D */ | |
| 927 | #define DA7218_DAC_NG_SETUP_TIME_SHIFT 0 | |
| 928 | #define DA7218_DAC_NG_SETUP_TIME_MASK (0x3 << 0) | |
| 929 | #define DA7218_DAC_NG_SETUP_TIME_MAX 4 | |
| 930 | #define DA7218_DAC_NG_RAMPUP_RATE_SHIFT 2 | |
| 931 | #define DA7218_DAC_NG_RAMPUP_RATE_MASK (0x1 << 2) | |
| 932 | #define DA7218_DAC_NG_RAMPUP_RATE_MAX 2 | |
| 933 | #define DA7218_DAC_NG_RAMPDN_RATE_SHIFT 3 | |
| 934 | #define DA7218_DAC_NG_RAMPDN_RATE_MASK (0x1 << 3) | |
| 935 | #define DA7218_DAC_NG_RAMPDN_RATE_MAX 2 | |
| 936 | ||
| 937 | /* DA7218_DAC_NG_OFF_THRESH = 0x9E */ | |
| 938 | #define DA7218_DAC_NG_OFF_THRESHOLD_SHIFT 0 | |
| 939 | #define DA7218_DAC_NG_OFF_THRESHOLD_MASK (0x7 << 0) | |
| 940 | #define DA7218_DAC_NG_THRESHOLD_MAX 0x7 | |
| 941 | ||
| 942 | /* DA7218_DAC_NG_ON_THRESH = 0x9F */ | |
| 943 | #define DA7218_DAC_NG_ON_THRESHOLD_SHIFT 0 | |
| 944 | #define DA7218_DAC_NG_ON_THRESHOLD_MASK (0x7 << 0) | |
| 945 | ||
| 946 | /* DA7218_TONE_GEN_CFG1 = 0xA0 */ | |
| 947 | #define DA7218_DTMF_REG_SHIFT 0 | |
| 948 | #define DA7218_DTMF_REG_MASK (0xF << 0) | |
| 949 | #define DA7218_DTMF_REG_MAX 16 | |
| 950 | #define DA7218_DTMF_EN_SHIFT 4 | |
| 951 | #define DA7218_DTMF_EN_MASK (0x1 << 4) | |
| 952 | #define DA7218_START_STOPN_SHIFT 7 | |
| 953 | #define DA7218_START_STOPN_MASK (0x1 << 7) | |
| 954 | ||
| 955 | /* DA7218_TONE_GEN_CFG2 = 0xA1 */ | |
| 956 | #define DA7218_SWG_SEL_SHIFT 0 | |
| 957 | #define DA7218_SWG_SEL_MASK (0x3 << 0) | |
| 958 | #define DA7218_SWG_SEL_MAX 4 | |
| 959 | ||
| 960 | /* DA7218_TONE_GEN_FREQ1_L = 0xA2 */ | |
| 961 | #define DA7218_FREQ1_L_SHIFT 0 | |
| 962 | #define DA7218_FREQ1_L_MASK (0xFF << 0) | |
| 963 | #define DA7218_FREQ_MAX 0xFFFF | |
| 964 | ||
| 965 | /* DA7218_TONE_GEN_FREQ1_U = 0xA3 */ | |
| 966 | #define DA7218_FREQ1_U_SHIFT 0 | |
| 967 | #define DA7218_FREQ1_U_MASK (0xFF << 0) | |
| 968 | ||
| 969 | /* DA7218_TONE_GEN_FREQ2_L = 0xA4 */ | |
| 970 | #define DA7218_FREQ2_L_SHIFT 0 | |
| 971 | #define DA7218_FREQ2_L_MASK (0xFF << 0) | |
| 972 | ||
| 973 | /* DA7218_TONE_GEN_FREQ2_U = 0xA5 */ | |
| 974 | #define DA7218_FREQ2_U_SHIFT 0 | |
| 975 | #define DA7218_FREQ2_U_MASK (0xFF << 0) | |
| 976 | ||
| 977 | /* DA7218_TONE_GEN_CYCLES = 0xA6 */ | |
| 978 | #define DA7218_BEEP_CYCLES_SHIFT 0 | |
| 979 | #define DA7218_BEEP_CYCLES_MASK (0x7 << 0) | |
| 980 | ||
| 981 | /* DA7218_TONE_GEN_ON_PER = 0xA7 */ | |
| 982 | #define DA7218_BEEP_ON_PER_SHIFT 0 | |
| 983 | #define DA7218_BEEP_ON_PER_MASK (0x3F << 0) | |
| 984 | ||
| 985 | /* DA7218_TONE_GEN_OFF_PER = 0xA8 */ | |
| 986 | #define DA7218_BEEP_OFF_PER_SHIFT 0 | |
| 987 | #define DA7218_BEEP_OFF_PER_MASK (0x3F << 0) | |
| 988 | #define DA7218_BEEP_ON_OFF_MAX 0x3F | |
| 989 | ||
| 990 | /* DA7218_CP_CTRL = 0xAC */ | |
| 991 | #define DA7218_CP_MOD_SHIFT 2 | |
| 992 | #define DA7218_CP_MOD_MASK (0x3 << 2) | |
| 993 | #define DA7218_CP_MCHANGE_SHIFT 4 | |
| 994 | #define DA7218_CP_MCHANGE_MASK (0x3 << 4) | |
| 995 | #define DA7218_CP_MCHANGE_REL_MASK 0x3 | |
| 996 | #define DA7218_CP_MCHANGE_MAX 3 | |
| 997 | #define DA7218_CP_MCHANGE_LARGEST_VOL 0x1 | |
| 998 | #define DA7218_CP_MCHANGE_DAC_VOL 0x2 | |
| 999 | #define DA7218_CP_MCHANGE_SIG_MAG 0x3 | |
| 1000 | #define DA7218_CP_SMALL_SWITCH_FREQ_EN_SHIFT 6 | |
| 1001 | #define DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK (0x1 << 6) | |
| 1002 | #define DA7218_CP_EN_SHIFT 7 | |
| 1003 | #define DA7218_CP_EN_MASK (0x1 << 7) | |
| 1004 | ||
| 1005 | /* DA7218_CP_DELAY = 0xAD */ | |
| 1006 | #define DA7218_CP_FCONTROL_SHIFT 0 | |
| 1007 | #define DA7218_CP_FCONTROL_MASK (0x7 << 0) | |
| 1008 | #define DA7218_CP_FCONTROL_MAX 6 | |
| 1009 | #define DA7218_CP_TAU_DELAY_SHIFT 3 | |
| 1010 | #define DA7218_CP_TAU_DELAY_MASK (0x7 << 3) | |
| 1011 | #define DA7218_CP_TAU_DELAY_MAX 8 | |
| 1012 | ||
| 1013 | /* DA7218_CP_VOL_THRESHOLD1 = 0xAE */ | |
| 1014 | #define DA7218_CP_THRESH_VDD2_SHIFT 0 | |
| 1015 | #define DA7218_CP_THRESH_VDD2_MASK (0x3F << 0) | |
| 1016 | #define DA7218_CP_THRESH_VDD2_MAX 0x3F | |
| 1017 | ||
| 1018 | /* DA7218_MIC_1_CTRL = 0xB4 */ | |
| 1019 | #define DA7218_MIC_1_AMP_MUTE_EN_SHIFT 6 | |
| 1020 | #define DA7218_MIC_1_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 1021 | #define DA7218_MIC_1_AMP_EN_SHIFT 7 | |
| 1022 | #define DA7218_MIC_1_AMP_EN_MASK (0x1 << 7) | |
| 1023 | ||
| 1024 | /* DA7218_MIC_1_GAIN = 0xB5 */ | |
| 1025 | #define DA7218_MIC_1_AMP_GAIN_SHIFT 0 | |
| 1026 | #define DA7218_MIC_1_AMP_GAIN_MASK (0x7 << 0) | |
| 1027 | #define DA7218_MIC_AMP_GAIN_MAX 0x7 | |
| 1028 | ||
| 1029 | /* DA7218_MIC_1_SELECT = 0xB7 */ | |
| 1030 | #define DA7218_MIC_1_AMP_IN_SEL_SHIFT 0 | |
| 1031 | #define DA7218_MIC_1_AMP_IN_SEL_MASK (0x3 << 0) | |
| 1032 | ||
| 1033 | /* DA7218_MIC_2_CTRL = 0xB8 */ | |
| 1034 | #define DA7218_MIC_2_AMP_MUTE_EN_SHIFT 6 | |
| 1035 | #define DA7218_MIC_2_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 1036 | #define DA7218_MIC_2_AMP_EN_SHIFT 7 | |
| 1037 | #define DA7218_MIC_2_AMP_EN_MASK (0x1 << 7) | |
| 1038 | ||
| 1039 | /* DA7218_MIC_2_GAIN = 0xB9 */ | |
| 1040 | #define DA7218_MIC_2_AMP_GAIN_SHIFT 0 | |
| 1041 | #define DA7218_MIC_2_AMP_GAIN_MASK (0x7 << 0) | |
| 1042 | ||
| 1043 | /* DA7218_MIC_2_SELECT = 0xBB */ | |
| 1044 | #define DA7218_MIC_2_AMP_IN_SEL_SHIFT 0 | |
| 1045 | #define DA7218_MIC_2_AMP_IN_SEL_MASK (0x3 << 0) | |
| 1046 | ||
| 1047 | /* DA7218_IN_1_HPF_FILTER_CTRL = 0xBC */ | |
| 1048 | #define DA7218_IN_1_VOICE_HPF_CORNER_SHIFT 0 | |
| 1049 | #define DA7218_IN_1_VOICE_HPF_CORNER_MASK (0x7 << 0) | |
| 1050 | #define DA7218_IN_VOICE_HPF_CORNER_MAX 8 | |
| 1051 | #define DA7218_IN_1_VOICE_EN_SHIFT 3 | |
| 1052 | #define DA7218_IN_1_VOICE_EN_MASK (0x1 << 3) | |
| 1053 | #define DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT 4 | |
| 1054 | #define DA7218_IN_1_AUDIO_HPF_CORNER_MASK (0x3 << 4) | |
| 1055 | #define DA7218_IN_1_HPF_EN_SHIFT 7 | |
| 1056 | #define DA7218_IN_1_HPF_EN_MASK (0x1 << 7) | |
| 1057 | ||
| 1058 | /* DA7218_IN_2_HPF_FILTER_CTRL = 0xBD */ | |
| 1059 | #define DA7218_IN_2_VOICE_HPF_CORNER_SHIFT 0 | |
| 1060 | #define DA7218_IN_2_VOICE_HPF_CORNER_MASK (0x7 << 0) | |
| 1061 | #define DA7218_IN_2_VOICE_EN_SHIFT 3 | |
| 1062 | #define DA7218_IN_2_VOICE_EN_MASK (0x1 << 3) | |
| 1063 | #define DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT 4 | |
| 1064 | #define DA7218_IN_2_AUDIO_HPF_CORNER_MASK (0x3 << 4) | |
| 1065 | #define DA7218_IN_2_HPF_EN_SHIFT 7 | |
| 1066 | #define DA7218_IN_2_HPF_EN_MASK (0x1 << 7) | |
| 1067 | ||
| 1068 | /* DA7218_ADC_1_CTRL = 0xC0 */ | |
| 1069 | #define DA7218_ADC_1_AAF_EN_SHIFT 2 | |
| 1070 | #define DA7218_ADC_1_AAF_EN_MASK (0x1 << 2) | |
| 1071 | ||
| 1072 | /* DA7218_ADC_2_CTRL = 0xC1 */ | |
| 1073 | #define DA7218_ADC_2_AAF_EN_SHIFT 2 | |
| 1074 | #define DA7218_ADC_2_AAF_EN_MASK (0x1 << 2) | |
| 1075 | ||
| 1076 | /* DA7218_ADC_MODE = 0xC2 */ | |
| 1077 | #define DA7218_ADC_LP_MODE_SHIFT 0 | |
| 1078 | #define DA7218_ADC_LP_MODE_MASK (0x1 << 0) | |
| 1079 | #define DA7218_ADC_LVLDET_MODE_SHIFT 1 | |
| 1080 | #define DA7218_ADC_LVLDET_MODE_MASK (0x1 << 1) | |
| 1081 | #define DA7218_ADC_LVLDET_AUTO_EXIT_SHIFT 2 | |
| 1082 | #define DA7218_ADC_LVLDET_AUTO_EXIT_MASK (0x1 << 2) | |
| 1083 | ||
| 1084 | /* DA7218_MIXOUT_L_CTRL = 0xCC */ | |
| 1085 | #define DA7218_MIXOUT_L_AMP_EN_SHIFT 7 | |
| 1086 | #define DA7218_MIXOUT_L_AMP_EN_MASK (0x1 << 7) | |
| 1087 | ||
| 1088 | /* DA7218_MIXOUT_L_GAIN = 0xCD */ | |
| 1089 | #define DA7218_MIXOUT_L_AMP_GAIN_SHIFT 0 | |
| 1090 | #define DA7218_MIXOUT_L_AMP_GAIN_MASK (0x3 << 0) | |
| 1091 | #define DA7218_MIXOUT_AMP_GAIN_MIN 0x1 | |
| 1092 | #define DA7218_MIXOUT_AMP_GAIN_MAX 0x3 | |
| 1093 | ||
| 1094 | /* DA7218_MIXOUT_R_CTRL = 0xCE */ | |
| 1095 | #define DA7218_MIXOUT_R_AMP_EN_SHIFT 7 | |
| 1096 | #define DA7218_MIXOUT_R_AMP_EN_MASK (0x1 << 7) | |
| 1097 | ||
| 1098 | /* DA7218_MIXOUT_R_GAIN = 0xCF */ | |
| 1099 | #define DA7218_MIXOUT_R_AMP_GAIN_SHIFT 0 | |
| 1100 | #define DA7218_MIXOUT_R_AMP_GAIN_MASK (0x3 << 0) | |
| 1101 | ||
| 1102 | /* DA7218_HP_L_CTRL = 0xD0 */ | |
| 1103 | #define DA7218_HP_L_AMP_MIN_GAIN_EN_SHIFT 2 | |
| 1104 | #define DA7218_HP_L_AMP_MIN_GAIN_EN_MASK (0x1 << 2) | |
| 1105 | #define DA7218_HP_L_AMP_OE_SHIFT 3 | |
| 1106 | #define DA7218_HP_L_AMP_OE_MASK (0x1 << 3) | |
| 1107 | #define DA7218_HP_L_AMP_ZC_EN_SHIFT 4 | |
| 1108 | #define DA7218_HP_L_AMP_ZC_EN_MASK (0x1 << 4) | |
| 1109 | #define DA7218_HP_L_AMP_RAMP_EN_SHIFT 5 | |
| 1110 | #define DA7218_HP_L_AMP_RAMP_EN_MASK (0x1 << 5) | |
| 1111 | #define DA7218_HP_L_AMP_MUTE_EN_SHIFT 6 | |
| 1112 | #define DA7218_HP_L_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 1113 | #define DA7218_HP_L_AMP_EN_SHIFT 7 | |
| 1114 | #define DA7218_HP_L_AMP_EN_MASK (0x1 << 7) | |
| 1115 | #define DA7218_HP_AMP_OE_MASK (0x1 << 3) | |
| 1116 | ||
| 1117 | /* DA7218_HP_L_GAIN = 0xD1 */ | |
| 1118 | #define DA7218_HP_L_AMP_GAIN_SHIFT 0 | |
| 1119 | #define DA7218_HP_L_AMP_GAIN_MASK (0x3F << 0) | |
| 1120 | #define DA7218_HP_AMP_GAIN_MIN 0x15 | |
| 1121 | #define DA7218_HP_AMP_GAIN_MAX 0x3F | |
| 1122 | ||
| 1123 | /* DA7218_HP_R_CTRL = 0xD2 */ | |
| 1124 | #define DA7218_HP_R_AMP_MIN_GAIN_EN_SHIFT 2 | |
| 1125 | #define DA7218_HP_R_AMP_MIN_GAIN_EN_MASK (0x1 << 2) | |
| 1126 | #define DA7218_HP_R_AMP_OE_SHIFT 3 | |
| 1127 | #define DA7218_HP_R_AMP_OE_MASK (0x1 << 3) | |
| 1128 | #define DA7218_HP_R_AMP_ZC_EN_SHIFT 4 | |
| 1129 | #define DA7218_HP_R_AMP_ZC_EN_MASK (0x1 << 4) | |
| 1130 | #define DA7218_HP_R_AMP_RAMP_EN_SHIFT 5 | |
| 1131 | #define DA7218_HP_R_AMP_RAMP_EN_MASK (0x1 << 5) | |
| 1132 | #define DA7218_HP_R_AMP_MUTE_EN_SHIFT 6 | |
| 1133 | #define DA7218_HP_R_AMP_MUTE_EN_MASK (0x1 << 6) | |
| 1134 | #define DA7218_HP_R_AMP_EN_SHIFT 7 | |
| 1135 | #define DA7218_HP_R_AMP_EN_MASK (0x1 << 7) | |
| 1136 | ||
| 1137 | /* DA7218_HP_R_GAIN = 0xD3 */ | |
| 1138 | #define DA7218_HP_R_AMP_GAIN_SHIFT 0 | |
| 1139 | #define DA7218_HP_R_AMP_GAIN_MASK (0x3F << 0) | |
| 1140 | ||
| 1141 | /* DA7218_HP_SNGL_CTRL = 0xD4 */ | |
| 1142 | #define DA7218_HP_AMP_STEREO_DETECT_STATUS_SHIFT 0 | |
| 1143 | #define DA7218_HP_AMP_STEREO_DETECT_STATUS_MASK (0x1 << 0) | |
| 1144 | #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_SHIFT 1 | |
| 1145 | #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 1) | |
| 1146 | #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_SHIFT 2 | |
| 1147 | #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 2) | |
| 1148 | #define DA7218_HP_AMP_LOAD_DETECT_EN_SHIFT 6 | |
| 1149 | #define DA7218_HP_AMP_LOAD_DETECT_EN_MASK (0x1 << 6) | |
| 1150 | #define DA7218_HP_AMP_STEREO_DETECT_EN_SHIFT 7 | |
| 1151 | #define DA7218_HP_AMP_STEREO_DETECT_EN_MASK (0x1 << 7) | |
| 1152 | ||
| 1153 | /* DA7218_HP_DIFF_CTRL = 0xD5 */ | |
| 1154 | #define DA7218_HP_AMP_DIFF_MODE_EN_SHIFT 0 | |
| 1155 | #define DA7218_HP_AMP_DIFF_MODE_EN_MASK (0x1 << 0) | |
| 1156 | #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_SHIFT 4 | |
| 1157 | #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK (0x1 << 4) | |
| 1158 | ||
| 1159 | /* DA7218_HP_DIFF_UNLOCK = 0xD7 */ | |
| 1160 | #define DA7218_HP_DIFF_UNLOCK_SHIFT 0 | |
| 1161 | #define DA7218_HP_DIFF_UNLOCK_MASK (0x1 << 0) | |
| 1162 | #define DA7218_HP_DIFF_UNLOCK_VAL 0xC3 | |
| 1163 | ||
| 1164 | /* DA7218_HPLDET_JACK = 0xD8 */ | |
| 1165 | #define DA7218_HPLDET_JACK_RATE_SHIFT 0 | |
| 1166 | #define DA7218_HPLDET_JACK_RATE_MASK (0x7 << 0) | |
| 1167 | #define DA7218_HPLDET_JACK_DEBOUNCE_SHIFT 3 | |
| 1168 | #define DA7218_HPLDET_JACK_DEBOUNCE_MASK (0x3 << 3) | |
| 1169 | #define DA7218_HPLDET_JACK_THR_SHIFT 5 | |
| 1170 | #define DA7218_HPLDET_JACK_THR_MASK (0x3 << 5) | |
| 1171 | #define DA7218_HPLDET_JACK_EN_SHIFT 7 | |
| 1172 | #define DA7218_HPLDET_JACK_EN_MASK (0x1 << 7) | |
| 1173 | ||
| 1174 | /* DA7218_HPLDET_CTRL = 0xD9 */ | |
| 1175 | #define DA7218_HPLDET_COMP_INV_SHIFT 0 | |
| 1176 | #define DA7218_HPLDET_COMP_INV_MASK (0x1 << 0) | |
| 1177 | #define DA7218_HPLDET_HYST_EN_SHIFT 1 | |
| 1178 | #define DA7218_HPLDET_HYST_EN_MASK (0x1 << 1) | |
| 1179 | #define DA7218_HPLDET_DISCHARGE_EN_SHIFT 7 | |
| 1180 | #define DA7218_HPLDET_DISCHARGE_EN_MASK (0x1 << 7) | |
| 1181 | ||
| 1182 | /* DA7218_HPLDET_TEST = 0xDA */ | |
| 1183 | #define DA7218_HPLDET_COMP_STS_SHIFT 4 | |
| 1184 | #define DA7218_HPLDET_COMP_STS_MASK (0x1 << 4) | |
| 1185 | ||
| 1186 | /* DA7218_REFERENCES = 0xDC */ | |
| 1187 | #define DA7218_BIAS_EN_SHIFT 3 | |
| 1188 | #define DA7218_BIAS_EN_MASK (0x1 << 3) | |
| 1189 | ||
| 1190 | /* DA7218_IO_CTRL = 0xE0 */ | |
| 1191 | #define DA7218_IO_VOLTAGE_LEVEL_SHIFT 0 | |
| 1192 | #define DA7218_IO_VOLTAGE_LEVEL_MASK (0x1 << 0) | |
| 1193 | #define DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V 0 | |
| 1194 | #define DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V 1 | |
| 1195 | ||
| 1196 | /* DA7218_LDO_CTRL = 0xE1 */ | |
| 1197 | #define DA7218_LDO_LEVEL_SELECT_SHIFT 4 | |
| 1198 | #define DA7218_LDO_LEVEL_SELECT_MASK (0x3 << 4) | |
| 1199 | #define DA7218_LDO_EN_SHIFT 7 | |
| 1200 | #define DA7218_LDO_EN_MASK (0x1 << 7) | |
| 1201 | ||
| 1202 | /* DA7218_SIDETONE_CTRL = 0xE4 */ | |
| 1203 | #define DA7218_SIDETONE_MUTE_EN_SHIFT 6 | |
| 1204 | #define DA7218_SIDETONE_MUTE_EN_MASK (0x1 << 6) | |
| 1205 | #define DA7218_SIDETONE_FILTER_EN_SHIFT 7 | |
| 1206 | #define DA7218_SIDETONE_FILTER_EN_MASK (0x1 << 7) | |
| 1207 | ||
| 1208 | /* DA7218_SIDETONE_IN_SELECT = 0xE5 */ | |
| 1209 | #define DA7218_SIDETONE_IN_SELECT_SHIFT 0 | |
| 1210 | #define DA7218_SIDETONE_IN_SELECT_MASK (0x3 << 0) | |
| 1211 | #define DA7218_SIDETONE_IN_SELECT_MAX 4 | |
| 1212 | ||
| 1213 | /* DA7218_SIDETONE_GAIN = 0xE6 */ | |
| 1214 | #define DA7218_SIDETONE_GAIN_SHIFT 0 | |
| 1215 | #define DA7218_SIDETONE_GAIN_MASK (0x1F << 0) | |
| 1216 | ||
| 1217 | /* DA7218_DROUTING_ST_OUTFILT_1L = 0xE8 */ | |
| 1218 | #define DA7218_OUTFILT_ST_1L_SRC_SHIFT 0 | |
| 1219 | #define DA7218_OUTFILT_ST_1L_SRC_MASK (0x7 << 0) | |
| 1220 | #define DA7218_DMIX_ST_SRC_OUTFILT1L 0 | |
| 1221 | #define DA7218_DMIX_ST_SRC_OUTFILT1R 1 | |
| 1222 | #define DA7218_DMIX_ST_SRC_SIDETONE 2 | |
| 1223 | ||
| 1224 | /* DA7218_DROUTING_ST_OUTFILT_1R = 0xE9 */ | |
| 1225 | #define DA7218_OUTFILT_ST_1R_SRC_SHIFT 0 | |
| 1226 | #define DA7218_OUTFILT_ST_1R_SRC_MASK (0x7 << 0) | |
| 1227 | ||
| 1228 | /* DA7218_SIDETONE_BIQ_3STAGE_DATA = 0xEA */ | |
| 1229 | #define DA7218_SIDETONE_BIQ_3STAGE_DATA_SHIFT 0 | |
| 1230 | #define DA7218_SIDETONE_BIQ_3STAGE_DATA_MASK (0xFF << 0) | |
| 1231 | ||
| 1232 | /* DA7218_SIDETONE_BIQ_3STAGE_ADDR = 0xEB */ | |
| 1233 | #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_SHIFT 0 | |
| 1234 | #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_MASK (0x1F << 0) | |
| 1235 | #define DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE 30 | |
| 1236 | ||
| 1237 | /* DA7218_EVENT_STATUS = 0xEC */ | |
| 1238 | #define DA7218_HPLDET_JACK_STS_SHIFT 7 | |
| 1239 | #define DA7218_HPLDET_JACK_STS_MASK (0x1 << 7) | |
| 1240 | ||
| 1241 | /* DA7218_EVENT = 0xED */ | |
| 1242 | #define DA7218_LVL_DET_EVENT_SHIFT 0 | |
| 1243 | #define DA7218_LVL_DET_EVENT_MASK (0x1 << 0) | |
| 1244 | #define DA7218_HPLDET_JACK_EVENT_SHIFT 7 | |
| 1245 | #define DA7218_HPLDET_JACK_EVENT_MASK (0x1 << 7) | |
| 1246 | ||
| 1247 | /* DA7218_EVENT_MASK = 0xEE */ | |
| 1248 | #define DA7218_LVL_DET_EVENT_MSK_SHIFT 0 | |
| 1249 | #define DA7218_LVL_DET_EVENT_MSK_MASK (0x1 << 0) | |
| 1250 | #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_SHIFT 7 | |
| 1251 | #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK (0x1 << 7) | |
| 1252 | ||
| 1253 | /* DA7218_DMIC_1_CTRL = 0xF0 */ | |
| 1254 | #define DA7218_DMIC_1_DATA_SEL_SHIFT 0 | |
| 1255 | #define DA7218_DMIC_1_DATA_SEL_MASK (0x1 << 0) | |
| 1256 | #define DA7218_DMIC_1_SAMPLEPHASE_SHIFT 1 | |
| 1257 | #define DA7218_DMIC_1_SAMPLEPHASE_MASK (0x1 << 1) | |
| 1258 | #define DA7218_DMIC_1_CLK_RATE_SHIFT 2 | |
| 1259 | #define DA7218_DMIC_1_CLK_RATE_MASK (0x1 << 2) | |
| 1260 | #define DA7218_DMIC_1L_EN_SHIFT 6 | |
| 1261 | #define DA7218_DMIC_1L_EN_MASK (0x1 << 6) | |
| 1262 | #define DA7218_DMIC_1R_EN_SHIFT 7 | |
| 1263 | #define DA7218_DMIC_1R_EN_MASK (0x1 << 7) | |
| 1264 | ||
| 1265 | /* DA7218_DMIC_2_CTRL = 0xF1 */ | |
| 1266 | #define DA7218_DMIC_2_DATA_SEL_SHIFT 0 | |
| 1267 | #define DA7218_DMIC_2_DATA_SEL_MASK (0x1 << 0) | |
| 1268 | #define DA7218_DMIC_2_SAMPLEPHASE_SHIFT 1 | |
| 1269 | #define DA7218_DMIC_2_SAMPLEPHASE_MASK (0x1 << 1) | |
| 1270 | #define DA7218_DMIC_2_CLK_RATE_SHIFT 2 | |
| 1271 | #define DA7218_DMIC_2_CLK_RATE_MASK (0x1 << 2) | |
| 1272 | #define DA7218_DMIC_2L_EN_SHIFT 6 | |
| 1273 | #define DA7218_DMIC_2L_EN_MASK (0x1 << 6) | |
| 1274 | #define DA7218_DMIC_2R_EN_SHIFT 7 | |
| 1275 | #define DA7218_DMIC_2R_EN_MASK (0x1 << 7) | |
| 1276 | ||
| 1277 | /* DA7218_IN_1L_GAIN = 0xF4 */ | |
| 1278 | #define DA7218_IN_1L_DIGITAL_GAIN_SHIFT 0 | |
| 1279 | #define DA7218_IN_1L_DIGITAL_GAIN_MASK (0x7F << 0) | |
| 1280 | #define DA7218_IN_DIGITAL_GAIN_MAX 0x7F | |
| 1281 | ||
| 1282 | /* DA7218_IN_1R_GAIN = 0xF5 */ | |
| 1283 | #define DA7218_IN_1R_DIGITAL_GAIN_SHIFT 0 | |
| 1284 | #define DA7218_IN_1R_DIGITAL_GAIN_MASK (0x7F << 0) | |
| 1285 | ||
| 1286 | /* DA7218_IN_2L_GAIN = 0xF6 */ | |
| 1287 | #define DA7218_IN_2L_DIGITAL_GAIN_SHIFT 0 | |
| 1288 | #define DA7218_IN_2L_DIGITAL_GAIN_MASK (0x7F << 0) | |
| 1289 | ||
| 1290 | /* DA7218_IN_2R_GAIN = 0xF7 */ | |
| 1291 | #define DA7218_IN_2R_DIGITAL_GAIN_SHIFT 0 | |
| 1292 | #define DA7218_IN_2R_DIGITAL_GAIN_MASK (0x7F << 0) | |
| 1293 | ||
| 1294 | /* DA7218_OUT_1L_GAIN = 0xF8 */ | |
| 1295 | #define DA7218_OUT_1L_DIGITAL_GAIN_SHIFT 0 | |
| 1296 | #define DA7218_OUT_1L_DIGITAL_GAIN_MASK (0xFF << 0) | |
| 1297 | #define DA7218_OUT_DIGITAL_GAIN_MIN 0x0 | |
| 1298 | #define DA7218_OUT_DIGITAL_GAIN_MAX 0x97 | |
| 1299 | ||
| 1300 | /* DA7218_OUT_1R_GAIN = 0xF9 */ | |
| 1301 | #define DA7218_OUT_1R_DIGITAL_GAIN_SHIFT 0 | |
| 1302 | #define DA7218_OUT_1R_DIGITAL_GAIN_MASK (0xFF << 0) | |
| 1303 | ||
| 1304 | /* DA7218_MICBIAS_CTRL = 0xFC */ | |
| 1305 | #define DA7218_MICBIAS_1_LEVEL_SHIFT 0 | |
| 1306 | #define DA7218_MICBIAS_1_LEVEL_MASK (0x7 << 0) | |
| 1307 | #define DA7218_MICBIAS_1_LP_MODE_SHIFT 3 | |
| 1308 | #define DA7218_MICBIAS_1_LP_MODE_MASK (0x1 << 3) | |
| 1309 | #define DA7218_MICBIAS_2_LEVEL_SHIFT 4 | |
| 1310 | #define DA7218_MICBIAS_2_LEVEL_MASK (0x7 << 4) | |
| 1311 | #define DA7218_MICBIAS_2_LP_MODE_SHIFT 7 | |
| 1312 | #define DA7218_MICBIAS_2_LP_MODE_MASK (0x1 << 7) | |
| 1313 | ||
| 1314 | /* DA7218_MICBIAS_EN = 0xFD */ | |
| 1315 | #define DA7218_MICBIAS_1_EN_SHIFT 0 | |
| 1316 | #define DA7218_MICBIAS_1_EN_MASK (0x1 << 0) | |
| 1317 | #define DA7218_MICBIAS_2_EN_SHIFT 4 | |
| 1318 | #define DA7218_MICBIAS_2_EN_MASK (0x1 << 4) | |
| 1319 | ||
| 1320 | ||
| 1321 | /* | |
| 1322 | * General defines & data | |
| 1323 | */ | |
| 1324 | ||
| 1325 | /* Register inversion */ | |
| 1326 | #define DA7218_NO_INVERT 0 | |
| 1327 | #define DA7218_INVERT 1 | |
| 1328 | ||
| 1329 | /* Byte related defines */ | |
| 1330 | #define DA7218_BYTE_SHIFT 8 | |
| 1331 | #define DA7218_BYTE_MASK 0xFF | |
| 1332 | #define DA7218_2BYTE_SHIFT 16 | |
| 1333 | #define DA7218_2BYTE_MASK 0xFFFF | |
| 1334 | ||
| 1335 | /* PLL Output Frequencies */ | |
| 1336 | #define DA7218_PLL_FREQ_OUT_90316 90316800 | |
| 1337 | #define DA7218_PLL_FREQ_OUT_98304 98304000 | |
| 1338 | ||
| 1339 | /* ALC Calibration */ | |
| 1340 | #define DA7218_ALC_CALIB_DELAY_MIN 2500 | |
| 1341 | #define DA7218_ALC_CALIB_DELAY_MAX 5000 | |
| 1342 | #define DA7218_ALC_CALIB_MAX_TRIES 5 | |
| 1343 | ||
| 1344 | /* Ref Oscillator */ | |
| 1345 | #define DA7218_REF_OSC_CHECK_DELAY_MIN 5000 | |
| 1346 | #define DA7218_REF_OSC_CHECK_DELAY_MAX 10000 | |
| 1347 | #define DA7218_REF_OSC_CHECK_TRIES 4 | |
| 1348 | ||
| 1349 | /* SRM */ | |
| 1350 | #define DA7218_SRM_CHECK_DELAY 50 | |
| 1351 | #define DA7218_SRM_CHECK_TRIES 8 | |
| 1352 | ||
| 1353 | /* Mic Level Detect */ | |
| 1354 | #define DA7218_MIC_LVL_DET_DELAY 50 | |
| 1355 | ||
| 1356 | enum da7218_biq_cfg { | |
| 1357 | DA7218_BIQ_CFG_DATA = 0, | |
| 1358 | DA7218_BIQ_CFG_ADDR, | |
| 1359 | DA7218_BIQ_CFG_SIZE, | |
| 1360 | }; | |
| 1361 | ||
| 1362 | enum da7218_clk_src { | |
| 1363 | DA7218_CLKSRC_MCLK = 0, | |
| 1364 | DA7218_CLKSRC_MCLK_SQR, | |
| 1365 | }; | |
| 1366 | ||
| 1367 | enum da7218_sys_clk { | |
| 1368 | DA7218_SYSCLK_MCLK = 0, | |
| 1369 | DA7218_SYSCLK_PLL, | |
| 1370 | DA7218_SYSCLK_PLL_SRM, | |
| 1371 | DA7218_SYSCLK_PLL_32KHZ | |
| 1372 | }; | |
| 1373 | ||
| 1374 | enum da7218_dev_id { | |
| 1375 | DA7217_DEV_ID = 0, | |
| 1376 | DA7218_DEV_ID, | |
| 1377 | }; | |
| 1378 | ||
| 1379 | /* Regulators */ | |
| 1380 | enum da7218_supplies { | |
| 1381 | DA7218_SUPPLY_VDD = 0, | |
| 1382 | DA7218_SUPPLY_VDDMIC, | |
| 1383 | DA7218_SUPPLY_VDDIO, | |
| 1384 | DA7218_NUM_SUPPLIES, | |
| 1385 | }; | |
| 1386 | ||
| 1387 | /* Private data */ | |
| 1388 | struct da7218_priv { | |
| 1389 | struct da7218_pdata *pdata; | |
| 1390 | ||
| 1391 | struct regulator_bulk_data supplies[DA7218_NUM_SUPPLIES]; | |
| 1392 | struct regmap *regmap; | |
| 1393 | int dev_id; | |
| 1394 | ||
| 1395 | struct snd_soc_jack *jack; | |
| 1396 | int irq; | |
| 1397 | ||
| 1398 | struct clk *mclk; | |
| 1399 | unsigned int mclk_rate; | |
| 1400 | ||
| 1401 | bool hp_single_supply; | |
| 1402 | bool master; | |
| 1403 | u8 alc_en; | |
| 1404 | u8 in_filt_en; | |
| 1405 | u8 mic_lvl_det_en; | |
| 1406 | ||
| 1407 | u8 biq_5stage_coeff[DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE]; | |
| 1408 | u8 stbiq_3stage_coeff[DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE]; | |
| 1409 | }; | |
| 1410 | ||
| 1411 | /* HP detect control */ | |
| 1412 | int da7218_hpldet(struct snd_soc_codec *codec, struct snd_soc_jack *jack); | |
| 1413 | ||
| 1414 | #endif /* _DA7218_H */ |