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Merge remote-tracking branches 'asoc/topic/mc13783', 'asoc/topic/msm8916', 'asoc...
[linux-2.6-block.git] / sound / soc / codecs / da7213.c
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ef5c2eba
AT		 1/*
2 * DA7213 ALSA SoC Codec Driver
3 *
4 * Copyright (c) 2013 Dialog Semiconductor
5 *
6 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7 * Based on DA9055 ALSA SoC codec driver.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
8f42c23a 15#include <linux/acpi.h>
0e54153b
AT		 16#include <linux/of_device.h>
17#include <linux/property.h>
6e7c4443 18#include <linux/clk.h>
ef5c2eba
AT		 19#include <linux/delay.h>
20#include <linux/i2c.h>
21#include <linux/regmap.h>
22#include <linux/slab.h>
23#include <linux/module.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29
30#include <sound/da7213.h>
31#include "da7213.h"
32
33
34/* Gain and Volume */
32e933be 35static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
ef5c2eba
AT		 36 /* -54dB */
37 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
38 /* -52.5dB to 15dB */
39 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
32e933be 40);
ef5c2eba 41
32e933be 42static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
ef5c2eba
AT		 43 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
44 /* -78dB to 12dB */
45 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
32e933be 46);
ef5c2eba 47
32e933be 48static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
ef5c2eba
AT		 49 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
50 /* 0dB to 36dB */
51 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
32e933be 52);
ef5c2eba
AT		 53
54static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
55static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
56static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
57static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
58static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
59static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
60static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
61
62/* ADC and DAC voice mode (8kHz) high pass cutoff value */
63static const char * const da7213_voice_hpf_corner_txt[] = {
64 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
65};
66
c99f8b21
TI		 67static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
68 DA7213_DAC_FILTERS1,
69 DA7213_VOICE_HPF_CORNER_SHIFT,
70 da7213_voice_hpf_corner_txt);
ef5c2eba 71
c99f8b21
TI		 72static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
73 DA7213_ADC_FILTERS1,
74 DA7213_VOICE_HPF_CORNER_SHIFT,
75 da7213_voice_hpf_corner_txt);
ef5c2eba
AT		 76
77/* ADC and DAC high pass filter cutoff value */
78static const char * const da7213_audio_hpf_corner_txt[] = {
79 "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
80};
81
c99f8b21
TI		 82static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
83 DA7213_DAC_FILTERS1
84 , DA7213_AUDIO_HPF_CORNER_SHIFT,
85 da7213_audio_hpf_corner_txt);
ef5c2eba 86
c99f8b21
TI		 87static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
88 DA7213_ADC_FILTERS1,
89 DA7213_AUDIO_HPF_CORNER_SHIFT,
90 da7213_audio_hpf_corner_txt);
ef5c2eba
AT		 91
92/* Gain ramping rate value */
93static const char * const da7213_gain_ramp_rate_txt[] = {
94 "nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
95 "nominal rate / 32"
96};
97
c99f8b21
TI		 98static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
99 DA7213_GAIN_RAMP_CTRL,
100 DA7213_GAIN_RAMP_RATE_SHIFT,
101 da7213_gain_ramp_rate_txt);
ef5c2eba
AT		 102
103/* DAC noise gate setup time value */
104static const char * const da7213_dac_ng_setup_time_txt[] = {
105 "256 samples", "512 samples", "1024 samples", "2048 samples"
106};
107
c99f8b21
TI		 108static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
109 DA7213_DAC_NG_SETUP_TIME,
110 DA7213_DAC_NG_SETUP_TIME_SHIFT,
111 da7213_dac_ng_setup_time_txt);
ef5c2eba
AT		 112
113/* DAC noise gate rampup rate value */
114static const char * const da7213_dac_ng_rampup_txt[] = {
115 "0.02 ms/dB", "0.16 ms/dB"
116};
117
c99f8b21
TI		 118static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
119 DA7213_DAC_NG_SETUP_TIME,
120 DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
121 da7213_dac_ng_rampup_txt);
ef5c2eba
AT		 122
123/* DAC noise gate rampdown rate value */
124static const char * const da7213_dac_ng_rampdown_txt[] = {
125 "0.64 ms/dB", "20.48 ms/dB"
126};
127
c99f8b21
TI		 128static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
129 DA7213_DAC_NG_SETUP_TIME,
130 DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
131 da7213_dac_ng_rampdown_txt);
ef5c2eba
AT		 132
133/* DAC soft mute rate value */
134static const char * const da7213_dac_soft_mute_rate_txt[] = {
135 "1", "2", "4", "8", "16", "32", "64"
136};
137
c99f8b21
TI		 138static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
139 DA7213_DAC_FILTERS5,
140 DA7213_DAC_SOFTMUTE_RATE_SHIFT,
141 da7213_dac_soft_mute_rate_txt);
ef5c2eba
AT		 142
143/* ALC Attack Rate select */
144static const char * const da7213_alc_attack_rate_txt[] = {
145 "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
146 "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
147};
148
c99f8b21
TI		 149static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
150 DA7213_ALC_CTRL2,
151 DA7213_ALC_ATTACK_SHIFT,
152 da7213_alc_attack_rate_txt);
ef5c2eba
AT		 153
154/* ALC Release Rate select */
155static const char * const da7213_alc_release_rate_txt[] = {
156 "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
157 "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
158};
159
c99f8b21
TI		 160static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
161 DA7213_ALC_CTRL2,
162 DA7213_ALC_RELEASE_SHIFT,
163 da7213_alc_release_rate_txt);
ef5c2eba
AT		 164
165/* ALC Hold Time select */
166static const char * const da7213_alc_hold_time_txt[] = {
167 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
168 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
169 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
170};
171
c99f8b21
TI		 172static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
173 DA7213_ALC_CTRL3,
174 DA7213_ALC_HOLD_SHIFT,
175 da7213_alc_hold_time_txt);
ef5c2eba
AT		 176
177/* ALC Input Signal Tracking rate select */
178static const char * const da7213_alc_integ_rate_txt[] = {
179 "1/4", "1/16", "1/256", "1/65536"
180};
181
c99f8b21
TI		 182static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
183 DA7213_ALC_CTRL3,
184 DA7213_ALC_INTEG_ATTACK_SHIFT,
185 da7213_alc_integ_rate_txt);
ef5c2eba 186
c99f8b21
TI		 187static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
188 DA7213_ALC_CTRL3,
189 DA7213_ALC_INTEG_RELEASE_SHIFT,
190 da7213_alc_integ_rate_txt);
ef5c2eba
AT		 191
192
193/*
194 * Control Functions
195 */
196
197static int da7213_get_alc_data(struct snd_soc_codec *codec, u8 reg_val)
198{
199 int mid_data, top_data;
200 int sum = 0;
201 u8 iteration;
202
203 for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
204 iteration++) {
205 /* Select the left or right channel and capture data */
206 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
207
208 /* Select middle 8 bits for read back from data register */
209 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
210 reg_val | DA7213_ALC_DATA_MIDDLE);
211 mid_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
212
213 /* Select top 8 bits for read back from data register */
214 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
215 reg_val | DA7213_ALC_DATA_TOP);
216 top_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
217
218 sum += ((mid_data << 8) | (top_data << 16));
219 }
220
221 return sum / DA7213_ALC_AVG_ITERATIONS;
222}
223
224static void da7213_alc_calib_man(struct snd_soc_codec *codec)
225{
226 u8 reg_val;
227 int avg_left_data, avg_right_data, offset_l, offset_r;
228
229 /* Calculate average for Left and Right data */
230 /* Left Data */
231 avg_left_data = da7213_get_alc_data(codec,
232 DA7213_ALC_CIC_OP_CHANNEL_LEFT);
233 /* Right Data */
234 avg_right_data = da7213_get_alc_data(codec,
235 DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
236
237 /* Calculate DC offset */
238 offset_l = -avg_left_data;
239 offset_r = -avg_right_data;
240
241 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
242 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
243 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
244 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
245
246 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
247 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
248 reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
249 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
250
251 /* Enable analog/digital gain mode & offset cancellation */
252 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
253 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
254 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
255}
256
257static void da7213_alc_calib_auto(struct snd_soc_codec *codec)
258{
259 u8 alc_ctrl1;
260
261 /* Begin auto calibration and wait for completion */
262 snd_soc_update_bits(codec, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
263 DA7213_ALC_AUTO_CALIB_EN);
264 do {
265 alc_ctrl1 = snd_soc_read(codec, DA7213_ALC_CTRL1);
266 } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
267
268 /* If auto calibration fails, fall back to digital gain only mode */
269 if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
270 dev_warn(codec->dev,
271 "ALC auto calibration failed with overflow\n");
272 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
273 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
274 0);
275 } else {
276 /* Enable analog/digital gain mode & offset cancellation */
277 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
278 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
279 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
280 }
281
282}
283
284static void da7213_alc_calib(struct snd_soc_codec *codec)
285{
286 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
287 u8 adc_l_ctrl, adc_r_ctrl;
288 u8 mixin_l_sel, mixin_r_sel;
289 u8 mic_1_ctrl, mic_2_ctrl;
290
291 /* Save current values from ADC control registers */
292 adc_l_ctrl = snd_soc_read(codec, DA7213_ADC_L_CTRL);
293 adc_r_ctrl = snd_soc_read(codec, DA7213_ADC_R_CTRL);
294
295 /* Save current values from MIXIN_L/R_SELECT registers */
296 mixin_l_sel = snd_soc_read(codec, DA7213_MIXIN_L_SELECT);
297 mixin_r_sel = snd_soc_read(codec, DA7213_MIXIN_R_SELECT);
298
299 /* Save current values from MIC control registers */
300 mic_1_ctrl = snd_soc_read(codec, DA7213_MIC_1_CTRL);
301 mic_2_ctrl = snd_soc_read(codec, DA7213_MIC_2_CTRL);
302
303 /* Enable ADC Left and Right */
304 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
305 DA7213_ADC_EN);
306 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
307 DA7213_ADC_EN);
308
309 /* Enable MIC paths */
310 snd_soc_update_bits(codec, DA7213_MIXIN_L_SELECT,
311 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
312 DA7213_MIXIN_L_MIX_SELECT_MIC_2,
313 DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
314 DA7213_MIXIN_L_MIX_SELECT_MIC_2);
315 snd_soc_update_bits(codec, DA7213_MIXIN_R_SELECT,
316 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
317 DA7213_MIXIN_R_MIX_SELECT_MIC_1,
318 DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
319 DA7213_MIXIN_R_MIX_SELECT_MIC_1);
320
321 /* Mute MIC PGAs */
322 snd_soc_update_bits(codec, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
323 DA7213_MUTE_EN);
324 snd_soc_update_bits(codec, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
325 DA7213_MUTE_EN);
326
327 /* Perform calibration */
328 if (da7213->alc_calib_auto)
329 da7213_alc_calib_auto(codec);
330 else
331 da7213_alc_calib_man(codec);
332
333 /* Restore MIXIN_L/R_SELECT registers to their original states */
334 snd_soc_write(codec, DA7213_MIXIN_L_SELECT, mixin_l_sel);
335 snd_soc_write(codec, DA7213_MIXIN_R_SELECT, mixin_r_sel);
336
337 /* Restore ADC control registers to their original states */
338 snd_soc_write(codec, DA7213_ADC_L_CTRL, adc_l_ctrl);
339 snd_soc_write(codec, DA7213_ADC_R_CTRL, adc_r_ctrl);
340
341 /* Restore original values of MIC control registers */
342 snd_soc_write(codec, DA7213_MIC_1_CTRL, mic_1_ctrl);
343 snd_soc_write(codec, DA7213_MIC_2_CTRL, mic_2_ctrl);
344}
345
346static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
348{
ea53bf77 349 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 350 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
351 int ret;
352
353 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
354
355 /* If ALC in operation, make sure calibrated offsets are updated */
356 if ((!ret) && (da7213->alc_en))
357 da7213_alc_calib(codec);
358
359 return ret;
360}
361
362static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
364{
ea53bf77 365 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
ef5c2eba
AT		 366 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
367
368 /* Force ALC offset calibration if enabling ALC */
369 if (ucontrol->value.integer.value[0] ||
370 ucontrol->value.integer.value[1]) {
371 if (!da7213->alc_en) {
372 da7213_alc_calib(codec);
373 da7213->alc_en = true;
374 }
375 } else {
376 da7213->alc_en = false;
377 }
378
379 return snd_soc_put_volsw(kcontrol, ucontrol);
380}
381
382
383/*
384 * KControls
385 */
386
387static const struct snd_kcontrol_new da7213_snd_controls[] = {
388
389 /* Volume controls */
390 SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
391 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
392 DA7213_NO_INVERT, mic_vol_tlv),
393 SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
394 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
395 DA7213_NO_INVERT, mic_vol_tlv),
396 SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
397 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
398 DA7213_NO_INVERT, aux_vol_tlv),
399 SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
400 DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
401 DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
402 snd_soc_get_volsw_2r, da7213_put_mixin_gain,
403 mixin_gain_tlv),
404 SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
405 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
406 DA7213_NO_INVERT, digital_gain_tlv),
407 SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
408 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
409 DA7213_NO_INVERT, digital_gain_tlv),
410 SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
411 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
412 DA7213_NO_INVERT, hp_vol_tlv),
413 SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
414 DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
415 DA7213_NO_INVERT, lineout_vol_tlv),
416
417 /* DAC Equalizer controls */
418 SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
419 DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
420 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
421 DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
422 DA7213_NO_INVERT, eq_gain_tlv),
423 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
424 DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
425 DA7213_NO_INVERT, eq_gain_tlv),
426 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
427 DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
428 DA7213_NO_INVERT, eq_gain_tlv),
429 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
430 DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
431 DA7213_NO_INVERT, eq_gain_tlv),
432 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
433 DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
434 DA7213_NO_INVERT, eq_gain_tlv),
435
436 /* High Pass Filter and Voice Mode controls */
437 SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
438 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
439 SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
440 SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
441 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
442 DA7213_NO_INVERT),
443 SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
444
445 SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
446 DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
447 SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
448 SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
449 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
450 DA7213_NO_INVERT),
451 SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
452
453 /* Mute controls */
454 SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
455 DA7213_MUTE_EN_MAX, DA7213_INVERT),
456 SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
457 DA7213_MUTE_EN_MAX, DA7213_INVERT),
458 SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
459 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
460 SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
461 DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
462 DA7213_MUTE_EN_MAX, DA7213_INVERT),
463 SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
464 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
465 SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
466 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
467 SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
468 DA7213_MUTE_EN_MAX, DA7213_INVERT),
469 SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
470 DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
471 DA7213_NO_INVERT),
472 SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
473
474 /* Zero Cross controls */
475 SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
476 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
477 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
478 DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
479 DA7213_NO_INVERT),
480 SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
481 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
482
483 /* Gain Ramping controls */
484 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
485 DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
486 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
487 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
488 DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
489 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
490 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
491 DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
492 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
493 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
494 DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
495 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
496 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
497 DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
498 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
499 SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
500 DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
501 DA7213_NO_INVERT),
502 SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
503
504 /* DAC Noise Gate controls */
505 SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
506 DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
507 SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
508 SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
509 SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
510 SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
511 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
512 DA7213_NO_INVERT),
513 SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
514 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
515 DA7213_NO_INVERT),
516
517 /* DAC Routing & Inversion */
518 SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
519 DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
520 DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
521 SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
522 DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
523 DA7213_NO_INVERT),
524
525 /* DMIC controls */
526 SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
527 DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
528 DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
529
530 /* ALC Controls */
531 SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
532 DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
533 DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
534 SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
535 SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
536 SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
537 /*
538 * Rate at which input signal envelope is tracked as the signal gets
539 * larger
540 */
541 SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
542 /*
543 * Rate at which input signal envelope is tracked as the signal gets
544 * smaller
545 */
546 SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
547 SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
548 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
549 DA7213_INVERT, alc_threshold_tlv),
550 SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
551 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
552 DA7213_INVERT, alc_threshold_tlv),
553 SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
554 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
555 DA7213_INVERT, alc_threshold_tlv),
556 SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
557 DA7213_ALC_ATTEN_MAX_SHIFT,
558 DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
559 alc_gain_tlv),
560 SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
561 DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
562 DA7213_NO_INVERT, alc_gain_tlv),
563 SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
564 DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
565 DA7213_NO_INVERT, alc_analog_gain_tlv),
566 SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
567 DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
568 DA7213_NO_INVERT, alc_analog_gain_tlv),
569 SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
570 DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
571 DA7213_NO_INVERT),
572 SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
573 DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
574 DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
575};
576
577
578/*
579 * DAPM
580 */
581
582/*
583 * Enums
584 */
585
586/* MIC PGA source select */
587static const char * const da7213_mic_amp_in_sel_txt[] = {
588 "Differential", "MIC_P", "MIC_N"
589};
590
c99f8b21
TI		 591static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
592 DA7213_MIC_1_CTRL,
593 DA7213_MIC_AMP_IN_SEL_SHIFT,
594 da7213_mic_amp_in_sel_txt);
ef5c2eba
AT		 595static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
596 SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
597
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TI		 598static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
599 DA7213_MIC_2_CTRL,
600 DA7213_MIC_AMP_IN_SEL_SHIFT,
601 da7213_mic_amp_in_sel_txt);
ef5c2eba
AT		 602static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
603 SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
604
605/* DAI routing select */
606static const char * const da7213_dai_src_txt[] = {
607 "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
608};
609
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TI		 610static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
611 DA7213_DIG_ROUTING_DAI,
612 DA7213_DAI_L_SRC_SHIFT,
613 da7213_dai_src_txt);
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AT		 614static const struct snd_kcontrol_new da7213_dai_l_src_mux =
615 SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
616
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TI		 617static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
618 DA7213_DIG_ROUTING_DAI,
619 DA7213_DAI_R_SRC_SHIFT,
620 da7213_dai_src_txt);
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AT		 621static const struct snd_kcontrol_new da7213_dai_r_src_mux =
622 SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
623
624/* DAC routing select */
625static const char * const da7213_dac_src_txt[] = {
626 "ADC Output Left", "ADC Output Right", "DAI Input Left",
627 "DAI Input Right"
628};
629
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TI		 630static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
631 DA7213_DIG_ROUTING_DAC,
632 DA7213_DAC_L_SRC_SHIFT,
633 da7213_dac_src_txt);
ef5c2eba
AT		 634static const struct snd_kcontrol_new da7213_dac_l_src_mux =
635 SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
636
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TI		 637static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
638 DA7213_DIG_ROUTING_DAC,
639 DA7213_DAC_R_SRC_SHIFT,
640 da7213_dac_src_txt);
ef5c2eba
AT		 641static const struct snd_kcontrol_new da7213_dac_r_src_mux =
642 SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
643
644/*
645 * Mixer Controls
646 */
647
648/* Mixin Left */
649static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
650 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
651 DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
652 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
653 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
654 DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
655 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
656 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
657 DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
658 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
659 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
660 DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
661 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
662};
663
664/* Mixin Right */
665static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
666 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
667 DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
668 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
669 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
670 DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
671 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
672 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
673 DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
674 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
675 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
676 DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
677 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
678};
679
680/* Mixout Left */
681static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
682 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
683 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
684 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
685 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
686 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
687 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
688 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
689 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
690 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
691 SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
692 DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
693 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
694 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
695 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
696 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
697 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
698 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
699 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
700 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
701 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
702 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
703};
704
705/* Mixout Right */
706static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
707 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
708 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
709 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
710 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
711 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
712 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
713 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
714 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
715 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
716 SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
717 DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
718 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
719 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
720 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
721 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
722 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
723 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
724 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
725 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
726 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
727 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
728};
729
730
a0d5caea
AT		 731/*
732 * DAPM Events
733 */
734
735static int da7213_dai_event(struct snd_soc_dapm_widget *w,
736 struct snd_kcontrol *kcontrol, int event)
737{
738 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
739 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
d575b0b0
AT		 740 u8 pll_ctrl, pll_status;
741 int i = 0;
742 bool srm_lock = false;
a0d5caea
AT		 743
744 switch (event) {
745 case SND_SOC_DAPM_PRE_PMU:
746 /* Enable DAI clks for master mode */
747 if (da7213->master)
748 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
749 DA7213_DAI_CLK_EN_MASK,
750 DA7213_DAI_CLK_EN_MASK);
d575b0b0 751
7e28fd46
AT		 752 /* PC synchronised to DAI */
753 snd_soc_update_bits(codec, DA7213_PC_COUNT,
754 DA7213_PC_FREERUN_MASK, 0);
755
d936d527 756 /* If SRM not enabled then nothing more to do */
d575b0b0
AT		 757 pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
758 if (!(pll_ctrl & DA7213_PLL_SRM_EN))
759 return 0;
760
d936d527
AT		 761 /* Assist 32KHz mode PLL lock */
762 if (pll_ctrl & DA7213_PLL_32K_MODE) {
763 snd_soc_write(codec, 0xF0, 0x8B);
764 snd_soc_write(codec, 0xF2, 0x03);
765 snd_soc_write(codec, 0xF0, 0x00);
766 }
767
d575b0b0
AT		 768 /* Check SRM has locked */
769 do {
770 pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
771 if (pll_status & DA7219_PLL_SRM_LOCK) {
772 srm_lock = true;
773 } else {
774 ++i;
775 msleep(50);
776 }
14f814fb 777 } while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock));
d575b0b0
AT		 778
779 if (!srm_lock)
780 dev_warn(codec->dev, "SRM failed to lock\n");
781
a0d5caea
AT		 782 return 0;
783 case SND_SOC_DAPM_POST_PMD:
d936d527
AT		 784 /* Revert 32KHz PLL lock udpates if applied previously */
785 pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
786 if (pll_ctrl & DA7213_PLL_32K_MODE) {
787 snd_soc_write(codec, 0xF0, 0x8B);
788 snd_soc_write(codec, 0xF2, 0x01);
789 snd_soc_write(codec, 0xF0, 0x00);
790 }
791
7e28fd46
AT		 792 /* PC free-running */
793 snd_soc_update_bits(codec, DA7213_PC_COUNT,
794 DA7213_PC_FREERUN_MASK,
795 DA7213_PC_FREERUN_MASK);
796
a0d5caea
AT		 797 /* Disable DAI clks if in master mode */
798 if (da7213->master)
799 snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
800 DA7213_DAI_CLK_EN_MASK, 0);
801 return 0;
802 default:
803 return -EINVAL;
804 }
805}
806
807
ef5c2eba
AT		 808/*
809 * DAPM widgets
810 */
811
812static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
813 /*
814 * Input & Output
815 */
816
817 /* Use a supply here as this controls both input & output DAIs */
818 SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
a0d5caea
AT		 819 DA7213_NO_INVERT, da7213_dai_event,
820 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
ef5c2eba
AT		 821
822 /*
823 * Input
824 */
825
826 /* Input Lines */
827 SND_SOC_DAPM_INPUT("MIC1"),
828 SND_SOC_DAPM_INPUT("MIC2"),
829 SND_SOC_DAPM_INPUT("AUXL"),
830 SND_SOC_DAPM_INPUT("AUXR"),
831
832 /* MUXs for Mic PGA source selection */
833 SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
834 &da7213_mic_1_amp_in_sel_mux),
835 SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
836 &da7213_mic_2_amp_in_sel_mux),
837
838 /* Input PGAs */
839 SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
840 DA7213_NO_INVERT, NULL, 0),
841 SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
842 DA7213_NO_INVERT, NULL, 0),
843 SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
844 DA7213_NO_INVERT, NULL, 0),
845 SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
846 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
847 SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
848 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
849 SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
850 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
851
852 /* Mic Biases */
853 SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
854 DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
855 NULL, 0),
856 SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
857 DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
858 NULL, 0),
859
860 /* Input Mixers */
861 SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
862 &da7213_dapm_mixinl_controls[0],
863 ARRAY_SIZE(da7213_dapm_mixinl_controls)),
864 SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
865 &da7213_dapm_mixinr_controls[0],
866 ARRAY_SIZE(da7213_dapm_mixinr_controls)),
867
868 /* ADCs */
869 SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
870 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
871 SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
872 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
873
874 /* DAI */
875 SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
876 &da7213_dai_l_src_mux),
877 SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
878 &da7213_dai_r_src_mux),
879 SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
880 SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
881
882 /*
883 * Output
884 */
885
886 /* DAI */
887 SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
888 SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
889 SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
890 &da7213_dac_l_src_mux),
891 SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
892 &da7213_dac_r_src_mux),
893
894 /* DACs */
895 SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
896 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
897 SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
898 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
899
900 /* Output Mixers */
901 SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
902 &da7213_dapm_mixoutl_controls[0],
903 ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
904 SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
905 &da7213_dapm_mixoutr_controls[0],
906 ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
907
908 /* Output PGAs */
909 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
910 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
911 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
912 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
913 SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
914 DA7213_NO_INVERT, NULL, 0),
915 SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
916 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
917 SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
918 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
919
920 /* Charge Pump */
921 SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
922 DA7213_NO_INVERT, NULL, 0),
923
924 /* Output Lines */
925 SND_SOC_DAPM_OUTPUT("HPL"),
926 SND_SOC_DAPM_OUTPUT("HPR"),
927 SND_SOC_DAPM_OUTPUT("LINE"),
928};
929
930
931/*
932 * DAPM audio route definition
933 */
934
935static const struct snd_soc_dapm_route da7213_audio_map[] = {
936 /* Dest Connecting Widget source */
937
938 /* Input path */
939 {"MIC1", NULL, "Mic Bias 1"},
940 {"MIC2", NULL, "Mic Bias 2"},
941
942 {"Mic 1 Amp Source MUX", "Differential", "MIC1"},
943 {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
944 {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
945
946 {"Mic 2 Amp Source MUX", "Differential", "MIC2"},
947 {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
948 {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
949
950 {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
951 {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
952
953 {"Aux Left PGA", NULL, "AUXL"},
954 {"Aux Right PGA", NULL, "AUXR"},
955
956 {"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
957 {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
958 {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
959 {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
960
961 {"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
962 {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
963 {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
964 {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
965
966 {"Mixin Left PGA", NULL, "Mixin Left"},
967 {"ADC Left", NULL, "Mixin Left PGA"},
968
969 {"Mixin Right PGA", NULL, "Mixin Right"},
970 {"ADC Right", NULL, "Mixin Right PGA"},
971
972 {"DAI Left Source MUX", "ADC Left", "ADC Left"},
973 {"DAI Left Source MUX", "ADC Right", "ADC Right"},
974 {"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
975 {"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
976
977 {"DAI Right Source MUX", "ADC Left", "ADC Left"},
978 {"DAI Right Source MUX", "ADC Right", "ADC Right"},
979 {"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
980 {"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
981
982 {"DAIOUTL", NULL, "DAI Left Source MUX"},
983 {"DAIOUTR", NULL, "DAI Right Source MUX"},
984
985 {"DAIOUTL", NULL, "DAI"},
986 {"DAIOUTR", NULL, "DAI"},
987
988 /* Output path */
989 {"DAIINL", NULL, "DAI"},
990 {"DAIINR", NULL, "DAI"},
991
992 {"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
993 {"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
994 {"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
995 {"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
996
997 {"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
998 {"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
999 {"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
1000 {"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
1001
1002 {"DAC Left", NULL, "DAC Left Source MUX"},
1003 {"DAC Right", NULL, "DAC Right Source MUX"},
1004
1005 {"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
1006 {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
1007 {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
1008 {"Mixout Left", "DAC Left Switch", "DAC Left"},
1009 {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
1010 {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
1011 {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
1012
1013 {"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
1014 {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
1015 {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
1016 {"Mixout Right", "DAC Right Switch", "DAC Right"},
1017 {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
1018 {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
1019 {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
1020
1021 {"Mixout Left PGA", NULL, "Mixout Left"},
1022 {"Mixout Right PGA", NULL, "Mixout Right"},
1023
1024 {"Headphone Left PGA", NULL, "Mixout Left PGA"},
1025 {"Headphone Left PGA", NULL, "Charge Pump"},
1026 {"HPL", NULL, "Headphone Left PGA"},
1027
1028 {"Headphone Right PGA", NULL, "Mixout Right PGA"},
1029 {"Headphone Right PGA", NULL, "Charge Pump"},
1030 {"HPR", NULL, "Headphone Right PGA"},
1031
1032 {"Lineout PGA", NULL, "Mixout Right PGA"},
1033 {"LINE", NULL, "Lineout PGA"},
1034};
1035
c418a84a 1036static const struct reg_default da7213_reg_defaults[] = {
ef5c2eba
AT		 1037 { DA7213_DIG_ROUTING_DAI, 0x10 },
1038 { DA7213_SR, 0x0A },
1039 { DA7213_REFERENCES, 0x80 },
1040 { DA7213_PLL_FRAC_TOP, 0x00 },
1041 { DA7213_PLL_FRAC_BOT, 0x00 },
1042 { DA7213_PLL_INTEGER, 0x20 },
1043 { DA7213_PLL_CTRL, 0x0C },
1044 { DA7213_DAI_CLK_MODE, 0x01 },
1045 { DA7213_DAI_CTRL, 0x08 },
1046 { DA7213_DIG_ROUTING_DAC, 0x32 },
1047 { DA7213_AUX_L_GAIN, 0x35 },
1048 { DA7213_AUX_R_GAIN, 0x35 },
1049 { DA7213_MIXIN_L_SELECT, 0x00 },
1050 { DA7213_MIXIN_R_SELECT, 0x00 },
1051 { DA7213_MIXIN_L_GAIN, 0x03 },
1052 { DA7213_MIXIN_R_GAIN, 0x03 },
1053 { DA7213_ADC_L_GAIN, 0x6F },
1054 { DA7213_ADC_R_GAIN, 0x6F },
1055 { DA7213_ADC_FILTERS1, 0x80 },
1056 { DA7213_MIC_1_GAIN, 0x01 },
1057 { DA7213_MIC_2_GAIN, 0x01 },
1058 { DA7213_DAC_FILTERS5, 0x00 },
1059 { DA7213_DAC_FILTERS2, 0x88 },
1060 { DA7213_DAC_FILTERS3, 0x88 },
1061 { DA7213_DAC_FILTERS4, 0x08 },
1062 { DA7213_DAC_FILTERS1, 0x80 },
1063 { DA7213_DAC_L_GAIN, 0x6F },
1064 { DA7213_DAC_R_GAIN, 0x6F },
1065 { DA7213_CP_CTRL, 0x61 },
1066 { DA7213_HP_L_GAIN, 0x39 },
1067 { DA7213_HP_R_GAIN, 0x39 },
1068 { DA7213_LINE_GAIN, 0x30 },
1069 { DA7213_MIXOUT_L_SELECT, 0x00 },
1070 { DA7213_MIXOUT_R_SELECT, 0x00 },
1071 { DA7213_SYSTEM_MODES_INPUT, 0x00 },
1072 { DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
1073 { DA7213_AUX_L_CTRL, 0x44 },
1074 { DA7213_AUX_R_CTRL, 0x44 },
1075 { DA7213_MICBIAS_CTRL, 0x11 },
1076 { DA7213_MIC_1_CTRL, 0x40 },
1077 { DA7213_MIC_2_CTRL, 0x40 },
1078 { DA7213_MIXIN_L_CTRL, 0x40 },
1079 { DA7213_MIXIN_R_CTRL, 0x40 },
1080 { DA7213_ADC_L_CTRL, 0x40 },
1081 { DA7213_ADC_R_CTRL, 0x40 },
1082 { DA7213_DAC_L_CTRL, 0x48 },
1083 { DA7213_DAC_R_CTRL, 0x40 },
1084 { DA7213_HP_L_CTRL, 0x41 },
1085 { DA7213_HP_R_CTRL, 0x40 },
1086 { DA7213_LINE_CTRL, 0x40 },
1087 { DA7213_MIXOUT_L_CTRL, 0x10 },
1088 { DA7213_MIXOUT_R_CTRL, 0x10 },
1089 { DA7213_LDO_CTRL, 0x00 },
1090 { DA7213_IO_CTRL, 0x00 },
1091 { DA7213_GAIN_RAMP_CTRL, 0x00},
1092 { DA7213_MIC_CONFIG, 0x00 },
1093 { DA7213_PC_COUNT, 0x00 },
1094 { DA7213_CP_VOL_THRESHOLD1, 0x32 },
1095 { DA7213_CP_DELAY, 0x95 },
1096 { DA7213_CP_DETECTOR, 0x00 },
1097 { DA7213_DAI_OFFSET, 0x00 },
1098 { DA7213_DIG_CTRL, 0x00 },
1099 { DA7213_ALC_CTRL2, 0x00 },
1100 { DA7213_ALC_CTRL3, 0x00 },
1101 { DA7213_ALC_NOISE, 0x3F },
1102 { DA7213_ALC_TARGET_MIN, 0x3F },
1103 { DA7213_ALC_TARGET_MAX, 0x00 },
1104 { DA7213_ALC_GAIN_LIMITS, 0xFF },
1105 { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
1106 { DA7213_ALC_ANTICLIP_CTRL, 0x00 },
1107 { DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
1108 { DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
1109 { DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
1110 { DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
1111 { DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
1112 { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
1113 { DA7213_DAC_NG_SETUP_TIME, 0x00 },
1114 { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
1115 { DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
1116 { DA7213_DAC_NG_CTRL, 0x00 },
1117};
1118
1119static bool da7213_volatile_register(struct device *dev, unsigned int reg)
1120{
1121 switch (reg) {
1122 case DA7213_STATUS1:
1123 case DA7213_PLL_STATUS:
1124 case DA7213_AUX_L_GAIN_STATUS:
1125 case DA7213_AUX_R_GAIN_STATUS:
1126 case DA7213_MIC_1_GAIN_STATUS:
1127 case DA7213_MIC_2_GAIN_STATUS:
1128 case DA7213_MIXIN_L_GAIN_STATUS:
1129 case DA7213_MIXIN_R_GAIN_STATUS:
1130 case DA7213_ADC_L_GAIN_STATUS:
1131 case DA7213_ADC_R_GAIN_STATUS:
1132 case DA7213_DAC_L_GAIN_STATUS:
1133 case DA7213_DAC_R_GAIN_STATUS:
1134 case DA7213_HP_L_GAIN_STATUS:
1135 case DA7213_HP_R_GAIN_STATUS:
1136 case DA7213_LINE_GAIN_STATUS:
1137 case DA7213_ALC_CTRL1:
1138 case DA7213_ALC_OFFSET_AUTO_M_L:
1139 case DA7213_ALC_OFFSET_AUTO_U_L:
1140 case DA7213_ALC_OFFSET_AUTO_M_R:
1141 case DA7213_ALC_OFFSET_AUTO_U_R:
1142 case DA7213_ALC_CIC_OP_LVL_DATA:
1143 return 1;
1144 default:
1145 return 0;
1146 }
1147}
1148
1149static int da7213_hw_params(struct snd_pcm_substream *substream,
1150 struct snd_pcm_hw_params *params,
1151 struct snd_soc_dai *dai)
1152{
1153 struct snd_soc_codec *codec = dai->codec;
1154 u8 dai_ctrl = 0;
1155 u8 fs;
1156
1157 /* Set DAI format */
e7610743
MB		 1158 switch (params_width(params)) {
1159 case 16:
ef5c2eba
AT		 1160 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
1161 break;
e7610743 1162 case 20:
ef5c2eba
AT		 1163 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
1164 break;
e7610743 1165 case 24:
ef5c2eba
AT		 1166 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
1167 break;
e7610743 1168 case 32:
ef5c2eba
AT		 1169 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
1170 break;
1171 default:
1172 return -EINVAL;
1173 }
1174
1175 /* Set sampling rate */
1176 switch (params_rate(params)) {
1177 case 8000:
1178 fs = DA7213_SR_8000;
1179 break;
1180 case 11025:
1181 fs = DA7213_SR_11025;
1182 break;
1183 case 12000:
1184 fs = DA7213_SR_12000;
1185 break;
1186 case 16000:
1187 fs = DA7213_SR_16000;
1188 break;
1189 case 22050:
1190 fs = DA7213_SR_22050;
1191 break;
1192 case 32000:
1193 fs = DA7213_SR_32000;
1194 break;
1195 case 44100:
1196 fs = DA7213_SR_44100;
1197 break;
1198 case 48000:
1199 fs = DA7213_SR_48000;
1200 break;
1201 case 88200:
1202 fs = DA7213_SR_88200;
1203 break;
1204 case 96000:
1205 fs = DA7213_SR_96000;
1206 break;
1207 default:
1208 return -EINVAL;
1209 }
1210
1211 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
1212 dai_ctrl);
1213 snd_soc_write(codec, DA7213_SR, fs);
1214
1215 return 0;
1216}
1217
1218static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1219{
1220 struct snd_soc_codec *codec = codec_dai->codec;
1221 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1222 u8 dai_clk_mode = 0, dai_ctrl = 0;
e0d746cc 1223 u8 dai_offset = 0;
ef5c2eba
AT		 1224
1225 /* Set master/slave mode */
1226 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1227 case SND_SOC_DAIFMT_CBM_CFM:
ef5c2eba
AT		 1228 da7213->master = true;
1229 break;
1230 case SND_SOC_DAIFMT_CBS_CFS:
ef5c2eba
AT		 1231 da7213->master = false;
1232 break;
1233 default:
1234 return -EINVAL;
1235 }
1236
1237 /* Set clock normal/inverted */
e0d746cc
PLB		 1238 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1239 case SND_SOC_DAIFMT_I2S:
1240 case SND_SOC_DAIFMT_LEFT_J:
1241 case SND_SOC_DAIFMT_RIGHT_J:
1242 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1243 case SND_SOC_DAIFMT_NB_NF:
1244 break;
1245 case SND_SOC_DAIFMT_NB_IF:
1246 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1247 break;
1248 case SND_SOC_DAIFMT_IB_NF:
1249 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1250 break;
1251 case SND_SOC_DAIFMT_IB_IF:
1252 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1253 DA7213_DAI_CLK_POL_INV;
1254 break;
1255 default:
1256 return -EINVAL;
1257 }
ef5c2eba 1258 break;
e0d746cc
PLB		 1259 case SND_SOC_DAI_FORMAT_DSP_A:
1260 case SND_SOC_DAI_FORMAT_DSP_B:
1261 /* The bclk is inverted wrt ASoC conventions */
1262 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1263 case SND_SOC_DAIFMT_NB_NF:
1264 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1265 break;
1266 case SND_SOC_DAIFMT_NB_IF:
1267 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1268 DA7213_DAI_CLK_POL_INV;
1269 break;
1270 case SND_SOC_DAIFMT_IB_NF:
1271 break;
1272 case SND_SOC_DAIFMT_IB_IF:
1273 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1274 break;
1275 default:
1276 return -EINVAL;
1277 }
ef5c2eba
AT		 1278 break;
1279 default:
1280 return -EINVAL;
1281 }
1282
1283 /* Only I2S is supported */
1284 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1285 case SND_SOC_DAIFMT_I2S:
1286 dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
1287 break;
1288 case SND_SOC_DAIFMT_LEFT_J:
1289 dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
1290 break;
1291 case SND_SOC_DAIFMT_RIGHT_J:
1292 dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
1293 break;
e0d746cc
PLB		 1294 case SND_SOC_DAI_FORMAT_DSP_A: /* L data MSB after FRM LRC */
1295 dai_ctrl |= DA7213_DAI_FORMAT_DSP;
1296 dai_offset = 1;
1297 break;
1298 case SND_SOC_DAI_FORMAT_DSP_B: /* L data MSB during FRM LRC */
1299 dai_ctrl |= DA7213_DAI_FORMAT_DSP;
1300 break;
ef5c2eba
AT		 1301 default:
1302 return -EINVAL;
1303 }
1304
5d764912
AT		 1305 /* By default only 64 BCLK per WCLK is supported */
1306 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
ef5c2eba
AT		 1307
1308 snd_soc_write(codec, DA7213_DAI_CLK_MODE, dai_clk_mode);
1309 snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
1310 dai_ctrl);
e0d746cc 1311 snd_soc_write(codec, DA7213_DAI_OFFSET, dai_offset);
ef5c2eba
AT		 1312
1313 return 0;
1314}
1315
1316static int da7213_mute(struct snd_soc_dai *dai, int mute)
1317{
1318 struct snd_soc_codec *codec = dai->codec;
1319
1320 if (mute) {
1321 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1322 DA7213_MUTE_EN, DA7213_MUTE_EN);
1323 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1324 DA7213_MUTE_EN, DA7213_MUTE_EN);
1325 } else {
1326 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1327 DA7213_MUTE_EN, 0);
1328 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1329 DA7213_MUTE_EN, 0);
1330 }
1331
1332 return 0;
1333}
1334
1335#define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1336 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1337
1338static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1339 int clk_id, unsigned int freq, int dir)
1340{
1341 struct snd_soc_codec *codec = codec_dai->codec;
1342 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
6e7c4443
AT		 1343 int ret = 0;
1344
1345 if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
1346 return 0;
1347
1348 if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
1349 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1350 freq);
1351 return -EINVAL;
1352 }
ef5c2eba
AT		 1353
1354 switch (clk_id) {
1355 case DA7213_CLKSRC_MCLK:
4c75225a
AT		 1356 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1357 DA7213_PLL_MCLK_SQR_EN, 0);
6e7c4443
AT		 1358 break;
1359 case DA7213_CLKSRC_MCLK_SQR:
4c75225a
AT		 1360 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1361 DA7213_PLL_MCLK_SQR_EN,
1362 DA7213_PLL_MCLK_SQR_EN);
ef5c2eba
AT		 1363 break;
1364 default:
1365 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1366 return -EINVAL;
1367 }
6e7c4443
AT		 1368
1369 da7213->clk_src = clk_id;
1370
1371 if (da7213->mclk) {
1372 freq = clk_round_rate(da7213->mclk, freq);
1373 ret = clk_set_rate(da7213->mclk, freq);
1374 if (ret) {
1375 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1376 freq);
1377 return ret;
1378 }
1379 }
1380
1381 da7213->mclk_rate = freq;
1382
1383 return 0;
ef5c2eba
AT		 1384}
1385
4c75225a 1386/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
ef5c2eba
AT		 1387static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1388 int source, unsigned int fref, unsigned int fout)
1389{
1390 struct snd_soc_codec *codec = codec_dai->codec;
1391 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1392
1393 u8 pll_ctrl, indiv_bits, indiv;
1394 u8 pll_frac_top, pll_frac_bot, pll_integer;
1395 u32 freq_ref;
1396 u64 frac_div;
1397
ef5c2eba 1398 /* Workout input divider based on MCLK rate */
abc189ea 1399 if (da7213->mclk_rate == 32768) {
4c75225a
AT		 1400 if (!da7213->master) {
1401 dev_err(codec->dev,
1402 "32KHz only valid if codec is clock master\n");
1403 return -EINVAL;
1404 }
1405
ef5c2eba 1406 /* 32KHz PLL Mode */
1e62c52d
AT		 1407 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1408 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
4c75225a 1409 source = DA7213_SYSCLK_PLL_32KHZ;
ef5c2eba 1410 freq_ref = 3750000;
4c75225a 1411
ef5c2eba 1412 } else {
ef5c2eba 1413 if (da7213->mclk_rate < 5000000) {
4c75225a
AT		 1414 dev_err(codec->dev,
1415 "PLL input clock %d below valid range\n",
1416 da7213->mclk_rate);
1417 return -EINVAL;
1e62c52d
AT		 1418 } else if (da7213->mclk_rate <= 9000000) {
1419 indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1420 indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1421 } else if (da7213->mclk_rate <= 18000000) {
1422 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1423 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1424 } else if (da7213->mclk_rate <= 36000000) {
1425 indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1426 indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
ef5c2eba 1427 } else if (da7213->mclk_rate <= 54000000) {
1e62c52d
AT		 1428 indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1429 indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
ef5c2eba 1430 } else {
4c75225a
AT		 1431 dev_err(codec->dev,
1432 "PLL input clock %d above valid range\n",
1433 da7213->mclk_rate);
1434 return -EINVAL;
ef5c2eba
AT		 1435 }
1436 freq_ref = (da7213->mclk_rate / indiv);
1437 }
1438
4c75225a 1439 pll_ctrl = indiv_bits;
ef5c2eba 1440
4c75225a
AT		 1441 /* Configure PLL */
1442 switch (source) {
1443 case DA7213_SYSCLK_MCLK:
1444 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1445 DA7213_PLL_INDIV_MASK |
1446 DA7213_PLL_MODE_MASK, pll_ctrl);
ef5c2eba 1447 return 0;
4c75225a
AT		 1448 case DA7213_SYSCLK_PLL:
1449 break;
1450 case DA7213_SYSCLK_PLL_SRM:
1451 pll_ctrl |= DA7213_PLL_SRM_EN;
1452 fout = DA7213_PLL_FREQ_OUT_94310400;
1453 break;
1454 case DA7213_SYSCLK_PLL_32KHZ:
1455 if (da7213->mclk_rate != 32768) {
1456 dev_err(codec->dev,
1457 "32KHz mode only valid with 32KHz MCLK\n");
1458 return -EINVAL;
1459 }
ef5c2eba 1460
4c75225a 1461 pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
ef5c2eba 1462 fout = DA7213_PLL_FREQ_OUT_94310400;
4c75225a
AT		 1463 break;
1464 default:
1465 dev_err(codec->dev, "Invalid PLL config\n");
1466 return -EINVAL;
ef5c2eba
AT		 1467 }
1468
ef5c2eba
AT		 1469 /* Calculate dividers for PLL */
1470 pll_integer = fout / freq_ref;
1471 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1472 do_div(frac_div, freq_ref);
1473 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
1474 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
1475
1476 /* Write PLL dividers */
1477 snd_soc_write(codec, DA7213_PLL_FRAC_TOP, pll_frac_top);
1478 snd_soc_write(codec, DA7213_PLL_FRAC_BOT, pll_frac_bot);
1479 snd_soc_write(codec, DA7213_PLL_INTEGER, pll_integer);
1480
1481 /* Enable PLL */
1482 pll_ctrl |= DA7213_PLL_EN;
4c75225a
AT		 1483 snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1484 DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
1485 pll_ctrl);
ef5c2eba 1486
d936d527
AT		 1487 /* Assist 32KHz mode PLL lock */
1488 if (source == DA7213_SYSCLK_PLL_32KHZ) {
1489 snd_soc_write(codec, 0xF0, 0x8B);
1490 snd_soc_write(codec, 0xF1, 0x03);
1491 snd_soc_write(codec, 0xF1, 0x01);
1492 snd_soc_write(codec, 0xF0, 0x00);
1493 }
ef5c2eba
AT		 1494
1495 return 0;
ef5c2eba
AT		 1496}
1497
1498/* DAI operations */
1499static const struct snd_soc_dai_ops da7213_dai_ops = {
1500 .hw_params = da7213_hw_params,
1501 .set_fmt = da7213_set_dai_fmt,
1502 .set_sysclk = da7213_set_dai_sysclk,
1503 .set_pll = da7213_set_dai_pll,
1504 .digital_mute = da7213_mute,
1505};
1506
1507static struct snd_soc_dai_driver da7213_dai = {
1508 .name = "da7213-hifi",
1509 /* Playback Capabilities */
1510 .playback = {
1511 .stream_name = "Playback",
1512 .channels_min = 1,
1513 .channels_max = 2,
1514 .rates = SNDRV_PCM_RATE_8000_96000,
1515 .formats = DA7213_FORMATS,
1516 },
1517 /* Capture Capabilities */
1518 .capture = {
1519 .stream_name = "Capture",
1520 .channels_min = 1,
1521 .channels_max = 2,
1522 .rates = SNDRV_PCM_RATE_8000_96000,
1523 .formats = DA7213_FORMATS,
1524 },
1525 .ops = &da7213_dai_ops,
1526 .symmetric_rates = 1,
1527};
1528
1529static int da7213_set_bias_level(struct snd_soc_codec *codec,
1530 enum snd_soc_bias_level level)
1531{
6e7c4443
AT		 1532 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1533 int ret;
1534
ef5c2eba
AT		 1535 switch (level) {
1536 case SND_SOC_BIAS_ON:
ef5c2eba 1537 break;
f612680f
AT		 1538 case SND_SOC_BIAS_PREPARE:
1539 /* Enable MCLK for transition to ON state */
1540 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
6e7c4443
AT		 1541 if (da7213->mclk) {
1542 ret = clk_prepare_enable(da7213->mclk);
1543 if (ret) {
1544 dev_err(codec->dev,
1545 "Failed to enable mclk\n");
1546 return ret;
1547 }
1548 }
f612680f
AT		 1549 }
1550 break;
1551 case SND_SOC_BIAS_STANDBY:
1552 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
ef5c2eba
AT		 1553 /* Enable VMID reference & master bias */
1554 snd_soc_update_bits(codec, DA7213_REFERENCES,
1555 DA7213_VMID_EN | DA7213_BIAS_EN,
1556 DA7213_VMID_EN | DA7213_BIAS_EN);
f612680f
AT		 1557 } else {
1558 /* Remove MCLK */
1559 if (da7213->mclk)
1560 clk_disable_unprepare(da7213->mclk);
ef5c2eba
AT		 1561 }
1562 break;
1563 case SND_SOC_BIAS_OFF:
1564 /* Disable VMID reference & master bias */
1565 snd_soc_update_bits(codec, DA7213_REFERENCES,
1566 DA7213_VMID_EN | DA7213_BIAS_EN, 0);
1567 break;
1568 }
ef5c2eba
AT		 1569 return 0;
1570}
1571
8f42c23a 1572#if defined(CONFIG_OF)
e90996a3
AT		 1573/* DT */
1574static const struct of_device_id da7213_of_match[] = {
1575 { .compatible = "dlg,da7213", },
1576 { }
1577};
1578MODULE_DEVICE_TABLE(of, da7213_of_match);
8f42c23a
PLB		 1579#endif
1580
1581#ifdef CONFIG_ACPI
1582static const struct acpi_device_id da7213_acpi_match[] = {
1583 { "DLGS7212", 0},
1584 { "DLGS7213", 0},
1585 { },
1586};
1587MODULE_DEVICE_TABLE(acpi, da7213_acpi_match);
1588#endif
e90996a3
AT		 1589
1590static enum da7213_micbias_voltage
1591 da7213_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
1592{
1593 switch (val) {
1594 case 1600:
1595 return DA7213_MICBIAS_1_6V;
1596 case 2200:
1597 return DA7213_MICBIAS_2_2V;
1598 case 2500:
1599 return DA7213_MICBIAS_2_5V;
1600 case 3000:
1601 return DA7213_MICBIAS_3_0V;
1602 default:
1603 dev_warn(codec->dev, "Invalid micbias level\n");
1604 return DA7213_MICBIAS_2_2V;
1605 }
1606}
1607
1608static enum da7213_dmic_data_sel
1609 da7213_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
1610{
1611 if (!strcmp(str, "lrise_rfall")) {
1612 return DA7213_DMIC_DATA_LRISE_RFALL;
1613 } else if (!strcmp(str, "lfall_rrise")) {
1614 return DA7213_DMIC_DATA_LFALL_RRISE;
1615 } else {
1616 dev_warn(codec->dev, "Invalid DMIC data select type\n");
1617 return DA7213_DMIC_DATA_LRISE_RFALL;
1618 }
1619}
1620
1621static enum da7213_dmic_samplephase
1622 da7213_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
1623{
1624 if (!strcmp(str, "on_clkedge")) {
1625 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1626 } else if (!strcmp(str, "between_clkedge")) {
1627 return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
1628 } else {
1629 dev_warn(codec->dev, "Invalid DMIC sample phase\n");
1630 return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1631 }
1632}
1633
1634static enum da7213_dmic_clk_rate
1635 da7213_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
1636{
1637 switch (val) {
1638 case 1500000:
1639 return DA7213_DMIC_CLK_1_5MHZ;
1640 case 3000000:
1641 return DA7213_DMIC_CLK_3_0MHZ;
1642 default:
1643 dev_warn(codec->dev, "Invalid DMIC clock rate\n");
1644 return DA7213_DMIC_CLK_1_5MHZ;
1645 }
1646}
1647
1648static struct da7213_platform_data
0e54153b 1649 *da7213_fw_to_pdata(struct snd_soc_codec *codec)
e90996a3 1650{
0e54153b 1651 struct device *dev = codec->dev;
e90996a3 1652 struct da7213_platform_data *pdata;
0e54153b
AT		 1653 const char *fw_str;
1654 u32 fw_val32;
e90996a3
AT		 1655
1656 pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
13d5ea5f 1657 if (!pdata)
e90996a3 1658 return NULL;
e90996a3 1659
0e54153b
AT		 1660 if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0)
1661 pdata->micbias1_lvl = da7213_of_micbias_lvl(codec, fw_val32);
e90996a3
AT		 1662 else
1663 pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
1664
0e54153b
AT		 1665 if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0)
1666 pdata->micbias2_lvl = da7213_of_micbias_lvl(codec, fw_val32);
e90996a3
AT		 1667 else
1668 pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
1669
0e54153b
AT		 1670 if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str))
1671 pdata->dmic_data_sel = da7213_of_dmic_data_sel(codec, fw_str);
e90996a3
AT		 1672 else
1673 pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
1674
0e54153b 1675 if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str))
e90996a3 1676 pdata->dmic_samplephase =
0e54153b 1677 da7213_of_dmic_samplephase(codec, fw_str);
e90996a3
AT		 1678 else
1679 pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1680
0e54153b
AT		 1681 if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0)
1682 pdata->dmic_clk_rate = da7213_of_dmic_clkrate(codec, fw_val32);
e90996a3
AT		 1683 else
1684 pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
1685
1686 return pdata;
1687}
1688
1689
ef5c2eba
AT		 1690static int da7213_probe(struct snd_soc_codec *codec)
1691{
ef5c2eba 1692 struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
ef5c2eba 1693
ef5c2eba
AT		 1694 /* Default to using ALC auto offset calibration mode. */
1695 snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
1696 DA7213_ALC_CALIB_MODE_MAN, 0);
1697 da7213->alc_calib_auto = true;
1698
7e28fd46
AT		 1699 /* Default PC counter to free-running */
1700 snd_soc_update_bits(codec, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
1701 DA7213_PC_FREERUN_MASK);
1702
ef5c2eba
AT		 1703 /* Enable all Gain Ramps */
1704 snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,
1705 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1706 snd_soc_update_bits(codec, DA7213_AUX_R_CTRL,
1707 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1708 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1709 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1710 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1711 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1712 snd_soc_update_bits(codec, DA7213_ADC_L_CTRL,
1713 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1714 snd_soc_update_bits(codec, DA7213_ADC_R_CTRL,
1715 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1716 snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1717 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1718 snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1719 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1720 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1721 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1722 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1723 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1724 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1725 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1726
1727 /*
1728 * There are two separate control bits for input and output mixers as
1729 * well as headphone and line outs.
1730 * One to enable corresponding amplifier and other to enable its
1731 * output. As amplifier bits are related to power control, they are
1732 * being managed by DAPM while other (non power related) bits are
1733 * enabled here
1734 */
1735 snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1736 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1737 snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1738 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1739
1740 snd_soc_update_bits(codec, DA7213_MIXOUT_L_CTRL,
1741 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1742 snd_soc_update_bits(codec, DA7213_MIXOUT_R_CTRL,
1743 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1744
1745 snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1746 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1747 snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1748 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1749
1750 snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1751 DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
1752
e90996a3 1753 /* Handle DT/Platform data */
0e54153b
AT		 1754 da7213->pdata = dev_get_platdata(codec->dev);
1755 if (!da7213->pdata)
1756 da7213->pdata = da7213_fw_to_pdata(codec);
e90996a3 1757
ef5c2eba
AT		 1758 /* Set platform data values */
1759 if (da7213->pdata) {
e90996a3 1760 struct da7213_platform_data *pdata = da7213->pdata;
ef5c2eba
AT		 1761 u8 micbias_lvl = 0, dmic_cfg = 0;
1762
1763 /* Set Mic Bias voltages */
1764 switch (pdata->micbias1_lvl) {
1765 case DA7213_MICBIAS_1_6V:
1766 case DA7213_MICBIAS_2_2V:
1767 case DA7213_MICBIAS_2_5V:
1768 case DA7213_MICBIAS_3_0V:
1769 micbias_lvl |= (pdata->micbias1_lvl <<
1770 DA7213_MICBIAS1_LEVEL_SHIFT);
1771 break;
1772 }
1773 switch (pdata->micbias2_lvl) {
1774 case DA7213_MICBIAS_1_6V:
1775 case DA7213_MICBIAS_2_2V:
1776 case DA7213_MICBIAS_2_5V:
1777 case DA7213_MICBIAS_3_0V:
1778 micbias_lvl |= (pdata->micbias2_lvl <<
1779 DA7213_MICBIAS2_LEVEL_SHIFT);
1780 break;
1781 }
1782 snd_soc_update_bits(codec, DA7213_MICBIAS_CTRL,
1783 DA7213_MICBIAS1_LEVEL_MASK |
1784 DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
1785
1786 /* Set DMIC configuration */
1787 switch (pdata->dmic_data_sel) {
1788 case DA7213_DMIC_DATA_LFALL_RRISE:
1789 case DA7213_DMIC_DATA_LRISE_RFALL:
1790 dmic_cfg |= (pdata->dmic_data_sel <<
1791 DA7213_DMIC_DATA_SEL_SHIFT);
1792 break;
1793 }
61559af1 1794 switch (pdata->dmic_samplephase) {
ef5c2eba
AT		 1795 case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
1796 case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
61559af1 1797 dmic_cfg |= (pdata->dmic_samplephase <<
ef5c2eba
AT		 1798 DA7213_DMIC_SAMPLEPHASE_SHIFT);
1799 break;
1800 }
61559af1 1801 switch (pdata->dmic_clk_rate) {
ef5c2eba
AT		 1802 case DA7213_DMIC_CLK_3_0MHZ:
1803 case DA7213_DMIC_CLK_1_5MHZ:
61559af1 1804 dmic_cfg |= (pdata->dmic_clk_rate <<
ef5c2eba
AT		 1805 DA7213_DMIC_CLK_RATE_SHIFT);
1806 break;
1807 }
1808 snd_soc_update_bits(codec, DA7213_MIC_CONFIG,
1809 DA7213_DMIC_DATA_SEL_MASK |
1810 DA7213_DMIC_SAMPLEPHASE_MASK |
1811 DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
6e7c4443 1812 }
ef5c2eba 1813
6e7c4443
AT		 1814 /* Check if MCLK provided */
1815 da7213->mclk = devm_clk_get(codec->dev, "mclk");
1816 if (IS_ERR(da7213->mclk)) {
1817 if (PTR_ERR(da7213->mclk) != -ENOENT)
1818 return PTR_ERR(da7213->mclk);
1819 else
1820 da7213->mclk = NULL;
ef5c2eba 1821 }
e90996a3 1822
ef5c2eba
AT		 1823 return 0;
1824}
1825
a180ba45 1826static const struct snd_soc_codec_driver soc_codec_dev_da7213 = {
ef5c2eba
AT		 1827 .probe = da7213_probe,
1828 .set_bias_level = da7213_set_bias_level,
1829
92d2a233
KM		 1830 .component_driver = {
1831 .controls = da7213_snd_controls,
1832 .num_controls = ARRAY_SIZE(da7213_snd_controls),
1833 .dapm_widgets = da7213_dapm_widgets,
1834 .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets),
1835 .dapm_routes = da7213_audio_map,
1836 .num_dapm_routes = ARRAY_SIZE(da7213_audio_map),
1837 },
ef5c2eba
AT		 1838};
1839
1840static const struct regmap_config da7213_regmap_config = {
1841 .reg_bits = 8,
1842 .val_bits = 8,
1843
1844 .reg_defaults = da7213_reg_defaults,
1845 .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
1846 .volatile_reg = da7213_volatile_register,
1847 .cache_type = REGCACHE_RBTREE,
1848};
1849
1850static int da7213_i2c_probe(struct i2c_client *i2c,
1851 const struct i2c_device_id *id)
1852{
1853 struct da7213_priv *da7213;
ef5c2eba
AT		 1854 int ret;
1855
8080699a 1856 da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL);
ef5c2eba
AT		 1857 if (!da7213)
1858 return -ENOMEM;
1859
ef5c2eba
AT		 1860 i2c_set_clientdata(i2c, da7213);
1861
1862 da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
1863 if (IS_ERR(da7213->regmap)) {
1864 ret = PTR_ERR(da7213->regmap);
1865 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1866 return ret;
1867 }
1868
1869 ret = snd_soc_register_codec(&i2c->dev,
1870 &soc_codec_dev_da7213, &da7213_dai, 1);
1871 if (ret < 0) {
1872 dev_err(&i2c->dev, "Failed to register da7213 codec: %d\n",
1873 ret);
1874 }
1875 return ret;
1876}
1877
1878static int da7213_remove(struct i2c_client *client)
1879{
1880 snd_soc_unregister_codec(&client->dev);
1881 return 0;
1882}
1883
1884static const struct i2c_device_id da7213_i2c_id[] = {
1885 { "da7213", 0 },
1886 { }
1887};
1888MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
1889
1890/* I2C codec control layer */
1891static struct i2c_driver da7213_i2c_driver = {
1892 .driver = {
1893 .name = "da7213",
e90996a3 1894 .of_match_table = of_match_ptr(da7213_of_match),
8f42c23a 1895 .acpi_match_table = ACPI_PTR(da7213_acpi_match),
ef5c2eba
AT		 1896 },
1897 .probe = da7213_i2c_probe,
1898 .remove = da7213_remove,
1899 .id_table = da7213_i2c_id,
1900};
1901
1902module_i2c_driver(da7213_i2c_driver);
1903
1904MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
1905MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
1906MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)