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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
ef5c2eba AT |
2 | /* |
3 | * DA7213 ALSA SoC Codec Driver | |
4 | * | |
5 | * Copyright (c) 2013 Dialog Semiconductor | |
6 | * | |
7 | * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | |
8 | * Based on DA9055 ALSA SoC codec driver. | |
ef5c2eba AT |
9 | */ |
10 | ||
8f42c23a | 11 | #include <linux/acpi.h> |
0e54153b AT |
12 | #include <linux/of_device.h> |
13 | #include <linux/property.h> | |
6e7c4443 | 14 | #include <linux/clk.h> |
ef5c2eba AT |
15 | #include <linux/delay.h> |
16 | #include <linux/i2c.h> | |
17 | #include <linux/regmap.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/module.h> | |
20 | #include <sound/pcm.h> | |
21 | #include <sound/pcm_params.h> | |
22 | #include <sound/soc.h> | |
23 | #include <sound/initval.h> | |
24 | #include <sound/tlv.h> | |
25 | ||
26 | #include <sound/da7213.h> | |
27 | #include "da7213.h" | |
28 | ||
29 | ||
30 | /* Gain and Volume */ | |
32e933be | 31 | static const DECLARE_TLV_DB_RANGE(aux_vol_tlv, |
ef5c2eba AT |
32 | /* -54dB */ |
33 | 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0), | |
34 | /* -52.5dB to 15dB */ | |
35 | 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0) | |
32e933be | 36 | ); |
ef5c2eba | 37 | |
32e933be | 38 | static const DECLARE_TLV_DB_RANGE(digital_gain_tlv, |
ef5c2eba AT |
39 | 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), |
40 | /* -78dB to 12dB */ | |
41 | 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0) | |
32e933be | 42 | ); |
ef5c2eba | 43 | |
32e933be | 44 | static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv, |
ef5c2eba AT |
45 | 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), |
46 | /* 0dB to 36dB */ | |
47 | 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0) | |
32e933be | 48 | ); |
ef5c2eba AT |
49 | |
50 | static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0); | |
51 | static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0); | |
52 | static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0); | |
53 | static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0); | |
54 | static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0); | |
55 | static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0); | |
56 | static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0); | |
57 | ||
58 | /* ADC and DAC voice mode (8kHz) high pass cutoff value */ | |
59 | static const char * const da7213_voice_hpf_corner_txt[] = { | |
60 | "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" | |
61 | }; | |
62 | ||
c99f8b21 TI |
63 | static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner, |
64 | DA7213_DAC_FILTERS1, | |
65 | DA7213_VOICE_HPF_CORNER_SHIFT, | |
66 | da7213_voice_hpf_corner_txt); | |
ef5c2eba | 67 | |
c99f8b21 TI |
68 | static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner, |
69 | DA7213_ADC_FILTERS1, | |
70 | DA7213_VOICE_HPF_CORNER_SHIFT, | |
71 | da7213_voice_hpf_corner_txt); | |
ef5c2eba AT |
72 | |
73 | /* ADC and DAC high pass filter cutoff value */ | |
74 | static const char * const da7213_audio_hpf_corner_txt[] = { | |
75 | "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000" | |
76 | }; | |
77 | ||
c99f8b21 TI |
78 | static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner, |
79 | DA7213_DAC_FILTERS1 | |
80 | , DA7213_AUDIO_HPF_CORNER_SHIFT, | |
81 | da7213_audio_hpf_corner_txt); | |
ef5c2eba | 82 | |
c99f8b21 TI |
83 | static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner, |
84 | DA7213_ADC_FILTERS1, | |
85 | DA7213_AUDIO_HPF_CORNER_SHIFT, | |
86 | da7213_audio_hpf_corner_txt); | |
ef5c2eba AT |
87 | |
88 | /* Gain ramping rate value */ | |
89 | static const char * const da7213_gain_ramp_rate_txt[] = { | |
90 | "nominal rate * 8", "nominal rate * 16", "nominal rate / 16", | |
91 | "nominal rate / 32" | |
92 | }; | |
93 | ||
c99f8b21 TI |
94 | static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate, |
95 | DA7213_GAIN_RAMP_CTRL, | |
96 | DA7213_GAIN_RAMP_RATE_SHIFT, | |
97 | da7213_gain_ramp_rate_txt); | |
ef5c2eba AT |
98 | |
99 | /* DAC noise gate setup time value */ | |
100 | static const char * const da7213_dac_ng_setup_time_txt[] = { | |
101 | "256 samples", "512 samples", "1024 samples", "2048 samples" | |
102 | }; | |
103 | ||
c99f8b21 TI |
104 | static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time, |
105 | DA7213_DAC_NG_SETUP_TIME, | |
106 | DA7213_DAC_NG_SETUP_TIME_SHIFT, | |
107 | da7213_dac_ng_setup_time_txt); | |
ef5c2eba AT |
108 | |
109 | /* DAC noise gate rampup rate value */ | |
110 | static const char * const da7213_dac_ng_rampup_txt[] = { | |
111 | "0.02 ms/dB", "0.16 ms/dB" | |
112 | }; | |
113 | ||
c99f8b21 TI |
114 | static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate, |
115 | DA7213_DAC_NG_SETUP_TIME, | |
116 | DA7213_DAC_NG_RAMPUP_RATE_SHIFT, | |
117 | da7213_dac_ng_rampup_txt); | |
ef5c2eba AT |
118 | |
119 | /* DAC noise gate rampdown rate value */ | |
120 | static const char * const da7213_dac_ng_rampdown_txt[] = { | |
121 | "0.64 ms/dB", "20.48 ms/dB" | |
122 | }; | |
123 | ||
c99f8b21 TI |
124 | static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate, |
125 | DA7213_DAC_NG_SETUP_TIME, | |
126 | DA7213_DAC_NG_RAMPDN_RATE_SHIFT, | |
127 | da7213_dac_ng_rampdown_txt); | |
ef5c2eba AT |
128 | |
129 | /* DAC soft mute rate value */ | |
130 | static const char * const da7213_dac_soft_mute_rate_txt[] = { | |
131 | "1", "2", "4", "8", "16", "32", "64" | |
132 | }; | |
133 | ||
c99f8b21 TI |
134 | static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate, |
135 | DA7213_DAC_FILTERS5, | |
136 | DA7213_DAC_SOFTMUTE_RATE_SHIFT, | |
137 | da7213_dac_soft_mute_rate_txt); | |
ef5c2eba AT |
138 | |
139 | /* ALC Attack Rate select */ | |
140 | static const char * const da7213_alc_attack_rate_txt[] = { | |
141 | "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", | |
142 | "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" | |
143 | }; | |
144 | ||
c99f8b21 TI |
145 | static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate, |
146 | DA7213_ALC_CTRL2, | |
147 | DA7213_ALC_ATTACK_SHIFT, | |
148 | da7213_alc_attack_rate_txt); | |
ef5c2eba AT |
149 | |
150 | /* ALC Release Rate select */ | |
151 | static const char * const da7213_alc_release_rate_txt[] = { | |
152 | "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs", | |
153 | "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" | |
154 | }; | |
155 | ||
c99f8b21 TI |
156 | static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate, |
157 | DA7213_ALC_CTRL2, | |
158 | DA7213_ALC_RELEASE_SHIFT, | |
159 | da7213_alc_release_rate_txt); | |
ef5c2eba AT |
160 | |
161 | /* ALC Hold Time select */ | |
162 | static const char * const da7213_alc_hold_time_txt[] = { | |
163 | "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs", | |
164 | "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs", | |
165 | "253952/fs", "507904/fs", "1015808/fs", "2031616/fs" | |
166 | }; | |
167 | ||
c99f8b21 TI |
168 | static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time, |
169 | DA7213_ALC_CTRL3, | |
170 | DA7213_ALC_HOLD_SHIFT, | |
171 | da7213_alc_hold_time_txt); | |
ef5c2eba AT |
172 | |
173 | /* ALC Input Signal Tracking rate select */ | |
174 | static const char * const da7213_alc_integ_rate_txt[] = { | |
175 | "1/4", "1/16", "1/256", "1/65536" | |
176 | }; | |
177 | ||
c99f8b21 TI |
178 | static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate, |
179 | DA7213_ALC_CTRL3, | |
180 | DA7213_ALC_INTEG_ATTACK_SHIFT, | |
181 | da7213_alc_integ_rate_txt); | |
ef5c2eba | 182 | |
c99f8b21 TI |
183 | static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate, |
184 | DA7213_ALC_CTRL3, | |
185 | DA7213_ALC_INTEG_RELEASE_SHIFT, | |
186 | da7213_alc_integ_rate_txt); | |
ef5c2eba AT |
187 | |
188 | ||
189 | /* | |
190 | * Control Functions | |
191 | */ | |
192 | ||
2918d9cc | 193 | static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val) |
ef5c2eba AT |
194 | { |
195 | int mid_data, top_data; | |
196 | int sum = 0; | |
197 | u8 iteration; | |
198 | ||
199 | for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS; | |
200 | iteration++) { | |
201 | /* Select the left or right channel and capture data */ | |
2918d9cc | 202 | snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val); |
ef5c2eba AT |
203 | |
204 | /* Select middle 8 bits for read back from data register */ | |
2918d9cc | 205 | snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, |
ef5c2eba | 206 | reg_val | DA7213_ALC_DATA_MIDDLE); |
2918d9cc | 207 | mid_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA); |
ef5c2eba AT |
208 | |
209 | /* Select top 8 bits for read back from data register */ | |
2918d9cc | 210 | snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, |
ef5c2eba | 211 | reg_val | DA7213_ALC_DATA_TOP); |
2918d9cc | 212 | top_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA); |
ef5c2eba AT |
213 | |
214 | sum += ((mid_data << 8) | (top_data << 16)); | |
215 | } | |
216 | ||
217 | return sum / DA7213_ALC_AVG_ITERATIONS; | |
218 | } | |
219 | ||
2918d9cc | 220 | static void da7213_alc_calib_man(struct snd_soc_component *component) |
ef5c2eba AT |
221 | { |
222 | u8 reg_val; | |
223 | int avg_left_data, avg_right_data, offset_l, offset_r; | |
224 | ||
225 | /* Calculate average for Left and Right data */ | |
226 | /* Left Data */ | |
2918d9cc | 227 | avg_left_data = da7213_get_alc_data(component, |
ef5c2eba AT |
228 | DA7213_ALC_CIC_OP_CHANNEL_LEFT); |
229 | /* Right Data */ | |
2918d9cc | 230 | avg_right_data = da7213_get_alc_data(component, |
ef5c2eba AT |
231 | DA7213_ALC_CIC_OP_CHANNEL_RIGHT); |
232 | ||
233 | /* Calculate DC offset */ | |
234 | offset_l = -avg_left_data; | |
235 | offset_r = -avg_right_data; | |
236 | ||
237 | reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8; | |
2918d9cc | 238 | snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, reg_val); |
ef5c2eba | 239 | reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16; |
2918d9cc | 240 | snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, reg_val); |
ef5c2eba AT |
241 | |
242 | reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8; | |
2918d9cc | 243 | snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, reg_val); |
ef5c2eba | 244 | reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16; |
2918d9cc | 245 | snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, reg_val); |
ef5c2eba AT |
246 | |
247 | /* Enable analog/digital gain mode & offset cancellation */ | |
2918d9cc | 248 | snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, |
ef5c2eba AT |
249 | DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, |
250 | DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); | |
251 | } | |
252 | ||
2918d9cc | 253 | static void da7213_alc_calib_auto(struct snd_soc_component *component) |
ef5c2eba AT |
254 | { |
255 | u8 alc_ctrl1; | |
256 | ||
257 | /* Begin auto calibration and wait for completion */ | |
2918d9cc | 258 | snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN, |
ef5c2eba AT |
259 | DA7213_ALC_AUTO_CALIB_EN); |
260 | do { | |
2918d9cc | 261 | alc_ctrl1 = snd_soc_component_read32(component, DA7213_ALC_CTRL1); |
ef5c2eba AT |
262 | } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN); |
263 | ||
264 | /* If auto calibration fails, fall back to digital gain only mode */ | |
265 | if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) { | |
2918d9cc | 266 | dev_warn(component->dev, |
ef5c2eba | 267 | "ALC auto calibration failed with overflow\n"); |
2918d9cc | 268 | snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, |
ef5c2eba AT |
269 | DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, |
270 | 0); | |
271 | } else { | |
272 | /* Enable analog/digital gain mode & offset cancellation */ | |
2918d9cc | 273 | snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, |
ef5c2eba AT |
274 | DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, |
275 | DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); | |
276 | } | |
277 | ||
278 | } | |
279 | ||
2918d9cc | 280 | static void da7213_alc_calib(struct snd_soc_component *component) |
ef5c2eba | 281 | { |
2918d9cc | 282 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); |
ef5c2eba AT |
283 | u8 adc_l_ctrl, adc_r_ctrl; |
284 | u8 mixin_l_sel, mixin_r_sel; | |
285 | u8 mic_1_ctrl, mic_2_ctrl; | |
286 | ||
287 | /* Save current values from ADC control registers */ | |
2918d9cc KM |
288 | adc_l_ctrl = snd_soc_component_read32(component, DA7213_ADC_L_CTRL); |
289 | adc_r_ctrl = snd_soc_component_read32(component, DA7213_ADC_R_CTRL); | |
ef5c2eba AT |
290 | |
291 | /* Save current values from MIXIN_L/R_SELECT registers */ | |
2918d9cc KM |
292 | mixin_l_sel = snd_soc_component_read32(component, DA7213_MIXIN_L_SELECT); |
293 | mixin_r_sel = snd_soc_component_read32(component, DA7213_MIXIN_R_SELECT); | |
ef5c2eba AT |
294 | |
295 | /* Save current values from MIC control registers */ | |
2918d9cc KM |
296 | mic_1_ctrl = snd_soc_component_read32(component, DA7213_MIC_1_CTRL); |
297 | mic_2_ctrl = snd_soc_component_read32(component, DA7213_MIC_2_CTRL); | |
ef5c2eba AT |
298 | |
299 | /* Enable ADC Left and Right */ | |
2918d9cc | 300 | snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN, |
ef5c2eba | 301 | DA7213_ADC_EN); |
2918d9cc | 302 | snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN, |
ef5c2eba AT |
303 | DA7213_ADC_EN); |
304 | ||
305 | /* Enable MIC paths */ | |
2918d9cc | 306 | snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT, |
ef5c2eba AT |
307 | DA7213_MIXIN_L_MIX_SELECT_MIC_1 | |
308 | DA7213_MIXIN_L_MIX_SELECT_MIC_2, | |
309 | DA7213_MIXIN_L_MIX_SELECT_MIC_1 | | |
310 | DA7213_MIXIN_L_MIX_SELECT_MIC_2); | |
2918d9cc | 311 | snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT, |
ef5c2eba AT |
312 | DA7213_MIXIN_R_MIX_SELECT_MIC_2 | |
313 | DA7213_MIXIN_R_MIX_SELECT_MIC_1, | |
314 | DA7213_MIXIN_R_MIX_SELECT_MIC_2 | | |
315 | DA7213_MIXIN_R_MIX_SELECT_MIC_1); | |
316 | ||
317 | /* Mute MIC PGAs */ | |
2918d9cc | 318 | snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN, |
ef5c2eba | 319 | DA7213_MUTE_EN); |
2918d9cc | 320 | snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN, |
ef5c2eba AT |
321 | DA7213_MUTE_EN); |
322 | ||
323 | /* Perform calibration */ | |
324 | if (da7213->alc_calib_auto) | |
2918d9cc | 325 | da7213_alc_calib_auto(component); |
ef5c2eba | 326 | else |
2918d9cc | 327 | da7213_alc_calib_man(component); |
ef5c2eba AT |
328 | |
329 | /* Restore MIXIN_L/R_SELECT registers to their original states */ | |
2918d9cc KM |
330 | snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, mixin_l_sel); |
331 | snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, mixin_r_sel); | |
ef5c2eba AT |
332 | |
333 | /* Restore ADC control registers to their original states */ | |
2918d9cc KM |
334 | snd_soc_component_write(component, DA7213_ADC_L_CTRL, adc_l_ctrl); |
335 | snd_soc_component_write(component, DA7213_ADC_R_CTRL, adc_r_ctrl); | |
ef5c2eba AT |
336 | |
337 | /* Restore original values of MIC control registers */ | |
2918d9cc KM |
338 | snd_soc_component_write(component, DA7213_MIC_1_CTRL, mic_1_ctrl); |
339 | snd_soc_component_write(component, DA7213_MIC_2_CTRL, mic_2_ctrl); | |
ef5c2eba AT |
340 | } |
341 | ||
342 | static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol, | |
343 | struct snd_ctl_elem_value *ucontrol) | |
344 | { | |
2918d9cc KM |
345 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
346 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
ef5c2eba AT |
347 | int ret; |
348 | ||
349 | ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); | |
350 | ||
351 | /* If ALC in operation, make sure calibrated offsets are updated */ | |
352 | if ((!ret) && (da7213->alc_en)) | |
2918d9cc | 353 | da7213_alc_calib(component); |
ef5c2eba AT |
354 | |
355 | return ret; | |
356 | } | |
357 | ||
358 | static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol, | |
359 | struct snd_ctl_elem_value *ucontrol) | |
360 | { | |
2918d9cc KM |
361 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
362 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
ef5c2eba AT |
363 | |
364 | /* Force ALC offset calibration if enabling ALC */ | |
365 | if (ucontrol->value.integer.value[0] || | |
366 | ucontrol->value.integer.value[1]) { | |
367 | if (!da7213->alc_en) { | |
2918d9cc | 368 | da7213_alc_calib(component); |
ef5c2eba AT |
369 | da7213->alc_en = true; |
370 | } | |
371 | } else { | |
372 | da7213->alc_en = false; | |
373 | } | |
374 | ||
375 | return snd_soc_put_volsw(kcontrol, ucontrol); | |
376 | } | |
377 | ||
378 | ||
379 | /* | |
380 | * KControls | |
381 | */ | |
382 | ||
383 | static const struct snd_kcontrol_new da7213_snd_controls[] = { | |
384 | ||
385 | /* Volume controls */ | |
386 | SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN, | |
387 | DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, | |
388 | DA7213_NO_INVERT, mic_vol_tlv), | |
389 | SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN, | |
390 | DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, | |
391 | DA7213_NO_INVERT, mic_vol_tlv), | |
392 | SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN, | |
393 | DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX, | |
394 | DA7213_NO_INVERT, aux_vol_tlv), | |
395 | SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN, | |
396 | DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT, | |
397 | DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT, | |
398 | snd_soc_get_volsw_2r, da7213_put_mixin_gain, | |
399 | mixin_gain_tlv), | |
400 | SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN, | |
401 | DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX, | |
402 | DA7213_NO_INVERT, digital_gain_tlv), | |
403 | SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN, | |
404 | DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX, | |
405 | DA7213_NO_INVERT, digital_gain_tlv), | |
406 | SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN, | |
407 | DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX, | |
408 | DA7213_NO_INVERT, hp_vol_tlv), | |
409 | SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN, | |
410 | DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX, | |
411 | DA7213_NO_INVERT, lineout_vol_tlv), | |
412 | ||
413 | /* DAC Equalizer controls */ | |
414 | SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT, | |
415 | DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT), | |
416 | SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2, | |
417 | DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX, | |
418 | DA7213_NO_INVERT, eq_gain_tlv), | |
419 | SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2, | |
420 | DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX, | |
421 | DA7213_NO_INVERT, eq_gain_tlv), | |
422 | SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3, | |
423 | DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX, | |
424 | DA7213_NO_INVERT, eq_gain_tlv), | |
425 | SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3, | |
426 | DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX, | |
427 | DA7213_NO_INVERT, eq_gain_tlv), | |
428 | SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4, | |
429 | DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX, | |
430 | DA7213_NO_INVERT, eq_gain_tlv), | |
431 | ||
432 | /* High Pass Filter and Voice Mode controls */ | |
433 | SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT, | |
434 | DA7213_HPF_EN_MAX, DA7213_NO_INVERT), | |
435 | SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner), | |
436 | SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1, | |
437 | DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, | |
438 | DA7213_NO_INVERT), | |
439 | SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner), | |
440 | ||
441 | SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT, | |
442 | DA7213_HPF_EN_MAX, DA7213_NO_INVERT), | |
443 | SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner), | |
444 | SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1, | |
445 | DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, | |
446 | DA7213_NO_INVERT), | |
447 | SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner), | |
448 | ||
449 | /* Mute controls */ | |
450 | SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT, | |
451 | DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
452 | SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT, | |
453 | DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
454 | SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, | |
455 | DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
456 | SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL, | |
457 | DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT, | |
458 | DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
459 | SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL, | |
460 | DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
461 | SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, | |
462 | DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
463 | SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT, | |
464 | DA7213_MUTE_EN_MAX, DA7213_INVERT), | |
465 | SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5, | |
466 | DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX, | |
467 | DA7213_NO_INVERT), | |
468 | SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate), | |
469 | ||
470 | /* Zero Cross controls */ | |
471 | SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, | |
472 | DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), | |
473 | SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL, | |
474 | DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, | |
475 | DA7213_NO_INVERT), | |
476 | SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, | |
477 | DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), | |
478 | ||
479 | /* Gain Ramping controls */ | |
480 | SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL, | |
481 | DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, | |
482 | DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), | |
483 | SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL, | |
484 | DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, | |
485 | DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), | |
486 | SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL, | |
487 | DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, | |
488 | DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), | |
489 | SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL, | |
490 | DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, | |
491 | DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), | |
492 | SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL, | |
493 | DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, | |
494 | DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), | |
495 | SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL, | |
496 | DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX, | |
497 | DA7213_NO_INVERT), | |
498 | SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate), | |
499 | ||
500 | /* DAC Noise Gate controls */ | |
501 | SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT, | |
502 | DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT), | |
503 | SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time), | |
504 | SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate), | |
505 | SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate), | |
506 | SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD, | |
507 | DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, | |
508 | DA7213_NO_INVERT), | |
509 | SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD, | |
510 | DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, | |
511 | DA7213_NO_INVERT), | |
512 | ||
513 | /* DAC Routing & Inversion */ | |
514 | SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC, | |
515 | DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT, | |
516 | DA7213_DAC_MONO_MAX, DA7213_NO_INVERT), | |
517 | SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT, | |
518 | DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX, | |
519 | DA7213_NO_INVERT), | |
520 | ||
521 | /* DMIC controls */ | |
522 | SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT, | |
523 | DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT, | |
524 | DA7213_DMIC_EN_MAX, DA7213_NO_INVERT), | |
525 | ||
526 | /* ALC Controls */ | |
527 | SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT, | |
528 | DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX, | |
529 | DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw), | |
530 | SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate), | |
531 | SOC_ENUM("ALC Release Rate", da7213_alc_release_rate), | |
532 | SOC_ENUM("ALC Hold Time", da7213_alc_hold_time), | |
533 | /* | |
534 | * Rate at which input signal envelope is tracked as the signal gets | |
535 | * larger | |
536 | */ | |
537 | SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate), | |
538 | /* | |
539 | * Rate at which input signal envelope is tracked as the signal gets | |
540 | * smaller | |
541 | */ | |
542 | SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate), | |
543 | SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE, | |
544 | DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, | |
545 | DA7213_INVERT, alc_threshold_tlv), | |
546 | SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN, | |
547 | DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, | |
548 | DA7213_INVERT, alc_threshold_tlv), | |
549 | SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX, | |
550 | DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, | |
551 | DA7213_INVERT, alc_threshold_tlv), | |
552 | SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS, | |
553 | DA7213_ALC_ATTEN_MAX_SHIFT, | |
554 | DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT, | |
555 | alc_gain_tlv), | |
556 | SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS, | |
557 | DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX, | |
558 | DA7213_NO_INVERT, alc_gain_tlv), | |
559 | SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, | |
560 | DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX, | |
561 | DA7213_NO_INVERT, alc_analog_gain_tlv), | |
562 | SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, | |
563 | DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX, | |
564 | DA7213_NO_INVERT, alc_analog_gain_tlv), | |
565 | SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL, | |
566 | DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX, | |
567 | DA7213_NO_INVERT), | |
568 | SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL, | |
569 | DA7213_ALC_ANTICLIP_LEVEL_SHIFT, | |
570 | DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT), | |
571 | }; | |
572 | ||
573 | ||
574 | /* | |
575 | * DAPM | |
576 | */ | |
577 | ||
578 | /* | |
579 | * Enums | |
580 | */ | |
581 | ||
582 | /* MIC PGA source select */ | |
583 | static const char * const da7213_mic_amp_in_sel_txt[] = { | |
584 | "Differential", "MIC_P", "MIC_N" | |
585 | }; | |
586 | ||
c99f8b21 TI |
587 | static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel, |
588 | DA7213_MIC_1_CTRL, | |
589 | DA7213_MIC_AMP_IN_SEL_SHIFT, | |
590 | da7213_mic_amp_in_sel_txt); | |
ef5c2eba AT |
591 | static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux = |
592 | SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel); | |
593 | ||
c99f8b21 TI |
594 | static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel, |
595 | DA7213_MIC_2_CTRL, | |
596 | DA7213_MIC_AMP_IN_SEL_SHIFT, | |
597 | da7213_mic_amp_in_sel_txt); | |
ef5c2eba AT |
598 | static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux = |
599 | SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel); | |
600 | ||
601 | /* DAI routing select */ | |
602 | static const char * const da7213_dai_src_txt[] = { | |
603 | "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right" | |
604 | }; | |
605 | ||
c99f8b21 TI |
606 | static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src, |
607 | DA7213_DIG_ROUTING_DAI, | |
608 | DA7213_DAI_L_SRC_SHIFT, | |
609 | da7213_dai_src_txt); | |
ef5c2eba AT |
610 | static const struct snd_kcontrol_new da7213_dai_l_src_mux = |
611 | SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src); | |
612 | ||
c99f8b21 TI |
613 | static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src, |
614 | DA7213_DIG_ROUTING_DAI, | |
615 | DA7213_DAI_R_SRC_SHIFT, | |
616 | da7213_dai_src_txt); | |
ef5c2eba AT |
617 | static const struct snd_kcontrol_new da7213_dai_r_src_mux = |
618 | SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src); | |
619 | ||
620 | /* DAC routing select */ | |
621 | static const char * const da7213_dac_src_txt[] = { | |
622 | "ADC Output Left", "ADC Output Right", "DAI Input Left", | |
623 | "DAI Input Right" | |
624 | }; | |
625 | ||
c99f8b21 TI |
626 | static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src, |
627 | DA7213_DIG_ROUTING_DAC, | |
628 | DA7213_DAC_L_SRC_SHIFT, | |
629 | da7213_dac_src_txt); | |
ef5c2eba AT |
630 | static const struct snd_kcontrol_new da7213_dac_l_src_mux = |
631 | SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src); | |
632 | ||
c99f8b21 TI |
633 | static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src, |
634 | DA7213_DIG_ROUTING_DAC, | |
635 | DA7213_DAC_R_SRC_SHIFT, | |
636 | da7213_dac_src_txt); | |
ef5c2eba AT |
637 | static const struct snd_kcontrol_new da7213_dac_r_src_mux = |
638 | SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src); | |
639 | ||
640 | /* | |
641 | * Mixer Controls | |
642 | */ | |
643 | ||
644 | /* Mixin Left */ | |
645 | static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = { | |
646 | SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT, | |
647 | DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT, | |
648 | DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
649 | SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT, | |
650 | DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT, | |
651 | DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
652 | SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT, | |
653 | DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT, | |
654 | DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
655 | SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT, | |
656 | DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT, | |
657 | DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
658 | }; | |
659 | ||
660 | /* Mixin Right */ | |
661 | static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = { | |
662 | SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT, | |
663 | DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT, | |
664 | DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
665 | SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT, | |
666 | DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT, | |
667 | DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
668 | SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT, | |
669 | DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT, | |
670 | DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
671 | SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT, | |
672 | DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT, | |
673 | DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
674 | }; | |
675 | ||
676 | /* Mixout Left */ | |
677 | static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = { | |
678 | SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT, | |
679 | DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT, | |
680 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
681 | SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT, | |
682 | DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT, | |
683 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
684 | SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT, | |
685 | DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT, | |
686 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
687 | SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT, | |
688 | DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT, | |
689 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
690 | SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT, | |
691 | DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT, | |
692 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
693 | SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT, | |
694 | DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, | |
695 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
696 | SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT, | |
697 | DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, | |
698 | DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
699 | }; | |
700 | ||
701 | /* Mixout Right */ | |
702 | static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = { | |
703 | SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT, | |
704 | DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT, | |
705 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
706 | SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT, | |
707 | DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT, | |
708 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
709 | SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT, | |
710 | DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT, | |
711 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
712 | SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT, | |
713 | DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT, | |
714 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
715 | SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT, | |
716 | DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT, | |
717 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
718 | SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT, | |
719 | DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, | |
720 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
721 | SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT, | |
722 | DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, | |
723 | DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), | |
724 | }; | |
725 | ||
726 | ||
a0d5caea AT |
727 | /* |
728 | * DAPM Events | |
729 | */ | |
730 | ||
731 | static int da7213_dai_event(struct snd_soc_dapm_widget *w, | |
732 | struct snd_kcontrol *kcontrol, int event) | |
733 | { | |
2918d9cc KM |
734 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
735 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
d575b0b0 AT |
736 | u8 pll_ctrl, pll_status; |
737 | int i = 0; | |
738 | bool srm_lock = false; | |
a0d5caea AT |
739 | |
740 | switch (event) { | |
741 | case SND_SOC_DAPM_PRE_PMU: | |
742 | /* Enable DAI clks for master mode */ | |
743 | if (da7213->master) | |
2918d9cc | 744 | snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, |
a0d5caea AT |
745 | DA7213_DAI_CLK_EN_MASK, |
746 | DA7213_DAI_CLK_EN_MASK); | |
d575b0b0 | 747 | |
7e28fd46 | 748 | /* PC synchronised to DAI */ |
2918d9cc | 749 | snd_soc_component_update_bits(component, DA7213_PC_COUNT, |
7e28fd46 AT |
750 | DA7213_PC_FREERUN_MASK, 0); |
751 | ||
d936d527 | 752 | /* If SRM not enabled then nothing more to do */ |
2918d9cc | 753 | pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL); |
d575b0b0 AT |
754 | if (!(pll_ctrl & DA7213_PLL_SRM_EN)) |
755 | return 0; | |
756 | ||
d936d527 AT |
757 | /* Assist 32KHz mode PLL lock */ |
758 | if (pll_ctrl & DA7213_PLL_32K_MODE) { | |
2918d9cc KM |
759 | snd_soc_component_write(component, 0xF0, 0x8B); |
760 | snd_soc_component_write(component, 0xF2, 0x03); | |
761 | snd_soc_component_write(component, 0xF0, 0x00); | |
d936d527 AT |
762 | } |
763 | ||
d575b0b0 AT |
764 | /* Check SRM has locked */ |
765 | do { | |
2918d9cc | 766 | pll_status = snd_soc_component_read32(component, DA7213_PLL_STATUS); |
d575b0b0 AT |
767 | if (pll_status & DA7219_PLL_SRM_LOCK) { |
768 | srm_lock = true; | |
769 | } else { | |
770 | ++i; | |
771 | msleep(50); | |
772 | } | |
14f814fb | 773 | } while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock)); |
d575b0b0 AT |
774 | |
775 | if (!srm_lock) | |
2918d9cc | 776 | dev_warn(component->dev, "SRM failed to lock\n"); |
d575b0b0 | 777 | |
a0d5caea AT |
778 | return 0; |
779 | case SND_SOC_DAPM_POST_PMD: | |
d936d527 | 780 | /* Revert 32KHz PLL lock udpates if applied previously */ |
2918d9cc | 781 | pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL); |
d936d527 | 782 | if (pll_ctrl & DA7213_PLL_32K_MODE) { |
2918d9cc KM |
783 | snd_soc_component_write(component, 0xF0, 0x8B); |
784 | snd_soc_component_write(component, 0xF2, 0x01); | |
785 | snd_soc_component_write(component, 0xF0, 0x00); | |
d936d527 AT |
786 | } |
787 | ||
7e28fd46 | 788 | /* PC free-running */ |
2918d9cc | 789 | snd_soc_component_update_bits(component, DA7213_PC_COUNT, |
7e28fd46 AT |
790 | DA7213_PC_FREERUN_MASK, |
791 | DA7213_PC_FREERUN_MASK); | |
792 | ||
a0d5caea AT |
793 | /* Disable DAI clks if in master mode */ |
794 | if (da7213->master) | |
2918d9cc | 795 | snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, |
a0d5caea AT |
796 | DA7213_DAI_CLK_EN_MASK, 0); |
797 | return 0; | |
798 | default: | |
799 | return -EINVAL; | |
800 | } | |
801 | } | |
802 | ||
803 | ||
ef5c2eba AT |
804 | /* |
805 | * DAPM widgets | |
806 | */ | |
807 | ||
808 | static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = { | |
809 | /* | |
810 | * Input & Output | |
811 | */ | |
812 | ||
813 | /* Use a supply here as this controls both input & output DAIs */ | |
814 | SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT, | |
a0d5caea AT |
815 | DA7213_NO_INVERT, da7213_dai_event, |
816 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | |
ef5c2eba AT |
817 | |
818 | /* | |
819 | * Input | |
820 | */ | |
821 | ||
822 | /* Input Lines */ | |
823 | SND_SOC_DAPM_INPUT("MIC1"), | |
824 | SND_SOC_DAPM_INPUT("MIC2"), | |
825 | SND_SOC_DAPM_INPUT("AUXL"), | |
826 | SND_SOC_DAPM_INPUT("AUXR"), | |
827 | ||
828 | /* MUXs for Mic PGA source selection */ | |
829 | SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0, | |
830 | &da7213_mic_1_amp_in_sel_mux), | |
831 | SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0, | |
832 | &da7213_mic_2_amp_in_sel_mux), | |
833 | ||
834 | /* Input PGAs */ | |
835 | SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT, | |
836 | DA7213_NO_INVERT, NULL, 0), | |
837 | SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT, | |
838 | DA7213_NO_INVERT, NULL, 0), | |
839 | SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT, | |
840 | DA7213_NO_INVERT, NULL, 0), | |
841 | SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL, | |
842 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
843 | SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL, | |
844 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
845 | SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL, | |
846 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
847 | ||
848 | /* Mic Biases */ | |
849 | SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL, | |
850 | DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT, | |
851 | NULL, 0), | |
852 | SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL, | |
853 | DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT, | |
854 | NULL, 0), | |
855 | ||
856 | /* Input Mixers */ | |
857 | SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0, | |
858 | &da7213_dapm_mixinl_controls[0], | |
859 | ARRAY_SIZE(da7213_dapm_mixinl_controls)), | |
860 | SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0, | |
861 | &da7213_dapm_mixinr_controls[0], | |
862 | ARRAY_SIZE(da7213_dapm_mixinr_controls)), | |
863 | ||
864 | /* ADCs */ | |
865 | SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL, | |
866 | DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), | |
867 | SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL, | |
868 | DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), | |
869 | ||
870 | /* DAI */ | |
871 | SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0, | |
872 | &da7213_dai_l_src_mux), | |
873 | SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0, | |
874 | &da7213_dai_r_src_mux), | |
875 | SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), | |
876 | SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), | |
877 | ||
878 | /* | |
879 | * Output | |
880 | */ | |
881 | ||
882 | /* DAI */ | |
883 | SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0), | |
884 | SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0), | |
885 | SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0, | |
886 | &da7213_dac_l_src_mux), | |
887 | SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0, | |
888 | &da7213_dac_r_src_mux), | |
889 | ||
890 | /* DACs */ | |
891 | SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL, | |
892 | DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), | |
893 | SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL, | |
894 | DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), | |
895 | ||
896 | /* Output Mixers */ | |
897 | SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0, | |
898 | &da7213_dapm_mixoutl_controls[0], | |
899 | ARRAY_SIZE(da7213_dapm_mixoutl_controls)), | |
900 | SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0, | |
901 | &da7213_dapm_mixoutr_controls[0], | |
902 | ARRAY_SIZE(da7213_dapm_mixoutr_controls)), | |
903 | ||
904 | /* Output PGAs */ | |
905 | SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL, | |
906 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
907 | SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL, | |
908 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
909 | SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT, | |
910 | DA7213_NO_INVERT, NULL, 0), | |
911 | SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL, | |
912 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
913 | SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL, | |
914 | DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), | |
915 | ||
916 | /* Charge Pump */ | |
917 | SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT, | |
918 | DA7213_NO_INVERT, NULL, 0), | |
919 | ||
920 | /* Output Lines */ | |
921 | SND_SOC_DAPM_OUTPUT("HPL"), | |
922 | SND_SOC_DAPM_OUTPUT("HPR"), | |
923 | SND_SOC_DAPM_OUTPUT("LINE"), | |
924 | }; | |
925 | ||
926 | ||
927 | /* | |
928 | * DAPM audio route definition | |
929 | */ | |
930 | ||
931 | static const struct snd_soc_dapm_route da7213_audio_map[] = { | |
932 | /* Dest Connecting Widget source */ | |
933 | ||
934 | /* Input path */ | |
935 | {"MIC1", NULL, "Mic Bias 1"}, | |
936 | {"MIC2", NULL, "Mic Bias 2"}, | |
937 | ||
938 | {"Mic 1 Amp Source MUX", "Differential", "MIC1"}, | |
939 | {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"}, | |
940 | {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"}, | |
941 | ||
942 | {"Mic 2 Amp Source MUX", "Differential", "MIC2"}, | |
943 | {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"}, | |
944 | {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"}, | |
945 | ||
946 | {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"}, | |
947 | {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"}, | |
948 | ||
949 | {"Aux Left PGA", NULL, "AUXL"}, | |
950 | {"Aux Right PGA", NULL, "AUXR"}, | |
951 | ||
952 | {"Mixin Left", "Aux Left Switch", "Aux Left PGA"}, | |
953 | {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"}, | |
954 | {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"}, | |
955 | {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"}, | |
956 | ||
957 | {"Mixin Right", "Aux Right Switch", "Aux Right PGA"}, | |
958 | {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"}, | |
959 | {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"}, | |
960 | {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"}, | |
961 | ||
962 | {"Mixin Left PGA", NULL, "Mixin Left"}, | |
963 | {"ADC Left", NULL, "Mixin Left PGA"}, | |
964 | ||
965 | {"Mixin Right PGA", NULL, "Mixin Right"}, | |
966 | {"ADC Right", NULL, "Mixin Right PGA"}, | |
967 | ||
968 | {"DAI Left Source MUX", "ADC Left", "ADC Left"}, | |
969 | {"DAI Left Source MUX", "ADC Right", "ADC Right"}, | |
970 | {"DAI Left Source MUX", "DAI Input Left", "DAIINL"}, | |
971 | {"DAI Left Source MUX", "DAI Input Right", "DAIINR"}, | |
972 | ||
973 | {"DAI Right Source MUX", "ADC Left", "ADC Left"}, | |
974 | {"DAI Right Source MUX", "ADC Right", "ADC Right"}, | |
975 | {"DAI Right Source MUX", "DAI Input Left", "DAIINL"}, | |
976 | {"DAI Right Source MUX", "DAI Input Right", "DAIINR"}, | |
977 | ||
978 | {"DAIOUTL", NULL, "DAI Left Source MUX"}, | |
979 | {"DAIOUTR", NULL, "DAI Right Source MUX"}, | |
980 | ||
981 | {"DAIOUTL", NULL, "DAI"}, | |
982 | {"DAIOUTR", NULL, "DAI"}, | |
983 | ||
984 | /* Output path */ | |
985 | {"DAIINL", NULL, "DAI"}, | |
986 | {"DAIINR", NULL, "DAI"}, | |
987 | ||
988 | {"DAC Left Source MUX", "ADC Output Left", "ADC Left"}, | |
989 | {"DAC Left Source MUX", "ADC Output Right", "ADC Right"}, | |
990 | {"DAC Left Source MUX", "DAI Input Left", "DAIINL"}, | |
991 | {"DAC Left Source MUX", "DAI Input Right", "DAIINR"}, | |
992 | ||
993 | {"DAC Right Source MUX", "ADC Output Left", "ADC Left"}, | |
994 | {"DAC Right Source MUX", "ADC Output Right", "ADC Right"}, | |
995 | {"DAC Right Source MUX", "DAI Input Left", "DAIINL"}, | |
996 | {"DAC Right Source MUX", "DAI Input Right", "DAIINR"}, | |
997 | ||
998 | {"DAC Left", NULL, "DAC Left Source MUX"}, | |
999 | {"DAC Right", NULL, "DAC Right Source MUX"}, | |
1000 | ||
1001 | {"Mixout Left", "Aux Left Switch", "Aux Left PGA"}, | |
1002 | {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"}, | |
1003 | {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"}, | |
1004 | {"Mixout Left", "DAC Left Switch", "DAC Left"}, | |
1005 | {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"}, | |
1006 | {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"}, | |
1007 | {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"}, | |
1008 | ||
1009 | {"Mixout Right", "Aux Right Switch", "Aux Right PGA"}, | |
1010 | {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"}, | |
1011 | {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"}, | |
1012 | {"Mixout Right", "DAC Right Switch", "DAC Right"}, | |
1013 | {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"}, | |
1014 | {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"}, | |
1015 | {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"}, | |
1016 | ||
1017 | {"Mixout Left PGA", NULL, "Mixout Left"}, | |
1018 | {"Mixout Right PGA", NULL, "Mixout Right"}, | |
1019 | ||
1020 | {"Headphone Left PGA", NULL, "Mixout Left PGA"}, | |
1021 | {"Headphone Left PGA", NULL, "Charge Pump"}, | |
1022 | {"HPL", NULL, "Headphone Left PGA"}, | |
1023 | ||
1024 | {"Headphone Right PGA", NULL, "Mixout Right PGA"}, | |
1025 | {"Headphone Right PGA", NULL, "Charge Pump"}, | |
1026 | {"HPR", NULL, "Headphone Right PGA"}, | |
1027 | ||
1028 | {"Lineout PGA", NULL, "Mixout Right PGA"}, | |
1029 | {"LINE", NULL, "Lineout PGA"}, | |
1030 | }; | |
1031 | ||
c418a84a | 1032 | static const struct reg_default da7213_reg_defaults[] = { |
ef5c2eba AT |
1033 | { DA7213_DIG_ROUTING_DAI, 0x10 }, |
1034 | { DA7213_SR, 0x0A }, | |
1035 | { DA7213_REFERENCES, 0x80 }, | |
1036 | { DA7213_PLL_FRAC_TOP, 0x00 }, | |
1037 | { DA7213_PLL_FRAC_BOT, 0x00 }, | |
1038 | { DA7213_PLL_INTEGER, 0x20 }, | |
1039 | { DA7213_PLL_CTRL, 0x0C }, | |
1040 | { DA7213_DAI_CLK_MODE, 0x01 }, | |
1041 | { DA7213_DAI_CTRL, 0x08 }, | |
1042 | { DA7213_DIG_ROUTING_DAC, 0x32 }, | |
1043 | { DA7213_AUX_L_GAIN, 0x35 }, | |
1044 | { DA7213_AUX_R_GAIN, 0x35 }, | |
1045 | { DA7213_MIXIN_L_SELECT, 0x00 }, | |
1046 | { DA7213_MIXIN_R_SELECT, 0x00 }, | |
1047 | { DA7213_MIXIN_L_GAIN, 0x03 }, | |
1048 | { DA7213_MIXIN_R_GAIN, 0x03 }, | |
1049 | { DA7213_ADC_L_GAIN, 0x6F }, | |
1050 | { DA7213_ADC_R_GAIN, 0x6F }, | |
1051 | { DA7213_ADC_FILTERS1, 0x80 }, | |
1052 | { DA7213_MIC_1_GAIN, 0x01 }, | |
1053 | { DA7213_MIC_2_GAIN, 0x01 }, | |
1054 | { DA7213_DAC_FILTERS5, 0x00 }, | |
1055 | { DA7213_DAC_FILTERS2, 0x88 }, | |
1056 | { DA7213_DAC_FILTERS3, 0x88 }, | |
1057 | { DA7213_DAC_FILTERS4, 0x08 }, | |
1058 | { DA7213_DAC_FILTERS1, 0x80 }, | |
1059 | { DA7213_DAC_L_GAIN, 0x6F }, | |
1060 | { DA7213_DAC_R_GAIN, 0x6F }, | |
1061 | { DA7213_CP_CTRL, 0x61 }, | |
1062 | { DA7213_HP_L_GAIN, 0x39 }, | |
1063 | { DA7213_HP_R_GAIN, 0x39 }, | |
1064 | { DA7213_LINE_GAIN, 0x30 }, | |
1065 | { DA7213_MIXOUT_L_SELECT, 0x00 }, | |
1066 | { DA7213_MIXOUT_R_SELECT, 0x00 }, | |
1067 | { DA7213_SYSTEM_MODES_INPUT, 0x00 }, | |
1068 | { DA7213_SYSTEM_MODES_OUTPUT, 0x00 }, | |
1069 | { DA7213_AUX_L_CTRL, 0x44 }, | |
1070 | { DA7213_AUX_R_CTRL, 0x44 }, | |
1071 | { DA7213_MICBIAS_CTRL, 0x11 }, | |
1072 | { DA7213_MIC_1_CTRL, 0x40 }, | |
1073 | { DA7213_MIC_2_CTRL, 0x40 }, | |
1074 | { DA7213_MIXIN_L_CTRL, 0x40 }, | |
1075 | { DA7213_MIXIN_R_CTRL, 0x40 }, | |
1076 | { DA7213_ADC_L_CTRL, 0x40 }, | |
1077 | { DA7213_ADC_R_CTRL, 0x40 }, | |
1078 | { DA7213_DAC_L_CTRL, 0x48 }, | |
1079 | { DA7213_DAC_R_CTRL, 0x40 }, | |
1080 | { DA7213_HP_L_CTRL, 0x41 }, | |
1081 | { DA7213_HP_R_CTRL, 0x40 }, | |
1082 | { DA7213_LINE_CTRL, 0x40 }, | |
1083 | { DA7213_MIXOUT_L_CTRL, 0x10 }, | |
1084 | { DA7213_MIXOUT_R_CTRL, 0x10 }, | |
1085 | { DA7213_LDO_CTRL, 0x00 }, | |
1086 | { DA7213_IO_CTRL, 0x00 }, | |
1087 | { DA7213_GAIN_RAMP_CTRL, 0x00}, | |
1088 | { DA7213_MIC_CONFIG, 0x00 }, | |
1089 | { DA7213_PC_COUNT, 0x00 }, | |
1090 | { DA7213_CP_VOL_THRESHOLD1, 0x32 }, | |
1091 | { DA7213_CP_DELAY, 0x95 }, | |
1092 | { DA7213_CP_DETECTOR, 0x00 }, | |
1093 | { DA7213_DAI_OFFSET, 0x00 }, | |
1094 | { DA7213_DIG_CTRL, 0x00 }, | |
1095 | { DA7213_ALC_CTRL2, 0x00 }, | |
1096 | { DA7213_ALC_CTRL3, 0x00 }, | |
1097 | { DA7213_ALC_NOISE, 0x3F }, | |
1098 | { DA7213_ALC_TARGET_MIN, 0x3F }, | |
1099 | { DA7213_ALC_TARGET_MAX, 0x00 }, | |
1100 | { DA7213_ALC_GAIN_LIMITS, 0xFF }, | |
1101 | { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 }, | |
1102 | { DA7213_ALC_ANTICLIP_CTRL, 0x00 }, | |
1103 | { DA7213_ALC_ANTICLIP_LEVEL, 0x00 }, | |
1104 | { DA7213_ALC_OFFSET_MAN_M_L, 0x00 }, | |
1105 | { DA7213_ALC_OFFSET_MAN_U_L, 0x00 }, | |
1106 | { DA7213_ALC_OFFSET_MAN_M_R, 0x00 }, | |
1107 | { DA7213_ALC_OFFSET_MAN_U_R, 0x00 }, | |
1108 | { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 }, | |
1109 | { DA7213_DAC_NG_SETUP_TIME, 0x00 }, | |
1110 | { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 }, | |
1111 | { DA7213_DAC_NG_ON_THRESHOLD, 0x00 }, | |
1112 | { DA7213_DAC_NG_CTRL, 0x00 }, | |
1113 | }; | |
1114 | ||
1115 | static bool da7213_volatile_register(struct device *dev, unsigned int reg) | |
1116 | { | |
1117 | switch (reg) { | |
1118 | case DA7213_STATUS1: | |
1119 | case DA7213_PLL_STATUS: | |
1120 | case DA7213_AUX_L_GAIN_STATUS: | |
1121 | case DA7213_AUX_R_GAIN_STATUS: | |
1122 | case DA7213_MIC_1_GAIN_STATUS: | |
1123 | case DA7213_MIC_2_GAIN_STATUS: | |
1124 | case DA7213_MIXIN_L_GAIN_STATUS: | |
1125 | case DA7213_MIXIN_R_GAIN_STATUS: | |
1126 | case DA7213_ADC_L_GAIN_STATUS: | |
1127 | case DA7213_ADC_R_GAIN_STATUS: | |
1128 | case DA7213_DAC_L_GAIN_STATUS: | |
1129 | case DA7213_DAC_R_GAIN_STATUS: | |
1130 | case DA7213_HP_L_GAIN_STATUS: | |
1131 | case DA7213_HP_R_GAIN_STATUS: | |
1132 | case DA7213_LINE_GAIN_STATUS: | |
1133 | case DA7213_ALC_CTRL1: | |
1134 | case DA7213_ALC_OFFSET_AUTO_M_L: | |
1135 | case DA7213_ALC_OFFSET_AUTO_U_L: | |
1136 | case DA7213_ALC_OFFSET_AUTO_M_R: | |
1137 | case DA7213_ALC_OFFSET_AUTO_U_R: | |
1138 | case DA7213_ALC_CIC_OP_LVL_DATA: | |
1752a35a | 1139 | return true; |
ef5c2eba | 1140 | default: |
1752a35a | 1141 | return false; |
ef5c2eba AT |
1142 | } |
1143 | } | |
1144 | ||
1145 | static int da7213_hw_params(struct snd_pcm_substream *substream, | |
1146 | struct snd_pcm_hw_params *params, | |
1147 | struct snd_soc_dai *dai) | |
1148 | { | |
2918d9cc | 1149 | struct snd_soc_component *component = dai->component; |
ef5c2eba AT |
1150 | u8 dai_ctrl = 0; |
1151 | u8 fs; | |
1152 | ||
1153 | /* Set DAI format */ | |
e7610743 MB |
1154 | switch (params_width(params)) { |
1155 | case 16: | |
ef5c2eba AT |
1156 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE; |
1157 | break; | |
e7610743 | 1158 | case 20: |
ef5c2eba AT |
1159 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE; |
1160 | break; | |
e7610743 | 1161 | case 24: |
ef5c2eba AT |
1162 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE; |
1163 | break; | |
e7610743 | 1164 | case 32: |
ef5c2eba AT |
1165 | dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE; |
1166 | break; | |
1167 | default: | |
1168 | return -EINVAL; | |
1169 | } | |
1170 | ||
1171 | /* Set sampling rate */ | |
1172 | switch (params_rate(params)) { | |
1173 | case 8000: | |
1174 | fs = DA7213_SR_8000; | |
1175 | break; | |
1176 | case 11025: | |
1177 | fs = DA7213_SR_11025; | |
1178 | break; | |
1179 | case 12000: | |
1180 | fs = DA7213_SR_12000; | |
1181 | break; | |
1182 | case 16000: | |
1183 | fs = DA7213_SR_16000; | |
1184 | break; | |
1185 | case 22050: | |
1186 | fs = DA7213_SR_22050; | |
1187 | break; | |
1188 | case 32000: | |
1189 | fs = DA7213_SR_32000; | |
1190 | break; | |
1191 | case 44100: | |
1192 | fs = DA7213_SR_44100; | |
1193 | break; | |
1194 | case 48000: | |
1195 | fs = DA7213_SR_48000; | |
1196 | break; | |
1197 | case 88200: | |
1198 | fs = DA7213_SR_88200; | |
1199 | break; | |
1200 | case 96000: | |
1201 | fs = DA7213_SR_96000; | |
1202 | break; | |
1203 | default: | |
1204 | return -EINVAL; | |
1205 | } | |
1206 | ||
2918d9cc | 1207 | snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK, |
ef5c2eba | 1208 | dai_ctrl); |
2918d9cc | 1209 | snd_soc_component_write(component, DA7213_SR, fs); |
ef5c2eba AT |
1210 | |
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) | |
1215 | { | |
2918d9cc KM |
1216 | struct snd_soc_component *component = codec_dai->component; |
1217 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
ef5c2eba | 1218 | u8 dai_clk_mode = 0, dai_ctrl = 0; |
e0d746cc | 1219 | u8 dai_offset = 0; |
ef5c2eba AT |
1220 | |
1221 | /* Set master/slave mode */ | |
1222 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
1223 | case SND_SOC_DAIFMT_CBM_CFM: | |
ef5c2eba AT |
1224 | da7213->master = true; |
1225 | break; | |
1226 | case SND_SOC_DAIFMT_CBS_CFS: | |
ef5c2eba AT |
1227 | da7213->master = false; |
1228 | break; | |
1229 | default: | |
1230 | return -EINVAL; | |
1231 | } | |
1232 | ||
1233 | /* Set clock normal/inverted */ | |
e0d746cc PLB |
1234 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
1235 | case SND_SOC_DAIFMT_I2S: | |
1236 | case SND_SOC_DAIFMT_LEFT_J: | |
1237 | case SND_SOC_DAIFMT_RIGHT_J: | |
1238 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1239 | case SND_SOC_DAIFMT_NB_NF: | |
1240 | break; | |
1241 | case SND_SOC_DAIFMT_NB_IF: | |
1242 | dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; | |
1243 | break; | |
1244 | case SND_SOC_DAIFMT_IB_NF: | |
1245 | dai_clk_mode |= DA7213_DAI_CLK_POL_INV; | |
1246 | break; | |
1247 | case SND_SOC_DAIFMT_IB_IF: | |
1248 | dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | | |
1249 | DA7213_DAI_CLK_POL_INV; | |
1250 | break; | |
1251 | default: | |
1252 | return -EINVAL; | |
1253 | } | |
ef5c2eba | 1254 | break; |
e0d746cc PLB |
1255 | case SND_SOC_DAI_FORMAT_DSP_A: |
1256 | case SND_SOC_DAI_FORMAT_DSP_B: | |
1257 | /* The bclk is inverted wrt ASoC conventions */ | |
1258 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
1259 | case SND_SOC_DAIFMT_NB_NF: | |
1260 | dai_clk_mode |= DA7213_DAI_CLK_POL_INV; | |
1261 | break; | |
1262 | case SND_SOC_DAIFMT_NB_IF: | |
1263 | dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | | |
1264 | DA7213_DAI_CLK_POL_INV; | |
1265 | break; | |
1266 | case SND_SOC_DAIFMT_IB_NF: | |
1267 | break; | |
1268 | case SND_SOC_DAIFMT_IB_IF: | |
1269 | dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; | |
1270 | break; | |
1271 | default: | |
1272 | return -EINVAL; | |
1273 | } | |
ef5c2eba AT |
1274 | break; |
1275 | default: | |
1276 | return -EINVAL; | |
1277 | } | |
1278 | ||
1279 | /* Only I2S is supported */ | |
1280 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
1281 | case SND_SOC_DAIFMT_I2S: | |
1282 | dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE; | |
1283 | break; | |
1284 | case SND_SOC_DAIFMT_LEFT_J: | |
1285 | dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J; | |
1286 | break; | |
1287 | case SND_SOC_DAIFMT_RIGHT_J: | |
1288 | dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J; | |
1289 | break; | |
e0d746cc PLB |
1290 | case SND_SOC_DAI_FORMAT_DSP_A: /* L data MSB after FRM LRC */ |
1291 | dai_ctrl |= DA7213_DAI_FORMAT_DSP; | |
1292 | dai_offset = 1; | |
1293 | break; | |
1294 | case SND_SOC_DAI_FORMAT_DSP_B: /* L data MSB during FRM LRC */ | |
1295 | dai_ctrl |= DA7213_DAI_FORMAT_DSP; | |
1296 | break; | |
ef5c2eba AT |
1297 | default: |
1298 | return -EINVAL; | |
1299 | } | |
1300 | ||
5d764912 AT |
1301 | /* By default only 64 BCLK per WCLK is supported */ |
1302 | dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64; | |
ef5c2eba | 1303 | |
414a7321 L |
1304 | snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, |
1305 | DA7213_DAI_BCLKS_PER_WCLK_MASK | | |
1306 | DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK, | |
1307 | dai_clk_mode); | |
2918d9cc | 1308 | snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK, |
ef5c2eba | 1309 | dai_ctrl); |
2918d9cc | 1310 | snd_soc_component_write(component, DA7213_DAI_OFFSET, dai_offset); |
ef5c2eba AT |
1311 | |
1312 | return 0; | |
1313 | } | |
1314 | ||
1315 | static int da7213_mute(struct snd_soc_dai *dai, int mute) | |
1316 | { | |
2918d9cc | 1317 | struct snd_soc_component *component = dai->component; |
ef5c2eba AT |
1318 | |
1319 | if (mute) { | |
2918d9cc | 1320 | snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, |
ef5c2eba | 1321 | DA7213_MUTE_EN, DA7213_MUTE_EN); |
2918d9cc | 1322 | snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, |
ef5c2eba AT |
1323 | DA7213_MUTE_EN, DA7213_MUTE_EN); |
1324 | } else { | |
2918d9cc | 1325 | snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, |
ef5c2eba | 1326 | DA7213_MUTE_EN, 0); |
2918d9cc | 1327 | snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, |
ef5c2eba AT |
1328 | DA7213_MUTE_EN, 0); |
1329 | } | |
1330 | ||
1331 | return 0; | |
1332 | } | |
1333 | ||
1334 | #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
1335 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
1336 | ||
1337 | static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
1338 | int clk_id, unsigned int freq, int dir) | |
1339 | { | |
2918d9cc KM |
1340 | struct snd_soc_component *component = codec_dai->component; |
1341 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
6e7c4443 AT |
1342 | int ret = 0; |
1343 | ||
1344 | if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq)) | |
1345 | return 0; | |
1346 | ||
1347 | if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) { | |
1348 | dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", | |
1349 | freq); | |
1350 | return -EINVAL; | |
1351 | } | |
ef5c2eba AT |
1352 | |
1353 | switch (clk_id) { | |
1354 | case DA7213_CLKSRC_MCLK: | |
2918d9cc | 1355 | snd_soc_component_update_bits(component, DA7213_PLL_CTRL, |
4c75225a | 1356 | DA7213_PLL_MCLK_SQR_EN, 0); |
6e7c4443 AT |
1357 | break; |
1358 | case DA7213_CLKSRC_MCLK_SQR: | |
2918d9cc | 1359 | snd_soc_component_update_bits(component, DA7213_PLL_CTRL, |
4c75225a AT |
1360 | DA7213_PLL_MCLK_SQR_EN, |
1361 | DA7213_PLL_MCLK_SQR_EN); | |
ef5c2eba AT |
1362 | break; |
1363 | default: | |
1364 | dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); | |
1365 | return -EINVAL; | |
1366 | } | |
6e7c4443 AT |
1367 | |
1368 | da7213->clk_src = clk_id; | |
1369 | ||
1370 | if (da7213->mclk) { | |
1371 | freq = clk_round_rate(da7213->mclk, freq); | |
1372 | ret = clk_set_rate(da7213->mclk, freq); | |
1373 | if (ret) { | |
1374 | dev_err(codec_dai->dev, "Failed to set clock rate %d\n", | |
1375 | freq); | |
1376 | return ret; | |
1377 | } | |
1378 | } | |
1379 | ||
1380 | da7213->mclk_rate = freq; | |
1381 | ||
1382 | return 0; | |
ef5c2eba AT |
1383 | } |
1384 | ||
4c75225a | 1385 | /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */ |
ef5c2eba AT |
1386 | static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
1387 | int source, unsigned int fref, unsigned int fout) | |
1388 | { | |
2918d9cc KM |
1389 | struct snd_soc_component *component = codec_dai->component; |
1390 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); | |
ef5c2eba AT |
1391 | |
1392 | u8 pll_ctrl, indiv_bits, indiv; | |
1393 | u8 pll_frac_top, pll_frac_bot, pll_integer; | |
1394 | u32 freq_ref; | |
1395 | u64 frac_div; | |
1396 | ||
ef5c2eba | 1397 | /* Workout input divider based on MCLK rate */ |
abc189ea | 1398 | if (da7213->mclk_rate == 32768) { |
4c75225a | 1399 | if (!da7213->master) { |
2918d9cc | 1400 | dev_err(component->dev, |
4c75225a AT |
1401 | "32KHz only valid if codec is clock master\n"); |
1402 | return -EINVAL; | |
1403 | } | |
1404 | ||
ef5c2eba | 1405 | /* 32KHz PLL Mode */ |
1e62c52d AT |
1406 | indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; |
1407 | indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; | |
4c75225a | 1408 | source = DA7213_SYSCLK_PLL_32KHZ; |
ef5c2eba | 1409 | freq_ref = 3750000; |
4c75225a | 1410 | |
ef5c2eba | 1411 | } else { |
ef5c2eba | 1412 | if (da7213->mclk_rate < 5000000) { |
2918d9cc | 1413 | dev_err(component->dev, |
4c75225a AT |
1414 | "PLL input clock %d below valid range\n", |
1415 | da7213->mclk_rate); | |
1416 | return -EINVAL; | |
1e62c52d AT |
1417 | } else if (da7213->mclk_rate <= 9000000) { |
1418 | indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ; | |
1419 | indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL; | |
1420 | } else if (da7213->mclk_rate <= 18000000) { | |
1421 | indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; | |
1422 | indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; | |
1423 | } else if (da7213->mclk_rate <= 36000000) { | |
1424 | indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ; | |
1425 | indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL; | |
ef5c2eba | 1426 | } else if (da7213->mclk_rate <= 54000000) { |
1e62c52d AT |
1427 | indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ; |
1428 | indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL; | |
ef5c2eba | 1429 | } else { |
2918d9cc | 1430 | dev_err(component->dev, |
4c75225a AT |
1431 | "PLL input clock %d above valid range\n", |
1432 | da7213->mclk_rate); | |
1433 | return -EINVAL; | |
ef5c2eba AT |
1434 | } |
1435 | freq_ref = (da7213->mclk_rate / indiv); | |
1436 | } | |
1437 | ||
4c75225a | 1438 | pll_ctrl = indiv_bits; |
ef5c2eba | 1439 | |
4c75225a AT |
1440 | /* Configure PLL */ |
1441 | switch (source) { | |
1442 | case DA7213_SYSCLK_MCLK: | |
2918d9cc | 1443 | snd_soc_component_update_bits(component, DA7213_PLL_CTRL, |
4c75225a AT |
1444 | DA7213_PLL_INDIV_MASK | |
1445 | DA7213_PLL_MODE_MASK, pll_ctrl); | |
ef5c2eba | 1446 | return 0; |
4c75225a AT |
1447 | case DA7213_SYSCLK_PLL: |
1448 | break; | |
1449 | case DA7213_SYSCLK_PLL_SRM: | |
1450 | pll_ctrl |= DA7213_PLL_SRM_EN; | |
1451 | fout = DA7213_PLL_FREQ_OUT_94310400; | |
1452 | break; | |
1453 | case DA7213_SYSCLK_PLL_32KHZ: | |
1454 | if (da7213->mclk_rate != 32768) { | |
2918d9cc | 1455 | dev_err(component->dev, |
4c75225a AT |
1456 | "32KHz mode only valid with 32KHz MCLK\n"); |
1457 | return -EINVAL; | |
1458 | } | |
ef5c2eba | 1459 | |
4c75225a | 1460 | pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN; |
ef5c2eba | 1461 | fout = DA7213_PLL_FREQ_OUT_94310400; |
4c75225a AT |
1462 | break; |
1463 | default: | |
2918d9cc | 1464 | dev_err(component->dev, "Invalid PLL config\n"); |
4c75225a | 1465 | return -EINVAL; |
ef5c2eba AT |
1466 | } |
1467 | ||
ef5c2eba AT |
1468 | /* Calculate dividers for PLL */ |
1469 | pll_integer = fout / freq_ref; | |
1470 | frac_div = (u64)(fout % freq_ref) * 8192ULL; | |
1471 | do_div(frac_div, freq_ref); | |
1472 | pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK; | |
1473 | pll_frac_bot = (frac_div) & DA7213_BYTE_MASK; | |
1474 | ||
1475 | /* Write PLL dividers */ | |
2918d9cc KM |
1476 | snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, pll_frac_top); |
1477 | snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, pll_frac_bot); | |
1478 | snd_soc_component_write(component, DA7213_PLL_INTEGER, pll_integer); | |
ef5c2eba AT |
1479 | |
1480 | /* Enable PLL */ | |
1481 | pll_ctrl |= DA7213_PLL_EN; | |
2918d9cc | 1482 | snd_soc_component_update_bits(component, DA7213_PLL_CTRL, |
4c75225a AT |
1483 | DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK, |
1484 | pll_ctrl); | |
ef5c2eba | 1485 | |
d936d527 AT |
1486 | /* Assist 32KHz mode PLL lock */ |
1487 | if (source == DA7213_SYSCLK_PLL_32KHZ) { | |
2918d9cc KM |
1488 | snd_soc_component_write(component, 0xF0, 0x8B); |
1489 | snd_soc_component_write(component, 0xF1, 0x03); | |
1490 | snd_soc_component_write(component, 0xF1, 0x01); | |
1491 | snd_soc_component_write(component, 0xF0, 0x00); | |
d936d527 | 1492 | } |
ef5c2eba AT |
1493 | |
1494 | return 0; | |
ef5c2eba AT |
1495 | } |
1496 | ||
1497 | /* DAI operations */ | |
1498 | static const struct snd_soc_dai_ops da7213_dai_ops = { | |
1499 | .hw_params = da7213_hw_params, | |
1500 | .set_fmt = da7213_set_dai_fmt, | |
1501 | .set_sysclk = da7213_set_dai_sysclk, | |
1502 | .set_pll = da7213_set_dai_pll, | |
1503 | .digital_mute = da7213_mute, | |
1504 | }; | |
1505 | ||
1506 | static struct snd_soc_dai_driver da7213_dai = { | |
1507 | .name = "da7213-hifi", | |
1508 | /* Playback Capabilities */ | |
1509 | .playback = { | |
1510 | .stream_name = "Playback", | |
1511 | .channels_min = 1, | |
1512 | .channels_max = 2, | |
1513 | .rates = SNDRV_PCM_RATE_8000_96000, | |
1514 | .formats = DA7213_FORMATS, | |
1515 | }, | |
1516 | /* Capture Capabilities */ | |
1517 | .capture = { | |
1518 | .stream_name = "Capture", | |
1519 | .channels_min = 1, | |
1520 | .channels_max = 2, | |
1521 | .rates = SNDRV_PCM_RATE_8000_96000, | |
1522 | .formats = DA7213_FORMATS, | |
1523 | }, | |
1524 | .ops = &da7213_dai_ops, | |
1525 | .symmetric_rates = 1, | |
1526 | }; | |
1527 | ||
2918d9cc | 1528 | static int da7213_set_bias_level(struct snd_soc_component *component, |
ef5c2eba AT |
1529 | enum snd_soc_bias_level level) |
1530 | { | |
2918d9cc | 1531 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); |
6e7c4443 AT |
1532 | int ret; |
1533 | ||
ef5c2eba AT |
1534 | switch (level) { |
1535 | case SND_SOC_BIAS_ON: | |
ef5c2eba | 1536 | break; |
f612680f AT |
1537 | case SND_SOC_BIAS_PREPARE: |
1538 | /* Enable MCLK for transition to ON state */ | |
2918d9cc | 1539 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) { |
6e7c4443 AT |
1540 | if (da7213->mclk) { |
1541 | ret = clk_prepare_enable(da7213->mclk); | |
1542 | if (ret) { | |
2918d9cc | 1543 | dev_err(component->dev, |
6e7c4443 AT |
1544 | "Failed to enable mclk\n"); |
1545 | return ret; | |
1546 | } | |
1547 | } | |
f612680f AT |
1548 | } |
1549 | break; | |
1550 | case SND_SOC_BIAS_STANDBY: | |
2918d9cc | 1551 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
ef5c2eba | 1552 | /* Enable VMID reference & master bias */ |
2918d9cc | 1553 | snd_soc_component_update_bits(component, DA7213_REFERENCES, |
ef5c2eba AT |
1554 | DA7213_VMID_EN | DA7213_BIAS_EN, |
1555 | DA7213_VMID_EN | DA7213_BIAS_EN); | |
f612680f AT |
1556 | } else { |
1557 | /* Remove MCLK */ | |
1558 | if (da7213->mclk) | |
1559 | clk_disable_unprepare(da7213->mclk); | |
ef5c2eba AT |
1560 | } |
1561 | break; | |
1562 | case SND_SOC_BIAS_OFF: | |
1563 | /* Disable VMID reference & master bias */ | |
2918d9cc | 1564 | snd_soc_component_update_bits(component, DA7213_REFERENCES, |
ef5c2eba AT |
1565 | DA7213_VMID_EN | DA7213_BIAS_EN, 0); |
1566 | break; | |
1567 | } | |
ef5c2eba AT |
1568 | return 0; |
1569 | } | |
1570 | ||
8f42c23a | 1571 | #if defined(CONFIG_OF) |
e90996a3 AT |
1572 | /* DT */ |
1573 | static const struct of_device_id da7213_of_match[] = { | |
1574 | { .compatible = "dlg,da7213", }, | |
1575 | { } | |
1576 | }; | |
1577 | MODULE_DEVICE_TABLE(of, da7213_of_match); | |
8f42c23a PLB |
1578 | #endif |
1579 | ||
1580 | #ifdef CONFIG_ACPI | |
1581 | static const struct acpi_device_id da7213_acpi_match[] = { | |
1582 | { "DLGS7212", 0}, | |
1583 | { "DLGS7213", 0}, | |
1584 | { }, | |
1585 | }; | |
1586 | MODULE_DEVICE_TABLE(acpi, da7213_acpi_match); | |
1587 | #endif | |
e90996a3 AT |
1588 | |
1589 | static enum da7213_micbias_voltage | |
2918d9cc | 1590 | da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val) |
e90996a3 AT |
1591 | { |
1592 | switch (val) { | |
1593 | case 1600: | |
1594 | return DA7213_MICBIAS_1_6V; | |
1595 | case 2200: | |
1596 | return DA7213_MICBIAS_2_2V; | |
1597 | case 2500: | |
1598 | return DA7213_MICBIAS_2_5V; | |
1599 | case 3000: | |
1600 | return DA7213_MICBIAS_3_0V; | |
1601 | default: | |
2918d9cc | 1602 | dev_warn(component->dev, "Invalid micbias level\n"); |
e90996a3 AT |
1603 | return DA7213_MICBIAS_2_2V; |
1604 | } | |
1605 | } | |
1606 | ||
1607 | static enum da7213_dmic_data_sel | |
2918d9cc | 1608 | da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str) |
e90996a3 AT |
1609 | { |
1610 | if (!strcmp(str, "lrise_rfall")) { | |
1611 | return DA7213_DMIC_DATA_LRISE_RFALL; | |
1612 | } else if (!strcmp(str, "lfall_rrise")) { | |
1613 | return DA7213_DMIC_DATA_LFALL_RRISE; | |
1614 | } else { | |
2918d9cc | 1615 | dev_warn(component->dev, "Invalid DMIC data select type\n"); |
e90996a3 AT |
1616 | return DA7213_DMIC_DATA_LRISE_RFALL; |
1617 | } | |
1618 | } | |
1619 | ||
1620 | static enum da7213_dmic_samplephase | |
2918d9cc | 1621 | da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str) |
e90996a3 AT |
1622 | { |
1623 | if (!strcmp(str, "on_clkedge")) { | |
1624 | return DA7213_DMIC_SAMPLE_ON_CLKEDGE; | |
1625 | } else if (!strcmp(str, "between_clkedge")) { | |
1626 | return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE; | |
1627 | } else { | |
2918d9cc | 1628 | dev_warn(component->dev, "Invalid DMIC sample phase\n"); |
e90996a3 AT |
1629 | return DA7213_DMIC_SAMPLE_ON_CLKEDGE; |
1630 | } | |
1631 | } | |
1632 | ||
1633 | static enum da7213_dmic_clk_rate | |
2918d9cc | 1634 | da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val) |
e90996a3 AT |
1635 | { |
1636 | switch (val) { | |
1637 | case 1500000: | |
1638 | return DA7213_DMIC_CLK_1_5MHZ; | |
1639 | case 3000000: | |
1640 | return DA7213_DMIC_CLK_3_0MHZ; | |
1641 | default: | |
2918d9cc | 1642 | dev_warn(component->dev, "Invalid DMIC clock rate\n"); |
e90996a3 AT |
1643 | return DA7213_DMIC_CLK_1_5MHZ; |
1644 | } | |
1645 | } | |
1646 | ||
1647 | static struct da7213_platform_data | |
2918d9cc | 1648 | *da7213_fw_to_pdata(struct snd_soc_component *component) |
e90996a3 | 1649 | { |
2918d9cc | 1650 | struct device *dev = component->dev; |
e90996a3 | 1651 | struct da7213_platform_data *pdata; |
0e54153b AT |
1652 | const char *fw_str; |
1653 | u32 fw_val32; | |
e90996a3 | 1654 | |
2918d9cc | 1655 | pdata = devm_kzalloc(component->dev, sizeof(*pdata), GFP_KERNEL); |
13d5ea5f | 1656 | if (!pdata) |
e90996a3 | 1657 | return NULL; |
e90996a3 | 1658 | |
0e54153b | 1659 | if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0) |
2918d9cc | 1660 | pdata->micbias1_lvl = da7213_of_micbias_lvl(component, fw_val32); |
e90996a3 AT |
1661 | else |
1662 | pdata->micbias1_lvl = DA7213_MICBIAS_2_2V; | |
1663 | ||
0e54153b | 1664 | if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0) |
2918d9cc | 1665 | pdata->micbias2_lvl = da7213_of_micbias_lvl(component, fw_val32); |
e90996a3 AT |
1666 | else |
1667 | pdata->micbias2_lvl = DA7213_MICBIAS_2_2V; | |
1668 | ||
0e54153b | 1669 | if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str)) |
2918d9cc | 1670 | pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, fw_str); |
e90996a3 AT |
1671 | else |
1672 | pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL; | |
1673 | ||
0e54153b | 1674 | if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str)) |
e90996a3 | 1675 | pdata->dmic_samplephase = |
2918d9cc | 1676 | da7213_of_dmic_samplephase(component, fw_str); |
e90996a3 AT |
1677 | else |
1678 | pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE; | |
1679 | ||
0e54153b | 1680 | if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0) |
2918d9cc | 1681 | pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, fw_val32); |
e90996a3 AT |
1682 | else |
1683 | pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ; | |
1684 | ||
1685 | return pdata; | |
1686 | } | |
1687 | ||
1688 | ||
2918d9cc | 1689 | static int da7213_probe(struct snd_soc_component *component) |
ef5c2eba | 1690 | { |
2918d9cc | 1691 | struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); |
ef5c2eba | 1692 | |
ef5c2eba | 1693 | /* Default to using ALC auto offset calibration mode. */ |
2918d9cc | 1694 | snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, |
ef5c2eba AT |
1695 | DA7213_ALC_CALIB_MODE_MAN, 0); |
1696 | da7213->alc_calib_auto = true; | |
1697 | ||
7e28fd46 | 1698 | /* Default PC counter to free-running */ |
2918d9cc | 1699 | snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK, |
7e28fd46 AT |
1700 | DA7213_PC_FREERUN_MASK); |
1701 | ||
ef5c2eba | 1702 | /* Enable all Gain Ramps */ |
2918d9cc | 1703 | snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL, |
ef5c2eba | 1704 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1705 | snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL, |
ef5c2eba | 1706 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1707 | snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, |
ef5c2eba | 1708 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1709 | snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, |
ef5c2eba | 1710 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1711 | snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, |
ef5c2eba | 1712 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1713 | snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, |
ef5c2eba | 1714 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1715 | snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, |
ef5c2eba | 1716 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1717 | snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, |
ef5c2eba | 1718 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1719 | snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, |
ef5c2eba | 1720 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1721 | snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, |
ef5c2eba | 1722 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
2918d9cc | 1723 | snd_soc_component_update_bits(component, DA7213_LINE_CTRL, |
ef5c2eba AT |
1724 | DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); |
1725 | ||
1726 | /* | |
1727 | * There are two separate control bits for input and output mixers as | |
1728 | * well as headphone and line outs. | |
1729 | * One to enable corresponding amplifier and other to enable its | |
1730 | * output. As amplifier bits are related to power control, they are | |
1731 | * being managed by DAPM while other (non power related) bits are | |
1732 | * enabled here | |
1733 | */ | |
2918d9cc | 1734 | snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, |
ef5c2eba | 1735 | DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); |
2918d9cc | 1736 | snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, |
ef5c2eba AT |
1737 | DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); |
1738 | ||
2918d9cc | 1739 | snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL, |
ef5c2eba | 1740 | DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); |
2918d9cc | 1741 | snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL, |
ef5c2eba AT |
1742 | DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); |
1743 | ||
2918d9cc | 1744 | snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, |
ef5c2eba | 1745 | DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); |
2918d9cc | 1746 | snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, |
ef5c2eba AT |
1747 | DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); |
1748 | ||
2918d9cc | 1749 | snd_soc_component_update_bits(component, DA7213_LINE_CTRL, |
ef5c2eba AT |
1750 | DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE); |
1751 | ||
e90996a3 | 1752 | /* Handle DT/Platform data */ |
2918d9cc | 1753 | da7213->pdata = dev_get_platdata(component->dev); |
0e54153b | 1754 | if (!da7213->pdata) |
2918d9cc | 1755 | da7213->pdata = da7213_fw_to_pdata(component); |
e90996a3 | 1756 | |
ef5c2eba AT |
1757 | /* Set platform data values */ |
1758 | if (da7213->pdata) { | |
e90996a3 | 1759 | struct da7213_platform_data *pdata = da7213->pdata; |
ef5c2eba AT |
1760 | u8 micbias_lvl = 0, dmic_cfg = 0; |
1761 | ||
1762 | /* Set Mic Bias voltages */ | |
1763 | switch (pdata->micbias1_lvl) { | |
1764 | case DA7213_MICBIAS_1_6V: | |
1765 | case DA7213_MICBIAS_2_2V: | |
1766 | case DA7213_MICBIAS_2_5V: | |
1767 | case DA7213_MICBIAS_3_0V: | |
1768 | micbias_lvl |= (pdata->micbias1_lvl << | |
1769 | DA7213_MICBIAS1_LEVEL_SHIFT); | |
1770 | break; | |
1771 | } | |
1772 | switch (pdata->micbias2_lvl) { | |
1773 | case DA7213_MICBIAS_1_6V: | |
1774 | case DA7213_MICBIAS_2_2V: | |
1775 | case DA7213_MICBIAS_2_5V: | |
1776 | case DA7213_MICBIAS_3_0V: | |
1777 | micbias_lvl |= (pdata->micbias2_lvl << | |
1778 | DA7213_MICBIAS2_LEVEL_SHIFT); | |
1779 | break; | |
1780 | } | |
2918d9cc | 1781 | snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL, |
ef5c2eba AT |
1782 | DA7213_MICBIAS1_LEVEL_MASK | |
1783 | DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl); | |
1784 | ||
1785 | /* Set DMIC configuration */ | |
1786 | switch (pdata->dmic_data_sel) { | |
1787 | case DA7213_DMIC_DATA_LFALL_RRISE: | |
1788 | case DA7213_DMIC_DATA_LRISE_RFALL: | |
1789 | dmic_cfg |= (pdata->dmic_data_sel << | |
1790 | DA7213_DMIC_DATA_SEL_SHIFT); | |
1791 | break; | |
1792 | } | |
61559af1 | 1793 | switch (pdata->dmic_samplephase) { |
ef5c2eba AT |
1794 | case DA7213_DMIC_SAMPLE_ON_CLKEDGE: |
1795 | case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE: | |
61559af1 | 1796 | dmic_cfg |= (pdata->dmic_samplephase << |
ef5c2eba AT |
1797 | DA7213_DMIC_SAMPLEPHASE_SHIFT); |
1798 | break; | |
1799 | } | |
61559af1 | 1800 | switch (pdata->dmic_clk_rate) { |
ef5c2eba AT |
1801 | case DA7213_DMIC_CLK_3_0MHZ: |
1802 | case DA7213_DMIC_CLK_1_5MHZ: | |
61559af1 | 1803 | dmic_cfg |= (pdata->dmic_clk_rate << |
ef5c2eba AT |
1804 | DA7213_DMIC_CLK_RATE_SHIFT); |
1805 | break; | |
1806 | } | |
2918d9cc | 1807 | snd_soc_component_update_bits(component, DA7213_MIC_CONFIG, |
ef5c2eba AT |
1808 | DA7213_DMIC_DATA_SEL_MASK | |
1809 | DA7213_DMIC_SAMPLEPHASE_MASK | | |
1810 | DA7213_DMIC_CLK_RATE_MASK, dmic_cfg); | |
6e7c4443 | 1811 | } |
ef5c2eba | 1812 | |
6e7c4443 | 1813 | /* Check if MCLK provided */ |
2918d9cc | 1814 | da7213->mclk = devm_clk_get(component->dev, "mclk"); |
6e7c4443 AT |
1815 | if (IS_ERR(da7213->mclk)) { |
1816 | if (PTR_ERR(da7213->mclk) != -ENOENT) | |
1817 | return PTR_ERR(da7213->mclk); | |
1818 | else | |
1819 | da7213->mclk = NULL; | |
ef5c2eba | 1820 | } |
e90996a3 | 1821 | |
ef5c2eba AT |
1822 | return 0; |
1823 | } | |
1824 | ||
2918d9cc | 1825 | static const struct snd_soc_component_driver soc_component_dev_da7213 = { |
ef5c2eba AT |
1826 | .probe = da7213_probe, |
1827 | .set_bias_level = da7213_set_bias_level, | |
2918d9cc KM |
1828 | .controls = da7213_snd_controls, |
1829 | .num_controls = ARRAY_SIZE(da7213_snd_controls), | |
1830 | .dapm_widgets = da7213_dapm_widgets, | |
1831 | .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets), | |
1832 | .dapm_routes = da7213_audio_map, | |
1833 | .num_dapm_routes = ARRAY_SIZE(da7213_audio_map), | |
1834 | .idle_bias_on = 1, | |
1835 | .use_pmdown_time = 1, | |
1836 | .endianness = 1, | |
1837 | .non_legacy_dai_naming = 1, | |
ef5c2eba AT |
1838 | }; |
1839 | ||
1840 | static const struct regmap_config da7213_regmap_config = { | |
1841 | .reg_bits = 8, | |
1842 | .val_bits = 8, | |
1843 | ||
1844 | .reg_defaults = da7213_reg_defaults, | |
1845 | .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults), | |
1846 | .volatile_reg = da7213_volatile_register, | |
1847 | .cache_type = REGCACHE_RBTREE, | |
1848 | }; | |
1849 | ||
1850 | static int da7213_i2c_probe(struct i2c_client *i2c, | |
1851 | const struct i2c_device_id *id) | |
1852 | { | |
1853 | struct da7213_priv *da7213; | |
ef5c2eba AT |
1854 | int ret; |
1855 | ||
8080699a | 1856 | da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL); |
ef5c2eba AT |
1857 | if (!da7213) |
1858 | return -ENOMEM; | |
1859 | ||
ef5c2eba AT |
1860 | i2c_set_clientdata(i2c, da7213); |
1861 | ||
1862 | da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config); | |
1863 | if (IS_ERR(da7213->regmap)) { | |
1864 | ret = PTR_ERR(da7213->regmap); | |
1865 | dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); | |
1866 | return ret; | |
1867 | } | |
1868 | ||
2918d9cc KM |
1869 | ret = devm_snd_soc_register_component(&i2c->dev, |
1870 | &soc_component_dev_da7213, &da7213_dai, 1); | |
ef5c2eba | 1871 | if (ret < 0) { |
2918d9cc | 1872 | dev_err(&i2c->dev, "Failed to register da7213 component: %d\n", |
ef5c2eba AT |
1873 | ret); |
1874 | } | |
1875 | return ret; | |
1876 | } | |
1877 | ||
ef5c2eba AT |
1878 | static const struct i2c_device_id da7213_i2c_id[] = { |
1879 | { "da7213", 0 }, | |
1880 | { } | |
1881 | }; | |
1882 | MODULE_DEVICE_TABLE(i2c, da7213_i2c_id); | |
1883 | ||
1884 | /* I2C codec control layer */ | |
1885 | static struct i2c_driver da7213_i2c_driver = { | |
1886 | .driver = { | |
1887 | .name = "da7213", | |
e90996a3 | 1888 | .of_match_table = of_match_ptr(da7213_of_match), |
8f42c23a | 1889 | .acpi_match_table = ACPI_PTR(da7213_acpi_match), |
ef5c2eba AT |
1890 | }, |
1891 | .probe = da7213_i2c_probe, | |
ef5c2eba AT |
1892 | .id_table = da7213_i2c_id, |
1893 | }; | |
1894 | ||
1895 | module_i2c_driver(da7213_i2c_driver); | |
1896 | ||
1897 | MODULE_DESCRIPTION("ASoC DA7213 Codec driver"); | |
1898 | MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); | |
1899 | MODULE_LICENSE("GPL"); |