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ASoC: cros_ec_codec: Use managed buffer allocation
[linux-2.6-block.git] / sound / soc / codecs / cros_ec_codec.c
CommitLineData
b291f42a
CYC		 1// SPDX-License-Identifier: GPL-2.0
2/*
727f1c71
TBS		 3 * Copyright 2019 Google, Inc.
4 *
5 * ChromeOS Embedded Controller codec driver.
b291f42a
CYC		 6 *
7 * This driver uses the cros-ec interface to communicate with the ChromeOS
8 * EC for audio function.
9 */
10
b6bc07d4
TBS		 11#include <crypto/hash.h>
12#include <crypto/sha.h>
b291f42a
CYC		 13#include <linux/delay.h>
14#include <linux/device.h>
b6bc07d4
TBS		 15#include <linux/io.h>
16#include <linux/jiffies.h>
b291f42a 17#include <linux/kernel.h>
b291f42a 18#include <linux/module.h>
b6bc07d4
TBS		 19#include <linux/of.h>
20#include <linux/of_address.h>
840d9f13
EBS		 21#include <linux/platform_data/cros_ec_commands.h>
22#include <linux/platform_data/cros_ec_proto.h>
b291f42a
CYC		 23#include <linux/platform_device.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/tlv.h>
28
727f1c71 29struct cros_ec_codec_priv {
b291f42a
CYC		 30 struct device *dev;
31 struct cros_ec_device *ec_device;
b6bc07d4
TBS		 32
33 /* common */
34 uint32_t ec_capabilities;
35
36 uint64_t ec_shm_addr;
37 uint32_t ec_shm_len;
38
39 uint64_t ap_shm_phys_addr;
40 uint32_t ap_shm_len;
41 uint64_t ap_shm_addr;
42 uint64_t ap_shm_last_alloc;
43
44 /* DMIC */
45 atomic_t dmic_probed;
46
47 /* WoV */
48 bool wov_enabled;
49 uint8_t *wov_audio_shm_p;
50 uint32_t wov_audio_shm_len;
51 uint8_t wov_audio_shm_type;
52 uint8_t *wov_lang_shm_p;
53 uint32_t wov_lang_shm_len;
54 uint8_t wov_lang_shm_type;
55
56 struct mutex wov_dma_lock;
57 uint8_t wov_buf[64000];
58 uint32_t wov_rp, wov_wp;
59 size_t wov_dma_offset;
60 bool wov_burst_read;
61 struct snd_pcm_substream *wov_substream;
62 struct delayed_work wov_copy_work;
63 struct notifier_block wov_notifier;
b291f42a
CYC		 64};
65
b6bc07d4
TBS		 66static int ec_codec_capable(struct cros_ec_codec_priv *priv, uint8_t cap)
67{
68 return priv->ec_capabilities & BIT(cap);
69}
70
727f1c71
TBS		 71static int send_ec_host_command(struct cros_ec_device *ec_dev, uint32_t cmd,
72 uint8_t *out, size_t outsize,
73 uint8_t *in, size_t insize)
b291f42a 74{
b291f42a 75 int ret;
727f1c71
TBS		 76 struct cros_ec_command *msg;
77
78 msg = kmalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
79 if (!msg)
80 return -ENOMEM;
b291f42a
CYC		 81
82 msg->version = 0;
727f1c71
TBS		 83 msg->command = cmd;
84 msg->outsize = outsize;
85 msg->insize = insize;
86
87 if (outsize)
88 memcpy(msg->data, out, outsize);
b291f42a 89
727f1c71
TBS		 90 ret = cros_ec_cmd_xfer_status(ec_dev, msg);
91 if (ret < 0)
92 goto error;
b291f42a 93
727f1c71
TBS		 94 if (insize)
95 memcpy(in, msg->data, insize);
b291f42a 96
727f1c71
TBS		 97 ret = 0;
98error:
99 kfree(msg);
b291f42a
CYC		 100 return ret;
101}
102
b6bc07d4
TBS		 103static int calculate_sha256(struct cros_ec_codec_priv *priv,
104 uint8_t *buf, uint32_t size, uint8_t *digest)
105{
106 struct crypto_shash *tfm;
107
108 tfm = crypto_alloc_shash("sha256", CRYPTO_ALG_TYPE_SHASH, 0);
109 if (IS_ERR(tfm)) {
110 dev_err(priv->dev, "can't alloc shash\n");
111 return PTR_ERR(tfm);
112 }
113
114 {
115 SHASH_DESC_ON_STACK(desc, tfm);
116
117 desc->tfm = tfm;
118
119 crypto_shash_digest(desc, buf, size, digest);
120 shash_desc_zero(desc);
121 }
122
123 crypto_free_shash(tfm);
124
125#ifdef DEBUG
126 {
127 char digest_str[65];
128
129 bin2hex(digest_str, digest, 32);
130 digest_str[64] = 0;
131 dev_dbg(priv->dev, "hash=%s\n", digest_str);
132 }
133#endif
134
135 return 0;
136}
137
727f1c71
TBS		 138static int dmic_get_gain(struct snd_kcontrol *kcontrol,
139 struct snd_ctl_elem_value *ucontrol)
b291f42a 140{
727f1c71
TBS		 141 struct snd_soc_component *component =
142 snd_soc_kcontrol_component(kcontrol);
143 struct cros_ec_codec_priv *priv =
b291f42a 144 snd_soc_component_get_drvdata(component);
8f731d4c 145 struct ec_param_ec_codec_dmic p;
f3e82ad4 146 struct ec_response_ec_codec_dmic_get_gain_idx r;
727f1c71 147 int ret;
b291f42a 148
f3e82ad4
TBS		 149 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
150 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
8f731d4c 151 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
727f1c71
TBS		 152 (uint8_t *)&p, sizeof(p),
153 (uint8_t *)&r, sizeof(r));
154 if (ret < 0)
155 return ret;
f3e82ad4 156 ucontrol->value.integer.value[0] = r.gain;
b291f42a 157
f3e82ad4
TBS		 158 p.cmd = EC_CODEC_DMIC_GET_GAIN_IDX;
159 p.get_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
160 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
161 (uint8_t *)&p, sizeof(p),
162 (uint8_t *)&r, sizeof(r));
163 if (ret < 0)
164 return ret;
165 ucontrol->value.integer.value[1] = r.gain;
b291f42a 166
727f1c71 167 return 0;
b291f42a
CYC		 168}
169
727f1c71
TBS		 170static int dmic_put_gain(struct snd_kcontrol *kcontrol,
171 struct snd_ctl_elem_value *ucontrol)
b291f42a 172{
727f1c71
TBS		 173 struct snd_soc_component *component =
174 snd_soc_kcontrol_component(kcontrol);
175 struct cros_ec_codec_priv *priv =
176 snd_soc_component_get_drvdata(component);
177 struct soc_mixer_control *control =
178 (struct soc_mixer_control *)kcontrol->private_value;
179 int max_dmic_gain = control->max;
180 int left = ucontrol->value.integer.value[0];
181 int right = ucontrol->value.integer.value[1];
8f731d4c 182 struct ec_param_ec_codec_dmic p;
f3e82ad4 183 int ret;
b291f42a 184
727f1c71 185 if (left > max_dmic_gain || right > max_dmic_gain)
b291f42a 186 return -EINVAL;
b291f42a 187
727f1c71 188 dev_dbg(component->dev, "set mic gain to %u, %u\n", left, right);
b291f42a 189
f3e82ad4
TBS		 190 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
191 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_0;
192 p.set_gain_idx_param.gain = left;
193 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
194 (uint8_t *)&p, sizeof(p), NULL, 0);
195 if (ret < 0)
196 return ret;
197
198 p.cmd = EC_CODEC_DMIC_SET_GAIN_IDX;
199 p.set_gain_idx_param.channel = EC_CODEC_DMIC_CHANNEL_1;
200 p.set_gain_idx_param.gain = right;
8f731d4c 201 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
727f1c71 202 (uint8_t *)&p, sizeof(p), NULL, 0);
b291f42a
CYC		 203}
204
727f1c71 205static const DECLARE_TLV_DB_SCALE(dmic_gain_tlv, 0, 100, 0);
b291f42a 206
727f1c71
TBS		 207enum {
208 DMIC_CTL_GAIN = 0,
209};
b291f42a 210
727f1c71
TBS		 211static struct snd_kcontrol_new dmic_controls[] = {
212 [DMIC_CTL_GAIN] =
213 SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM,
214 0, 0, 0, dmic_get_gain, dmic_put_gain,
215 dmic_gain_tlv),
216};
b291f42a 217
8f731d4c
TBS		 218static int dmic_probe(struct snd_soc_component *component)
219{
220 struct cros_ec_codec_priv *priv =
221 snd_soc_component_get_drvdata(component);
222 struct device *dev = priv->dev;
8f731d4c 223 struct soc_mixer_control *control;
f3e82ad4
TBS		 224 struct ec_param_ec_codec_dmic p;
225 struct ec_response_ec_codec_dmic_get_max_gain r;
226 int ret;
8f731d4c 227
b6bc07d4
TBS		 228 if (!atomic_add_unless(&priv->dmic_probed, 1, 1))
229 return 0;
230
f3e82ad4
TBS		 231 p.cmd = EC_CODEC_DMIC_GET_MAX_GAIN;
232
233 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_DMIC,
234 (uint8_t *)&p, sizeof(p),
235 (uint8_t *)&r, sizeof(r));
236 if (ret < 0) {
237 dev_warn(dev, "get_max_gain() unsupported\n");
238 return 0;
8f731d4c
TBS		 239 }
240
f3e82ad4
TBS		 241 dev_dbg(dev, "max gain = %d\n", r.max_gain);
242
8f731d4c
TBS		 243 control = (struct soc_mixer_control *)
244 dmic_controls[DMIC_CTL_GAIN].private_value;
f3e82ad4
TBS		 245 control->max = r.max_gain;
246 control->platform_max = r.max_gain;
8f731d4c
TBS		 247
248 return snd_soc_add_component_controls(component,
249 &dmic_controls[DMIC_CTL_GAIN], 1);
250}
251
727f1c71
TBS		 252static int i2s_rx_hw_params(struct snd_pcm_substream *substream,
253 struct snd_pcm_hw_params *params,
254 struct snd_soc_dai *dai)
b291f42a
CYC		 255{
256 struct snd_soc_component *component = dai->component;
727f1c71
TBS		 257 struct cros_ec_codec_priv *priv =
258 snd_soc_component_get_drvdata(component);
259 struct ec_param_ec_codec_i2s_rx p;
260 enum ec_codec_i2s_rx_sample_depth depth;
b291f42a
CYC		 261 int ret;
262
727f1c71 263 if (params_rate(params) != 48000)
b291f42a
CYC		 264 return -EINVAL;
265
266 switch (params_format(params)) {
267 case SNDRV_PCM_FORMAT_S16_LE:
727f1c71 268 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_16;
b291f42a
CYC		 269 break;
270 case SNDRV_PCM_FORMAT_S24_LE:
727f1c71 271 depth = EC_CODEC_I2S_RX_SAMPLE_DEPTH_24;
b291f42a
CYC		 272 break;
273 default:
274 return -EINVAL;
275 }
b291f42a 276
727f1c71 277 dev_dbg(component->dev, "set depth to %u\n", depth);
b291f42a 278
727f1c71
TBS		 279 p.cmd = EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH;
280 p.set_sample_depth_param.depth = depth;
281 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
282 (uint8_t *)&p, sizeof(p), NULL, 0);
b291f42a
CYC		 283 if (ret < 0)
284 return ret;
285
727f1c71
TBS		 286 dev_dbg(component->dev, "set bclk to %u\n",
287 snd_soc_params_to_bclk(params));
b291f42a 288
727f1c71
TBS		 289 p.cmd = EC_CODEC_I2S_RX_SET_BCLK;
290 p.set_bclk_param.bclk = snd_soc_params_to_bclk(params);
291 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
292 (uint8_t *)&p, sizeof(p), NULL, 0);
b291f42a
CYC		 293}
294
727f1c71 295static int i2s_rx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
b291f42a 296{
727f1c71
TBS		 297 struct snd_soc_component *component = dai->component;
298 struct cros_ec_codec_priv *priv =
b291f42a 299 snd_soc_component_get_drvdata(component);
727f1c71
TBS		 300 struct ec_param_ec_codec_i2s_rx p;
301 enum ec_codec_i2s_rx_daifmt daifmt;
b291f42a 302
727f1c71
TBS		 303 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
304 case SND_SOC_DAIFMT_CBS_CFS:
305 break;
306 default:
b291f42a 307 return -EINVAL;
727f1c71 308 }
b291f42a 309
727f1c71
TBS		 310 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
311 case SND_SOC_DAIFMT_NB_NF:
312 break;
313 default:
314 return -EINVAL;
315 }
b291f42a 316
727f1c71
TBS		 317 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
318 case SND_SOC_DAIFMT_I2S:
319 daifmt = EC_CODEC_I2S_RX_DAIFMT_I2S;
320 break;
321 case SND_SOC_DAIFMT_RIGHT_J:
322 daifmt = EC_CODEC_I2S_RX_DAIFMT_RIGHT_J;
323 break;
324 case SND_SOC_DAIFMT_LEFT_J:
325 daifmt = EC_CODEC_I2S_RX_DAIFMT_LEFT_J;
326 break;
327 default:
328 return -EINVAL;
329 }
b291f42a 330
727f1c71 331 dev_dbg(component->dev, "set format to %u\n", daifmt);
b291f42a 332
727f1c71
TBS		 333 p.cmd = EC_CODEC_I2S_RX_SET_DAIFMT;
334 p.set_daifmt_param.daifmt = daifmt;
335 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
336 (uint8_t *)&p, sizeof(p), NULL, 0);
b291f42a
CYC		 337}
338
727f1c71
TBS		 339static const struct snd_soc_dai_ops i2s_rx_dai_ops = {
340 .hw_params = i2s_rx_hw_params,
341 .set_fmt = i2s_rx_set_fmt,
342};
343
344static int i2s_rx_event(struct snd_soc_dapm_widget *w,
345 struct snd_kcontrol *kcontrol, int event)
b291f42a
CYC		 346{
347 struct snd_soc_component *component =
348 snd_soc_dapm_to_component(w->dapm);
727f1c71
TBS		 349 struct cros_ec_codec_priv *priv =
350 snd_soc_component_get_drvdata(component);
351 struct ec_param_ec_codec_i2s_rx p;
b291f42a
CYC		 352
353 switch (event) {
354 case SND_SOC_DAPM_PRE_PMU:
727f1c71
TBS		 355 dev_dbg(component->dev, "enable I2S RX\n");
356 p.cmd = EC_CODEC_I2S_RX_ENABLE;
357 break;
b291f42a 358 case SND_SOC_DAPM_PRE_PMD:
727f1c71
TBS		 359 dev_dbg(component->dev, "disable I2S RX\n");
360 p.cmd = EC_CODEC_I2S_RX_DISABLE;
361 break;
362 default:
363 return 0;
b291f42a
CYC		 364 }
365
727f1c71
TBS		 366 return send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_I2S_RX,
367 (uint8_t *)&p, sizeof(p), NULL, 0);
b291f42a
CYC		 368}
369
727f1c71 370static struct snd_soc_dapm_widget i2s_rx_dapm_widgets[] = {
b291f42a 371 SND_SOC_DAPM_INPUT("DMIC"),
727f1c71 372 SND_SOC_DAPM_SUPPLY("I2S RX Enable", SND_SOC_NOPM, 0, 0, i2s_rx_event,
b291f42a 373 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
727f1c71
TBS		 374 SND_SOC_DAPM_AIF_OUT("I2S RX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
375};
b291f42a 376
727f1c71
TBS		 377static struct snd_soc_dapm_route i2s_rx_dapm_routes[] = {
378 {"I2S RX", NULL, "DMIC"},
379 {"I2S RX", NULL, "I2S RX Enable"},
b291f42a
CYC		 380};
381
727f1c71
TBS		 382static struct snd_soc_dai_driver i2s_rx_dai_driver = {
383 .name = "EC Codec I2S RX",
384 .capture = {
385 .stream_name = "I2S Capture",
386 .channels_min = 2,
387 .channels_max = 2,
388 .rates = SNDRV_PCM_RATE_48000,
389 .formats = SNDRV_PCM_FMTBIT_S16_LE |
390 SNDRV_PCM_FMTBIT_S24_LE,
391 },
392 .ops = &i2s_rx_dai_ops,
b291f42a
CYC		 393};
394
727f1c71 395static int i2s_rx_probe(struct snd_soc_component *component)
b291f42a 396{
8f731d4c 397 return dmic_probe(component);
b291f42a
CYC		 398}
399
727f1c71
TBS		 400static const struct snd_soc_component_driver i2s_rx_component_driver = {
401 .probe = i2s_rx_probe,
402 .dapm_widgets = i2s_rx_dapm_widgets,
403 .num_dapm_widgets = ARRAY_SIZE(i2s_rx_dapm_widgets),
404 .dapm_routes = i2s_rx_dapm_routes,
405 .num_dapm_routes = ARRAY_SIZE(i2s_rx_dapm_routes),
b291f42a
CYC		 406};
407
b6bc07d4
TBS		 408static void *wov_map_shm(struct cros_ec_codec_priv *priv,
409 uint8_t shm_id, uint32_t *len, uint8_t *type)
410{
411 struct ec_param_ec_codec p;
412 struct ec_response_ec_codec_get_shm_addr r;
413 uint32_t req, offset;
414
415 p.cmd = EC_CODEC_GET_SHM_ADDR;
416 p.get_shm_addr_param.shm_id = shm_id;
417 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
418 (uint8_t *)&p, sizeof(p),
419 (uint8_t *)&r, sizeof(r)) < 0) {
420 dev_err(priv->dev, "failed to EC_CODEC_GET_SHM_ADDR\n");
421 return NULL;
422 }
423
424 dev_dbg(priv->dev, "phys_addr=%#llx, len=%#x\n", r.phys_addr, r.len);
425
426 *len = r.len;
427 *type = r.type;
428
429 switch (r.type) {
430 case EC_CODEC_SHM_TYPE_EC_RAM:
431 return (void __force *)devm_ioremap_wc(priv->dev,
432 r.phys_addr + priv->ec_shm_addr, r.len);
433 case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
434 if (r.phys_addr) {
435 dev_err(priv->dev, "unknown status\n");
436 return NULL;
437 }
438
439 req = round_up(r.len, PAGE_SIZE);
440 dev_dbg(priv->dev, "round up from %u to %u\n", r.len, req);
441
442 if (priv->ap_shm_last_alloc + req >
443 priv->ap_shm_phys_addr + priv->ap_shm_len) {
444 dev_err(priv->dev, "insufficient space for AP SHM\n");
445 return NULL;
446 }
447
448 dev_dbg(priv->dev, "alloc AP SHM addr=%#llx, len=%#x\n",
449 priv->ap_shm_last_alloc, req);
450
451 p.cmd = EC_CODEC_SET_SHM_ADDR;
452 p.set_shm_addr_param.phys_addr = priv->ap_shm_last_alloc;
453 p.set_shm_addr_param.len = req;
454 p.set_shm_addr_param.shm_id = shm_id;
455 if (send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
456 (uint8_t *)&p, sizeof(p),
457 NULL, 0) < 0) {
458 dev_err(priv->dev, "failed to EC_CODEC_SET_SHM_ADDR\n");
459 return NULL;
460 }
461
462 /*
463 * Note: EC codec only requests for `r.len' but we allocate
464 * round up PAGE_SIZE `req'.
465 */
466 offset = priv->ap_shm_last_alloc - priv->ap_shm_phys_addr;
467 priv->ap_shm_last_alloc += req;
468
469 return (void *)(uintptr_t)(priv->ap_shm_addr + offset);
470 default:
471 return NULL;
472 }
473}
474
475static bool wov_queue_full(struct cros_ec_codec_priv *priv)
476{
477 return ((priv->wov_wp + 1) % sizeof(priv->wov_buf)) == priv->wov_rp;
478}
479
480static size_t wov_queue_size(struct cros_ec_codec_priv *priv)
481{
482 if (priv->wov_wp >= priv->wov_rp)
483 return priv->wov_wp - priv->wov_rp;
484 else
485 return sizeof(priv->wov_buf) - priv->wov_rp + priv->wov_wp;
486}
487
488static void wov_queue_dequeue(struct cros_ec_codec_priv *priv, size_t len)
489{
490 struct snd_pcm_runtime *runtime = priv->wov_substream->runtime;
491 size_t req;
492
493 while (len) {
494 req = min(len, runtime->dma_bytes - priv->wov_dma_offset);
495 if (priv->wov_wp >= priv->wov_rp)
496 req = min(req, (size_t)priv->wov_wp - priv->wov_rp);
497 else
498 req = min(req, sizeof(priv->wov_buf) - priv->wov_rp);
499
500 memcpy(runtime->dma_area + priv->wov_dma_offset,
501 priv->wov_buf + priv->wov_rp, req);
502
503 priv->wov_dma_offset += req;
504 if (priv->wov_dma_offset == runtime->dma_bytes)
505 priv->wov_dma_offset = 0;
506
507 priv->wov_rp += req;
508 if (priv->wov_rp == sizeof(priv->wov_buf))
509 priv->wov_rp = 0;
510
511 len -= req;
512 }
513
514 snd_pcm_period_elapsed(priv->wov_substream);
515}
516
517static void wov_queue_try_dequeue(struct cros_ec_codec_priv *priv)
518{
519 size_t period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
520
521 while (period_bytes && wov_queue_size(priv) >= period_bytes) {
522 wov_queue_dequeue(priv, period_bytes);
523 period_bytes = snd_pcm_lib_period_bytes(priv->wov_substream);
524 }
525}
526
527static void wov_queue_enqueue(struct cros_ec_codec_priv *priv,
528 uint8_t *addr, size_t len, bool iomem)
529{
530 size_t req;
531
532 while (len) {
533 if (wov_queue_full(priv)) {
534 wov_queue_try_dequeue(priv);
535
536 if (wov_queue_full(priv)) {
537 dev_err(priv->dev, "overrun detected\n");
538 return;
539 }
540 }
541
542 if (priv->wov_wp >= priv->wov_rp)
543 req = sizeof(priv->wov_buf) - priv->wov_wp;
544 else
545 /* Note: waste 1-byte to differentiate full and empty */
546 req = priv->wov_rp - priv->wov_wp - 1;
547 req = min(req, len);
548
549 if (iomem)
550 memcpy_fromio(priv->wov_buf + priv->wov_wp,
551 (void __force __iomem *)addr, req);
552 else
553 memcpy(priv->wov_buf + priv->wov_wp, addr, req);
554
555 priv->wov_wp += req;
556 if (priv->wov_wp == sizeof(priv->wov_buf))
557 priv->wov_wp = 0;
558
559 addr += req;
560 len -= req;
561 }
562
563 wov_queue_try_dequeue(priv);
564}
565
566static int wov_read_audio_shm(struct cros_ec_codec_priv *priv)
567{
568 struct ec_param_ec_codec_wov p;
569 struct ec_response_ec_codec_wov_read_audio_shm r;
570 int ret;
571
572 p.cmd = EC_CODEC_WOV_READ_AUDIO_SHM;
573 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
574 (uint8_t *)&p, sizeof(p),
575 (uint8_t *)&r, sizeof(r));
576 if (ret) {
577 dev_err(priv->dev, "failed to EC_CODEC_WOV_READ_AUDIO_SHM\n");
578 return ret;
579 }
580
581 if (!r.len)
582 dev_dbg(priv->dev, "no data, sleep\n");
583 else
584 wov_queue_enqueue(priv, priv->wov_audio_shm_p + r.offset, r.len,
585 priv->wov_audio_shm_type == EC_CODEC_SHM_TYPE_EC_RAM);
586 return -EAGAIN;
587}
588
589static int wov_read_audio(struct cros_ec_codec_priv *priv)
590{
591 struct ec_param_ec_codec_wov p;
592 struct ec_response_ec_codec_wov_read_audio r;
593 int remain = priv->wov_burst_read ? 16000 : 320;
594 int ret;
595
596 while (remain >= 0) {
597 p.cmd = EC_CODEC_WOV_READ_AUDIO;
598 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
599 (uint8_t *)&p, sizeof(p),
600 (uint8_t *)&r, sizeof(r));
601 if (ret) {
602 dev_err(priv->dev,
603 "failed to EC_CODEC_WOV_READ_AUDIO\n");
604 return ret;
605 }
606
607 if (!r.len) {
608 dev_dbg(priv->dev, "no data, sleep\n");
609 priv->wov_burst_read = false;
610 break;
611 }
612
613 wov_queue_enqueue(priv, r.buf, r.len, false);
614 remain -= r.len;
615 }
616
617 return -EAGAIN;
618}
619
620static void wov_copy_work(struct work_struct *w)
621{
622 struct cros_ec_codec_priv *priv =
623 container_of(w, struct cros_ec_codec_priv, wov_copy_work.work);
624 int ret;
625
626 mutex_lock(&priv->wov_dma_lock);
627 if (!priv->wov_substream) {
628 dev_warn(priv->dev, "no pcm substream\n");
629 goto leave;
630 }
631
632 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM))
633 ret = wov_read_audio_shm(priv);
634 else
635 ret = wov_read_audio(priv);
636
637 if (ret == -EAGAIN)
638 schedule_delayed_work(&priv->wov_copy_work,
639 msecs_to_jiffies(10));
640 else if (ret)
641 dev_err(priv->dev, "failed to read audio data\n");
642leave:
643 mutex_unlock(&priv->wov_dma_lock);
644}
645
646static int wov_enable_get(struct snd_kcontrol *kcontrol,
647 struct snd_ctl_elem_value *ucontrol)
648{
649 struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
650 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
651
652 ucontrol->value.integer.value[0] = priv->wov_enabled;
653 return 0;
654}
655
656static int wov_enable_put(struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_value *ucontrol)
658{
659 struct snd_soc_component *c = snd_soc_kcontrol_component(kcontrol);
660 struct cros_ec_codec_priv *priv = snd_soc_component_get_drvdata(c);
661 int enabled = ucontrol->value.integer.value[0];
662 struct ec_param_ec_codec_wov p;
663 int ret;
664
665 if (priv->wov_enabled != enabled) {
666 if (enabled)
667 p.cmd = EC_CODEC_WOV_ENABLE;
668 else
669 p.cmd = EC_CODEC_WOV_DISABLE;
670
671 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
672 (uint8_t *)&p, sizeof(p), NULL, 0);
673 if (ret) {
674 dev_err(priv->dev, "failed to %s wov\n",
675 enabled ? "enable" : "disable");
676 return ret;
677 }
678
679 priv->wov_enabled = enabled;
680 }
681
682 return 0;
683}
684
685static int wov_set_lang_shm(struct cros_ec_codec_priv *priv,
686 uint8_t *buf, size_t size, uint8_t *digest)
687{
688 struct ec_param_ec_codec_wov p;
689 struct ec_param_ec_codec_wov_set_lang_shm *pp = &p.set_lang_shm_param;
690 int ret;
691
692 if (size > priv->wov_lang_shm_len) {
693 dev_err(priv->dev, "no enough SHM size: %d\n",
694 priv->wov_lang_shm_len);
695 return -EIO;
696 }
697
698 switch (priv->wov_lang_shm_type) {
699 case EC_CODEC_SHM_TYPE_EC_RAM:
700 memcpy_toio((void __force __iomem *)priv->wov_lang_shm_p,
701 buf, size);
702 memset_io((void __force __iomem *)priv->wov_lang_shm_p + size,
703 0, priv->wov_lang_shm_len - size);
704 break;
705 case EC_CODEC_SHM_TYPE_SYSTEM_RAM:
706 memcpy(priv->wov_lang_shm_p, buf, size);
707 memset(priv->wov_lang_shm_p + size, 0,
708 priv->wov_lang_shm_len - size);
709
710 /* make sure write to memory before calling host command */
711 wmb();
712 break;
713 }
714
715 p.cmd = EC_CODEC_WOV_SET_LANG_SHM;
716 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
717 pp->total_len = size;
718 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
719 (uint8_t *)&p, sizeof(p), NULL, 0);
720 if (ret) {
721 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG_SHM\n");
722 return ret;
723 }
724
725 return 0;
726}
727
728static int wov_set_lang(struct cros_ec_codec_priv *priv,
729 uint8_t *buf, size_t size, uint8_t *digest)
730{
731 struct ec_param_ec_codec_wov p;
732 struct ec_param_ec_codec_wov_set_lang *pp = &p.set_lang_param;
733 size_t i, req;
734 int ret;
735
736 for (i = 0; i < size; i += req) {
737 req = min(size - i, ARRAY_SIZE(pp->buf));
738
739 p.cmd = EC_CODEC_WOV_SET_LANG;
740 memcpy(pp->hash, digest, SHA256_DIGEST_SIZE);
741 pp->total_len = size;
742 pp->offset = i;
743 memcpy(pp->buf, buf + i, req);
744 pp->len = req;
745 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
746 (uint8_t *)&p, sizeof(p), NULL, 0);
747 if (ret) {
748 dev_err(priv->dev, "failed to EC_CODEC_WOV_SET_LANG\n");
749 return ret;
750 }
751 }
752
753 return 0;
754}
755
756static int wov_hotword_model_put(struct snd_kcontrol *kcontrol,
757 const unsigned int __user *bytes,
758 unsigned int size)
759{
760 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
761 struct cros_ec_codec_priv *priv =
762 snd_soc_component_get_drvdata(component);
763 struct ec_param_ec_codec_wov p;
764 struct ec_response_ec_codec_wov_get_lang r;
765 uint8_t digest[SHA256_DIGEST_SIZE];
766 uint8_t *buf;
767 int ret;
768
769 /* Skips the TLV header. */
770 bytes += 2;
771 size -= 8;
772
773 dev_dbg(priv->dev, "%s: size=%d\n", __func__, size);
774
775 buf = memdup_user(bytes, size);
776 if (IS_ERR(buf))
777 return PTR_ERR(buf);
778
779 ret = calculate_sha256(priv, buf, size, digest);
780 if (ret)
781 goto leave;
782
783 p.cmd = EC_CODEC_WOV_GET_LANG;
784 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC_WOV,
785 (uint8_t *)&p, sizeof(p),
786 (uint8_t *)&r, sizeof(r));
787 if (ret)
788 goto leave;
789
790 if (memcmp(digest, r.hash, SHA256_DIGEST_SIZE) == 0) {
791 dev_dbg(priv->dev, "not updated");
792 goto leave;
793 }
794
795 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM))
796 ret = wov_set_lang_shm(priv, buf, size, digest);
797 else
798 ret = wov_set_lang(priv, buf, size, digest);
799
800leave:
801 kfree(buf);
802 return ret;
803}
804
805static struct snd_kcontrol_new wov_controls[] = {
806 SOC_SINGLE_BOOL_EXT("Wake-on-Voice Switch", 0,
807 wov_enable_get, wov_enable_put),
808 SND_SOC_BYTES_TLV("Hotword Model", 0x11000, NULL,
809 wov_hotword_model_put),
810};
811
812static struct snd_soc_dai_driver wov_dai_driver = {
813 .name = "Wake on Voice",
814 .capture = {
815 .stream_name = "WoV Capture",
816 .channels_min = 1,
817 .channels_max = 1,
818 .rates = SNDRV_PCM_RATE_16000,
819 .formats = SNDRV_PCM_FMTBIT_S16_LE,
820 },
821};
822
823static int wov_host_event(struct notifier_block *nb,
824 unsigned long queued_during_suspend, void *notify)
825{
826 struct cros_ec_codec_priv *priv =
827 container_of(nb, struct cros_ec_codec_priv, wov_notifier);
828 u32 host_event;
829
830 dev_dbg(priv->dev, "%s\n", __func__);
831
832 host_event = cros_ec_get_host_event(priv->ec_device);
833 if (host_event & EC_HOST_EVENT_MASK(EC_HOST_EVENT_WOV)) {
834 schedule_delayed_work(&priv->wov_copy_work, 0);
835 return NOTIFY_OK;
836 } else {
837 return NOTIFY_DONE;
838 }
839}
840
841static int wov_probe(struct snd_soc_component *component)
842{
843 struct cros_ec_codec_priv *priv =
844 snd_soc_component_get_drvdata(component);
845 int ret;
846
847 mutex_init(&priv->wov_dma_lock);
848 INIT_DELAYED_WORK(&priv->wov_copy_work, wov_copy_work);
849
850 priv->wov_notifier.notifier_call = wov_host_event;
851 ret = blocking_notifier_chain_register(
852 &priv->ec_device->event_notifier, &priv->wov_notifier);
853 if (ret)
854 return ret;
855
856 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_LANG_SHM)) {
857 priv->wov_lang_shm_p = wov_map_shm(priv,
858 EC_CODEC_SHM_ID_WOV_LANG,
859 &priv->wov_lang_shm_len,
860 &priv->wov_lang_shm_type);
861 if (!priv->wov_lang_shm_p)
862 return -EFAULT;
863 }
864
865 if (ec_codec_capable(priv, EC_CODEC_CAP_WOV_AUDIO_SHM)) {
866 priv->wov_audio_shm_p = wov_map_shm(priv,
867 EC_CODEC_SHM_ID_WOV_AUDIO,
868 &priv->wov_audio_shm_len,
869 &priv->wov_audio_shm_type);
870 if (!priv->wov_audio_shm_p)
871 return -EFAULT;
872 }
873
874 return dmic_probe(component);
875}
876
877static void wov_remove(struct snd_soc_component *component)
878{
879 struct cros_ec_codec_priv *priv =
880 snd_soc_component_get_drvdata(component);
881
882 blocking_notifier_chain_unregister(
883 &priv->ec_device->event_notifier, &priv->wov_notifier);
884}
885
886static int wov_pcm_open(struct snd_soc_component *component,
887 struct snd_pcm_substream *substream)
888{
889 static const struct snd_pcm_hardware hw_param = {
890 .info = SNDRV_PCM_INFO_MMAP |
891 SNDRV_PCM_INFO_INTERLEAVED |
892 SNDRV_PCM_INFO_MMAP_VALID,
893 .formats = SNDRV_PCM_FMTBIT_S16_LE,
894 .rates = SNDRV_PCM_RATE_16000,
895 .channels_min = 1,
896 .channels_max = 1,
897 .period_bytes_min = PAGE_SIZE,
898 .period_bytes_max = 0x20000 / 8,
899 .periods_min = 8,
900 .periods_max = 8,
901 .buffer_bytes_max = 0x20000,
902 };
903
904 return snd_soc_set_runtime_hwparams(substream, &hw_param);
905}
906
907static int wov_pcm_hw_params(struct snd_soc_component *component,
908 struct snd_pcm_substream *substream,
909 struct snd_pcm_hw_params *hw_params)
910{
911 struct cros_ec_codec_priv *priv =
912 snd_soc_component_get_drvdata(component);
913
914 mutex_lock(&priv->wov_dma_lock);
915 priv->wov_substream = substream;
916 priv->wov_rp = priv->wov_wp = 0;
917 priv->wov_dma_offset = 0;
918 priv->wov_burst_read = true;
919 mutex_unlock(&priv->wov_dma_lock);
920
66b3621b 921 return 0;
b6bc07d4
TBS		 922}
923
924static int wov_pcm_hw_free(struct snd_soc_component *component,
925 struct snd_pcm_substream *substream)
926{
927 struct cros_ec_codec_priv *priv =
928 snd_soc_component_get_drvdata(component);
929
930 mutex_lock(&priv->wov_dma_lock);
931 wov_queue_dequeue(priv, wov_queue_size(priv));
932 priv->wov_substream = NULL;
933 mutex_unlock(&priv->wov_dma_lock);
934
935 cancel_delayed_work_sync(&priv->wov_copy_work);
936
66b3621b 937 return 0;
b6bc07d4
TBS		 938}
939
940static snd_pcm_uframes_t wov_pcm_pointer(struct snd_soc_component *component,
941 struct snd_pcm_substream *substream)
942{
943 struct snd_pcm_runtime *runtime = substream->runtime;
944 struct cros_ec_codec_priv *priv =
945 snd_soc_component_get_drvdata(component);
946
947 return bytes_to_frames(runtime, priv->wov_dma_offset);
948}
949
e610748a
TI		 950static int wov_pcm_new(struct snd_soc_component *component,
951 struct snd_soc_pcm_runtime *rtd)
b6bc07d4 952{
66b3621b
TI		 953 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
954 NULL, 0, 0);
e610748a 955 return 0;
b6bc07d4
TBS		 956}
957
958static const struct snd_soc_component_driver wov_component_driver = {
959 .probe = wov_probe,
960 .remove = wov_remove,
961 .controls = wov_controls,
962 .num_controls = ARRAY_SIZE(wov_controls),
963 .open = wov_pcm_open,
964 .hw_params = wov_pcm_hw_params,
965 .hw_free = wov_pcm_hw_free,
966 .pointer = wov_pcm_pointer,
e610748a 967 .pcm_construct = wov_pcm_new,
b6bc07d4
TBS		 968};
969
727f1c71 970static int cros_ec_codec_platform_probe(struct platform_device *pdev)
b291f42a 971{
727f1c71
TBS		 972 struct device *dev = &pdev->dev;
973 struct cros_ec_device *ec_device = dev_get_drvdata(pdev->dev.parent);
974 struct cros_ec_codec_priv *priv;
b6bc07d4
TBS		 975 struct ec_param_ec_codec p;
976 struct ec_response_ec_codec_get_capabilities r;
977 int ret;
978#ifdef CONFIG_OF
979 struct device_node *node;
980 struct resource res;
981 u64 ec_shm_size;
982 const __be32 *regaddr_p;
983#endif
b291f42a 984
727f1c71
TBS		 985 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
986 if (!priv)
b291f42a
CYC		 987 return -ENOMEM;
988
b6bc07d4
TBS		 989#ifdef CONFIG_OF
990 regaddr_p = of_get_address(dev->of_node, 0, &ec_shm_size, NULL);
991 if (regaddr_p) {
992 priv->ec_shm_addr = of_read_number(regaddr_p, 2);
993 priv->ec_shm_len = ec_shm_size;
994
995 dev_dbg(dev, "ec_shm_addr=%#llx len=%#x\n",
996 priv->ec_shm_addr, priv->ec_shm_len);
997 }
998
999 node = of_parse_phandle(dev->of_node, "memory-region", 0);
1000 if (node) {
1001 ret = of_address_to_resource(node, 0, &res);
1002 if (!ret) {
1003 priv->ap_shm_phys_addr = res.start;
1004 priv->ap_shm_len = resource_size(&res);
1005 priv->ap_shm_addr =
1006 (uint64_t)(uintptr_t)devm_ioremap_wc(
1007 dev, priv->ap_shm_phys_addr,
1008 priv->ap_shm_len);
1009 priv->ap_shm_last_alloc = priv->ap_shm_phys_addr;
1010
1011 dev_dbg(dev, "ap_shm_phys_addr=%#llx len=%#x\n",
1012 priv->ap_shm_phys_addr, priv->ap_shm_len);
1013 }
1014 }
1015#endif
1016
727f1c71
TBS		 1017 priv->dev = dev;
1018 priv->ec_device = ec_device;
b6bc07d4
TBS		 1019 atomic_set(&priv->dmic_probed, 0);
1020
1021 p.cmd = EC_CODEC_GET_CAPABILITIES;
1022 ret = send_ec_host_command(priv->ec_device, EC_CMD_EC_CODEC,
1023 (uint8_t *)&p, sizeof(p),
1024 (uint8_t *)&r, sizeof(r));
1025 if (ret) {
1026 dev_err(dev, "failed to EC_CODEC_GET_CAPABILITIES\n");
1027 return ret;
1028 }
1029 priv->ec_capabilities = r.capabilities;
b291f42a 1030
727f1c71 1031 platform_set_drvdata(pdev, priv);
b291f42a 1032
b6bc07d4
TBS		 1033 ret = devm_snd_soc_register_component(dev, &i2s_rx_component_driver,
1034 &i2s_rx_dai_driver, 1);
1035 if (ret)
1036 return ret;
1037
1038 return devm_snd_soc_register_component(dev, &wov_component_driver,
1039 &wov_dai_driver, 1);
b291f42a
CYC		 1040}
1041
1042#ifdef CONFIG_OF
1043static const struct of_device_id cros_ec_codec_of_match[] = {
1044 { .compatible = "google,cros-ec-codec" },
1045 {},
1046};
1047MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match);
1048#endif
1049
1050static struct platform_driver cros_ec_codec_platform_driver = {
1051 .driver = {
727f1c71 1052 .name = "cros-ec-codec",
b291f42a
CYC		 1053 .of_match_table = of_match_ptr(cros_ec_codec_of_match),
1054 },
1055 .probe = cros_ec_codec_platform_probe,
1056};
1057
1058module_platform_driver(cros_ec_codec_platform_driver);
1059
1060MODULE_LICENSE("GPL v2");
1061MODULE_DESCRIPTION("ChromeOS EC codec driver");
1062MODULE_AUTHOR("Cheng-Yi Chiang <cychiang@chromium.org>");
727f1c71 1063MODULE_ALIAS("platform:cros-ec-codec");
Linux 6.x block layer and io_uring tree(s)