[linux-block.git] / sound / soc / atmel / atmel-classd.c

/* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver
 *
 * Copyright (C) 2015 Atmel
 *
 * Author: Songjun Wu <songjun.wu@atmel.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 or later
 * as published by the Free Software Foundation.
 */

#include <linux/of.h>
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <sound/core.h>
#include <sound/dmaengine_pcm.h>
#include <sound/pcm_params.h>
#include <sound/tlv.h>
#include "atmel-classd.h"

struct atmel_classd_pdata {
	bool non_overlap_enable;
	int non_overlap_time;
	int pwm_type;
	const char *card_name;
};

struct atmel_classd {
	dma_addr_t phy_base;
	struct regmap *regmap;
	struct clk *pclk;
	struct clk *gclk;
	int irq;
	const struct atmel_classd_pdata *pdata;
};

#ifdef CONFIG_OF
static const struct of_device_id atmel_classd_of_match[] = {
	{
		.compatible = "atmel,sama5d2-classd",
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(of, atmel_classd_of_match);

static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev)
{
	struct device_node *np = dev->of_node;
	struct atmel_classd_pdata *pdata;
	const char *pwm_type;
	int ret;

	if (!np) {
		dev_err(dev, "device node not found\n");
		return ERR_PTR(-EINVAL);
	}

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return ERR_PTR(-ENOMEM);

	ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type);
	if ((ret == 0) && (strcmp(pwm_type, "diff") == 0))
		pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
	else
		pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;

	ret = of_property_read_u32(np,
			"atmel,non-overlap-time", &pdata->non_overlap_time);
	if (ret)
		pdata->non_overlap_enable = false;
	else
		pdata->non_overlap_enable = true;

	ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
	if (ret)
		pdata->card_name = "CLASSD";

	return pdata;
}
#else
static inline struct atmel_classd_pdata *
atmel_classd_dt_init(struct device *dev)
{
	return ERR_PTR(-EINVAL);
}
#endif

#define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
			| SNDRV_PCM_RATE_16000	| SNDRV_PCM_RATE_22050 \
			| SNDRV_PCM_RATE_32000	| SNDRV_PCM_RATE_44100 \
			| SNDRV_PCM_RATE_48000	| SNDRV_PCM_RATE_88200 \
			| SNDRV_PCM_RATE_96000)

static const struct snd_pcm_hardware atmel_classd_hw = {
	.info			= SNDRV_PCM_INFO_MMAP
				| SNDRV_PCM_INFO_MMAP_VALID
				| SNDRV_PCM_INFO_INTERLEAVED
				| SNDRV_PCM_INFO_RESUME
				| SNDRV_PCM_INFO_PAUSE,
	.formats		= (SNDRV_PCM_FMTBIT_S16_LE),
	.rates			= ATMEL_CLASSD_RATES,
	.rate_min		= 8000,
	.rate_max		= 96000,
	.channels_min		= 1,
	.channels_max		= 2,
	.buffer_bytes_max	= 64 * 1024,
	.period_bytes_min	= 256,
	.period_bytes_max	= 32 * 1024,
	.periods_min		= 2,
	.periods_max		= 256,
};

#define ATMEL_CLASSD_PREALLOC_BUF_SIZE  (64 * 1024)

/* cpu dai component */
static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
					struct snd_soc_dai *cpu_dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);

	regmap_write(dd->regmap, CLASSD_THR, 0x0);

	return clk_prepare_enable(dd->pclk);
}

static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
					struct snd_soc_dai *cpu_dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);

	clk_disable_unprepare(dd->pclk);
}

static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
	.startup	= atmel_classd_cpu_dai_startup,
	.shutdown	= atmel_classd_cpu_dai_shutdown,
};

static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
	.playback = {
		.channels_min	= 1,
		.channels_max	= 2,
		.rates		= ATMEL_CLASSD_RATES,
		.formats	= SNDRV_PCM_FMTBIT_S16_LE,},
	.ops = &atmel_classd_cpu_dai_ops,
};

static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
	.name = "atmel-classd",
};

/* platform */
static int
atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
	struct snd_pcm_hw_params *params,
	struct dma_slave_config *slave_config)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);

	if (params_physical_width(params) != 16) {
		dev_err(rtd->platform->dev,
			"only supports 16-bit audio data\n");
		return -EINVAL;
	}

	if (params_channels(params) == 1)
		slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
	else
		slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

	slave_config->direction		= DMA_MEM_TO_DEV;
	slave_config->dst_addr		= dd->phy_base + CLASSD_THR;
	slave_config->dst_maxburst	= 1;
	slave_config->src_maxburst	= 1;
	slave_config->device_fc		= false;

	return 0;
}

static const struct snd_dmaengine_pcm_config
atmel_classd_dmaengine_pcm_config = {
	.prepare_slave_config	= atmel_classd_platform_configure_dma,
	.pcm_hardware		= &atmel_classd_hw,
	.prealloc_buffer_size	= ATMEL_CLASSD_PREALLOC_BUF_SIZE,
};

/* codec */
static const char * const mono_mode_text[] = {
	"mix", "sat", "left", "right"
};

static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
			CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
			mono_mode_text);

static const char * const eqcfg_text[] = {
	"Treble-12dB", "Treble-6dB",
	"Medium-8dB", "Medium-3dB",
	"Bass-12dB", "Bass-6dB",
	"0 dB",
	"Bass+6dB", "Bass+12dB",
	"Medium+3dB", "Medium+8dB",
	"Treble+6dB", "Treble+12dB",
};

static const unsigned int eqcfg_value[] = {
	CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
	CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
	CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
	CLASSD_INTPMR_EQCFG_FLAT,
	CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
	CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
	CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
};

static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
		CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
		eqcfg_text, eqcfg_value);

static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);

static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
		CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
		78, 1, classd_digital_tlv),

SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
		CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),

SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),

SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),

SOC_ENUM("Mono Mode", classd_mono_mode_enum),

SOC_ENUM("EQ", classd_eqcfg_enum),
};

static const char * const pwm_type[] = {
	"Single ended", "Differential"
};

static int atmel_classd_codec_probe(struct snd_soc_codec *codec)
{
	struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
	const struct atmel_classd_pdata *pdata = dd->pdata;
	u32 mask, val;

	mask = CLASSD_MR_PWMTYP_MASK;
	val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;

	mask |= CLASSD_MR_NON_OVERLAP_MASK;
	if (pdata->non_overlap_enable) {
		val |= (CLASSD_MR_NON_OVERLAP_EN
			<< CLASSD_MR_NON_OVERLAP_SHIFT);

		mask |= CLASSD_MR_NOVR_VAL_MASK;
		switch (pdata->non_overlap_time) {
		case 5:
			val |= (CLASSD_MR_NOVR_VAL_5NS
				<< CLASSD_MR_NOVR_VAL_SHIFT);
			break;
		case 10:
			val |= (CLASSD_MR_NOVR_VAL_10NS
				<< CLASSD_MR_NOVR_VAL_SHIFT);
			break;
		case 15:
			val |= (CLASSD_MR_NOVR_VAL_15NS
				<< CLASSD_MR_NOVR_VAL_SHIFT);
			break;
		case 20:
			val |= (CLASSD_MR_NOVR_VAL_20NS
				<< CLASSD_MR_NOVR_VAL_SHIFT);
			break;
		default:
			val |= (CLASSD_MR_NOVR_VAL_10NS
				<< CLASSD_MR_NOVR_VAL_SHIFT);
			dev_warn(codec->dev,
				"non-overlapping value %d is invalid, the default value 10 is specified\n",
				pdata->non_overlap_time);
			break;
		}
	}

	snd_soc_update_bits(codec, CLASSD_MR, mask, val);

	dev_info(codec->dev,
		"PWM modulation type is %s, non-overlapping is %s\n",
		pwm_type[pdata->pwm_type],
		pdata->non_overlap_enable?"enabled":"disabled");

	return 0;
}

static int atmel_classd_codec_resume(struct snd_soc_codec *codec)
{
	struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);

	return regcache_sync(dd->regmap);
}

static struct snd_soc_codec_driver soc_codec_dev_classd = {
	.probe		= atmel_classd_codec_probe,
	.resume		= atmel_classd_codec_resume,
	.component_driver = {
		.controls		= atmel_classd_snd_controls,
		.num_controls		= ARRAY_SIZE(atmel_classd_snd_controls),
	},
};

/* codec dai component */
static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream,
				struct snd_soc_dai *codec_dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);

	return clk_prepare_enable(dd->gclk);
}

static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai,
	int mute)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u32 mask, val;

	mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK;

	if (mute)
		val = mask;
	else
		val = 0;

	snd_soc_update_bits(codec, CLASSD_MR, mask, val);

	return 0;
}

#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
#define CLASSD_GCLK_RATE_12M288_MPY_8  (12288 * 1000 * 8)

static struct {
	int rate;
	int sample_rate;
	int dsp_clk;
	unsigned long gclk_rate;
} const sample_rates[] = {
	{ 8000,  CLASSD_INTPMR_FRAME_8K,
	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
	{ 16000, CLASSD_INTPMR_FRAME_16K,
	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
	{ 32000, CLASSD_INTPMR_FRAME_32K,
	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
	{ 48000, CLASSD_INTPMR_FRAME_48K,
	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
	{ 96000, CLASSD_INTPMR_FRAME_96K,
	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
	{ 22050, CLASSD_INTPMR_FRAME_22K,
	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
	{ 44100, CLASSD_INTPMR_FRAME_44K,
	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
	{ 88200, CLASSD_INTPMR_FRAME_88K,
	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
};

static int
atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *codec_dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	struct snd_soc_codec *codec = codec_dai->codec;
	int fs;
	int i, best, best_val, cur_val, ret;
	u32 mask, val;

	fs = params_rate(params);

	best = 0;
	best_val = abs(fs - sample_rates[0].rate);
	for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
		/* Closest match */
		cur_val = abs(fs - sample_rates[i].rate);
		if (cur_val < best_val) {
			best = i;
			best_val = cur_val;
		}
	}

	dev_dbg(codec->dev,
		"Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
		sample_rates[best].rate, sample_rates[best].gclk_rate);

	clk_disable_unprepare(dd->gclk);

	ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
	if (ret)
		return ret;

	mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK;
	val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
	| (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);

	snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);

	return clk_prepare_enable(dd->gclk);
}

static void
atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream,
			    struct snd_soc_dai *codec_dai)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);

	clk_disable_unprepare(dd->gclk);
}

static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
					struct snd_soc_dai *codec_dai)
{
	struct snd_soc_codec *codec = codec_dai->codec;

	snd_soc_update_bits(codec, CLASSD_MR,
				CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK,
				(CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
				|(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));

	return 0;
}

static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream,
					int cmd, struct snd_soc_dai *codec_dai)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u32 mask, val;

	mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK;

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
		val = mask;
		break;
	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
		val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
			| (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
		break;
	default:
		return -EINVAL;
	}

	snd_soc_update_bits(codec, CLASSD_MR, mask, val);

	return 0;
}

static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = {
	.digital_mute	= atmel_classd_codec_dai_digital_mute,
	.startup	= atmel_classd_codec_dai_startup,
	.shutdown	= atmel_classd_codec_dai_shutdown,
	.hw_params	= atmel_classd_codec_dai_hw_params,
	.prepare	= atmel_classd_codec_dai_prepare,
	.trigger	= atmel_classd_codec_dai_trigger,
};

#define ATMEL_CLASSD_CODEC_DAI_NAME  "atmel-classd-hifi"

static struct snd_soc_dai_driver atmel_classd_codec_dai = {
	.name = ATMEL_CLASSD_CODEC_DAI_NAME,
	.playback = {
		.stream_name	= "Playback",
		.channels_min	= 1,
		.channels_max	= 2,
		.rates		= ATMEL_CLASSD_RATES,
		.formats	= SNDRV_PCM_FMTBIT_S16_LE,
	},
	.ops = &atmel_classd_codec_dai_ops,
};

/* ASoC sound card */
static int atmel_classd_asoc_card_init(struct device *dev,
					struct snd_soc_card *card)
{
	struct snd_soc_dai_link *dai_link;
	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);

	dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
	if (!dai_link)
		return -ENOMEM;

	dai_link->name			= "CLASSD";
	dai_link->stream_name		= "CLASSD PCM";
	dai_link->codec_dai_name	= ATMEL_CLASSD_CODEC_DAI_NAME;
	dai_link->cpu_dai_name		= dev_name(dev);
	dai_link->codec_name		= dev_name(dev);
	dai_link->platform_name		= dev_name(dev);

	card->dai_link	= dai_link;
	card->num_links	= 1;
	card->name	= dd->pdata->card_name;
	card->dev	= dev;

	return 0;
};

/* regmap configuration */
static const struct reg_default atmel_classd_reg_defaults[] = {
	{ CLASSD_INTPMR,   0x00301212 },
};

#define ATMEL_CLASSD_REG_MAX    0xE4
static const struct regmap_config atmel_classd_regmap_config = {
	.reg_bits	= 32,
	.reg_stride	= 4,
	.val_bits	= 32,
	.max_register	= ATMEL_CLASSD_REG_MAX,

	.cache_type		= REGCACHE_FLAT,
	.reg_defaults		= atmel_classd_reg_defaults,
	.num_reg_defaults	= ARRAY_SIZE(atmel_classd_reg_defaults),
};

static int atmel_classd_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct atmel_classd *dd;
	struct resource *res;
	void __iomem *io_base;
	const struct atmel_classd_pdata *pdata;
	struct snd_soc_card *card;
	int ret;

	pdata = dev_get_platdata(dev);
	if (!pdata) {
		pdata = atmel_classd_dt_init(dev);
		if (IS_ERR(pdata))
			return PTR_ERR(pdata);
	}

	dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
	if (!dd)
		return -ENOMEM;

	dd->pdata = pdata;

	dd->irq = platform_get_irq(pdev, 0);
	if (dd->irq < 0) {
		ret = dd->irq;
		dev_err(dev, "failed to could not get irq: %d\n", ret);
		return ret;
	}

	dd->pclk = devm_clk_get(dev, "pclk");
	if (IS_ERR(dd->pclk)) {
		ret = PTR_ERR(dd->pclk);
		dev_err(dev, "failed to get peripheral clock: %d\n", ret);
		return ret;
	}

	dd->gclk = devm_clk_get(dev, "gclk");
	if (IS_ERR(dd->gclk)) {
		ret = PTR_ERR(dd->gclk);
		dev_err(dev, "failed to get GCK clock: %d\n", ret);
		return ret;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	io_base = devm_ioremap_resource(dev, res);
	if (IS_ERR(io_base)) {
		ret =  PTR_ERR(io_base);
		dev_err(dev, "failed to remap register memory: %d\n", ret);
		return ret;
	}

	dd->phy_base = res->start;

	dd->regmap = devm_regmap_init_mmio(dev, io_base,
					&atmel_classd_regmap_config);
	if (IS_ERR(dd->regmap)) {
		ret = PTR_ERR(dd->regmap);
		dev_err(dev, "failed to init register map: %d\n", ret);
		return ret;
	}

	ret = devm_snd_soc_register_component(dev,
					&atmel_classd_cpu_dai_component,
					&atmel_classd_cpu_dai, 1);
	if (ret) {
		dev_err(dev, "could not register CPU DAI: %d\n", ret);
		return ret;
	}

	ret = devm_snd_dmaengine_pcm_register(dev,
					&atmel_classd_dmaengine_pcm_config,
					0);
	if (ret) {
		dev_err(dev, "could not register platform: %d\n", ret);
		return ret;
	}

	ret = snd_soc_register_codec(dev, &soc_codec_dev_classd,
					&atmel_classd_codec_dai, 1);
	if (ret) {
		dev_err(dev, "could not register codec: %d\n", ret);
		return ret;
	}

	/* register sound card */
	card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
	if (!card) {
		ret = -ENOMEM;
		goto unregister_codec;
	}

	snd_soc_card_set_drvdata(card, dd);

	ret = atmel_classd_asoc_card_init(dev, card);
	if (ret) {
		dev_err(dev, "failed to init sound card\n");
		goto unregister_codec;
	}

	ret = devm_snd_soc_register_card(dev, card);
	if (ret) {
		dev_err(dev, "failed to register sound card: %d\n", ret);
		goto unregister_codec;
	}

	return 0;

unregister_codec:
	snd_soc_unregister_codec(dev);
	return ret;
}

static int atmel_classd_remove(struct platform_device *pdev)
{
	snd_soc_unregister_codec(&pdev->dev);
	return 0;
}

static struct platform_driver atmel_classd_driver = {
	.driver	= {
		.name		= "atmel-classd",
		.of_match_table	= of_match_ptr(atmel_classd_of_match),
		.pm		= &snd_soc_pm_ops,
	},
	.probe	= atmel_classd_probe,
	.remove	= atmel_classd_remove,
};
module_platform_driver(atmel_classd_driver);

MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
e0a25b6d SW	1	/* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver
	2	*
	3	* Copyright (C) 2015 Atmel
	4	*
	5	* Author: Songjun Wu <songjun.wu@atmel.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 or later
	9	* as published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/of.h>
	13	#include <linux/clk.h>
	14	#include <linux/module.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/regmap.h>
	17	#include <sound/core.h>
	18	#include <sound/dmaengine_pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/tlv.h>
	21	#include "atmel-classd.h"
	22
	23	struct atmel_classd_pdata {
	24	bool non_overlap_enable;
	25	int non_overlap_time;
	26	int pwm_type;
	27	const char *card_name;
	28	};
	29
	30	struct atmel_classd {
	31	dma_addr_t phy_base;
	32	struct regmap *regmap;
	33	struct clk *pclk;
	34	struct clk *gclk;
e0a25b6d SW	35	int irq;
	36	const struct atmel_classd_pdata *pdata;
	37	};
	38
	39	#ifdef CONFIG_OF
	40	static const struct of_device_id atmel_classd_of_match[] = {
	41	{
	42	.compatible = "atmel,sama5d2-classd",
	43	}, {
	44	/* sentinel */
	45	}
	46	};
	47	MODULE_DEVICE_TABLE(of, atmel_classd_of_match);
	48
	49	static struct atmel_classd_pdata atmel_classd_dt_init(struct device dev)
	50	{
	51	struct device_node *np = dev->of_node;
	52	struct atmel_classd_pdata *pdata;
	53	const char *pwm_type;
	54	int ret;
	55
	56	if (!np) {
	57	dev_err(dev, "device node not found\n");
	58	return ERR_PTR(-EINVAL);
	59	}
	60
	61	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	62	if (!pdata)
	63	return ERR_PTR(-ENOMEM);
	64
	65	ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type);
	66	if ((ret == 0) && (strcmp(pwm_type, "diff") == 0))
	67	pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
	68	else
	69	pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;
	70
	71	ret = of_property_read_u32(np,
	72	"atmel,non-overlap-time", &pdata->non_overlap_time);
	73	if (ret)
	74	pdata->non_overlap_enable = false;
	75	else
	76	pdata->non_overlap_enable = true;
	77
	78	ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
	79	if (ret)
	80	pdata->card_name = "CLASSD";
	81
	82	return pdata;
	83	}
	84	#else
	85	static inline struct atmel_classd_pdata *
	86	atmel_classd_dt_init(struct device *dev)
	87	{
	88	return ERR_PTR(-EINVAL);
	89	}
	90	#endif
	91
	92	#define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
	93	\| SNDRV_PCM_RATE_16000 \| SNDRV_PCM_RATE_22050 \
	94	\| SNDRV_PCM_RATE_32000 \| SNDRV_PCM_RATE_44100 \
	95	\| SNDRV_PCM_RATE_48000 \| SNDRV_PCM_RATE_88200 \
	96	\| SNDRV_PCM_RATE_96000)
	97
	98	static const struct snd_pcm_hardware atmel_classd_hw = {
99	.info = SNDRV_PCM_INFO_MMAP
100	\| SNDRV_PCM_INFO_MMAP_VALID
101	\| SNDRV_PCM_INFO_INTERLEAVED
102	\| SNDRV_PCM_INFO_RESUME
103	\| SNDRV_PCM_INFO_PAUSE,
104	.formats = (SNDRV_PCM_FMTBIT_S16_LE),
105	.rates = ATMEL_CLASSD_RATES,
106	.rate_min = 8000,
107	.rate_max = 96000,
07c55d39	108	.channels_min = 1,
e0a25b6d SW	109	.channels_max = 2,
	110	.buffer_bytes_max = 64 * 1024,
	111	.period_bytes_min = 256,
	112	.period_bytes_max = 32 * 1024,
	113	.periods_min = 2,
	114	.periods_max = 256,
	115	};
	116
	117	#define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024)
	118
	119	/* cpu dai component */
	120	static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
	121	struct snd_soc_dai *cpu_dai)
	122	{
	123	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	124	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	125
	126	regmap_write(dd->regmap, CLASSD_THR, 0x0);
	127
	128	return clk_prepare_enable(dd->pclk);
	129	}
	130
	131	static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
	132	struct snd_soc_dai *cpu_dai)
	133	{
	134	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	135	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	136
	137	clk_disable_unprepare(dd->pclk);
	138	}
	139
	140	static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
	141	.startup = atmel_classd_cpu_dai_startup,
	142	.shutdown = atmel_classd_cpu_dai_shutdown,
	143	};
	144
	145	static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
	146	.playback = {
07c55d39	147	.channels_min = 1,
e0a25b6d SW	148	.channels_max = 2,
	149	.rates = ATMEL_CLASSD_RATES,
	150	.formats = SNDRV_PCM_FMTBIT_S16_LE,},
	151	.ops = &atmel_classd_cpu_dai_ops,
	152	};
	153
	154	static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
	155	.name = "atmel-classd",
	156	};
	157
	158	/* platform */
	159	static int
	160	atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
	161	struct snd_pcm_hw_params *params,
	162	struct dma_slave_config *slave_config)
	163	{
	164	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	165	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	166
	167	if (params_physical_width(params) != 16) {
	168	dev_err(rtd->platform->dev,
	169	"only supports 16-bit audio data\n");
	170	return -EINVAL;
	171	}
	172
07c55d39 SW	173	if (params_channels(params) == 1)
	174	slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
	175	else
	176	slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
	177
e0a25b6d SW	178	slave_config->direction = DMA_MEM_TO_DEV;
e0a25b6d SW	179	slave_config->dst_addr = dd->phy_base + CLASSD_THR;
e0a25b6d SW	180	slave_config->dst_maxburst = 1;
	181	slave_config->src_maxburst = 1;
	182	slave_config->device_fc = false;
	183
	184	return 0;
	185	}
	186
	187	static const struct snd_dmaengine_pcm_config
	188	atmel_classd_dmaengine_pcm_config = {
	189	.prepare_slave_config = atmel_classd_platform_configure_dma,
	190	.pcm_hardware = &atmel_classd_hw,
	191	.prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE,
	192	};
	193
	194	/* codec */
	195	static const char * const mono_mode_text[] = {
	196	"mix", "sat", "left", "right"
	197	};
	198
	199	static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
	200	CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
	201	mono_mode_text);
	202
	203	static const char * const eqcfg_text[] = {
	204	"Treble-12dB", "Treble-6dB",
	205	"Medium-8dB", "Medium-3dB",
	206	"Bass-12dB", "Bass-6dB",
	207	"0 dB",
	208	"Bass+6dB", "Bass+12dB",
	209	"Medium+3dB", "Medium+8dB",
	210	"Treble+6dB", "Treble+12dB",
	211	};
	212
	213	static const unsigned int eqcfg_value[] = {
	214	CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
	215	CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
	216	CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
	217	CLASSD_INTPMR_EQCFG_FLAT,
	218	CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
	219	CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
	220	CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
	221	};
	222
	223	static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
	224	CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
	225	eqcfg_text, eqcfg_value);
	226
	227	static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);
	228
	229	static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
	230	SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
	231	CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
	232	78, 1, classd_digital_tlv),
	233
	234	SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
	235	CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),
	236
	237	SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),
	238
	239	SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),
	240
	241	SOC_ENUM("Mono Mode", classd_mono_mode_enum),
	242
	243	SOC_ENUM("EQ", classd_eqcfg_enum),
244	};
245
246	static const char * const pwm_type[] = {
247	"Single ended", "Differential"
248	};
249
250	static int atmel_classd_codec_probe(struct snd_soc_codec *codec)
251	{
252	struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
253	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
254	const struct atmel_classd_pdata *pdata = dd->pdata;
255	u32 mask, val;
256
257	mask = CLASSD_MR_PWMTYP_MASK;
258	val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;
259
260	mask \|= CLASSD_MR_NON_OVERLAP_MASK;
261	if (pdata->non_overlap_enable) {
262	val \|= (CLASSD_MR_NON_OVERLAP_EN
263	<< CLASSD_MR_NON_OVERLAP_SHIFT);
264
265	mask \|= CLASSD_MR_NOVR_VAL_MASK;
266	switch (pdata->non_overlap_time) {
267	case 5:
268	val \|= (CLASSD_MR_NOVR_VAL_5NS
269	<< CLASSD_MR_NOVR_VAL_SHIFT);
270	break;
271	case 10:
272	val \|= (CLASSD_MR_NOVR_VAL_10NS
273	<< CLASSD_MR_NOVR_VAL_SHIFT);
274	break;
275	case 15:
276	val \|= (CLASSD_MR_NOVR_VAL_15NS
277	<< CLASSD_MR_NOVR_VAL_SHIFT);
278	break;
279	case 20:
280	val \|= (CLASSD_MR_NOVR_VAL_20NS
281	<< CLASSD_MR_NOVR_VAL_SHIFT);
282	break;
283	default:
284	val \|= (CLASSD_MR_NOVR_VAL_10NS
285	<< CLASSD_MR_NOVR_VAL_SHIFT);
286	dev_warn(codec->dev,
287	"non-overlapping value %d is invalid, the default value 10 is specified\n",
288	pdata->non_overlap_time);
289	break;
290	}
291	}
292
293	snd_soc_update_bits(codec, CLASSD_MR, mask, val);
294
295	dev_info(codec->dev,
296	"PWM modulation type is %s, non-overlapping is %s\n",
297	pwm_type[pdata->pwm_type],
298	pdata->non_overlap_enable?"enabled":"disabled");
299
300	return 0;
301	}
302
61abce13 QS	303	static int atmel_classd_codec_resume(struct snd_soc_codec *codec)
	304	{
	305	struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
	306	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
	307
	308	return regcache_sync(dd->regmap);
	309	}
	310
e0a25b6d SW	311	static struct snd_soc_codec_driver soc_codec_dev_classd = {
e0a25b6d SW	312	.probe = atmel_classd_codec_probe,
61abce13	313	.resume = atmel_classd_codec_resume,
69295df0 KM	314	.component_driver = {
	315	.controls = atmel_classd_snd_controls,
	316	.num_controls = ARRAY_SIZE(atmel_classd_snd_controls),
	317	},
e0a25b6d SW	318	};
	319
	320	/* codec dai component */
	321	static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream,
	322	struct snd_soc_dai *codec_dai)
	323	{
	324	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	325	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
e0a25b6d SW	326
	327	return clk_prepare_enable(dd->gclk);
	328	}
	329
	330	static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai,
	331	int mute)
	332	{
	333	struct snd_soc_codec *codec = codec_dai->codec;
	334	u32 mask, val;
	335
	336	mask = CLASSD_MR_LMUTE_MASK \| CLASSD_MR_RMUTE_MASK;
	337
	338	if (mute)
	339	val = mask;
	340	else
	341	val = 0;
	342
	343	snd_soc_update_bits(codec, CLASSD_MR, mask, val);
	344
	345	return 0;
	346	}
	347
4ab6cf11 QS	348	#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
4ab6cf11 QS	349	#define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
e0a25b6d SW	350
	351	static struct {
	352	int rate;
	353	int sample_rate;
	354	int dsp_clk;
4ab6cf11	355	unsigned long gclk_rate;
e0a25b6d SW	356	} const sample_rates[] = {
e0a25b6d SW	357	{ 8000, CLASSD_INTPMR_FRAME_8K,
4ab6cf11	358	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
e0a25b6d	359	{ 16000, CLASSD_INTPMR_FRAME_16K,
4ab6cf11	360	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
e0a25b6d	361	{ 32000, CLASSD_INTPMR_FRAME_32K,
4ab6cf11	362	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
e0a25b6d	363	{ 48000, CLASSD_INTPMR_FRAME_48K,
4ab6cf11	364	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
e0a25b6d	365	{ 96000, CLASSD_INTPMR_FRAME_96K,
4ab6cf11	366	CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
e0a25b6d	367	{ 22050, CLASSD_INTPMR_FRAME_22K,
4ab6cf11	368	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
e0a25b6d	369	{ 44100, CLASSD_INTPMR_FRAME_44K,
4ab6cf11	370	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
e0a25b6d	371	{ 88200, CLASSD_INTPMR_FRAME_88K,
4ab6cf11	372	CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
e0a25b6d SW	373	};
	374
	375	static int
	376	atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream,
	377	struct snd_pcm_hw_params *params,
	378	struct snd_soc_dai *codec_dai)
	379	{
	380	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	381	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	382	struct snd_soc_codec *codec = codec_dai->codec;
	383	int fs;
	384	int i, best, best_val, cur_val, ret;
	385	u32 mask, val;
	386
	387	fs = params_rate(params);
	388
	389	best = 0;
	390	best_val = abs(fs - sample_rates[0].rate);
	391	for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
	392	/* Closest match */
	393	cur_val = abs(fs - sample_rates[i].rate);
	394	if (cur_val < best_val) {
	395	best = i;
	396	best_val = cur_val;
	397	}
	398	}
	399
	400	dev_dbg(codec->dev,
4ab6cf11 QS	401	"Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
4ab6cf11 QS	402	sample_rates[best].rate, sample_rates[best].gclk_rate);
e0a25b6d SW	403
e0a25b6d SW	404	clk_disable_unprepare(dd->gclk);
e0a25b6d	405
4ab6cf11	406	ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
e0a25b6d SW	407	if (ret)
	408	return ret;
	409
	410	mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK \| CLASSD_INTPMR_FRAME_MASK;
	411	val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
	412	\| (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
	413
	414	snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);
	415
e0a25b6d SW	416	return clk_prepare_enable(dd->gclk);
	417	}
	418
	419	static void
	420	atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream,
	421	struct snd_soc_dai *codec_dai)
	422	{
	423	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	424	struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
	425
	426	clk_disable_unprepare(dd->gclk);
e0a25b6d SW	427	}
	428
	429	static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
	430	struct snd_soc_dai *codec_dai)
	431	{
	432	struct snd_soc_codec *codec = codec_dai->codec;
	433
	434	snd_soc_update_bits(codec, CLASSD_MR,
	435	CLASSD_MR_LEN_MASK \| CLASSD_MR_REN_MASK,
	436	(CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
	437	\|(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));
	438
	439	return 0;
	440	}
	441
	442	static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream,
	443	int cmd, struct snd_soc_dai *codec_dai)
	444	{
	445	struct snd_soc_codec *codec = codec_dai->codec;
	446	u32 mask, val;
	447
	448	mask = CLASSD_MR_LEN_MASK \| CLASSD_MR_REN_MASK;
	449
	450	switch (cmd) {
	451	case SNDRV_PCM_TRIGGER_START:
	452	case SNDRV_PCM_TRIGGER_RESUME:
	453	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
	454	val = mask;
	455	break;
	456	case SNDRV_PCM_TRIGGER_STOP:
	457	case SNDRV_PCM_TRIGGER_SUSPEND:
	458	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
	459	val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
	460	\| (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
	461	break;
	462	default:
	463	return -EINVAL;
	464	}
	465
	466	snd_soc_update_bits(codec, CLASSD_MR, mask, val);
	467
	468	return 0;
	469	}
	470
	471	static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = {
	472	.digital_mute = atmel_classd_codec_dai_digital_mute,
	473	.startup = atmel_classd_codec_dai_startup,
	474	.shutdown = atmel_classd_codec_dai_shutdown,
	475	.hw_params = atmel_classd_codec_dai_hw_params,
	476	.prepare = atmel_classd_codec_dai_prepare,
	477	.trigger = atmel_classd_codec_dai_trigger,
	478	};
	479
	480	#define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi"
	481
	482	static struct snd_soc_dai_driver atmel_classd_codec_dai = {
	483	.name = ATMEL_CLASSD_CODEC_DAI_NAME,
	484	.playback = {
	485	.stream_name = "Playback",
07c55d39	486	.channels_min = 1,
e0a25b6d SW	487	.channels_max = 2,
	488	.rates = ATMEL_CLASSD_RATES,
	489	.formats = SNDRV_PCM_FMTBIT_S16_LE,
	490	},
	491	.ops = &atmel_classd_codec_dai_ops,
	492	};
	493
	494	/* ASoC sound card */
	495	static int atmel_classd_asoc_card_init(struct device *dev,
	496	struct snd_soc_card *card)
	497	{
	498	struct snd_soc_dai_link *dai_link;
	499	struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
	500
	501	dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
	502	if (!dai_link)
	503	return -ENOMEM;
	504
	505	dai_link->name = "CLASSD";
	506	dai_link->stream_name = "CLASSD PCM";
	507	dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME;
	508	dai_link->cpu_dai_name = dev_name(dev);
	509	dai_link->codec_name = dev_name(dev);
	510	dai_link->platform_name = dev_name(dev);
	511
	512	card->dai_link = dai_link;
	513	card->num_links = 1;
	514	card->name = dd->pdata->card_name;
	515	card->dev = dev;
	516
	517	return 0;
	518	};
	519
	520	/* regmap configuration */
	521	static const struct reg_default atmel_classd_reg_defaults[] = {
	522	{ CLASSD_INTPMR, 0x00301212 },
	523	};
	524
	525	#define ATMEL_CLASSD_REG_MAX 0xE4
	526	static const struct regmap_config atmel_classd_regmap_config = {
	527	.reg_bits = 32,
	528	.reg_stride = 4,
	529	.val_bits = 32,
	530	.max_register = ATMEL_CLASSD_REG_MAX,
	531
	532	.cache_type = REGCACHE_FLAT,
	533	.reg_defaults = atmel_classd_reg_defaults,
	534	.num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults),
	535	};
	536
	537	static int atmel_classd_probe(struct platform_device *pdev)
	538	{
	539	struct device *dev = &pdev->dev;
	540	struct atmel_classd *dd;
	541	struct resource *res;
	542	void __iomem *io_base;
	543	const struct atmel_classd_pdata *pdata;
	544	struct snd_soc_card *card;
	545	int ret;
	546
	547	pdata = dev_get_platdata(dev);
	548	if (!pdata) {
	549	pdata = atmel_classd_dt_init(dev);
	550	if (IS_ERR(pdata))
551	return PTR_ERR(pdata);
552	}
553
554	dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
555	if (!dd)
556	return -ENOMEM;
557
558	dd->pdata = pdata;
559
560	dd->irq = platform_get_irq(pdev, 0);
561	if (dd->irq < 0) {
562	ret = dd->irq;
563	dev_err(dev, "failed to could not get irq: %d\n", ret);
564	return ret;
565	}
566
567	dd->pclk = devm_clk_get(dev, "pclk");
568	if (IS_ERR(dd->pclk)) {
569	ret = PTR_ERR(dd->pclk);
570	dev_err(dev, "failed to get peripheral clock: %d\n", ret);
571	return ret;
572	}
573
574	dd->gclk = devm_clk_get(dev, "gclk");
575	if (IS_ERR(dd->gclk)) {
576	ret = PTR_ERR(dd->gclk);
577	dev_err(dev, "failed to get GCK clock: %d\n", ret);
578	return ret;
579	}
580
e0a25b6d	581	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
e0a25b6d SW	582	io_base = devm_ioremap_resource(dev, res);
	583	if (IS_ERR(io_base)) {
	584	ret = PTR_ERR(io_base);
	585	dev_err(dev, "failed to remap register memory: %d\n", ret);
	586	return ret;
	587	}
	588
	589	dd->phy_base = res->start;
	590
	591	dd->regmap = devm_regmap_init_mmio(dev, io_base,
	592	&atmel_classd_regmap_config);
	593	if (IS_ERR(dd->regmap)) {
	594	ret = PTR_ERR(dd->regmap);
	595	dev_err(dev, "failed to init register map: %d\n", ret);
	596	return ret;
	597	}
	598
	599	ret = devm_snd_soc_register_component(dev,
	600	&atmel_classd_cpu_dai_component,
	601	&atmel_classd_cpu_dai, 1);
	602	if (ret) {
	603	dev_err(dev, "could not register CPU DAI: %d\n", ret);
	604	return ret;
	605	}
	606
	607	ret = devm_snd_dmaengine_pcm_register(dev,
	608	&atmel_classd_dmaengine_pcm_config,
	609	0);
	610	if (ret) {
	611	dev_err(dev, "could not register platform: %d\n", ret);
	612	return ret;
	613	}
	614
	615	ret = snd_soc_register_codec(dev, &soc_codec_dev_classd,
	616	&atmel_classd_codec_dai, 1);
	617	if (ret) {
	618	dev_err(dev, "could not register codec: %d\n", ret);
	619	return ret;
	620	}
	621
	622	/* register sound card */
	623	card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
32e69bad SW	624	if (!card) {
	625	ret = -ENOMEM;
	626	goto unregister_codec;
	627	}
e0a25b6d SW	628
e0a25b6d SW	629	snd_soc_card_set_drvdata(card, dd);
e0a25b6d SW	630
	631	ret = atmel_classd_asoc_card_init(dev, card);
	632	if (ret) {
	633	dev_err(dev, "failed to init sound card\n");
32e69bad	634	goto unregister_codec;
e0a25b6d SW	635	}
	636
	637	ret = devm_snd_soc_register_card(dev, card);
	638	if (ret) {
	639	dev_err(dev, "failed to register sound card: %d\n", ret);
32e69bad	640	goto unregister_codec;
e0a25b6d SW	641	}
	642
	643	return 0;
32e69bad SW	644
	645	unregister_codec:
	646	snd_soc_unregister_codec(dev);
	647	return ret;
e0a25b6d SW	648	}
	649
	650	static int atmel_classd_remove(struct platform_device *pdev)
	651	{
	652	snd_soc_unregister_codec(&pdev->dev);
	653	return 0;
	654	}
	655
	656	static struct platform_driver atmel_classd_driver = {
	657	.driver = {
	658	.name = "atmel-classd",
	659	.of_match_table = of_match_ptr(atmel_classd_of_match),
	660	.pm = &snd_soc_pm_ops,
	661	},
	662	.probe = atmel_classd_probe,
	663	.remove = atmel_classd_remove,
	664	};
	665	module_platform_driver(atmel_classd_driver);
	666
	667	MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
	668	MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
	669	MODULE_LICENSE("GPL");