projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[linux-block.git] / sound / pci / ymfpci / ymfpci_main.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 * Routines for control of YMF724/740/744/754 chips
1da177e4
LT		 5 */
6
1da177e4 7#include <linux/delay.h>
102fa906 8#include <linux/firmware.h>
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <linux/sched.h>
13#include <linux/slab.h>
b82a82d0 14#include <linux/mutex.h>
da155d5b 15#include <linux/module.h>
6cbbfe1c 16#include <linux/io.h>
1da177e4
LT		 17
18#include <sound/core.h>
19#include <sound/control.h>
20#include <sound/info.h>
33925186 21#include <sound/tlv.h>
81fcb170 22#include "ymfpci.h"
1da177e4
LT		 23#include <sound/asoundef.h>
24#include <sound/mpu401.h>
25
102fa906 26#include <asm/byteorder.h>
1da177e4
LT		 27
28/*
29 * common I/O routines
30 */
31
208a1b4c 32static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
1da177e4 33
208a1b4c 34static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
1da177e4
LT		 35{
36 writeb(val, chip->reg_area_virt + offset);
37}
38
208a1b4c 39static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 40{
41 return readw(chip->reg_area_virt + offset);
42}
43
208a1b4c 44static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
1da177e4
LT		 45{
46 writew(val, chip->reg_area_virt + offset);
47}
48
208a1b4c 49static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
1da177e4
LT		 50{
51 return readl(chip->reg_area_virt + offset);
52}
53
208a1b4c 54static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
1da177e4
LT		 55{
56 writel(val, chip->reg_area_virt + offset);
57}
58
208a1b4c 59static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
1da177e4 60{
ef21ca24 61 unsigned long end_time;
1da177e4
LT		 62 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
63
ef21ca24 64 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 65 do {
66 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
67 return 0;
8433a509 68 schedule_timeout_uninterruptible(1);
ef21ca24 69 } while (time_before(jiffies, end_time));
6436bcf6
TI		 70 dev_err(chip->card->dev,
71 "codec_ready: codec %i is not ready [0x%x]\n",
72 secondary, snd_ymfpci_readw(chip, reg));
1da177e4
LT		 73 return -EBUSY;
74}
75
208a1b4c 76static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
1da177e4 77{
208a1b4c 78 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 79 u32 cmd;
80
81 snd_ymfpci_codec_ready(chip, 0);
82 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
83 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
84}
85
208a1b4c 86static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
1da177e4 87{
208a1b4c 88 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 89
90 if (snd_ymfpci_codec_ready(chip, 0))
91 return ~0;
92 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
93 if (snd_ymfpci_codec_ready(chip, 0))
94 return ~0;
95 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
96 int i;
97 for (i = 0; i < 600; i++)
98 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
99 }
100 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
101}
102
103/*
104 * Misc routines
105 */
106
107static u32 snd_ymfpci_calc_delta(u32 rate)
108{
109 switch (rate) {
110 case 8000: return 0x02aaab00;
111 case 11025: return 0x03accd00;
112 case 16000: return 0x05555500;
113 case 22050: return 0x07599a00;
114 case 32000: return 0x0aaaab00;
115 case 44100: return 0x0eb33300;
116 default: return ((rate << 16) / 375) << 5;
117 }
118}
119
10aab1a2 120static const u32 def_rate[8] = {
1da177e4
LT		 121 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
122};
123
124static u32 snd_ymfpci_calc_lpfK(u32 rate)
125{
126 u32 i;
10aab1a2 127 static const u32 val[8] = {
1da177e4
LT		 128 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
129 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
130 };
131
132 if (rate == 44100)
133 return 0x40000000; /* FIXME: What's the right value? */
134 for (i = 0; i < 8; i++)
135 if (rate <= def_rate[i])
136 return val[i];
137 return val[0];
138}
139
140static u32 snd_ymfpci_calc_lpfQ(u32 rate)
141{
142 u32 i;
10aab1a2 143 static const u32 val[8] = {
1da177e4
LT		 144 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
145 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
146 };
147
148 if (rate == 44100)
149 return 0x370A0000;
150 for (i = 0; i < 8; i++)
151 if (rate <= def_rate[i])
152 return val[i];
153 return val[0];
154}
155
156/*
157 * Hardware start management
158 */
159
208a1b4c 160static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
1da177e4
LT		 161{
162 unsigned long flags;
163
164 spin_lock_irqsave(&chip->reg_lock, flags);
165 if (chip->start_count++ > 0)
166 goto __end;
167 snd_ymfpci_writel(chip, YDSXGR_MODE,
168 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
169 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
170 __end:
171 spin_unlock_irqrestore(&chip->reg_lock, flags);
172}
173
208a1b4c 174static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
1da177e4
LT		 175{
176 unsigned long flags;
177 long timeout = 1000;
178
179 spin_lock_irqsave(&chip->reg_lock, flags);
180 if (--chip->start_count > 0)
181 goto __end;
182 snd_ymfpci_writel(chip, YDSXGR_MODE,
183 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
184 while (timeout-- > 0) {
185 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
186 break;
187 }
188 if (atomic_read(&chip->interrupt_sleep_count)) {
189 atomic_set(&chip->interrupt_sleep_count, 0);
190 wake_up(&chip->interrupt_sleep);
191 }
192 __end:
193 spin_unlock_irqrestore(&chip->reg_lock, flags);
194}
195
196/*
197 * Playback voice management
198 */
199
208a1b4c
TI		 200static int voice_alloc(struct snd_ymfpci *chip,
201 enum snd_ymfpci_voice_type type, int pair,
202 struct snd_ymfpci_voice **rvoice)
1da177e4 203{
208a1b4c 204 struct snd_ymfpci_voice *voice, *voice2;
1da177e4
LT		 205 int idx;
206
207 *rvoice = NULL;
208 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
209 voice = &chip->voices[idx];
210 voice2 = pair ? &chip->voices[idx+1] : NULL;
211 if (voice->use || (voice2 && voice2->use))
212 continue;
213 voice->use = 1;
214 if (voice2)
215 voice2->use = 1;
216 switch (type) {
217 case YMFPCI_PCM:
218 voice->pcm = 1;
219 if (voice2)
220 voice2->pcm = 1;
221 break;
222 case YMFPCI_SYNTH:
223 voice->synth = 1;
224 break;
225 case YMFPCI_MIDI:
226 voice->midi = 1;
227 break;
228 }
229 snd_ymfpci_hw_start(chip);
230 if (voice2)
231 snd_ymfpci_hw_start(chip);
232 *rvoice = voice;
233 return 0;
234 }
235 return -ENOMEM;
236}
237
208a1b4c
TI		 238static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
239 enum snd_ymfpci_voice_type type, int pair,
240 struct snd_ymfpci_voice **rvoice)
1da177e4
LT		 241{
242 unsigned long flags;
243 int result;
244
da3cec35
TI		 245 if (snd_BUG_ON(!rvoice))
246 return -EINVAL;
247 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
248 return -EINVAL;
1da177e4
LT		 249
250 spin_lock_irqsave(&chip->voice_lock, flags);
251 for (;;) {
252 result = voice_alloc(chip, type, pair, rvoice);
253 if (result == 0 || type != YMFPCI_PCM)
254 break;
255 /* TODO: synth/midi voice deallocation */
256 break;
257 }
258 spin_unlock_irqrestore(&chip->voice_lock, flags);
259 return result;
260}
261
208a1b4c 262static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
1da177e4
LT		 263{
264 unsigned long flags;
265
da3cec35
TI		 266 if (snd_BUG_ON(!pvoice))
267 return -EINVAL;
1da177e4
LT		 268 snd_ymfpci_hw_stop(chip);
269 spin_lock_irqsave(&chip->voice_lock, flags);
9ed1261e
TK		 270 if (pvoice->number == chip->src441_used) {
271 chip->src441_used = -1;
272 pvoice->ypcm->use_441_slot = 0;
273 }
1da177e4
LT		 274 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
275 pvoice->ypcm = NULL;
276 pvoice->interrupt = NULL;
277 spin_unlock_irqrestore(&chip->voice_lock, flags);
278 return 0;
279}
280
281/*
282 * PCM part
283 */
284
208a1b4c 285static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
1da177e4 286{
208a1b4c 287 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 288 u32 pos, delta;
289
e7daaeed
TI		 290 ypcm = voice->ypcm;
291 if (!ypcm)
1da177e4
LT		 292 return;
293 if (ypcm->substream == NULL)
294 return;
295 spin_lock(&chip->reg_lock);
296 if (ypcm->running) {
297 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
298 if (pos < ypcm->last_pos)
299 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
300 else
301 delta = pos - ypcm->last_pos;
302 ypcm->period_pos += delta;
303 ypcm->last_pos = pos;
304 if (ypcm->period_pos >= ypcm->period_size) {
ee419653 305 /*
6436bcf6 306 dev_dbg(chip->card->dev,
ee419653
TI		 307 "done - active_bank = 0x%x, start = 0x%x\n",
308 chip->active_bank,
309 voice->bank[chip->active_bank].start);
310 */
1da177e4
LT		 311 ypcm->period_pos %= ypcm->period_size;
312 spin_unlock(&chip->reg_lock);
313 snd_pcm_period_elapsed(ypcm->substream);
314 spin_lock(&chip->reg_lock);
315 }
9bcf6551
CL		 316
317 if (unlikely(ypcm->update_pcm_vol)) {
318 unsigned int subs = ypcm->substream->number;
319 unsigned int next_bank = 1 - chip->active_bank;
208a1b4c 320 struct snd_ymfpci_playback_bank *bank;
d3c63763 321 __le32 volume;
9bcf6551
CL		 322
323 bank = &voice->bank[next_bank];
324 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
325 bank->left_gain_end = volume;
326 if (ypcm->output_rear)
327 bank->eff2_gain_end = volume;
328 if (ypcm->voices[1])
329 bank = &ypcm->voices[1]->bank[next_bank];
330 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
331 bank->right_gain_end = volume;
332 if (ypcm->output_rear)
333 bank->eff3_gain_end = volume;
334 ypcm->update_pcm_vol--;
335 }
1da177e4
LT		 336 }
337 spin_unlock(&chip->reg_lock);
338}
339
208a1b4c 340static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
1da177e4 341{
208a1b4c
TI		 342 struct snd_pcm_runtime *runtime = substream->runtime;
343 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
344 struct snd_ymfpci *chip = ypcm->chip;
1da177e4
LT		 345 u32 pos, delta;
346
347 spin_lock(&chip->reg_lock);
348 if (ypcm->running) {
349 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
350 if (pos < ypcm->last_pos)
351 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
352 else
353 delta = pos - ypcm->last_pos;
354 ypcm->period_pos += delta;
355 ypcm->last_pos = pos;
356 if (ypcm->period_pos >= ypcm->period_size) {
357 ypcm->period_pos %= ypcm->period_size;
ee419653 358 /*
6436bcf6 359 dev_dbg(chip->card->dev,
ee419653
TI		 360 "done - active_bank = 0x%x, start = 0x%x\n",
361 chip->active_bank,
362 voice->bank[chip->active_bank].start);
363 */
1da177e4
LT		 364 spin_unlock(&chip->reg_lock);
365 snd_pcm_period_elapsed(substream);
366 spin_lock(&chip->reg_lock);
367 }
368 }
369 spin_unlock(&chip->reg_lock);
370}
371
208a1b4c 372static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 373 int cmd)
374{
208a1b4c
TI		 375 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
376 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
177a7cdb 377 struct snd_kcontrol *kctl = NULL;
1da177e4
LT		 378 int result = 0;
379
380 spin_lock(&chip->reg_lock);
381 if (ypcm->voices[0] == NULL) {
382 result = -EINVAL;
383 goto __unlock;
384 }
385 switch (cmd) {
386 case SNDRV_PCM_TRIGGER_START:
387 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
388 case SNDRV_PCM_TRIGGER_RESUME:
389 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
9ed1261e 390 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT		 391 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
392 ypcm->running = 1;
393 break;
394 case SNDRV_PCM_TRIGGER_STOP:
177a7cdb
CL		 395 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
396 kctl = chip->pcm_mixer[substream->number].ctl;
397 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
398 }
c0dbbdad 399 fallthrough;
1da177e4
LT		 400 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
401 case SNDRV_PCM_TRIGGER_SUSPEND:
402 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
9ed1261e 403 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
1da177e4
LT		 404 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
405 ypcm->running = 0;
406 break;
407 default:
408 result = -EINVAL;
409 break;
410 }
411 __unlock:
412 spin_unlock(&chip->reg_lock);
177a7cdb
CL		 413 if (kctl)
414 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
1da177e4
LT		 415 return result;
416}
208a1b4c 417static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 418 int cmd)
419{
208a1b4c
TI		 420 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
421 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 422 int result = 0;
423 u32 tmp;
424
425 spin_lock(&chip->reg_lock);
426 switch (cmd) {
427 case SNDRV_PCM_TRIGGER_START:
428 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
429 case SNDRV_PCM_TRIGGER_RESUME:
430 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
431 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
432 ypcm->running = 1;
433 break;
434 case SNDRV_PCM_TRIGGER_STOP:
435 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
436 case SNDRV_PCM_TRIGGER_SUSPEND:
437 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
438 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
439 ypcm->running = 0;
440 break;
441 default:
442 result = -EINVAL;
443 break;
444 }
445 spin_unlock(&chip->reg_lock);
446 return result;
447}
448
208a1b4c 449static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
1da177e4
LT		 450{
451 int err;
452
453 if (ypcm->voices[1] != NULL && voices < 2) {
454 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
455 ypcm->voices[1] = NULL;
456 }
457 if (voices == 1 && ypcm->voices[0] != NULL)
458 return 0; /* already allocated */
459 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
460 return 0; /* already allocated */
461 if (voices > 1) {
462 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
463 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
464 ypcm->voices[0] = NULL;
465 }
466 }
467 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
468 if (err < 0)
469 return err;
470 ypcm->voices[0]->ypcm = ypcm;
471 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
472 if (voices > 1) {
473 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
474 ypcm->voices[1]->ypcm = ypcm;
475 }
476 return 0;
477}
478
208a1b4c
TI		 479static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
480 struct snd_pcm_runtime *runtime,
9bcf6551 481 int has_pcm_volume)
1da177e4 482{
208a1b4c 483 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
1da177e4 484 u32 format;
9bcf6551
CL		 485 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
486 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
487 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
208a1b4c 488 struct snd_ymfpci_playback_bank *bank;
1da177e4 489 unsigned int nbank;
d3c63763 490 __le32 vol_left, vol_right;
9bcf6551 491 u8 use_left, use_right;
9ed1261e 492 unsigned long flags;
1da177e4 493
da3cec35
TI		 494 if (snd_BUG_ON(!voice))
495 return;
9bcf6551
CL		 496 if (runtime->channels == 1) {
497 use_left = 1;
498 use_right = 1;
499 } else {
500 use_left = (voiceidx & 1) == 0;
501 use_right = !use_left;
502 }
503 if (has_pcm_volume) {
504 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
505 [ypcm->substream->number].left << 15);
506 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
507 [ypcm->substream->number].right << 15);
508 } else {
509 vol_left = cpu_to_le32(0x40000000);
510 vol_right = cpu_to_le32(0x40000000);
511 }
9ed1261e 512 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
9bcf6551
CL		 513 format = runtime->channels == 2 ? 0x00010000 : 0;
514 if (snd_pcm_format_width(runtime->format) == 8)
515 format |= 0x80000000;
9ed1261e
TK		 516 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
517 runtime->rate == 44100 && runtime->channels == 2 &&
518 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
519 ypcm->chip->src441_used == voice->number)) {
520 ypcm->chip->src441_used = voice->number;
521 ypcm->use_441_slot = 1;
522 format |= 0x10000000;
9ed1261e
TK		 523 }
524 if (ypcm->chip->src441_used == voice->number &&
525 (format & 0x10000000) == 0) {
526 ypcm->chip->src441_used = -1;
527 ypcm->use_441_slot = 0;
528 }
9bcf6551
CL		 529 if (runtime->channels == 2 && (voiceidx & 1) != 0)
530 format |= 1;
9ed1261e 531 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
1da177e4
LT		 532 for (nbank = 0; nbank < 2; nbank++) {
533 bank = &voice->bank[nbank];
9bcf6551 534 memset(bank, 0, sizeof(*bank));
1da177e4 535 bank->format = cpu_to_le32(format);
9bcf6551
CL		 536 bank->base = cpu_to_le32(runtime->dma_addr);
537 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
1da177e4 538 bank->lpfQ = cpu_to_le32(lpfQ);
1da177e4
LT		 539 bank->delta =
540 bank->delta_end = cpu_to_le32(delta);
541 bank->lpfK =
542 bank->lpfK_end = cpu_to_le32(lpfK);
9bcf6551
CL		 543 bank->eg_gain =
544 bank->eg_gain_end = cpu_to_le32(0x40000000);
545
546 if (ypcm->output_front) {
547 if (use_left) {
548 bank->left_gain =
549 bank->left_gain_end = vol_left;
550 }
551 if (use_right) {
1da177e4 552 bank->right_gain =
9bcf6551 553 bank->right_gain_end = vol_right;
1da177e4 554 }
9bcf6551
CL		 555 }
556 if (ypcm->output_rear) {
5a25c5cf
JK		 557 if (!ypcm->swap_rear) {
558 if (use_left) {
559 bank->eff2_gain =
560 bank->eff2_gain_end = vol_left;
561 }
562 if (use_right) {
563 bank->eff3_gain =
564 bank->eff3_gain_end = vol_right;
565 }
566 } else {
567 /* The SPDIF out channels seem to be swapped, so we have
568 * to swap them here, too. The rear analog out channels
569 * will be wrong, but otherwise AC3 would not work.
570 */
571 if (use_left) {
572 bank->eff3_gain =
573 bank->eff3_gain_end = vol_left;
574 }
575 if (use_right) {
576 bank->eff2_gain =
577 bank->eff2_gain_end = vol_right;
578 }
579 }
580 }
1da177e4
LT		 581 }
582}
583
e23e7a14 584static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
1da177e4 585{
6974f8ad 586 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1da177e4
LT		 587 4096, &chip->ac3_tmp_base) < 0)
588 return -ENOMEM;
589
590 chip->bank_effect[3][0]->base =
591 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
592 chip->bank_effect[3][0]->loop_end =
593 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
594 chip->bank_effect[4][0]->base =
595 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
596 chip->bank_effect[4][0]->loop_end =
597 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
598
599 spin_lock_irq(&chip->reg_lock);
600 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
601 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
602 spin_unlock_irq(&chip->reg_lock);
603 return 0;
604}
605
208a1b4c 606static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
1da177e4
LT		 607{
608 spin_lock_irq(&chip->reg_lock);
609 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
610 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
611 spin_unlock_irq(&chip->reg_lock);
612 // snd_ymfpci_irq_wait(chip);
613 if (chip->ac3_tmp_base.area) {
614 snd_dma_free_pages(&chip->ac3_tmp_base);
615 chip->ac3_tmp_base.area = NULL;
616 }
617 return 0;
618}
619
208a1b4c
TI		 620static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
621 struct snd_pcm_hw_params *hw_params)
1da177e4 622{
208a1b4c
TI		 623 struct snd_pcm_runtime *runtime = substream->runtime;
624 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 625 int err;
626
e7daaeed
TI		 627 err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params));
628 if (err < 0)
1da177e4
LT		 629 return err;
630 return 0;
631}
632
208a1b4c 633static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4 634{
208a1b4c
TI		 635 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
636 struct snd_pcm_runtime *runtime = substream->runtime;
637 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 638
639 if (runtime->private_data == NULL)
640 return 0;
641 ypcm = runtime->private_data;
642
643 /* wait, until the PCI operations are not finished */
644 snd_ymfpci_irq_wait(chip);
1da177e4
LT		 645 if (ypcm->voices[1]) {
646 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
647 ypcm->voices[1] = NULL;
648 }
649 if (ypcm->voices[0]) {
650 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
651 ypcm->voices[0] = NULL;
652 }
653 return 0;
654}
655
208a1b4c 656static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 657{
208a1b4c
TI		 658 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
659 struct snd_pcm_runtime *runtime = substream->runtime;
660 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
177a7cdb 661 struct snd_kcontrol *kctl;
1da177e4
LT		 662 unsigned int nvoice;
663
664 ypcm->period_size = runtime->period_size;
665 ypcm->buffer_size = runtime->buffer_size;
666 ypcm->period_pos = 0;
667 ypcm->last_pos = 0;
668 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
9bcf6551
CL		 669 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
670 substream->pcm == chip->pcm);
177a7cdb
CL		 671
672 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
673 kctl = chip->pcm_mixer[substream->number].ctl;
674 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
675 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
676 }
1da177e4
LT		 677 return 0;
678}
679
208a1b4c 680static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4 681{
208a1b4c 682 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 683
684 /* wait, until the PCI operations are not finished */
685 snd_ymfpci_irq_wait(chip);
b6ed90c0 686 return 0;
1da177e4
LT		 687}
688
208a1b4c 689static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 690{
208a1b4c
TI		 691 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
692 struct snd_pcm_runtime *runtime = substream->runtime;
693 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
694 struct snd_ymfpci_capture_bank * bank;
1da177e4
LT		 695 int nbank;
696 u32 rate, format;
697
698 ypcm->period_size = runtime->period_size;
699 ypcm->buffer_size = runtime->buffer_size;
700 ypcm->period_pos = 0;
701 ypcm->last_pos = 0;
702 ypcm->shift = 0;
703 rate = ((48000 * 4096) / runtime->rate) - 1;
704 format = 0;
705 if (runtime->channels == 2) {
706 format |= 2;
707 ypcm->shift++;
708 }
709 if (snd_pcm_format_width(runtime->format) == 8)
710 format |= 1;
711 else
712 ypcm->shift++;
713 switch (ypcm->capture_bank_number) {
714 case 0:
715 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
716 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
717 break;
718 case 1:
719 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
720 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
721 break;
722 }
723 for (nbank = 0; nbank < 2; nbank++) {
724 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
725 bank->base = cpu_to_le32(runtime->dma_addr);
726 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
727 bank->start = 0;
728 bank->num_of_loops = 0;
729 }
730 return 0;
731}
732
208a1b4c 733static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 734{
208a1b4c
TI		 735 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
736 struct snd_pcm_runtime *runtime = substream->runtime;
737 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
738 struct snd_ymfpci_voice *voice = ypcm->voices[0];
1da177e4
LT		 739
740 if (!(ypcm->running && voice))
741 return 0;
742 return le32_to_cpu(voice->bank[chip->active_bank].start);
743}
744
208a1b4c 745static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 746{
208a1b4c
TI		 747 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
748 struct snd_pcm_runtime *runtime = substream->runtime;
749 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 750
751 if (!ypcm->running)
752 return 0;
753 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
754}
755
208a1b4c 756static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
1da177e4 757{
ac6424b9 758 wait_queue_entry_t wait;
1da177e4
LT		 759 int loops = 4;
760
761 while (loops-- > 0) {
762 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
763 continue;
764 init_waitqueue_entry(&wait, current);
765 add_wait_queue(&chip->interrupt_sleep, &wait);
766 atomic_inc(&chip->interrupt_sleep_count);
8433a509 767 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
1da177e4
LT		 768 remove_wait_queue(&chip->interrupt_sleep, &wait);
769 }
770}
771
7d12e780 772static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
1da177e4 773{
208a1b4c 774 struct snd_ymfpci *chip = dev_id;
1da177e4 775 u32 status, nvoice, mode;
208a1b4c 776 struct snd_ymfpci_voice *voice;
1da177e4
LT		 777
778 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
779 if (status & 0x80000000) {
780 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
781 spin_lock(&chip->voice_lock);
782 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
783 voice = &chip->voices[nvoice];
784 if (voice->interrupt)
785 voice->interrupt(chip, voice);
786 }
787 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
788 if (chip->capture_substream[nvoice])
789 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
790 }
791#if 0
792 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
793 if (chip->effect_substream[nvoice])
794 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
795 }
796#endif
797 spin_unlock(&chip->voice_lock);
798 spin_lock(&chip->reg_lock);
799 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
800 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
801 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
802 spin_unlock(&chip->reg_lock);
803
804 if (atomic_read(&chip->interrupt_sleep_count)) {
805 atomic_set(&chip->interrupt_sleep_count, 0);
806 wake_up(&chip->interrupt_sleep);
807 }
808 }
809
810 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
811 if (status & 1) {
812 if (chip->timer)
6e2efaac 813 snd_timer_interrupt(chip->timer, chip->timer_ticks);
1da177e4
LT		 814 }
815 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
816
817 if (chip->rawmidi)
7d12e780 818 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
1da177e4
LT		 819 return IRQ_HANDLED;
820}
821
420b0c1b 822static const struct snd_pcm_hardware snd_ymfpci_playback =
1da177e4
LT		 823{
824 .info = (SNDRV_PCM_INFO_MMAP |
825 SNDRV_PCM_INFO_MMAP_VALID |
826 SNDRV_PCM_INFO_INTERLEAVED |
827 SNDRV_PCM_INFO_BLOCK_TRANSFER |
828 SNDRV_PCM_INFO_PAUSE |
829 SNDRV_PCM_INFO_RESUME),
830 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
831 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
832 .rate_min = 8000,
833 .rate_max = 48000,
834 .channels_min = 1,
835 .channels_max = 2,
836 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
837 .period_bytes_min = 64,
838 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
839 .periods_min = 3,
840 .periods_max = 1024,
841 .fifo_size = 0,
842};
843
420b0c1b 844static const struct snd_pcm_hardware snd_ymfpci_capture =
1da177e4
LT		 845{
846 .info = (SNDRV_PCM_INFO_MMAP |
847 SNDRV_PCM_INFO_MMAP_VALID |
848 SNDRV_PCM_INFO_INTERLEAVED |
849 SNDRV_PCM_INFO_BLOCK_TRANSFER |
850 SNDRV_PCM_INFO_PAUSE |
851 SNDRV_PCM_INFO_RESUME),
852 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
853 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
854 .rate_min = 8000,
855 .rate_max = 48000,
856 .channels_min = 1,
857 .channels_max = 2,
858 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
859 .period_bytes_min = 64,
860 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
861 .periods_min = 3,
862 .periods_max = 1024,
863 .fifo_size = 0,
864};
865
208a1b4c 866static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 867{
4d572776 868 kfree(runtime->private_data);
1da177e4
LT		 869}
870
208a1b4c 871static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
1da177e4 872{
208a1b4c
TI		 873 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
874 struct snd_pcm_runtime *runtime = substream->runtime;
875 struct snd_ymfpci_pcm *ypcm;
84f9df15
CL		 876 int err;
877
878 runtime->hw = snd_ymfpci_playback;
879 /* FIXME? True value is 256/48 = 5.33333 ms */
880 err = snd_pcm_hw_constraint_minmax(runtime,
881 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
882 5334, UINT_MAX);
883 if (err < 0)
884 return err;
5b0416a3
CL		 885 err = snd_pcm_hw_rule_noresample(runtime, 48000);
886 if (err < 0)
887 return err;
1da177e4 888
e560d8d8 889 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 890 if (ypcm == NULL)
891 return -ENOMEM;
892 ypcm->chip = chip;
893 ypcm->type = PLAYBACK_VOICE;
894 ypcm->substream = substream;
1da177e4
LT		 895 runtime->private_data = ypcm;
896 runtime->private_free = snd_ymfpci_pcm_free_substream;
1da177e4
LT		 897 return 0;
898}
899
900/* call with spinlock held */
208a1b4c 901static void ymfpci_open_extension(struct snd_ymfpci *chip)
1da177e4
LT		 902{
903 if (! chip->rear_opened) {
904 if (! chip->spdif_opened) /* set AC3 */
905 snd_ymfpci_writel(chip, YDSXGR_MODE,
906 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
907 /* enable second codec (4CHEN) */
908 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
909 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
910 }
911}
912
913/* call with spinlock held */
208a1b4c 914static void ymfpci_close_extension(struct snd_ymfpci *chip)
1da177e4
LT		 915{
916 if (! chip->rear_opened) {
917 if (! chip->spdif_opened)
918 snd_ymfpci_writel(chip, YDSXGR_MODE,
919 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
920 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
921 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
922 }
923}
924
208a1b4c 925static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
1da177e4 926{
208a1b4c
TI		 927 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
928 struct snd_pcm_runtime *runtime = substream->runtime;
929 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 930 int err;
931
e7daaeed
TI		 932 err = snd_ymfpci_playback_open_1(substream);
933 if (err < 0)
1da177e4
LT		 934 return err;
935 ypcm = runtime->private_data;
936 ypcm->output_front = 1;
937 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
d9301263 938 ypcm->swap_rear = 0;
1da177e4
LT		 939 spin_lock_irq(&chip->reg_lock);
940 if (ypcm->output_rear) {
941 ymfpci_open_extension(chip);
942 chip->rear_opened++;
943 }
944 spin_unlock_irq(&chip->reg_lock);
945 return 0;
946}
947
208a1b4c 948static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 949{
208a1b4c
TI		 950 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
951 struct snd_pcm_runtime *runtime = substream->runtime;
952 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 953 int err;
954
e7daaeed
TI		 955 err = snd_ymfpci_playback_open_1(substream);
956 if (err < 0)
1da177e4
LT		 957 return err;
958 ypcm = runtime->private_data;
959 ypcm->output_front = 0;
960 ypcm->output_rear = 1;
d9301263 961 ypcm->swap_rear = 1;
1da177e4
LT		 962 spin_lock_irq(&chip->reg_lock);
963 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
964 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
965 ymfpci_open_extension(chip);
966 chip->spdif_pcm_bits = chip->spdif_bits;
967 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
968 chip->spdif_opened++;
969 spin_unlock_irq(&chip->reg_lock);
970
971 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
972 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
973 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
974 return 0;
975}
976
208a1b4c 977static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1da177e4 978{
208a1b4c
TI		 979 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
980 struct snd_pcm_runtime *runtime = substream->runtime;
981 struct snd_ymfpci_pcm *ypcm;
1da177e4
LT		 982 int err;
983
e7daaeed
TI		 984 err = snd_ymfpci_playback_open_1(substream);
985 if (err < 0)
1da177e4
LT		 986 return err;
987 ypcm = runtime->private_data;
988 ypcm->output_front = 0;
989 ypcm->output_rear = 1;
d9301263 990 ypcm->swap_rear = 0;
1da177e4
LT		 991 spin_lock_irq(&chip->reg_lock);
992 ymfpci_open_extension(chip);
993 chip->rear_opened++;
994 spin_unlock_irq(&chip->reg_lock);
995 return 0;
996}
997
208a1b4c 998static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1da177e4
LT		 999 u32 capture_bank_number)
1000{
208a1b4c
TI		 1001 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1002 struct snd_pcm_runtime *runtime = substream->runtime;
1003 struct snd_ymfpci_pcm *ypcm;
84f9df15
CL		 1004 int err;
1005
1006 runtime->hw = snd_ymfpci_capture;
1007 /* FIXME? True value is 256/48 = 5.33333 ms */
1008 err = snd_pcm_hw_constraint_minmax(runtime,
1009 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1010 5334, UINT_MAX);
1011 if (err < 0)
1012 return err;
5b0416a3
CL		 1013 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1014 if (err < 0)
1015 return err;
1da177e4 1016
e560d8d8 1017 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1da177e4
LT		 1018 if (ypcm == NULL)
1019 return -ENOMEM;
1020 ypcm->chip = chip;
1021 ypcm->type = capture_bank_number + CAPTURE_REC;
1022 ypcm->substream = substream;
1023 ypcm->capture_bank_number = capture_bank_number;
1024 chip->capture_substream[capture_bank_number] = substream;
1da177e4
LT		 1025 runtime->private_data = ypcm;
1026 runtime->private_free = snd_ymfpci_pcm_free_substream;
1027 snd_ymfpci_hw_start(chip);
1028 return 0;
1029}
1030
208a1b4c 1031static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1da177e4
LT		 1032{
1033 return snd_ymfpci_capture_open(substream, 0);
1034}
1035
208a1b4c 1036static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1da177e4
LT		 1037{
1038 return snd_ymfpci_capture_open(substream, 1);
1039}
1040
208a1b4c 1041static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1da177e4
LT		 1042{
1043 return 0;
1044}
1045
208a1b4c 1046static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1da177e4 1047{
208a1b4c
TI		 1048 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1049 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1da177e4
LT		 1050
1051 spin_lock_irq(&chip->reg_lock);
1052 if (ypcm->output_rear && chip->rear_opened > 0) {
1053 chip->rear_opened--;
1054 ymfpci_close_extension(chip);
1055 }
1056 spin_unlock_irq(&chip->reg_lock);
1057 return snd_ymfpci_playback_close_1(substream);
1058}
1059
208a1b4c 1060static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1061{
208a1b4c 1062 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1063
1064 spin_lock_irq(&chip->reg_lock);
1065 chip->spdif_opened = 0;
1066 ymfpci_close_extension(chip);
1067 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1068 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1069 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1070 spin_unlock_irq(&chip->reg_lock);
1071 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1072 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1073 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1074 return snd_ymfpci_playback_close_1(substream);
1075}
1076
208a1b4c 1077static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1da177e4 1078{
208a1b4c 1079 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 1080
1081 spin_lock_irq(&chip->reg_lock);
1082 if (chip->rear_opened > 0) {
1083 chip->rear_opened--;
1084 ymfpci_close_extension(chip);
1085 }
1086 spin_unlock_irq(&chip->reg_lock);
1087 return snd_ymfpci_playback_close_1(substream);
1088}
1089
208a1b4c 1090static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1da177e4 1091{
208a1b4c
TI		 1092 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1093 struct snd_pcm_runtime *runtime = substream->runtime;
1094 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1da177e4
LT		 1095
1096 if (ypcm != NULL) {
1097 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1098 snd_ymfpci_hw_stop(chip);
1099 }
1100 return 0;
1101}
1102
6769e988 1103static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
1da177e4
LT		 1104 .open = snd_ymfpci_playback_open,
1105 .close = snd_ymfpci_playback_close,
1da177e4
LT		 1106 .hw_params = snd_ymfpci_playback_hw_params,
1107 .hw_free = snd_ymfpci_playback_hw_free,
1108 .prepare = snd_ymfpci_playback_prepare,
1109 .trigger = snd_ymfpci_playback_trigger,
1110 .pointer = snd_ymfpci_playback_pointer,
1111};
1112
6769e988 1113static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1da177e4
LT		 1114 .open = snd_ymfpci_capture_rec_open,
1115 .close = snd_ymfpci_capture_close,
1da177e4
LT		 1116 .hw_free = snd_ymfpci_capture_hw_free,
1117 .prepare = snd_ymfpci_capture_prepare,
1118 .trigger = snd_ymfpci_capture_trigger,
1119 .pointer = snd_ymfpci_capture_pointer,
1120};
1121
38c47181 1122int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
1da177e4 1123{
208a1b4c 1124 struct snd_pcm *pcm;
1da177e4
LT		 1125 int err;
1126
e7daaeed
TI		 1127 err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm);
1128 if (err < 0)
1da177e4
LT		 1129 return err;
1130 pcm->private_data = chip;
1da177e4
LT		 1131
1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1133 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1134
1135 /* global setup */
1136 pcm->info_flags = 0;
1137 strcpy(pcm->name, "YMFPCI");
1138 chip->pcm = pcm;
1139
b6ed90c0
TI		 1140 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1141 &chip->pci->dev, 64*1024, 256*1024);
1da177e4 1142
38c47181 1143 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
0afdb8f2 1144 snd_pcm_std_chmaps, 2, 0, NULL);
1da177e4
LT		 1145}
1146
6769e988 1147static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1da177e4
LT		 1148 .open = snd_ymfpci_capture_ac97_open,
1149 .close = snd_ymfpci_capture_close,
1da177e4
LT		 1150 .hw_free = snd_ymfpci_capture_hw_free,
1151 .prepare = snd_ymfpci_capture_prepare,
1152 .trigger = snd_ymfpci_capture_trigger,
1153 .pointer = snd_ymfpci_capture_pointer,
1154};
1155
38c47181 1156int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
1da177e4 1157{
208a1b4c 1158 struct snd_pcm *pcm;
1da177e4
LT		 1159 int err;
1160
e7daaeed
TI		 1161 err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm);
1162 if (err < 0)
1da177e4
LT		 1163 return err;
1164 pcm->private_data = chip;
1da177e4
LT		 1165
1166 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1167
1168 /* global setup */
1169 pcm->info_flags = 0;
1170 sprintf(pcm->name, "YMFPCI - %s",
1171 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1172 chip->pcm2 = pcm;
1173
b6ed90c0
TI		 1174 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1175 &chip->pci->dev, 64*1024, 256*1024);
1da177e4 1176
1da177e4
LT		 1177 return 0;
1178}
1179
6769e988 1180static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1da177e4
LT		 1181 .open = snd_ymfpci_playback_spdif_open,
1182 .close = snd_ymfpci_playback_spdif_close,
1da177e4
LT		 1183 .hw_params = snd_ymfpci_playback_hw_params,
1184 .hw_free = snd_ymfpci_playback_hw_free,
1185 .prepare = snd_ymfpci_playback_prepare,
1186 .trigger = snd_ymfpci_playback_trigger,
1187 .pointer = snd_ymfpci_playback_pointer,
1188};
1189
38c47181 1190int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
1da177e4 1191{
208a1b4c 1192 struct snd_pcm *pcm;
1da177e4
LT		 1193 int err;
1194
e7daaeed
TI		 1195 err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm);
1196 if (err < 0)
1da177e4
LT		 1197 return err;
1198 pcm->private_data = chip;
1da177e4
LT		 1199
1200 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1201
1202 /* global setup */
1203 pcm->info_flags = 0;
1204 strcpy(pcm->name, "YMFPCI - IEC958");
1205 chip->pcm_spdif = pcm;
1206
b6ed90c0
TI		 1207 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1208 &chip->pci->dev, 64*1024, 256*1024);
1da177e4 1209
1da177e4
LT		 1210 return 0;
1211}
1212
6769e988 1213static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1da177e4
LT		 1214 .open = snd_ymfpci_playback_4ch_open,
1215 .close = snd_ymfpci_playback_4ch_close,
1da177e4
LT		 1216 .hw_params = snd_ymfpci_playback_hw_params,
1217 .hw_free = snd_ymfpci_playback_hw_free,
1218 .prepare = snd_ymfpci_playback_prepare,
1219 .trigger = snd_ymfpci_playback_trigger,
1220 .pointer = snd_ymfpci_playback_pointer,
1221};
1222
0afdb8f2
TI		 1223static const struct snd_pcm_chmap_elem surround_map[] = {
1224 { .channels = 1,
5efbc261 1225 .map = { SNDRV_CHMAP_MONO } },
0afdb8f2
TI		 1226 { .channels = 2,
1227 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1228 { }
1229};
1230
38c47181 1231int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
1da177e4 1232{
208a1b4c 1233 struct snd_pcm *pcm;
1da177e4
LT		 1234 int err;
1235
e7daaeed
TI		 1236 err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm);
1237 if (err < 0)
1da177e4
LT		 1238 return err;
1239 pcm->private_data = chip;
1da177e4
LT		 1240
1241 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1242
1243 /* global setup */
1244 pcm->info_flags = 0;
1245 strcpy(pcm->name, "YMFPCI - Rear PCM");
1246 chip->pcm_4ch = pcm;
1247
b6ed90c0
TI		 1248 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1249 &chip->pci->dev, 64*1024, 256*1024);
1da177e4 1250
38c47181 1251 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
0afdb8f2 1252 surround_map, 2, 0, NULL);
1da177e4
LT		 1253}
1254
208a1b4c 1255static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1256{
1257 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1258 uinfo->count = 1;
1259 return 0;
1260}
1261
208a1b4c
TI		 1262static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1263 struct snd_ctl_elem_value *ucontrol)
1da177e4 1264{
208a1b4c 1265 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1266
1267 spin_lock_irq(&chip->reg_lock);
1268 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1269 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
fc80a202 1270 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1271 spin_unlock_irq(&chip->reg_lock);
1272 return 0;
1273}
1274
208a1b4c
TI		 1275static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1da177e4 1277{
208a1b4c 1278 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1279 unsigned int val;
1280 int change;
1281
1282 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1283 (ucontrol->value.iec958.status[1] << 8);
1284 spin_lock_irq(&chip->reg_lock);
1285 change = chip->spdif_bits != val;
1286 chip->spdif_bits = val;
1287 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1288 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1289 spin_unlock_irq(&chip->reg_lock);
1290 return change;
1291}
1292
f3b827e0 1293static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
1da177e4
LT		 1294{
1295 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1296 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1297 .info = snd_ymfpci_spdif_default_info,
1298 .get = snd_ymfpci_spdif_default_get,
1299 .put = snd_ymfpci_spdif_default_put
1300};
1301
208a1b4c 1302static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1303{
1304 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1305 uinfo->count = 1;
1306 return 0;
1307}
1308
208a1b4c
TI		 1309static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1310 struct snd_ctl_elem_value *ucontrol)
1da177e4 1311{
208a1b4c 1312 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1313
1314 spin_lock_irq(&chip->reg_lock);
1315 ucontrol->value.iec958.status[0] = 0x3e;
1316 ucontrol->value.iec958.status[1] = 0xff;
1317 spin_unlock_irq(&chip->reg_lock);
1318 return 0;
1319}
1320
f3b827e0 1321static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1da177e4
LT		 1322{
1323 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1324 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1325 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1326 .info = snd_ymfpci_spdif_mask_info,
1327 .get = snd_ymfpci_spdif_mask_get,
1328};
1329
208a1b4c 1330static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1331{
1332 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1333 uinfo->count = 1;
1334 return 0;
1335}
1336
208a1b4c
TI		 1337static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1338 struct snd_ctl_elem_value *ucontrol)
1da177e4 1339{
208a1b4c 1340 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1341
1342 spin_lock_irq(&chip->reg_lock);
1343 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1344 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
fc80a202 1345 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1da177e4
LT		 1346 spin_unlock_irq(&chip->reg_lock);
1347 return 0;
1348}
1349
208a1b4c
TI		 1350static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1351 struct snd_ctl_elem_value *ucontrol)
1da177e4 1352{
208a1b4c 1353 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1354 unsigned int val;
1355 int change;
1356
1357 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1358 (ucontrol->value.iec958.status[1] << 8);
1359 spin_lock_irq(&chip->reg_lock);
1360 change = chip->spdif_pcm_bits != val;
1361 chip->spdif_pcm_bits = val;
1362 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1363 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1364 spin_unlock_irq(&chip->reg_lock);
1365 return change;
1366}
1367
f3b827e0 1368static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1da177e4
LT		 1369{
1370 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1371 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1372 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1373 .info = snd_ymfpci_spdif_stream_info,
1374 .get = snd_ymfpci_spdif_stream_get,
1375 .put = snd_ymfpci_spdif_stream_put
1376};
1377
208a1b4c 1378static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1da177e4 1379{
bed6896d
CL		 1380 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1381
1382 return snd_ctl_enum_info(info, 1, 3, texts);
1da177e4
LT		 1383}
1384
208a1b4c 1385static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1386{
208a1b4c 1387 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1388 u16 reg;
1389
1390 spin_lock_irq(&chip->reg_lock);
1391 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1392 spin_unlock_irq(&chip->reg_lock);
1393 if (!(reg & 0x100))
1394 value->value.enumerated.item[0] = 0;
1395 else
1396 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1397 return 0;
1398}
1399
208a1b4c 1400static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1da177e4 1401{
208a1b4c 1402 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1403 u16 reg, old_reg;
1404
1405 spin_lock_irq(&chip->reg_lock);
1406 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1407 if (value->value.enumerated.item[0] == 0)
1408 reg = old_reg & ~0x100;
1409 else
1410 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1411 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1412 spin_unlock_irq(&chip->reg_lock);
1413 return reg != old_reg;
1414}
1415
f3b827e0 1416static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
1da177e4
LT		 1417 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1419 .name = "Direct Recording Source",
1420 .info = snd_ymfpci_drec_source_info,
1421 .get = snd_ymfpci_drec_source_get,
1422 .put = snd_ymfpci_drec_source_put
1423};
1424
1425/*
1426 * Mixer controls
1427 */
1428
d602c885 1429#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1da177e4
LT		 1430{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1431 .info = snd_ymfpci_info_single, \
1432 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
d602c885 1433 .private_value = ((reg) | ((shift) << 16)) }
1da177e4 1434
a5ce8890 1435#define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1da177e4 1436
208a1b4c
TI		 1437static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1438 struct snd_ctl_elem_value *ucontrol)
1da177e4 1439{
208a1b4c 1440 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1441 int reg = kcontrol->private_value & 0xffff;
1442 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1443 unsigned int mask = 1;
1da177e4 1444
d602c885 1445 switch (reg) {
1da177e4
LT		 1446 case YDSXGR_SPDIFOUTCTRL: break;
1447 case YDSXGR_SPDIFINCTRL: break;
1448 default: return -EINVAL;
1449 }
d602c885
GM		 1450 ucontrol->value.integer.value[0] =
1451 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1da177e4
LT		 1452 return 0;
1453}
1454
208a1b4c
TI		 1455static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1456 struct snd_ctl_elem_value *ucontrol)
1da177e4 1457{
208a1b4c 1458 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
d602c885
GM		 1459 int reg = kcontrol->private_value & 0xffff;
1460 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1461 unsigned int mask = 1;
1da177e4
LT		 1462 int change;
1463 unsigned int val, oval;
1464
d602c885 1465 switch (reg) {
1da177e4
LT		 1466 case YDSXGR_SPDIFOUTCTRL: break;
1467 case YDSXGR_SPDIFINCTRL: break;
1468 default: return -EINVAL;
1469 }
1470 val = (ucontrol->value.integer.value[0] & mask);
1da177e4
LT		 1471 val <<= shift;
1472 spin_lock_irq(&chip->reg_lock);
1473 oval = snd_ymfpci_readl(chip, reg);
1474 val = (oval & ~(mask << shift)) | val;
1475 change = val != oval;
1476 snd_ymfpci_writel(chip, reg, val);
1477 spin_unlock_irq(&chip->reg_lock);
1478 return change;
1479}
1480
0cb29ea0 1481static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
33925186 1482
1da177e4
LT		 1483#define YMFPCI_DOUBLE(xname, xindex, reg) \
1484{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
33925186 1485 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1da177e4
LT		 1486 .info = snd_ymfpci_info_double, \
1487 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
33925186
TI		 1488 .private_value = reg, \
1489 .tlv = { .p = db_scale_native } }
1da177e4 1490
208a1b4c 1491static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1492{
1493 unsigned int reg = kcontrol->private_value;
1da177e4
LT		 1494
1495 if (reg < 0x80 || reg >= 0xc0)
1496 return -EINVAL;
467a8c2f 1497 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1da177e4
LT		 1498 uinfo->count = 2;
1499 uinfo->value.integer.min = 0;
467a8c2f 1500 uinfo->value.integer.max = 16383;
1da177e4
LT		 1501 return 0;
1502}
1503
208a1b4c 1504static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1505{
208a1b4c 1506 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1507 unsigned int reg = kcontrol->private_value;
467a8c2f 1508 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1509 unsigned int val;
1510
1511 if (reg < 0x80 || reg >= 0xc0)
1512 return -EINVAL;
1513 spin_lock_irq(&chip->reg_lock);
1514 val = snd_ymfpci_readl(chip, reg);
1515 spin_unlock_irq(&chip->reg_lock);
1516 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1517 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1da177e4
LT		 1518 return 0;
1519}
1520
208a1b4c 1521static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1522{
208a1b4c 1523 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1524 unsigned int reg = kcontrol->private_value;
467a8c2f 1525 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1da177e4
LT		 1526 int change;
1527 unsigned int val1, val2, oval;
1528
1529 if (reg < 0x80 || reg >= 0xc0)
1530 return -EINVAL;
1531 val1 = ucontrol->value.integer.value[0] & mask;
1532 val2 = ucontrol->value.integer.value[1] & mask;
1da177e4
LT		 1533 val1 <<= shift_left;
1534 val2 <<= shift_right;
1535 spin_lock_irq(&chip->reg_lock);
1536 oval = snd_ymfpci_readl(chip, reg);
1537 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1538 change = val1 != oval;
1539 snd_ymfpci_writel(chip, reg, val1);
1540 spin_unlock_irq(&chip->reg_lock);
1541 return change;
1542}
1543
177a7cdb
CL		 1544static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1545 struct snd_ctl_elem_value *ucontrol)
1546{
1547 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1548 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1549 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1550 int change;
1551 unsigned int value, oval;
1552
1553 value = ucontrol->value.integer.value[0] & 0x3fff;
1554 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1555 spin_lock_irq(&chip->reg_lock);
1556 oval = snd_ymfpci_readl(chip, reg);
1557 change = value != oval;
1558 snd_ymfpci_writel(chip, reg, value);
1559 snd_ymfpci_writel(chip, reg2, value);
1560 spin_unlock_irq(&chip->reg_lock);
1561 return change;
1562}
1563
1da177e4
LT		 1564/*
1565 * 4ch duplication
1566 */
a5ce8890 1567#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1da177e4 1568
208a1b4c 1569static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1570{
208a1b4c 1571 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1572 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1573 return 0;
1574}
1575
208a1b4c 1576static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1577{
208a1b4c 1578 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1579 int change;
1580 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1581 if (change)
1582 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1583 return change;
1584}
1585
f3b827e0 1586static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
4d20bb1d
RY		 1587 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1588 .name = "4ch Duplication",
1589 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1590 .info = snd_ymfpci_info_dup4ch,
1591 .get = snd_ymfpci_get_dup4ch,
1592 .put = snd_ymfpci_put_dup4ch,
1593};
1da177e4 1594
b4e5e707 1595static const struct snd_kcontrol_new snd_ymfpci_controls[] = {
177a7cdb
CL		 1596{
1597 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1598 .name = "Wave Playback Volume",
1599 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1600 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1601 .info = snd_ymfpci_info_double,
1602 .get = snd_ymfpci_get_double,
1603 .put = snd_ymfpci_put_nativedacvol,
1604 .private_value = YDSXGR_NATIVEDACOUTVOL,
1605 .tlv = { .p = db_scale_native },
1606},
1da177e4
LT		 1607YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1608YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1609YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1610YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1611YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1612YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1613YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
89f3325a 1614YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1da177e4
LT		 1615YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1616YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1617YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1618YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
d602c885
GM		 1619YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1620YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1621YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1da177e4
LT		 1622};
1623
1624
1625/*
1626 * GPIO
1627 */
1628
208a1b4c 1629static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1da177e4
LT		 1630{
1631 u16 reg, mode;
1632 unsigned long flags;
1633
1634 spin_lock_irqsave(&chip->reg_lock, flags);
1635 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1636 reg &= ~(1 << (pin + 8));
1637 reg |= (1 << pin);
1638 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1639 /* set the level mode for input line */
1640 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1641 mode &= ~(3 << (pin * 2));
1642 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1643 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1644 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1645 spin_unlock_irqrestore(&chip->reg_lock, flags);
1646 return (mode >> pin) & 1;
1647}
1648
208a1b4c 1649static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1da177e4
LT		 1650{
1651 u16 reg;
1652 unsigned long flags;
1653
1654 spin_lock_irqsave(&chip->reg_lock, flags);
1655 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1656 reg &= ~(1 << pin);
1657 reg &= ~(1 << (pin + 8));
1658 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1659 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1660 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1661 spin_unlock_irqrestore(&chip->reg_lock, flags);
1662
1663 return 0;
1664}
1665
a5ce8890 1666#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1da177e4 1667
208a1b4c 1668static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1669{
208a1b4c 1670 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1671 int pin = (int)kcontrol->private_value;
1672 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1673 return 0;
1674}
1675
208a1b4c 1676static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1677{
208a1b4c 1678 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1679 int pin = (int)kcontrol->private_value;
1680
1681 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1682 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1683 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1684 return 1;
1685 }
1686 return 0;
1687}
1688
f3b827e0 1689static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1da177e4
LT		 1690 .name = "Shared Rear/Line-In Switch",
1691 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1692 .info = snd_ymfpci_gpio_sw_info,
1693 .get = snd_ymfpci_gpio_sw_get,
1694 .put = snd_ymfpci_gpio_sw_put,
1695 .private_value = 2,
1696};
1697
9bcf6551
CL		 1698/*
1699 * PCM voice volume
1700 */
1701
208a1b4c
TI		 1702static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_info *uinfo)
9bcf6551
CL		 1704{
1705 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1706 uinfo->count = 2;
1707 uinfo->value.integer.min = 0;
1708 uinfo->value.integer.max = 0x8000;
1709 return 0;
1710}
1711
208a1b4c
TI		 1712static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1713 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1714{
208a1b4c 1715 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551
CL		 1716 unsigned int subs = kcontrol->id.subdevice;
1717
1718 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1719 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1720 return 0;
1721}
1722
208a1b4c
TI		 1723static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1724 struct snd_ctl_elem_value *ucontrol)
9bcf6551 1725{
208a1b4c 1726 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
9bcf6551 1727 unsigned int subs = kcontrol->id.subdevice;
208a1b4c 1728 struct snd_pcm_substream *substream;
9bcf6551
CL		 1729 unsigned long flags;
1730
1731 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1732 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1733 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1734 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
4e98d6a7
TI		 1735 if (chip->pcm_mixer[subs].left > 0x8000)
1736 chip->pcm_mixer[subs].left = 0x8000;
1737 if (chip->pcm_mixer[subs].right > 0x8000)
1738 chip->pcm_mixer[subs].right = 0x8000;
9bcf6551 1739
208a1b4c 1740 substream = (struct snd_pcm_substream *)kcontrol->private_value;
9bcf6551
CL		 1741 spin_lock_irqsave(&chip->voice_lock, flags);
1742 if (substream->runtime && substream->runtime->private_data) {
208a1b4c 1743 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
9ed1261e
TK		 1744 if (!ypcm->use_441_slot)
1745 ypcm->update_pcm_vol = 2;
9bcf6551
CL		 1746 }
1747 spin_unlock_irqrestore(&chip->voice_lock, flags);
1748 return 1;
1749 }
1750 return 0;
1751}
1752
f3b827e0 1753static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
9bcf6551
CL		 1754 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1755 .name = "PCM Playback Volume",
1756 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1757 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1758 .info = snd_ymfpci_pcm_vol_info,
1759 .get = snd_ymfpci_pcm_vol_get,
1760 .put = snd_ymfpci_pcm_vol_put,
1761};
1762
1da177e4
LT		 1763
1764/*
1765 * Mixer routines
1766 */
1767
208a1b4c 1768static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1769{
208a1b4c 1770 struct snd_ymfpci *chip = bus->private_data;
1da177e4
LT		 1771 chip->ac97_bus = NULL;
1772}
1773
208a1b4c 1774static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1775{
208a1b4c 1776 struct snd_ymfpci *chip = ac97->private_data;
1da177e4
LT		 1777 chip->ac97 = NULL;
1778}
1779
e23e7a14 1780int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1da177e4 1781{
208a1b4c
TI		 1782 struct snd_ac97_template ac97;
1783 struct snd_kcontrol *kctl;
1784 struct snd_pcm_substream *substream;
1da177e4
LT		 1785 unsigned int idx;
1786 int err;
51055da5 1787 static const struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1788 .write = snd_ymfpci_codec_write,
1789 .read = snd_ymfpci_codec_read,
1790 };
1791
e7daaeed
TI		 1792 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1793 if (err < 0)
1da177e4
LT		 1794 return err;
1795 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1796 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1797
1798 memset(&ac97, 0, sizeof(ac97));
1799 ac97.private_data = chip;
1800 ac97.private_free = snd_ymfpci_mixer_free_ac97;
e7daaeed
TI		 1801 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1802 if (err < 0)
1da177e4
LT		 1803 return err;
1804
1805 /* to be sure */
1806 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1807 AC97_EA_VRA|AC97_EA_VRM, 0);
1808
1809 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
e7daaeed
TI		 1810 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip));
1811 if (err < 0)
1da177e4
LT		 1812 return err;
1813 }
4d20bb1d
RY		 1814 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1815 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1816 err = snd_ctl_add(chip->card, kctl);
1817 if (err < 0)
1818 return err;
1819 }
1da177e4
LT		 1820
1821 /* add S/PDIF control */
da3cec35
TI		 1822 if (snd_BUG_ON(!chip->pcm_spdif))
1823 return -ENXIO;
e7daaeed
TI		 1824 kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip);
1825 err = snd_ctl_add(chip->card, kctl);
1826 if (err < 0)
1da177e4
LT		 1827 return err;
1828 kctl->id.device = chip->pcm_spdif->device;
e7daaeed
TI		 1829 kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip);
1830 err = snd_ctl_add(chip->card, kctl);
1831 if (err < 0)
1da177e4
LT		 1832 return err;
1833 kctl->id.device = chip->pcm_spdif->device;
e7daaeed
TI		 1834 kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip);
1835 err = snd_ctl_add(chip->card, kctl);
1836 if (err < 0)
1da177e4
LT		 1837 return err;
1838 kctl->id.device = chip->pcm_spdif->device;
1839 chip->spdif_pcm_ctl = kctl;
1840
1841 /* direct recording source */
e7daaeed
TI		 1842 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754) {
1843 kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip);
1844 err = snd_ctl_add(chip->card, kctl);
1845 if (err < 0)
1846 return err;
1847 }
1da177e4
LT		 1848
1849 /*
1850 * shared rear/line-in
1851 */
1852 if (rear_switch) {
e7daaeed
TI		 1853 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip));
1854 if (err < 0)
1da177e4
LT		 1855 return err;
1856 }
1857
9bcf6551
CL		 1858 /* per-voice volume */
1859 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1860 for (idx = 0; idx < 32; ++idx) {
1861 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1862 if (!kctl)
1863 return -ENOMEM;
1864 kctl->id.device = chip->pcm->device;
1865 kctl->id.subdevice = idx;
1866 kctl->private_value = (unsigned long)substream;
e7daaeed
TI		 1867 err = snd_ctl_add(chip->card, kctl);
1868 if (err < 0)
9bcf6551
CL		 1869 return err;
1870 chip->pcm_mixer[idx].left = 0x8000;
1871 chip->pcm_mixer[idx].right = 0x8000;
1872 chip->pcm_mixer[idx].ctl = kctl;
1873 substream = substream->next;
1874 }
1875
1da177e4
LT		 1876 return 0;
1877}
1878
1879
1880/*
1881 * timer
1882 */
1883
208a1b4c 1884static int snd_ymfpci_timer_start(struct snd_timer *timer)
1da177e4 1885{
208a1b4c 1886 struct snd_ymfpci *chip;
1da177e4
LT		 1887 unsigned long flags;
1888 unsigned int count;
1889
1890 chip = snd_timer_chip(timer);
1da177e4 1891 spin_lock_irqsave(&chip->reg_lock, flags);
6e2efaac
CL		 1892 if (timer->sticks > 1) {
1893 chip->timer_ticks = timer->sticks;
1894 count = timer->sticks - 1;
1895 } else {
1896 /*
1897 * Divisor 1 is not allowed; fake it by using divisor 2 and
1898 * counting two ticks for each interrupt.
1899 */
1900 chip->timer_ticks = 2;
1901 count = 2 - 1;
1902 }
1da177e4
LT		 1903 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1904 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1905 spin_unlock_irqrestore(&chip->reg_lock, flags);
1906 return 0;
1907}
1908
208a1b4c 1909static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1da177e4 1910{
208a1b4c 1911 struct snd_ymfpci *chip;
1da177e4
LT		 1912 unsigned long flags;
1913
1914 chip = snd_timer_chip(timer);
1915 spin_lock_irqsave(&chip->reg_lock, flags);
1916 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1917 spin_unlock_irqrestore(&chip->reg_lock, flags);
1918 return 0;
1919}
1920
208a1b4c 1921static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1da177e4
LT		 1922 unsigned long *num, unsigned long *den)
1923{
1924 *num = 1;
6e2efaac 1925 *den = 96000;
1da177e4
LT		 1926 return 0;
1927}
1928
5ff16a3d 1929static const struct snd_timer_hardware snd_ymfpci_timer_hw = {
1da177e4 1930 .flags = SNDRV_TIMER_HW_AUTO,
6e2efaac
CL		 1931 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1932 .ticks = 0x10000,
1da177e4
LT		 1933 .start = snd_ymfpci_timer_start,
1934 .stop = snd_ymfpci_timer_stop,
1935 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1936};
1937
e23e7a14 1938int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1da177e4 1939{
208a1b4c
TI		 1940 struct snd_timer *timer = NULL;
1941 struct snd_timer_id tid;
1da177e4
LT		 1942 int err;
1943
1944 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1945 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1946 tid.card = chip->card->number;
1947 tid.device = device;
1948 tid.subdevice = 0;
e7daaeed
TI		 1949 err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer);
1950 if (err >= 0) {
1da177e4
LT		 1951 strcpy(timer->name, "YMFPCI timer");
1952 timer->private_data = chip;
1953 timer->hw = snd_ymfpci_timer_hw;
1954 }
1955 chip->timer = timer;
1956 return err;
1957}
1958
1959
1960/*
1961 * proc interface
1962 */
1963
208a1b4c
TI		 1964static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1965 struct snd_info_buffer *buffer)
1da177e4 1966{
208a1b4c 1967 struct snd_ymfpci *chip = entry->private_data;
1da177e4
LT		 1968 int i;
1969
1970 snd_iprintf(buffer, "YMFPCI\n\n");
1971 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1972 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1973}
1974
e23e7a14 1975static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1da177e4 1976{
47f2769b 1977 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
1da177e4
LT		 1978}
1979
1980/*
1981 * initialization routines
1982 */
1983
1984static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1985{
1986 u8 cmd;
1987
1988 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1989#if 0 // force to reset
1990 if (cmd & 0x03) {
1991#endif
1992 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1993 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1994 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1995 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1996 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1997#if 0
1998 }
1999#endif
2000}
2001
208a1b4c 2002static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 2003{
2004 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2005}
2006
208a1b4c 2007static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
1da177e4
LT		 2008{
2009 u32 val;
2010 int timeout = 1000;
2011
2012 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2013 if (val)
2014 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2015 while (timeout-- > 0) {
2016 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2017 if ((val & 0x00000002) == 0)
2018 break;
2019 }
2020}
2021
102fa906
CL		 2022static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2023{
2024 int err, is_1e;
2025 const char *name;
2026
2027 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2028 &chip->pci->dev);
2029 if (err >= 0) {
b82a82d0 2030 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
6436bcf6
TI		 2031 dev_err(chip->card->dev,
2032 "DSP microcode has wrong size\n");
102fa906
CL		 2033 err = -EINVAL;
2034 }
2035 }
b7dd2b34 2036 if (err < 0)
102fa906 2037 return err;
102fa906
CL		 2038 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2039 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2040 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2041 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2042 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2043 err = request_firmware(&chip->controller_microcode, name,
2044 &chip->pci->dev);
2045 if (err >= 0) {
b82a82d0 2046 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
6436bcf6
TI		 2047 dev_err(chip->card->dev,
2048 "controller microcode has wrong size\n");
102fa906
CL		 2049 err = -EINVAL;
2050 }
2051 }
b7dd2b34 2052 if (err < 0)
102fa906 2053 return err;
102fa906
CL		 2054 return 0;
2055}
7e0af29d
CL		 2056
2057MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2058MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2059MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2060
208a1b4c 2061static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
1da177e4
LT		 2062{
2063 int i;
2064 u16 ctrl;
b82a82d0 2065 const __le32 *inst;
1da177e4
LT		 2066
2067 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2068 snd_ymfpci_disable_dsp(chip);
2069 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2070 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2071 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2072 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2073 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2074 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2075 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2076 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2077 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2078
2079 /* setup DSP instruction code */
b82a82d0 2080 inst = (const __le32 *)chip->dsp_microcode->data;
1da177e4 2081 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
b82a82d0
DW		 2082 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2083 le32_to_cpu(inst[i]));
1da177e4
LT		 2084
2085 /* setup control instruction code */
b82a82d0 2086 inst = (const __le32 *)chip->controller_microcode->data;
1da177e4 2087 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
b82a82d0
DW		 2088 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2089 le32_to_cpu(inst[i]));
1da177e4
LT		 2090
2091 snd_ymfpci_enable_dsp(chip);
2092}
2093
e23e7a14 2094static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
1da177e4
LT		 2095{
2096 long size, playback_ctrl_size;
2097 int voice, bank, reg;
2098 u8 *ptr;
2099 dma_addr_t ptr_addr;
2100
2101 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2102 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2103 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2104 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2105 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2106
7ab39926
CL		 2107 size = ALIGN(playback_ctrl_size, 0x100) +
2108 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2109 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2110 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
1da177e4
LT		 2111 chip->work_size;
2112 /* work_ptr must be aligned to 256 bytes, but it's already
2113 covered with the kernel page allocation mechanism */
c6e6bb5e
TI		 2114 chip->work_ptr = snd_devm_alloc_pages(&chip->pci->dev,
2115 SNDRV_DMA_TYPE_DEV, size);
2116 if (!chip->work_ptr)
1da177e4 2117 return -ENOMEM;
c6e6bb5e
TI		 2118 ptr = chip->work_ptr->area;
2119 ptr_addr = chip->work_ptr->addr;
1da177e4
LT		 2120 memset(ptr, 0, size); /* for sure */
2121
2122 chip->bank_base_playback = ptr;
2123 chip->bank_base_playback_addr = ptr_addr;
d3c63763 2124 chip->ctrl_playback = (__le32 *)ptr;
1da177e4 2125 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
7ab39926
CL		 2126 ptr += ALIGN(playback_ctrl_size, 0x100);
2127 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
1da177e4
LT		 2128 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2129 chip->voices[voice].number = voice;
208a1b4c 2130 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2131 chip->voices[voice].bank_addr = ptr_addr;
2132 for (bank = 0; bank < 2; bank++) {
208a1b4c 2133 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
1da177e4
LT		 2134 ptr += chip->bank_size_playback;
2135 ptr_addr += chip->bank_size_playback;
2136 }
2137 }
7ab39926
CL		 2138 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2139 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2140 chip->bank_base_capture = ptr;
2141 chip->bank_base_capture_addr = ptr_addr;
2142 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2143 for (bank = 0; bank < 2; bank++) {
208a1b4c 2144 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
1da177e4
LT		 2145 ptr += chip->bank_size_capture;
2146 ptr_addr += chip->bank_size_capture;
2147 }
7ab39926
CL		 2148 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2149 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2150 chip->bank_base_effect = ptr;
2151 chip->bank_base_effect_addr = ptr_addr;
2152 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2153 for (bank = 0; bank < 2; bank++) {
208a1b4c 2154 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
1da177e4
LT		 2155 ptr += chip->bank_size_effect;
2156 ptr_addr += chip->bank_size_effect;
2157 }
7ab39926
CL		 2158 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2159 ptr_addr = ALIGN(ptr_addr, 0x100);
1da177e4
LT		 2160 chip->work_base = ptr;
2161 chip->work_base_addr = ptr_addr;
2162
6be2e752 2163 snd_BUG_ON(ptr + PAGE_ALIGN(chip->work_size) !=
c6e6bb5e 2164 chip->work_ptr->area + chip->work_ptr->bytes);
1da177e4
LT		 2165
2166 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2167 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2168 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2169 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2170 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2171
2172 /* S/PDIF output initialization */
2173 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2174 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2175 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2176
2177 /* S/PDIF input initialization */
2178 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2179
2180 /* digital mixer setup */
2181 for (reg = 0x80; reg < 0xc0; reg += 4)
2182 snd_ymfpci_writel(chip, reg, 0);
2183 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
4a3b6983 2184 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
1da177e4
LT		 2185 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2186 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2187 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2188 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2189 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2190 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2191
2192 return 0;
2193}
2194
c6e6bb5e 2195static void snd_ymfpci_free(struct snd_card *card)
1da177e4 2196{
c6e6bb5e 2197 struct snd_ymfpci *chip = card->private_data;
1da177e4
LT		 2198 u16 ctrl;
2199
c6e6bb5e
TI		 2200 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2201 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2202 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2203 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2204 snd_ymfpci_disable_dsp(chip);
2205 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2206 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2207 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2208 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2209 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2210 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2211 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1da177e4
LT		 2212
2213 snd_ymfpci_ac3_done(chip);
2214
1da177e4 2215 snd_ymfpci_free_gameport(chip);
1da177e4 2216
2fa98a42 2217 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, chip->old_legacy_ctrl);
1da177e4 2218
b7dd2b34
TI		 2219 release_firmware(chip->dsp_microcode);
2220 release_firmware(chip->controller_microcode);
1da177e4
LT		 2221}
2222
68cb2b55 2223static int snd_ymfpci_suspend(struct device *dev)
1da177e4 2224{
68cb2b55 2225 struct snd_card *card = dev_get_drvdata(dev);
ded46235 2226 struct snd_ymfpci *chip = card->private_data;
4fa4a147
TS		 2227 unsigned int i, legacy_reg_count = DSXG_PCI_NUM_SAVED_LEGACY_REGS;
2228
2229 if (chip->pci->device >= 0x0010) /* YMF 744/754 */
2230 legacy_reg_count = DSXG_PCI_NUM_SAVED_REGS;
2231
ded46235 2232 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2233 snd_ac97_suspend(chip->ac97);
39fef76c 2234
1da177e4
LT		 2235 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2236 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
39fef76c 2237
1da177e4 2238 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
39fef76c 2239
4fa4a147 2240 for (i = 0; i < legacy_reg_count; i++)
39fef76c
TS		 2241 pci_read_config_word(chip->pci, pci_saved_regs_index[i],
2242 chip->saved_dsxg_pci_regs + i);
2243
1da177e4 2244 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
4a3b6983 2245 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
1da177e4 2246 snd_ymfpci_disable_dsp(chip);
1da177e4
LT		 2247 return 0;
2248}
2249
68cb2b55 2250static int snd_ymfpci_resume(struct device *dev)
1da177e4 2251{
68cb2b55
TI		 2252 struct pci_dev *pci = to_pci_dev(dev);
2253 struct snd_card *card = dev_get_drvdata(dev);
ded46235 2254 struct snd_ymfpci *chip = card->private_data;
4fa4a147
TS		 2255 unsigned int i, legacy_reg_count = DSXG_PCI_NUM_SAVED_LEGACY_REGS;
2256
2257 if (chip->pci->device >= 0x0010) /* YMF 744/754 */
2258 legacy_reg_count = DSXG_PCI_NUM_SAVED_REGS;
1da177e4 2259
ded46235 2260 snd_ymfpci_aclink_reset(pci);
1da177e4
LT		 2261 snd_ymfpci_codec_ready(chip, 0);
2262 snd_ymfpci_download_image(chip);
2263 udelay(100);
2264
2265 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2266 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2267
2268 snd_ac97_resume(chip->ac97);
2269
4fa4a147 2270 for (i = 0; i < legacy_reg_count; i++)
39fef76c
TS		 2271 pci_write_config_word(chip->pci, pci_saved_regs_index[i],
2272 chip->saved_dsxg_pci_regs[i]);
28aa165c 2273
1da177e4
LT		 2274 /* start hw again */
2275 if (chip->start_count > 0) {
2276 spin_lock_irq(&chip->reg_lock);
2277 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2278 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2279 spin_unlock_irq(&chip->reg_lock);
2280 }
ded46235 2281 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2282 return 0;
2283}
68cb2b55 2284
081364d7 2285DEFINE_SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
1da177e4 2286
e23e7a14
BP		 2287int snd_ymfpci_create(struct snd_card *card,
2288 struct pci_dev *pci,
a8752868 2289 u16 old_legacy_ctrl)
1da177e4 2290{
c6e6bb5e 2291 struct snd_ymfpci *chip = card->private_data;
1da177e4 2292 int err;
1da177e4 2293
1da177e4 2294 /* enable PCI device */
c6e6bb5e 2295 err = pcim_enable_device(pci);
e7daaeed 2296 if (err < 0)
1da177e4
LT		 2297 return err;
2298
1da177e4
LT		 2299 chip->old_legacy_ctrl = old_legacy_ctrl;
2300 spin_lock_init(&chip->reg_lock);
2301 spin_lock_init(&chip->voice_lock);
2302 init_waitqueue_head(&chip->interrupt_sleep);
2303 atomic_set(&chip->interrupt_sleep_count, 0);
2304 chip->card = card;
2305 chip->pci = pci;
2306 chip->irq = -1;
2307 chip->device_id = pci->device;
44c10138 2308 chip->rev = pci->revision;
1da177e4 2309
c6e6bb5e
TI		 2310 err = pci_request_regions(pci, "YMFPCI");
2311 if (err < 0)
2312 return err;
2313
2314 chip->reg_area_phys = pci_resource_start(pci, 0);
2315 chip->reg_area_virt = devm_ioremap(&pci->dev, chip->reg_area_phys, 0x8000);
2316 if (!chip->reg_area_virt) {
6436bcf6
TI		 2317 dev_err(chip->card->dev,
2318 "unable to grab memory region 0x%lx-0x%lx\n",
2319 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
c6e6bb5e 2320 return -EBUSY;
1da177e4 2321 }
c6e6bb5e
TI		 2322 pci_set_master(pci);
2323 chip->src441_used = -1;
2324
2325 if (devm_request_irq(&pci->dev, pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
934c2b6d 2326 KBUILD_MODNAME, chip)) {
6436bcf6 2327 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
c6e6bb5e 2328 return -EBUSY;
1da177e4
LT		 2329 }
2330 chip->irq = pci->irq;
b7a03a1e 2331 card->sync_irq = chip->irq;
c6e6bb5e 2332 card->private_free = snd_ymfpci_free;
1da177e4
LT		 2333
2334 snd_ymfpci_aclink_reset(pci);
c6e6bb5e
TI		 2335 if (snd_ymfpci_codec_ready(chip, 0) < 0)
2336 return -EIO;
1da177e4 2337
102fa906
CL		 2338 err = snd_ymfpci_request_firmware(chip);
2339 if (err < 0) {
6436bcf6 2340 dev_err(chip->card->dev, "firmware request failed: %d\n", err);
c6e6bb5e 2341 return err;
102fa906 2342 }
1da177e4
LT		 2343 snd_ymfpci_download_image(chip);
2344
2345 udelay(100); /* seems we need a delay after downloading image.. */
2346
c6e6bb5e
TI		 2347 if (snd_ymfpci_memalloc(chip) < 0)
2348 return -EIO;
1da177e4 2349
ba2186e4
ME		 2350 err = snd_ymfpci_ac3_init(chip);
2351 if (err < 0)
c6e6bb5e 2352 return err;
1da177e4 2353
1da177e4
LT		 2354 snd_ymfpci_proc_init(card, chip);
2355
1da177e4
LT		 2356 return 0;
2357}
Linux 6.x block layer and io_uring tree(s)