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ALSA: trident: Support PCM sync_stop
[linux-block.git] / sound / pci / via82xx.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * ALSA driver for VIA VT82xx (South Bridge)
4 *
5 * VT82C686A/B/C, VT8233A/C, VT8235
6 *
c1017a4c 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 8 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
9 * 2002 Takashi Iwai <tiwai@suse.de>
1da177e4
LT		 10 */
11
12/*
13 * Changes:
14 *
15 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
16 * - use the DSX channels for the first pcm playback.
17 * (on VIA8233, 8233C and 8235 only)
18 * this will allow you play simultaneously up to 4 streams.
19 * multi-channel playback is assigned to the second device
20 * on these chips.
21 * - support the secondary capture (on VIA8233/C,8235)
22 * - SPDIF support
23 * the DSX3 channel can be used for SPDIF output.
24 * on VIA8233A, this channel is assigned to the second pcm
25 * playback.
26 * the card config of alsa-lib will assign the correct
27 * device for applications.
28 * - clean up the code, separate low-level initialization
29 * routines for each chipset.
4f550df5
KW		 30 *
31 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
32 * - Optimize position calculation for the 823x chips.
1da177e4
LT		 33 */
34
6cbbfe1c 35#include <linux/io.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/interrupt.h>
38#include <linux/init.h>
39#include <linux/pci.h>
40#include <linux/slab.h>
41#include <linux/gameport.h>
65a77217 42#include <linux/module.h>
1da177e4
LT		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/info.h>
7058c042 47#include <sound/tlv.h>
1da177e4
LT		 48#include <sound/ac97_codec.h>
49#include <sound/mpu401.h>
50#include <sound/initval.h>
51
52#if 0
53#define POINTER_DEBUG
54#endif
55
c1017a4c 56MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 57MODULE_DESCRIPTION("VIA VT82xx audio");
58MODULE_LICENSE("GPL");
59MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
60
b2fac073 61#if IS_REACHABLE(CONFIG_GAMEPORT)
1da177e4
LT		 62#define SUPPORT_JOYSTICK 1
63#endif
64
b7fe4622
CL		 65static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
66static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
67static long mpu_port;
1da177e4 68#ifdef SUPPORT_JOYSTICK
a67ff6a5 69static bool joystick;
1da177e4 70#endif
b7fe4622
CL		 71static int ac97_clock = 48000;
72static char *ac97_quirk;
73static int dxs_support;
395c61d1 74static int dxs_init_volume = 31;
115551d9 75static int nodelay;
1da177e4 76
b7fe4622 77module_param(index, int, 0444);
1da177e4 78MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 79module_param(id, charp, 0444);
1da177e4 80MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
6192c41f 81module_param_hw(mpu_port, long, ioport, 0444);
1da177e4
LT		 82MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
83#ifdef SUPPORT_JOYSTICK
b7fe4622 84module_param(joystick, bool, 0444);
1da177e4
LT		 85MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
86#endif
b7fe4622 87module_param(ac97_clock, int, 0444);
1da177e4 88MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 89module_param(ac97_quirk, charp, 0444);
1da177e4 90MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 91module_param(dxs_support, int, 0444);
2d7eb7cb 92MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
395c61d1
CL		 93module_param(dxs_init_volume, int, 0644);
94MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
115551d9
SA		 95module_param(nodelay, int, 0444);
96MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 97
2b3e584b 98/* just for backward compatibility */
a67ff6a5 99static bool enable;
698444f3 100module_param(enable, bool, 0444);
2b3e584b 101
1da177e4 102
1da177e4
LT		 103/* revision numbers for via686 */
104#define VIA_REV_686_A 0x10
105#define VIA_REV_686_B 0x11
106#define VIA_REV_686_C 0x12
107#define VIA_REV_686_D 0x13
108#define VIA_REV_686_E 0x14
109#define VIA_REV_686_H 0x20
110
111/* revision numbers for via8233 */
112#define VIA_REV_PRE_8233 0x10 /* not in market */
113#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
114#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
115#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
116#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
117#define VIA_REV_8237 0x60
8263c65f 118#define VIA_REV_8251 0x70
1da177e4
LT		 119
120/*
121 * Direct registers
122 */
123
124#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
125#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
126
127/* common offsets */
128#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
129#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 130#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT		 131#define VIA_REG_STAT_PAUSED 0x40 /* RO */
132#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
133#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
134#define VIA_REG_STAT_EOL 0x02 /* RWC */
135#define VIA_REG_STAT_FLAG 0x01 /* RWC */
136#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
137#define VIA_REG_CTRL_START 0x80 /* WO */
138#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
139#define VIA_REG_CTRL_AUTOSTART 0x20
140#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
141#define VIA_REG_CTRL_INT_STOP 0x04
142#define VIA_REG_CTRL_INT_EOL 0x02
143#define VIA_REG_CTRL_INT_FLAG 0x01
144#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
145#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
146#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
147#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
148#define VIA_REG_TYPE_16BIT 0x20 /* RW */
149#define VIA_REG_TYPE_STEREO 0x10 /* RW */
150#define VIA_REG_TYPE_INT_LLINE 0x00
151#define VIA_REG_TYPE_INT_LSAMPLE 0x04
152#define VIA_REG_TYPE_INT_LESSONE 0x08
153#define VIA_REG_TYPE_INT_MASK 0x0c
154#define VIA_REG_TYPE_INT_EOL 0x02
155#define VIA_REG_TYPE_INT_FLAG 0x01
156#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
157#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
158#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
159#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
160#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
161#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
162#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
163
164#define DEFINE_VIA_REGSET(name,val) \
165enum {\
166 VIA_REG_##name##_STATUS = (val),\
167 VIA_REG_##name##_CONTROL = (val) + 0x01,\
168 VIA_REG_##name##_TYPE = (val) + 0x02,\
169 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
170 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
171 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
172 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
173}
174
175/* playback block */
176DEFINE_VIA_REGSET(PLAYBACK, 0x00);
177DEFINE_VIA_REGSET(CAPTURE, 0x10);
178DEFINE_VIA_REGSET(FM, 0x20);
179
180/* AC'97 */
181#define VIA_REG_AC97 0x80 /* dword */
182#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
183#define VIA_REG_AC97_CODEC_ID_SHIFT 30
184#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
185#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
186#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
187#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
188#define VIA_REG_AC97_BUSY (1<<24)
189#define VIA_REG_AC97_READ (1<<23)
190#define VIA_REG_AC97_CMD_SHIFT 16
191#define VIA_REG_AC97_CMD_MASK 0x7e
192#define VIA_REG_AC97_DATA_SHIFT 0
193#define VIA_REG_AC97_DATA_MASK 0xffff
194
195#define VIA_REG_SGD_SHADOW 0x84 /* dword */
196/* via686 */
197#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
198#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
199#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
200#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
201#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
202#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
203#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
204#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
205#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
206#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
207#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
208#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
209/* via8233 */
210#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
211#define VIA8233_REG_SGD_STAT_EOL (1<<1)
212#define VIA8233_REG_SGD_STAT_STOP (1<<2)
213#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
214#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
215#define VIA8233_REG_SGD_CHAN_SDX 0
216#define VIA8233_REG_SGD_CHAN_MULTI 4
217#define VIA8233_REG_SGD_CHAN_REC 6
218#define VIA8233_REG_SGD_CHAN_REC1 7
219
220#define VIA_REG_GPI_STATUS 0x88
221#define VIA_REG_GPI_INTR 0x8c
222
223/* multi-channel and capture registers for via8233 */
224DEFINE_VIA_REGSET(MULTPLAY, 0x40);
225DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
226
227/* via8233-specific registers */
228#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
229#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
230#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
231#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
232#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
233#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
234#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
235#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
236
237#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
238
239#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
240#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
241#define VIA_REG_CAPTURE_CHANNEL_LINE 0
242#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
243
244#define VIA_TBL_BIT_FLAG 0x40000000
245#define VIA_TBL_BIT_EOL 0x80000000
246
247/* pci space */
248#define VIA_ACLINK_STAT 0x40
249#define VIA_ACLINK_C11_READY 0x20
250#define VIA_ACLINK_C10_READY 0x10
251#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
252#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
253#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
254#define VIA_ACLINK_CTRL 0x41
255#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
256#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
257#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
258#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
259#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
260#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
261#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
262#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
263#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
264 VIA_ACLINK_CTRL_RESET|\
265 VIA_ACLINK_CTRL_PCM|\
266 VIA_ACLINK_CTRL_VRA)
267#define VIA_FUNC_ENABLE 0x42
268#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
269#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
270#define VIA_FUNC_RX2C_WRITE 0x20
271#define VIA_FUNC_SB_FIFO_EMPTY 0x10
272#define VIA_FUNC_ENABLE_GAME 0x08
273#define VIA_FUNC_ENABLE_FM 0x04
274#define VIA_FUNC_ENABLE_MIDI 0x02
275#define VIA_FUNC_ENABLE_SB 0x01
276#define VIA_PNP_CONTROL 0x43
277#define VIA_FM_NMI_CTRL 0x48
278#define VIA8233_VOLCHG_CTRL 0x48
279#define VIA8233_SPDIF_CTRL 0x49
280#define VIA8233_SPDIF_DX3 0x08
281#define VIA8233_SPDIF_SLOT_MASK 0x03
282#define VIA8233_SPDIF_SLOT_1011 0x00
283#define VIA8233_SPDIF_SLOT_34 0x01
284#define VIA8233_SPDIF_SLOT_78 0x02
285#define VIA8233_SPDIF_SLOT_69 0x03
286
287/*
288 */
289
290#define VIA_DXS_AUTO 0
291#define VIA_DXS_ENABLE 1
292#define VIA_DXS_DISABLE 2
293#define VIA_DXS_48K 3
294#define VIA_DXS_NO_VRA 4
2d7eb7cb 295#define VIA_DXS_SRC 5
1da177e4
LT		 296
297
1da177e4
LT		 298/*
299 * pcm stream
300 */
301
302struct snd_via_sg_table {
303 unsigned int offset;
304 unsigned int size;
305} ;
306
307#define VIA_TABLE_SIZE 255
5503600a 308#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 309
e437e3d7 310struct viadev {
1da177e4
LT		 311 unsigned int reg_offset;
312 unsigned long port;
313 int direction; /* playback = 0, capture = 1 */
e437e3d7 314 struct snd_pcm_substream *substream;
1da177e4
LT		 315 int running;
316 unsigned int tbl_entries; /* # descriptors */
317 struct snd_dma_buffer table;
318 struct snd_via_sg_table *idx_table;
319 /* for recovery from the unexpected pointer */
320 unsigned int lastpos;
321 unsigned int fragsize;
322 unsigned int bufsize;
323 unsigned int bufsize2;
4f550df5
KW		 324 int hwptr_done; /* processed frame position in the buffer */
325 int in_interrupt;
326 int shadow_shift;
1da177e4
LT		 327};
328
329
330enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
331enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
332
333#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
334
335struct via_rate_lock {
336 spinlock_t lock;
337 int rate;
338 int used;
339};
340
e437e3d7 341struct via82xx {
1da177e4
LT		 342 int irq;
343
344 unsigned long port;
345 struct resource *mpu_res;
346 int chip_type;
347 unsigned char revision;
348
349 unsigned char old_legacy;
350 unsigned char old_legacy_cfg;
c7561cd8 351#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 352 unsigned char legacy_saved;
353 unsigned char legacy_cfg_saved;
354 unsigned char spdif_ctrl_saved;
355 unsigned char capture_src_saved[2];
356 unsigned int mpu_port_saved;
357#endif
358
00f226d4
HM		 359 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
360 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT		 361
362 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
363
364 struct pci_dev *pci;
e437e3d7 365 struct snd_card *card;
1da177e4
LT		 366
367 unsigned int num_devs;
368 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 369 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT		 370 struct via_rate_lock rates[2]; /* playback and capture */
371 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
372 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 373 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT		 374 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
375
e437e3d7
TI		 376 struct snd_pcm *pcms[2];
377 struct snd_rawmidi *rmidi;
3d009413 378 struct snd_kcontrol *dxs_controls[4];
1da177e4 379
e437e3d7
TI		 380 struct snd_ac97_bus *ac97_bus;
381 struct snd_ac97 *ac97;
1da177e4
LT		 382 unsigned int ac97_clock;
383 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
384
385 spinlock_t reg_lock;
e437e3d7 386 struct snd_info_entry *proc_entry;
1da177e4
LT		 387
388#ifdef SUPPORT_JOYSTICK
389 struct gameport *gameport;
390#endif
391};
392
9baa3c34 393static const struct pci_device_id snd_via82xx_ids[] = {
4f550df5 394 /* 0x1106, 0x3058 */
28d27aae 395 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 396 /* 0x1106, 0x3059 */
28d27aae 397 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT		 398 { 0, }
399};
400
401MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
402
403/*
404 */
405
406/*
407 * allocate and initialize the descriptor buffers
408 * periods = number of periods
409 * fragsize = period size in bytes
410 */
e437e3d7 411static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 412 struct pci_dev *pci,
413 unsigned int periods, unsigned int fragsize)
414{
415 unsigned int i, idx, ofs, rest;
e437e3d7 416 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 417
418 if (dev->table.area == NULL) {
419 /* the start of each lists must be aligned to 8 bytes,
420 * but the kernel pages are much bigger, so we don't care
421 */
6974f8ad 422 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1da177e4
LT		 423 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
424 &dev->table) < 0)
425 return -ENOMEM;
426 }
427 if (! dev->idx_table) {
6da2ec56
KC		 428 dev->idx_table = kmalloc_array(VIA_TABLE_SIZE,
429 sizeof(*dev->idx_table),
430 GFP_KERNEL);
1da177e4
LT		 431 if (! dev->idx_table)
432 return -ENOMEM;
433 }
434
435 /* fill the entries */
436 idx = 0;
437 ofs = 0;
438 for (i = 0; i < periods; i++) {
439 rest = fragsize;
440 /* fill descriptors for a period.
441 * a period can be split to several descriptors if it's
442 * over page boundary.
443 */
444 do {
445 unsigned int r;
446 unsigned int flag;
77a23f26 447 unsigned int addr;
1da177e4
LT		 448
449 if (idx >= VIA_TABLE_SIZE) {
59d3acfa 450 dev_err(&pci->dev, "too much table size!\n");
1da177e4
LT		 451 return -EINVAL;
452 }
77a23f26
TI		 453 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
454 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr);
5503600a 455 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT		 456 rest -= r;
457 if (! rest) {
458 if (i == periods - 1)
459 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
460 else
461 flag = VIA_TBL_BIT_FLAG; /* period boundary */
462 } else
463 flag = 0; /* period continues to the next */
ee419653 464 /*
59d3acfa
TI		 465 dev_dbg(&pci->dev,
466 "tbl %d: at %d size %d (rest %d)\n",
467 idx, ofs, r, rest);
ee419653 468 */
1da177e4
LT		 469 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
470 dev->idx_table[idx].offset = ofs;
471 dev->idx_table[idx].size = r;
472 ofs += r;
473 idx++;
474 } while (rest > 0);
475 }
476 dev->tbl_entries = idx;
477 dev->bufsize = periods * fragsize;
478 dev->bufsize2 = dev->bufsize / 2;
479 dev->fragsize = fragsize;
480 return 0;
481}
482
483
e437e3d7 484static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 485 struct pci_dev *pci)
486{
487 if (dev->table.area) {
488 snd_dma_free_pages(&dev->table);
489 dev->table.area = NULL;
490 }
4d572776
JJ		 491 kfree(dev->idx_table);
492 dev->idx_table = NULL;
1da177e4
LT		 493 return 0;
494}
495
496/*
497 * Basic I/O
498 */
499
e437e3d7 500static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT		 501{
502 return inl(VIAREG(chip, AC97));
503}
504
e437e3d7 505static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT		 506{
507 outl(val, VIAREG(chip, AC97));
508}
509
e437e3d7 510static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT		 511{
512 unsigned int timeout = 1000; /* 1ms */
513 unsigned int val;
514
515 while (timeout-- > 0) {
516 udelay(1);
517 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
518 return val & 0xffff;
519 }
59d3acfa 520 dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
e437e3d7 521 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT		 522 return -EIO;
523}
524
e437e3d7 525static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT		 526{
527 unsigned int timeout = 1000; /* 1ms */
528 unsigned int val, val1;
529 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
530 VIA_REG_AC97_SECONDARY_VALID;
531
532 while (timeout-- > 0) {
533 val = snd_via82xx_codec_xread(chip);
534 val1 = val & (VIA_REG_AC97_BUSY | stat);
535 if (val1 == stat)
536 return val & 0xffff;
537 udelay(1);
538 }
539 return -EIO;
540}
541
e437e3d7 542static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 543{
e437e3d7 544 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 545 int err;
546 err = snd_via82xx_codec_ready(chip, ac97->num);
547 /* here we need to wait fairly for long time.. */
115551d9
SA		 548 if (!nodelay)
549 msleep(500);
1da177e4
LT		 550}
551
e437e3d7 552static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 553 unsigned short reg,
554 unsigned short val)
555{
e437e3d7 556 struct via82xx *chip = ac97->private_data;
1da177e4 557 unsigned int xval;
4f550df5 558
1da177e4
LT		 559 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
560 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
561 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
562 xval |= val << VIA_REG_AC97_DATA_SHIFT;
563 snd_via82xx_codec_xwrite(chip, xval);
564 snd_via82xx_codec_ready(chip, ac97->num);
565}
566
e437e3d7 567static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 568{
e437e3d7 569 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 570 unsigned int xval, val = 0xffff;
571 int again = 0;
572
573 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
574 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
575 xval |= VIA_REG_AC97_READ;
576 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
577 while (1) {
578 if (again++ > 3) {
59d3acfa
TI		 579 dev_err(chip->card->dev,
580 "codec_read: codec %i is not valid [0x%x]\n",
e437e3d7 581 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT		 582 return 0xffff;
583 }
584 snd_via82xx_codec_xwrite(chip, xval);
585 udelay (20);
586 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
587 udelay(25);
588 val = snd_via82xx_codec_xread(chip);
589 break;
590 }
591 }
592 return val & 0xffff;
593}
594
e437e3d7 595static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 596{
597 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
598 VIADEV_REG(viadev, OFFSET_CONTROL));
599 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
600 udelay(50);
601 /* disable interrupts */
602 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
603 /* clear interrupts */
604 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
605 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
606 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
607 viadev->lastpos = 0;
4f550df5 608 viadev->hwptr_done = 0;
1da177e4
LT		 609}
610
611
612/*
613 * Interrupt handler
4f550df5 614 * Used for 686 and 8233A
1da177e4 615 */
7d12e780 616static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 617{
e437e3d7 618 struct via82xx *chip = dev_id;
1da177e4
LT		 619 unsigned int status;
620 unsigned int i;
621
622 status = inl(VIAREG(chip, SGD_SHADOW));
623 if (! (status & chip->intr_mask)) {
624 if (chip->rmidi)
625 /* check mpu401 interrupt */
7d12e780 626 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 627 return IRQ_NONE;
628 }
629
630 /* check status for each stream */
631 spin_lock(&chip->reg_lock);
632 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 633 struct viadev *viadev = &chip->devs[i];
1da177e4 634 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 635 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT		 636 continue;
637 if (viadev->substream && viadev->running) {
4f550df5
KW		 638 /*
639 * Update hwptr_done based on 'period elapsed'
640 * interrupts. We'll use it, when the chip returns 0
641 * for OFFSET_CURR_COUNT.
642 */
643 if (c_status & VIA_REG_STAT_EOL)
644 viadev->hwptr_done = 0;
645 else
646 viadev->hwptr_done += viadev->fragsize;
647 viadev->in_interrupt = c_status;
1da177e4
LT		 648 spin_unlock(&chip->reg_lock);
649 snd_pcm_period_elapsed(viadev->substream);
650 spin_lock(&chip->reg_lock);
4f550df5 651 viadev->in_interrupt = 0;
1da177e4
LT		 652 }
653 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
654 }
655 spin_unlock(&chip->reg_lock);
656 return IRQ_HANDLED;
657}
658
4f550df5
KW		 659/*
660 * Interrupt handler
661 */
7d12e780 662static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 663{
e437e3d7 664 struct via82xx *chip = dev_id;
4f550df5
KW		 665 unsigned int status;
666 unsigned int i;
667 int irqreturn = 0;
668
669 /* check status for each stream */
670 spin_lock(&chip->reg_lock);
671 status = inl(VIAREG(chip, SGD_SHADOW));
672
673 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI		 674 struct viadev *viadev = &chip->devs[i];
675 struct snd_pcm_substream *substream;
4f550df5
KW		 676 unsigned char c_status, shadow_status;
677
678 shadow_status = (status >> viadev->shadow_shift) &
679 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
680 VIA_REG_STAT_FLAG);
681 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
682 if (!c_status)
683 continue;
684
685 substream = viadev->substream;
686 if (substream && viadev->running) {
687 /*
688 * Update hwptr_done based on 'period elapsed'
689 * interrupts. We'll use it, when the chip returns 0
690 * for OFFSET_CURR_COUNT.
691 */
692 if (c_status & VIA_REG_STAT_EOL)
693 viadev->hwptr_done = 0;
694 else
695 viadev->hwptr_done += viadev->fragsize;
696 viadev->in_interrupt = c_status;
697 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
698 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
699 spin_unlock(&chip->reg_lock);
700
701 snd_pcm_period_elapsed(substream);
702
703 spin_lock(&chip->reg_lock);
704 viadev->in_interrupt = 0;
705 }
706 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
707 irqreturn = 1;
708 }
709 spin_unlock(&chip->reg_lock);
710 return IRQ_RETVAL(irqreturn);
711}
712
1da177e4
LT		 713/*
714 * PCM callbacks
715 */
716
717/*
718 * trigger callback
719 */
e437e3d7 720static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 721{
e437e3d7
TI		 722 struct via82xx *chip = snd_pcm_substream_chip(substream);
723 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 724 unsigned char val;
725
726 if (chip->chip_type != TYPE_VIA686)
727 val = VIA_REG_CTRL_INT;
728 else
729 val = 0;
730 switch (cmd) {
731 case SNDRV_PCM_TRIGGER_START:
41e4845c 732 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 733 val |= VIA_REG_CTRL_START;
734 viadev->running = 1;
735 break;
736 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 737 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 738 val = VIA_REG_CTRL_TERMINATE;
739 viadev->running = 0;
740 break;
741 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
742 val |= VIA_REG_CTRL_PAUSE;
743 viadev->running = 0;
744 break;
745 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
746 viadev->running = 1;
747 break;
748 default:
749 return -EINVAL;
750 }
751 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
752 if (cmd == SNDRV_PCM_TRIGGER_STOP)
753 snd_via82xx_channel_reset(chip, viadev);
754 return 0;
755}
756
757
758/*
759 * pointer callbacks
760 */
761
762/*
763 * calculate the linear position at the given sg-buffer index and the rest count
764 */
765
766#define check_invalid_pos(viadev,pos) \
e437e3d7
TI		 767 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
768 viadev->lastpos < viadev->bufsize2))
1da177e4 769
59d3acfa
TI		 770static inline unsigned int calc_linear_pos(struct via82xx *chip,
771 struct viadev *viadev,
772 unsigned int idx,
e437e3d7 773 unsigned int count)
1da177e4
LT		 774{
775 unsigned int size, base, res;
776
777 size = viadev->idx_table[idx].size;
778 base = viadev->idx_table[idx].offset;
779 res = base + size - count;
4f550df5
KW		 780 if (res >= viadev->bufsize)
781 res -= viadev->bufsize;
1da177e4
LT		 782
783 /* check the validity of the calculated position */
784 if (size < count) {
59d3acfa
TI		 785 dev_dbg(chip->card->dev,
786 "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
e437e3d7 787 (int)size, (int)count);
1da177e4
LT		 788 res = viadev->lastpos;
789 } else {
790 if (! count) {
791 /* Some mobos report count = 0 on the DMA boundary,
792 * i.e. count = size indeed.
793 * Let's check whether this step is above the expected size.
794 */
795 int delta = res - viadev->lastpos;
796 if (delta < 0)
797 delta += viadev->bufsize;
798 if ((unsigned int)delta > viadev->fragsize)
799 res = base;
800 }
801 if (check_invalid_pos(viadev, res)) {
802#ifdef POINTER_DEBUG
59d3acfa
TI		 803 dev_dbg(chip->card->dev,
804 "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
805 idx, viadev->tbl_entries,
e437e3d7
TI		 806 viadev->lastpos, viadev->bufsize2,
807 viadev->idx_table[idx].offset,
808 viadev->idx_table[idx].size, count);
1da177e4
LT		 809#endif
810 /* count register returns full size when end of buffer is reached */
811 res = base + size;
812 if (check_invalid_pos(viadev, res)) {
59d3acfa
TI		 813 dev_dbg(chip->card->dev,
814 "invalid via82xx_cur_ptr (2), using last valid pointer\n");
1da177e4
LT		 815 res = viadev->lastpos;
816 }
817 }
818 }
1da177e4
LT		 819 return res;
820}
821
822/*
823 * get the current pointer on via686
824 */
e437e3d7 825static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 826{
e437e3d7
TI		 827 struct via82xx *chip = snd_pcm_substream_chip(substream);
828 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 829 unsigned int idx, ptr, count, res;
830
da3cec35
TI		 831 if (snd_BUG_ON(!viadev->tbl_entries))
832 return 0;
1da177e4
LT		 833 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
834 return 0;
835
836 spin_lock(&chip->reg_lock);
837 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
838 /* The via686a does not have the current index register,
839 * so we need to calculate the index from CURR_PTR.
840 */
841 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
842 if (ptr <= (unsigned int)viadev->table.addr)
843 idx = 0;
844 else /* CURR_PTR holds the address + 8 */
845 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
59d3acfa 846 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 847 viadev->lastpos = res; /* remember the last position */
1da177e4
LT		 848 spin_unlock(&chip->reg_lock);
849
850 return bytes_to_frames(substream->runtime, res);
851}
852
853/*
854 * get the current pointer on via823x
855 */
e437e3d7 856static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 857{
e437e3d7
TI		 858 struct via82xx *chip = snd_pcm_substream_chip(substream);
859 struct viadev *viadev = substream->runtime->private_data;
1da177e4 860 unsigned int idx, count, res;
4f550df5 861 int status;
1da177e4 862
da3cec35
TI		 863 if (snd_BUG_ON(!viadev->tbl_entries))
864 return 0;
4f550df5 865
1da177e4 866 spin_lock(&chip->reg_lock);
4f550df5
KW		 867 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
868 status = viadev->in_interrupt;
869 if (!status)
870 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
871
c6cc0e3b
BJ		 872 /* An apparent bug in the 8251 is worked around by sending a
873 * REG_CTRL_START. */
874 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
875 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
876
4f550df5 877 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ		 878 res = 0;
879 goto unlock;
4f550df5
KW		 880 }
881 if (count & 0xffffff) {
882 idx = count >> 24;
883 if (idx >= viadev->tbl_entries) {
1da177e4 884#ifdef POINTER_DEBUG
59d3acfa
TI		 885 dev_dbg(chip->card->dev,
886 "fail: invalid idx = %i/%i\n", idx,
e437e3d7 887 viadev->tbl_entries);
1da177e4 888#endif
4f550df5
KW		 889 res = viadev->lastpos;
890 } else {
891 count &= 0xffffff;
59d3acfa 892 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 893 }
1da177e4 894 } else {
4f550df5
KW		 895 res = viadev->hwptr_done;
896 if (!viadev->in_interrupt) {
897 if (status & VIA_REG_STAT_EOL) {
898 res = 0;
899 } else
900 if (status & VIA_REG_STAT_FLAG) {
901 res += viadev->fragsize;
902 }
903 }
904 }
905unlock:
906 viadev->lastpos = res;
1da177e4
LT		 907 spin_unlock(&chip->reg_lock);
908
909 return bytes_to_frames(substream->runtime, res);
910}
911
912
913/*
914 * hw_params callback:
915 * allocate the buffer and build up the buffer description table
916 */
e437e3d7
TI		 917static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
918 struct snd_pcm_hw_params *hw_params)
1da177e4 919{
e437e3d7
TI		 920 struct via82xx *chip = snd_pcm_substream_chip(substream);
921 struct viadev *viadev = substream->runtime->private_data;
1da177e4 922
8e2c7524
TI		 923 return build_via_table(viadev, substream, chip->pci,
924 params_periods(hw_params),
925 params_period_bytes(hw_params));
1da177e4
LT		 926}
927
928/*
929 * hw_free callback:
930 * clean up the buffer description table and release the buffer
931 */
e437e3d7 932static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 933{
e437e3d7
TI		 934 struct via82xx *chip = snd_pcm_substream_chip(substream);
935 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 936
937 clean_via_table(viadev, substream, chip->pci);
1da177e4
LT		 938 return 0;
939}
940
941
942/*
943 * set up the table pointer
944 */
e437e3d7 945static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 946{
947 snd_via82xx_codec_ready(chip, 0);
948 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
949 udelay(20);
950 snd_via82xx_codec_ready(chip, 0);
951}
952
953/*
954 * prepare callback for playback and capture on via686
955 */
e437e3d7
TI		 956static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
957 struct snd_pcm_runtime *runtime)
1da177e4
LT		 958{
959 snd_via82xx_channel_reset(chip, viadev);
960 /* this must be set after channel_reset */
961 snd_via82xx_set_table_ptr(chip, viadev);
962 outb(VIA_REG_TYPE_AUTOSTART |
963 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
964 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
965 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
966 VIA_REG_TYPE_INT_EOL |
967 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
968}
969
e437e3d7 970static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 971{
e437e3d7
TI		 972 struct via82xx *chip = snd_pcm_substream_chip(substream);
973 struct viadev *viadev = substream->runtime->private_data;
974 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 975
976 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
977 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
978 via686_setup_format(chip, viadev, runtime);
979 return 0;
980}
981
e437e3d7 982static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 983{
e437e3d7
TI		 984 struct via82xx *chip = snd_pcm_substream_chip(substream);
985 struct viadev *viadev = substream->runtime->private_data;
986 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 987
988 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
989 via686_setup_format(chip, viadev, runtime);
990 return 0;
991}
992
993/*
994 * lock the current rate
995 */
996static int via_lock_rate(struct via_rate_lock *rec, int rate)
997{
998 int changed = 0;
999
1000 spin_lock_irq(&rec->lock);
1001 if (rec->rate != rate) {
1002 if (rec->rate && rec->used > 1) /* already set */
1003 changed = -EINVAL;
1004 else {
1005 rec->rate = rate;
1006 changed = 1;
1007 }
1008 }
1009 spin_unlock_irq(&rec->lock);
1010 return changed;
1011}
1012
1013/*
1014 * prepare callback for DSX playback on via823x
1015 */
e437e3d7 1016static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1017{
e437e3d7
TI		 1018 struct via82xx *chip = snd_pcm_substream_chip(substream);
1019 struct viadev *viadev = substream->runtime->private_data;
1020 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1021 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT		 1022 int rate_changed;
1023 u32 rbits;
1024
2d7eb7cb 1025 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1026 return rate_changed;
16d3f140 1027 if (rate_changed)
1da177e4
LT		 1028 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1029 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI		 1030 if (chip->spdif_on && viadev->reg_offset == 0x30)
1031 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1032
1da177e4
LT		 1033 if (runtime->rate == 48000)
1034 rbits = 0xfffff;
1035 else
e437e3d7
TI		 1036 rbits = (0x100000 / 48000) * runtime->rate +
1037 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1038 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT		 1039 snd_via82xx_channel_reset(chip, viadev);
1040 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI		 1041 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1042 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1043 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1044 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT		 1045 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1046 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1047 rbits | /* rate */
1048 0xff000000, /* STOP index is never reached */
1049 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1050 udelay(20);
1051 snd_via82xx_codec_ready(chip, 0);
1052 return 0;
1053}
1054
1055/*
1056 * prepare callback for multi-channel playback on via823x
1057 */
e437e3d7 1058static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1059{
e437e3d7
TI		 1060 struct via82xx *chip = snd_pcm_substream_chip(substream);
1061 struct viadev *viadev = substream->runtime->private_data;
1062 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1063 unsigned int slots;
1064 int fmt;
1065
1066 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1067 return -EINVAL;
1068 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1069 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1070 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1071 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1072 snd_via82xx_channel_reset(chip, viadev);
1073 snd_via82xx_set_table_ptr(chip, viadev);
1074
e437e3d7
TI		 1075 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1076 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT		 1077 fmt |= runtime->channels << 4;
1078 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1079#if 0
1080 if (chip->revision == VIA_REV_8233A)
1081 slots = 0;
1082 else
1083#endif
1084 {
1085 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1086 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1087 switch (runtime->channels) {
1088 case 1: slots = (1<<0) | (1<<4); break;
1089 case 2: slots = (1<<0) | (2<<4); break;
1090 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1091 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1092 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1093 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1094 default: slots = 0; break;
1095 }
1096 }
1097 /* STOP index is never reached */
1098 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1099 udelay(20);
1100 snd_via82xx_codec_ready(chip, 0);
1101 return 0;
1102}
1103
1104/*
1105 * prepare callback for capture on via823x
1106 */
e437e3d7 1107static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1108{
e437e3d7
TI		 1109 struct via82xx *chip = snd_pcm_substream_chip(substream);
1110 struct viadev *viadev = substream->runtime->private_data;
1111 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1112
1113 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1114 return -EINVAL;
1115 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1116 snd_via82xx_channel_reset(chip, viadev);
1117 snd_via82xx_set_table_ptr(chip, viadev);
1118 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1119 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1120 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1121 0xff000000, /* STOP index is never reached */
1122 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1123 udelay(20);
1124 snd_via82xx_codec_ready(chip, 0);
1125 return 0;
1126}
1127
1128
1129/*
1130 * pcm hardware definition, identical for both playback and capture
1131 */
dee49895 1132static const struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT		 1133{
1134 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1135 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1136 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1137 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT		 1138 SNDRV_PCM_INFO_PAUSE),
1139 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1140 .rates = SNDRV_PCM_RATE_48000,
1141 .rate_min = 48000,
1142 .rate_max = 48000,
1143 .channels_min = 1,
1144 .channels_max = 2,
5503600a 1145 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1146 .period_bytes_min = 32,
5503600a 1147 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT		 1148 .periods_min = 2,
1149 .periods_max = VIA_TABLE_SIZE / 2,
1150 .fifo_size = 0,
1151};
1152
1153
1154/*
1155 * open callback skeleton
1156 */
e437e3d7
TI		 1157static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1158 struct snd_pcm_substream *substream)
1da177e4 1159{
e437e3d7 1160 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1161 int err;
1162 struct via_rate_lock *ratep;
5495ffbd 1163 bool use_src = false;
1da177e4
LT		 1164
1165 runtime->hw = snd_via82xx_hw;
1166
1167 /* set the hw rate condition */
1168 ratep = &chip->rates[viadev->direction];
1169 spin_lock_irq(&ratep->lock);
1170 ratep->used++;
1171 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1172 /* DXS#3 and spdif is on */
1173 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1174 snd_pcm_limit_hw_rates(runtime);
1175 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1176 /* fixed DXS playback rate */
1177 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1178 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV		 1179 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1180 /* use full SRC capabilities of DXS */
1181 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1182 SNDRV_PCM_RATE_8000_48000);
1183 runtime->hw.rate_min = 8000;
1184 runtime->hw.rate_max = 48000;
5495ffbd 1185 use_src = true;
1da177e4
LT		 1186 } else if (! ratep->rate) {
1187 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1188 runtime->hw.rates = chip->ac97->rates[idx];
1189 snd_pcm_limit_hw_rates(runtime);
1190 } else {
1191 /* a fixed rate */
1192 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1193 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1194 }
1195 spin_unlock_irq(&ratep->lock);
1196
1197 /* we may remove following constaint when we modify table entries
1198 in interrupt */
1199 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1200 return err;
1201
5495ffbd
CL		 1202 if (use_src) {
1203 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1204 if (err < 0)
1205 return err;
1206 }
1207
1da177e4
LT		 1208 runtime->private_data = viadev;
1209 viadev->substream = substream;
1210
1211 return 0;
1212}
1213
1214
1215/*
3d009413 1216 * open callback for playback on via686
1da177e4 1217 */
3d009413 1218static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1219{
e437e3d7
TI		 1220 struct via82xx *chip = snd_pcm_substream_chip(substream);
1221 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT		 1222 int err;
1223
1224 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1225 return err;
1226 return 0;
1227}
1228
3d009413
CL		 1229/*
1230 * open callback for playback on via823x DXS
1231 */
1232static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1233{
1234 struct via82xx *chip = snd_pcm_substream_chip(substream);
1235 struct viadev *viadev;
1236 unsigned int stream;
1237 int err;
1238
1239 viadev = &chip->devs[chip->playback_devno + substream->number];
1240 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1241 return err;
1242 stream = viadev->reg_offset / 0x10;
1243 if (chip->dxs_controls[stream]) {
395c61d1
CL		 1244 chip->playback_volume[stream][0] =
1245 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
1246 chip->playback_volume[stream][1] =
1247 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
3d009413
CL		 1248 chip->dxs_controls[stream]->vd[0].access &=
1249 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1250 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1251 SNDRV_CTL_EVENT_MASK_INFO,
1252 &chip->dxs_controls[stream]->id);
1253 }
1254 return 0;
1255}
1256
1da177e4
LT		 1257/*
1258 * open callback for playback on via823x multi-channel
1259 */
e437e3d7 1260static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1261{
e437e3d7
TI		 1262 struct via82xx *chip = snd_pcm_substream_chip(substream);
1263 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT		 1264 int err;
1265 /* channels constraint for VIA8233A
1266 * 3 and 5 channels are not supported
1267 */
fbc57b2a 1268 static const unsigned int channels[] = {
1da177e4
LT		 1269 1, 2, 4, 6
1270 };
fbc57b2a 1271 static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT		 1272 .count = ARRAY_SIZE(channels),
1273 .list = channels,
1274 .mask = 0,
1275 };
1276
1277 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1278 return err;
1279 substream->runtime->hw.channels_max = 6;
1280 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI		 1281 snd_pcm_hw_constraint_list(substream->runtime, 0,
1282 SNDRV_PCM_HW_PARAM_CHANNELS,
1283 &hw_constraints_channels);
1da177e4
LT		 1284 return 0;
1285}
1286
1287/*
1288 * open callback for capture on via686 and via823x
1289 */
e437e3d7 1290static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1291{
e437e3d7
TI		 1292 struct via82xx *chip = snd_pcm_substream_chip(substream);
1293 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT		 1294
1295 return snd_via82xx_pcm_open(chip, viadev, substream);
1296}
1297
1298/*
1299 * close callback
1300 */
e437e3d7 1301static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1302{
e437e3d7
TI		 1303 struct via82xx *chip = snd_pcm_substream_chip(substream);
1304 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 1305 struct via_rate_lock *ratep;
1306
1307 /* release the rate lock */
1308 ratep = &chip->rates[viadev->direction];
1309 spin_lock_irq(&ratep->lock);
1310 ratep->used--;
1311 if (! ratep->used)
1312 ratep->rate = 0;
1313 spin_unlock_irq(&ratep->lock);
6dbe6628
TI		 1314 if (! ratep->rate) {
1315 if (! viadev->direction) {
1316 snd_ac97_update_power(chip->ac97,
1317 AC97_PCM_FRONT_DAC_RATE, 0);
1318 snd_ac97_update_power(chip->ac97,
1319 AC97_PCM_SURR_DAC_RATE, 0);
1320 snd_ac97_update_power(chip->ac97,
1321 AC97_PCM_LFE_DAC_RATE, 0);
1322 } else
1323 snd_ac97_update_power(chip->ac97,
1324 AC97_PCM_LR_ADC_RATE, 0);
1325 }
1da177e4
LT		 1326 viadev->substream = NULL;
1327 return 0;
1328}
1329
3d009413
CL		 1330static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1331{
1332 struct via82xx *chip = snd_pcm_substream_chip(substream);
1333 struct viadev *viadev = substream->runtime->private_data;
1334 unsigned int stream;
1335
1336 stream = viadev->reg_offset / 0x10;
1337 if (chip->dxs_controls[stream]) {
1338 chip->dxs_controls[stream]->vd[0].access |=
1339 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1340 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1341 &chip->dxs_controls[stream]->id);
1342 }
1343 return snd_via82xx_pcm_close(substream);
1344}
1345
1da177e4
LT		 1346
1347/* via686 playback callbacks */
6769e988 1348static const struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1349 .open = snd_via686_playback_open,
1da177e4 1350 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1351 .hw_params = snd_via82xx_hw_params,
1352 .hw_free = snd_via82xx_hw_free,
1353 .prepare = snd_via686_playback_prepare,
1354 .trigger = snd_via82xx_pcm_trigger,
1355 .pointer = snd_via686_pcm_pointer,
1da177e4
LT		 1356};
1357
1358/* via686 capture callbacks */
6769e988 1359static const struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT		 1360 .open = snd_via82xx_capture_open,
1361 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1362 .hw_params = snd_via82xx_hw_params,
1363 .hw_free = snd_via82xx_hw_free,
1364 .prepare = snd_via686_capture_prepare,
1365 .trigger = snd_via82xx_pcm_trigger,
1366 .pointer = snd_via686_pcm_pointer,
1da177e4
LT		 1367};
1368
1369/* via823x DSX playback callbacks */
6769e988 1370static const struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL		 1371 .open = snd_via8233_playback_open,
1372 .close = snd_via8233_playback_close,
1da177e4
LT		 1373 .hw_params = snd_via82xx_hw_params,
1374 .hw_free = snd_via82xx_hw_free,
1375 .prepare = snd_via8233_playback_prepare,
1376 .trigger = snd_via82xx_pcm_trigger,
1377 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1378};
1379
1380/* via823x multi-channel playback callbacks */
6769e988 1381static const struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT		 1382 .open = snd_via8233_multi_open,
1383 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1384 .hw_params = snd_via82xx_hw_params,
1385 .hw_free = snd_via82xx_hw_free,
1386 .prepare = snd_via8233_multi_prepare,
1387 .trigger = snd_via82xx_pcm_trigger,
1388 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1389};
1390
1391/* via823x capture callbacks */
6769e988 1392static const struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT		 1393 .open = snd_via82xx_capture_open,
1394 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1395 .hw_params = snd_via82xx_hw_params,
1396 .hw_free = snd_via82xx_hw_free,
1397 .prepare = snd_via8233_capture_prepare,
1398 .trigger = snd_via82xx_pcm_trigger,
1399 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1400};
1401
1402
e437e3d7
TI		 1403static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1404 int shadow_pos, int direction)
1da177e4
LT		 1405{
1406 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1407 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT		 1408 chip->devs[idx].direction = direction;
1409 chip->devs[idx].port = chip->port + reg_offset;
1410}
1411
1412/*
1413 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1414 */
e23e7a14 1415static int snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1416{
e437e3d7 1417 struct snd_pcm *pcm;
e36e3b86 1418 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1419 int i, err;
1420
1421 chip->playback_devno = 0; /* x 4 */
1422 chip->multi_devno = 4; /* x 1 */
1423 chip->capture_devno = 5; /* x 2 */
1424 chip->num_devs = 7;
1425 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1426
1427 /* PCM #0: 4 DSX playbacks and 1 capture */
1428 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1429 if (err < 0)
1430 return err;
1431 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1432 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1433 pcm->private_data = chip;
1434 strcpy(pcm->name, chip->card->shortname);
1435 chip->pcms[0] = pcm;
1436 /* set up playbacks */
1437 for (i = 0; i < 4; i++)
4f550df5 1438 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1439 /* capture */
4f550df5 1440 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1441
8e2c7524
TI		 1442 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1443 &chip->pci->dev,
1444 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1445
e36e3b86
TI		 1446 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1447 snd_pcm_std_chmaps, 2, 0,
1448 &chmap);
1449 if (err < 0)
1450 return err;
1451
1da177e4
LT		 1452 /* PCM #1: multi-channel playback and 2nd capture */
1453 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1454 if (err < 0)
1455 return err;
1456 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1457 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1458 pcm->private_data = chip;
1459 strcpy(pcm->name, chip->card->shortname);
1460 chip->pcms[1] = pcm;
1461 /* set up playback */
4f550df5 1462 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1463 /* set up capture */
4f550df5 1464 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1465
8e2c7524
TI		 1466 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1467 &chip->pci->dev,
1468 64*1024, VIA_MAX_BUFSIZE);
e36e3b86
TI		 1469
1470 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1471 snd_pcm_alt_chmaps, 6, 0,
1472 &chmap);
1473 if (err < 0)
1474 return err;
1475 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1476
1da177e4
LT		 1477 return 0;
1478}
1479
1480/*
1481 * create pcm instances for VIA8233A
1482 */
e23e7a14 1483static int snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1484{
e437e3d7 1485 struct snd_pcm *pcm;
e36e3b86 1486 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1487 int err;
1488
1489 chip->multi_devno = 0;
1490 chip->playback_devno = 1;
1491 chip->capture_devno = 2;
1492 chip->num_devs = 3;
1493 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1494
1495 /* PCM #0: multi-channel playback and capture */
1496 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1497 if (err < 0)
1498 return err;
1499 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1500 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1501 pcm->private_data = chip;
1502 strcpy(pcm->name, chip->card->shortname);
1503 chip->pcms[0] = pcm;
1504 /* set up playback */
4f550df5 1505 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1506 /* capture */
4f550df5 1507 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1508
8e2c7524
TI		 1509 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1510 &chip->pci->dev,
1511 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1512
e36e3b86
TI		 1513 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1514 snd_pcm_alt_chmaps, 6, 0,
1515 &chmap);
1516 if (err < 0)
1517 return err;
1518 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1519
1da177e4
LT		 1520 /* SPDIF supported? */
1521 if (! ac97_can_spdif(chip->ac97))
1522 return 0;
1523
1524 /* PCM #1: DXS3 playback (for spdif) */
1525 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1526 if (err < 0)
1527 return err;
1528 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1529 pcm->private_data = chip;
1530 strcpy(pcm->name, chip->card->shortname);
1531 chip->pcms[1] = pcm;
1532 /* set up playback */
4f550df5 1533 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1534
8e2c7524
TI		 1535 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1536 &chip->pci->dev,
1537 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1538 return 0;
1539}
1540
1541/*
1542 * create a pcm instance for via686a/b
1543 */
e23e7a14 1544static int snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1545{
e437e3d7 1546 struct snd_pcm *pcm;
1da177e4
LT		 1547 int err;
1548
1549 chip->playback_devno = 0;
1550 chip->capture_devno = 1;
1551 chip->num_devs = 2;
1552 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1553
1554 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1555 if (err < 0)
1556 return err;
1557 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1558 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1559 pcm->private_data = chip;
1560 strcpy(pcm->name, chip->card->shortname);
1561 chip->pcms[0] = pcm;
4f550df5
KW		 1562 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1563 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1564
8e2c7524
TI		 1565 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1566 &chip->pci->dev,
1567 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1568 return 0;
1569}
1570
1571
1572/*
1573 * Mixer part
1574 */
1575
e437e3d7
TI		 1576static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1577 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1578{
1579 /* formerly they were "Line" and "Mic", but it looks like that they
1580 * have nothing to do with the actual physical connections...
1581 */
9883ab91 1582 static const char * const texts[2] = {
1da177e4
LT		 1583 "Input1", "Input2"
1584 };
9883ab91 1585 return snd_ctl_enum_info(uinfo, 1, 2, texts);
1da177e4
LT		 1586}
1587
e437e3d7
TI		 1588static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1589 struct snd_ctl_elem_value *ucontrol)
1da177e4 1590{
e437e3d7 1591 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1592 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1593 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1594 return 0;
1595}
1596
e437e3d7
TI		 1597static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1598 struct snd_ctl_elem_value *ucontrol)
1da177e4 1599{
e437e3d7 1600 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1601 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1602 u8 val, oval;
1603
1604 spin_lock_irq(&chip->reg_lock);
1605 oval = inb(port);
1606 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1607 if (ucontrol->value.enumerated.item[0])
1608 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1609 if (val != oval)
1610 outb(val, port);
1611 spin_unlock_irq(&chip->reg_lock);
1612 return val != oval;
1613}
1614
e23e7a14 1615static struct snd_kcontrol_new snd_via8233_capture_source = {
1da177e4
LT		 1616 .name = "Input Source Select",
1617 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1618 .info = snd_via8233_capture_source_info,
1619 .get = snd_via8233_capture_source_get,
1620 .put = snd_via8233_capture_source_put,
1621};
1622
a5ce8890 1623#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1624
e437e3d7
TI		 1625static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_value *ucontrol)
1da177e4 1627{
e437e3d7 1628 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1629 u8 val;
1630
1631 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1632 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1633 return 0;
1634}
1635
e437e3d7
TI		 1636static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1637 struct snd_ctl_elem_value *ucontrol)
1da177e4 1638{
e437e3d7 1639 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1640 u8 val, oval;
1641
1642 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1643 val = oval & ~VIA8233_SPDIF_DX3;
1644 if (ucontrol->value.integer.value[0])
1645 val |= VIA8233_SPDIF_DX3;
1646 /* save the spdif flag for rate filtering */
1647 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1648 if (val != oval) {
1649 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1650 return 1;
1651 }
1652 return 0;
1653}
1654
f3b827e0 1655static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
10e8d78a 1656 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1658 .info = snd_via8233_dxs3_spdif_info,
1659 .get = snd_via8233_dxs3_spdif_get,
1660 .put = snd_via8233_dxs3_spdif_put,
1661};
1662
e437e3d7
TI		 1663static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1664 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1665{
1666 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1667 uinfo->count = 2;
1668 uinfo->value.integer.min = 0;
1669 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1670 return 0;
1671}
1672
e437e3d7
TI		 1673static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1da177e4 1675{
e437e3d7 1676 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1677 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1678
1679 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1680 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1681 return 0;
1682}
1683
e437e3d7
TI		 1684static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1685 struct snd_ctl_elem_value *ucontrol)
00f226d4 1686{
e437e3d7 1687 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM		 1688 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1689 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT		 1690 return 0;
1691}
1692
e437e3d7
TI		 1693static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1694 struct snd_ctl_elem_value *ucontrol)
00f226d4 1695{
e437e3d7 1696 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1697 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1698 unsigned long port = chip->port + 0x10 * idx;
1699 unsigned char val;
1700 int i, change = 0;
1701
1702 for (i = 0; i < 2; i++) {
1703 val = ucontrol->value.integer.value[i];
1704 if (val > VIA_DXS_MAX_VOLUME)
1705 val = VIA_DXS_MAX_VOLUME;
1706 val = VIA_DXS_MAX_VOLUME - val;
1707 change |= val != chip->playback_volume[idx][i];
1708 if (change) {
1709 chip->playback_volume[idx][i] = val;
1710 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1711 }
1712 }
1713 return change;
1714}
1715
e437e3d7
TI		 1716static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1717 struct snd_ctl_elem_value *ucontrol)
1da177e4 1718{
e437e3d7 1719 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1720 unsigned int idx;
1721 unsigned char val;
1722 int i, change = 0;
1723
1724 for (i = 0; i < 2; i++) {
1725 val = ucontrol->value.integer.value[i];
1726 if (val > VIA_DXS_MAX_VOLUME)
1727 val = VIA_DXS_MAX_VOLUME;
1728 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1729 if (val != chip->playback_volume_c[i]) {
1da177e4 1730 change = 1;
00f226d4 1731 chip->playback_volume_c[i] = val;
1da177e4
LT		 1732 for (idx = 0; idx < 4; idx++) {
1733 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1734 chip->playback_volume[idx][i] = val;
1da177e4
LT		 1735 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1736 }
1737 }
1738 }
1739 return change;
1740}
1741
b452e08e 1742static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1743
f3b827e0 1744static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
1da177e4
LT		 1745 .name = "PCM Playback Volume",
1746 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI		 1747 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1748 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1749 .info = snd_via8233_dxs_volume_info,
00f226d4
HM		 1750 .get = snd_via8233_pcmdxs_volume_get,
1751 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1752 .tlv = { .p = db_scale_dxs }
00f226d4
HM		 1753};
1754
f3b827e0 1755static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
2fb930b5
CL		 1756 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1757 .device = 0,
1758 /* .subdevice set later */
1759 .name = "PCM Playback Volume",
3d009413
CL		 1760 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1761 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1762 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1763 .info = snd_via8233_dxs_volume_info,
1da177e4
LT		 1764 .get = snd_via8233_dxs_volume_get,
1765 .put = snd_via8233_dxs_volume_put,
7058c042 1766 .tlv = { .p = db_scale_dxs }
1da177e4
LT		 1767};
1768
1769/*
1770 */
1771
e437e3d7 1772static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1773{
e437e3d7 1774 struct via82xx *chip = bus->private_data;
1da177e4
LT		 1775 chip->ac97_bus = NULL;
1776}
1777
e437e3d7 1778static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1779{
e437e3d7 1780 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 1781 chip->ac97 = NULL;
1782}
1783
eab0fbfa 1784static const struct ac97_quirk ac97_quirks[] = {
1da177e4 1785 {
69ad07cf
JK		 1786 .subvendor = 0x1106,
1787 .subdevice = 0x4161,
1da177e4
LT		 1788 .codec_id = 0x56494161, /* VT1612A */
1789 .name = "Soltek SL-75DRV5",
1790 .type = AC97_TUNE_NONE
1791 },
1792 { /* FIXME: which codec? */
69ad07cf
JK		 1793 .subvendor = 0x1106,
1794 .subdevice = 0x4161,
1da177e4
LT		 1795 .name = "ASRock K7VT2",
1796 .type = AC97_TUNE_HP_ONLY
1797 },
bf30a430
CL		 1798 {
1799 .subvendor = 0x110a,
1800 .subdevice = 0x0079,
1801 .name = "Fujitsu Siemens D1289",
1802 .type = AC97_TUNE_HP_ONLY
1803 },
1da177e4 1804 {
69ad07cf
JK		 1805 .subvendor = 0x1019,
1806 .subdevice = 0x0a81,
1da177e4
LT		 1807 .name = "ECS K7VTA3",
1808 .type = AC97_TUNE_HP_ONLY
1809 },
1810 {
69ad07cf
JK		 1811 .subvendor = 0x1019,
1812 .subdevice = 0x0a85,
1da177e4
LT		 1813 .name = "ECS L7VMM2",
1814 .type = AC97_TUNE_HP_ONLY
1815 },
942fd1eb
WS		 1816 {
1817 .subvendor = 0x1019,
1818 .subdevice = 0x1841,
1819 .name = "ECS K7VTA3",
1820 .type = AC97_TUNE_HP_ONLY
1821 },
1da177e4 1822 {
69ad07cf
JK		 1823 .subvendor = 0x1849,
1824 .subdevice = 0x3059,
1da177e4
LT		 1825 .name = "ASRock K7VM2",
1826 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1827 },
1828 {
69ad07cf
JK		 1829 .subvendor = 0x14cd,
1830 .subdevice = 0x7002,
1da177e4
LT		 1831 .name = "Unknown",
1832 .type = AC97_TUNE_ALC_JACK
1833 },
1834 {
69ad07cf
JK		 1835 .subvendor = 0x1071,
1836 .subdevice = 0x8590,
1da177e4
LT		 1837 .name = "Mitac Mobo",
1838 .type = AC97_TUNE_ALC_JACK
1839 },
1840 {
69ad07cf
JK		 1841 .subvendor = 0x161f,
1842 .subdevice = 0x202b,
1da177e4
LT		 1843 .name = "Arima Notebook",
1844 .type = AC97_TUNE_HP_ONLY,
1845 },
dac8dddd
TI		 1846 {
1847 .subvendor = 0x161f,
1848 .subdevice = 0x2032,
1849 .name = "Targa Traveller 811",
1850 .type = AC97_TUNE_HP_ONLY,
1851 },
d4199f01
DC		 1852 {
1853 .subvendor = 0x161f,
1854 .subdevice = 0x2032,
1855 .name = "m680x",
1856 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1857 },
9674513d
TI		 1858 {
1859 .subvendor = 0x1297,
1860 .subdevice = 0xa232,
1861 .name = "Shuttle AK32VN",
1862 .type = AC97_TUNE_HP_ONLY
1863 },
1da177e4
LT		 1864 { } /* terminator */
1865};
1866
e23e7a14 1867static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1868{
e437e3d7 1869 struct snd_ac97_template ac97;
1da177e4 1870 int err;
e437e3d7 1871 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1872 .write = snd_via82xx_codec_write,
1873 .read = snd_via82xx_codec_read,
1874 .wait = snd_via82xx_codec_wait,
1875 };
1876
1877 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1878 return err;
1879 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1880 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT		 1881
1882 memset(&ac97, 0, sizeof(ac97));
1883 ac97.private_data = chip;
1884 ac97.private_free = snd_via82xx_mixer_free_ac97;
1885 ac97.pci = chip->pci;
f1a63a38 1886 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT		 1887 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1888 return err;
1889
1890 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1891
1892 if (chip->chip_type != TYPE_VIA686) {
1893 /* use slot 10/11 */
1894 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1895 }
1896
1897 return 0;
1898}
1899
1900#ifdef SUPPORT_JOYSTICK
1901#define JOYSTICK_ADDR 0x200
e23e7a14 1902static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1903{
1904 struct gameport *gp;
1905 struct resource *r;
1906
b7fe4622 1907 if (!joystick)
1da177e4
LT		 1908 return -ENODEV;
1909
1910 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1911 if (!r) {
59d3acfa 1912 dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
e437e3d7 1913 JOYSTICK_ADDR);
1da177e4
LT		 1914 return -EBUSY;
1915 }
1916
1917 chip->gameport = gp = gameport_allocate_port();
1918 if (!gp) {
59d3acfa
TI		 1919 dev_err(chip->card->dev,
1920 "cannot allocate memory for gameport\n");
b1d5776d 1921 release_and_free_resource(r);
1da177e4
LT		 1922 return -ENOMEM;
1923 }
1924
1925 gameport_set_name(gp, "VIA686 Gameport");
1926 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1927 gameport_set_dev_parent(gp, &chip->pci->dev);
1928 gp->io = JOYSTICK_ADDR;
1929 gameport_set_port_data(gp, r);
1930
1931 /* Enable legacy joystick port */
1932 *legacy |= VIA_FUNC_ENABLE_GAME;
1933 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1934
1935 gameport_register_port(chip->gameport);
1936
1937 return 0;
1938}
1939
e437e3d7 1940static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT		 1941{
1942 if (chip->gameport) {
1943 struct resource *r = gameport_get_port_data(chip->gameport);
1944
1945 gameport_unregister_port(chip->gameport);
1946 chip->gameport = NULL;
b1d5776d 1947 release_and_free_resource(r);
1da177e4
LT		 1948 }
1949}
1950#else
e437e3d7 1951static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1952{
1953 return -ENOSYS;
1954}
e437e3d7 1955static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT		 1956#endif
1957
1958
1959/*
1960 *
1961 */
1962
e23e7a14 1963static int snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT		 1964{
1965 int i, err, caps;
1966 unsigned char val;
1967
1968 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
1969 for (i = 0; i < caps; i++) {
1970 snd_via8233_capture_source.index = i;
1971 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
1972 if (err < 0)
1973 return err;
1974 }
1975 if (ac97_can_spdif(chip->ac97)) {
1976 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
1977 if (err < 0)
1978 return err;
1979 }
1980 if (chip->chip_type != TYPE_VIA8233A) {
1981 /* when no h/w PCM volume control is found, use DXS volume control
1982 * as the PCM vol control
1983 */
e437e3d7 1984 struct snd_ctl_elem_id sid;
1da177e4
LT		 1985 memset(&sid, 0, sizeof(sid));
1986 strcpy(sid.name, "PCM Playback Volume");
1987 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1988 if (! snd_ctl_find_id(chip->card, &sid)) {
59d3acfa
TI		 1989 dev_info(chip->card->dev,
1990 "Using DXS as PCM Playback\n");
00f226d4
HM		 1991 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
1992 if (err < 0)
1993 return err;
1994 }
1995 else /* Using DXS when PCM emulation is enabled is really weird */
1996 {
2fb930b5
CL		 1997 for (i = 0; i < 4; ++i) {
1998 struct snd_kcontrol *kctl;
1999
2000 kctl = snd_ctl_new1(
2001 &snd_via8233_dxs_volume_control, chip);
2002 if (!kctl)
2003 return -ENOMEM;
2004 kctl->id.subdevice = i;
2005 err = snd_ctl_add(chip->card, kctl);
2006 if (err < 0)
2007 return err;
3d009413 2008 chip->dxs_controls[i] = kctl;
2fb930b5 2009 }
1da177e4
LT		 2010 }
2011 }
1da177e4
LT		 2012 /* select spdif data slot 10/11 */
2013 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2014 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2015 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2016 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2017
2018 return 0;
2019}
2020
e23e7a14 2021static int snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT		 2022{
2023 unsigned char legacy, legacy_cfg;
2024 int rev_h = 0;
2025
2026 legacy = chip->old_legacy;
2027 legacy_cfg = chip->old_legacy_cfg;
2028 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2029 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2030 if (chip->revision >= VIA_REV_686_H) {
2031 rev_h = 1;
b7fe4622
CL		 2032 if (mpu_port >= 0x200) { /* force MIDI */
2033 mpu_port &= 0xfffc;
2034 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
c7561cd8 2035#ifdef CONFIG_PM_SLEEP
b7fe4622 2036 chip->mpu_port_saved = mpu_port;
1da177e4
LT		 2037#endif
2038 } else {
b7fe4622 2039 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT		 2040 }
2041 } else {
b7fe4622 2042 switch (mpu_port) { /* force MIDI */
1da177e4
LT		 2043 case 0x300:
2044 case 0x310:
2045 case 0x320:
2046 case 0x330:
2047 legacy_cfg &= ~(3 << 2);
b7fe4622 2048 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT		 2049 break;
2050 default: /* no, use BIOS settings */
2051 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2052 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT		 2053 break;
2054 }
2055 }
b7fe4622
CL		 2056 if (mpu_port >= 0x200 &&
2057 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
2058 != NULL) {
1da177e4
LT		 2059 if (rev_h)
2060 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2061 legacy |= VIA_FUNC_ENABLE_MIDI;
2062 } else {
2063 if (rev_h)
2064 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2065 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2066 mpu_port = 0;
1da177e4
LT		 2067 }
2068
2069 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2070 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2071 if (chip->mpu_res) {
2072 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
dba8b469
CL		 2073 mpu_port, MPU401_INFO_INTEGRATED |
2074 MPU401_INFO_IRQ_HOOK, -1,
2075 &chip->rmidi) < 0) {
59d3acfa
TI		 2076 dev_warn(chip->card->dev,
2077 "unable to initialize MPU-401 at 0x%lx, skipping\n",
2078 mpu_port);
1da177e4
LT		 2079 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2080 } else {
2081 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2082 }
2083 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2084 }
2085
b7fe4622 2086 snd_via686_create_gameport(chip, &legacy);
1da177e4 2087
c7561cd8 2088#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2089 chip->legacy_saved = legacy;
2090 chip->legacy_cfg_saved = legacy_cfg;
2091#endif
2092
2093 return 0;
2094}
2095
2096
2097/*
2098 * proc interface
2099 */
e437e3d7
TI		 2100static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2101 struct snd_info_buffer *buffer)
1da177e4 2102{
e437e3d7 2103 struct via82xx *chip = entry->private_data;
1da177e4
LT		 2104 int i;
2105
2106 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2107 for (i = 0; i < 0xa0; i += 4) {
2108 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2109 }
2110}
2111
e23e7a14 2112static void snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2113{
47f2769b
TI		 2114 snd_card_ro_proc_new(chip->card, "via82xx", chip,
2115 snd_via82xx_proc_read);
1da177e4
LT		 2116}
2117
2118/*
2119 *
2120 */
2121
e437e3d7 2122static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT		 2123{
2124 unsigned int val;
ef21ca24 2125 unsigned long end_time;
1da177e4
LT		 2126 unsigned char pval;
2127
2128#if 0 /* broken on K7M? */
2129 if (chip->chip_type == TYPE_VIA686)
2130 /* disable all legacy ports */
2131 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2132#endif
2133 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2134 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2135 /* deassert ACLink reset, force SYNC */
2136 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2137 VIA_ACLINK_CTRL_ENABLE |
2138 VIA_ACLINK_CTRL_RESET |
2139 VIA_ACLINK_CTRL_SYNC);
2140 udelay(100);
2141#if 1 /* FIXME: should we do full reset here for all chip models? */
2142 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2143 udelay(100);
2144#else
2145 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2146 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2147 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2148 udelay(2);
2149#endif
2150 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2151 /* note - FM data out has trouble with non VRA codecs !! */
2152 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2153 udelay(100);
2154 }
2155
2156 /* Make sure VRA is enabled, in case we didn't do a
2157 * complete codec reset, above */
2158 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2159 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2160 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2161 /* note - FM data out has trouble with non VRA codecs !! */
2162 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2163 udelay(100);
2164 }
2165
2166 /* wait until codec ready */
ef21ca24 2167 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2168 do {
2169 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2170 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2171 break;
d86d0193 2172 schedule_timeout_uninterruptible(1);
ef21ca24 2173 } while (time_before(jiffies, end_time));
1da177e4
LT		 2174
2175 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
59d3acfa
TI		 2176 dev_err(chip->card->dev,
2177 "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT		 2178
2179#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2180 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2181 VIA_REG_AC97_SECONDARY_VALID |
2182 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2183 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2184 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2185 VIA_REG_AC97_SECONDARY_VALID |
2186 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2187 do {
2188 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2189 chip->ac97_secondary = 1;
2190 goto __ac97_ok2;
2191 }
d86d0193 2192 schedule_timeout_uninterruptible(1);
ef21ca24 2193 } while (time_before(jiffies, end_time));
1da177e4
LT		 2194 /* This is ok, the most of motherboards have only one codec */
2195
2196 __ac97_ok2:
2197#endif
2198
2199 if (chip->chip_type == TYPE_VIA686) {
2200 /* route FM trap to IRQ, disable FM trap */
2201 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2202 /* disable all GPI interrupts */
2203 outl(0, VIAREG(chip, GPI_INTR));
2204 }
2205
2206 if (chip->chip_type != TYPE_VIA686) {
2207 /* Workaround for Award BIOS bug:
2208 * DXS channels don't work properly with VRA if MC97 is disabled.
2209 */
2210 struct pci_dev *pci;
0dd119f7 2211 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT		 2212 if (pci) {
2213 unsigned char data;
2214 pci_read_config_byte(pci, 0x44, &data);
2215 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2216 pci_dev_put(pci);
1da177e4
LT		 2217 }
2218 }
2219
2220 if (chip->chip_type != TYPE_VIA8233A) {
2221 int i, idx;
2222 for (idx = 0; idx < 4; idx++) {
2223 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM		 2224 for (i = 0; i < 2; i++) {
2225 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI		 2226 outb(chip->playback_volume_c[i],
2227 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2228 }
1da177e4
LT		 2229 }
2230 }
2231
2232 return 0;
2233}
2234
c7561cd8 2235#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2236/*
2237 * power management
2238 */
68cb2b55 2239static int snd_via82xx_suspend(struct device *dev)
1da177e4 2240{
68cb2b55 2241 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2242 struct via82xx *chip = card->private_data;
1da177e4
LT		 2243 int i;
2244
57feb835 2245 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 2246 for (i = 0; i < chip->num_devs; i++)
2247 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2248 synchronize_irq(chip->irq);
2249 snd_ac97_suspend(chip->ac97);
2250
2251 /* save misc values */
2252 if (chip->chip_type != TYPE_VIA686) {
2253 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2254 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2255 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2256 }
2257
1da177e4
LT		 2258 return 0;
2259}
2260
68cb2b55 2261static int snd_via82xx_resume(struct device *dev)
1da177e4 2262{
68cb2b55 2263 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2264 struct via82xx *chip = card->private_data;
1da177e4
LT		 2265 int i;
2266
1da177e4
LT		 2267 snd_via82xx_chip_init(chip);
2268
2269 if (chip->chip_type == TYPE_VIA686) {
2270 if (chip->mpu_port_saved)
2271 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2272 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2273 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2274 } else {
2275 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2276 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2277 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2278 }
2279
2280 snd_ac97_resume(chip->ac97);
2281
2282 for (i = 0; i < chip->num_devs; i++)
2283 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2284
57feb835 2285 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2286 return 0;
2287}
68cb2b55
TI		 2288
2289static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
2290#define SND_VIA82XX_PM_OPS &snd_via82xx_pm
2291#else
2292#define SND_VIA82XX_PM_OPS NULL
c7561cd8 2293#endif /* CONFIG_PM_SLEEP */
1da177e4 2294
e437e3d7 2295static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT		 2296{
2297 unsigned int i;
2298
2299 if (chip->irq < 0)
2300 goto __end_hw;
2301 /* disable interrupts */
2302 for (i = 0; i < chip->num_devs; i++)
2303 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2304
1da177e4 2305 if (chip->irq >= 0)
e437e3d7 2306 free_irq(chip->irq, chip);
757d5a75 2307 __end_hw:
b1d5776d 2308 release_and_free_resource(chip->mpu_res);
1da177e4
LT		 2309 pci_release_regions(chip->pci);
2310
2311 if (chip->chip_type == TYPE_VIA686) {
2312 snd_via686_free_gameport(chip);
2313 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2314 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2315 }
2316 pci_disable_device(chip->pci);
2317 kfree(chip);
2318 return 0;
2319}
2320
e437e3d7 2321static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2322{
e437e3d7 2323 struct via82xx *chip = device->device_data;
1da177e4
LT		 2324 return snd_via82xx_free(chip);
2325}
2326
e23e7a14
BP		 2327static int snd_via82xx_create(struct snd_card *card,
2328 struct pci_dev *pci,
2329 int chip_type,
2330 int revision,
2331 unsigned int ac97_clock,
2332 struct via82xx **r_via)
1da177e4 2333{
e437e3d7 2334 struct via82xx *chip;
1da177e4 2335 int err;
e437e3d7 2336 static struct snd_device_ops ops = {
1da177e4
LT		 2337 .dev_free = snd_via82xx_dev_free,
2338 };
2339
2340 if ((err = pci_enable_device(pci)) < 0)
2341 return err;
2342
e560d8d8 2343 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT		 2344 pci_disable_device(pci);
2345 return -ENOMEM;
2346 }
2347
2348 chip->chip_type = chip_type;
2349 chip->revision = revision;
2350
2351 spin_lock_init(&chip->reg_lock);
2352 spin_lock_init(&chip->rates[0].lock);
2353 spin_lock_init(&chip->rates[1].lock);
2354 chip->card = card;
2355 chip->pci = pci;
2356 chip->irq = -1;
2357
2358 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2359 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2360 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2361 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2362
2363 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2364 kfree(chip);
2365 pci_disable_device(pci);
2366 return err;
2367 }
2368 chip->port = pci_resource_start(pci, 0);
4f550df5
KW		 2369 if (request_irq(pci->irq,
2370 chip_type == TYPE_VIA8233 ?
2371 snd_via8233_interrupt : snd_via686_interrupt,
437a5a46 2372 IRQF_SHARED,
934c2b6d 2373 KBUILD_MODNAME, chip)) {
59d3acfa 2374 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2375 snd_via82xx_free(chip);
2376 return -EBUSY;
2377 }
2378 chip->irq = pci->irq;
2379 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2380 chip->ac97_clock = ac97_clock;
2381 synchronize_irq(chip->irq);
2382
2383 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2384 snd_via82xx_free(chip);
2385 return err;
2386 }
2387
2388 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2389 snd_via82xx_free(chip);
2390 return err;
2391 }
2392
2393 /* The 8233 ac97 controller does not implement the master bit
2394 * in the pci command register. IMHO this is a violation of the PCI spec.
2395 * We call pci_set_master here because it does not hurt. */
2396 pci_set_master(pci);
2397
1da177e4
LT		 2398 *r_via = chip;
2399 return 0;
2400}
2401
2402struct via823x_info {
2403 int revision;
2404 char *name;
2405 int type;
2406};
e23e7a14 2407static struct via823x_info via823x_cards[] = {
1da177e4
LT		 2408 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2409 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2410 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2411 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2412 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2413 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2414 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT		 2415};
2416
2417/*
2418 * auto detection of DXS channel supports.
2419 */
9d74958a 2420
e23e7a14 2421static struct snd_pci_quirk dxs_whitelist[] = {
9d74958a
TI		 2422 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2423 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2424 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2425 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2426 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI		 2427 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2428 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2429 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI		 2430 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2431 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2432 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2433 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2434 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI		 2435 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2436 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI		 2437 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2438 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2439 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2440 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2441 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI		 2442 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2443 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2444 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2445 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2446 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2447 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2448 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2449 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2450 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2451 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2452 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2453 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2454 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI		 2455 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2456 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2457 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2458 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2459 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI		 2460 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2461 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2462 { } /* terminator */
1da177e4
LT		 2463};
2464
e23e7a14 2465static int check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2466{
9d74958a 2467 const struct snd_pci_quirk *w;
1da177e4 2468
9d74958a
TI		 2469 w = snd_pci_quirk_lookup(pci, dxs_whitelist);
2470 if (w) {
59d3acfa 2471 dev_dbg(&pci->dev, "DXS white list for %s found\n",
86b27237 2472 snd_pci_quirk_name(w));
9d74958a 2473 return w->value;
1da177e4
LT		 2474 }
2475
a769577b
TI		 2476 /* for newer revision, default to DXS_SRC */
2477 if (revision >= VIA_REV_8235)
2478 return VIA_DXS_SRC;
2479
1da177e4
LT		 2480 /*
2481 * not detected, try 48k rate only to be sure.
2482 */
59d3acfa
TI		 2483 dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
2484 dev_info(&pci->dev, " Please try dxs_support=5 option\n");
2485 dev_info(&pci->dev, " and report if it works on your machine.\n");
2486 dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT		 2487 return VIA_DXS_48K;
2488};
2489
e23e7a14
BP		 2490static int snd_via82xx_probe(struct pci_dev *pci,
2491 const struct pci_device_id *pci_id)
1da177e4 2492{
e437e3d7
TI		 2493 struct snd_card *card;
2494 struct via82xx *chip;
1da177e4
LT		 2495 int chip_type = 0, card_type;
2496 unsigned int i;
2497 int err;
2498
60c5772b 2499 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
e58de7ba
TI		 2500 if (err < 0)
2501 return err;
1da177e4
LT		 2502
2503 card_type = pci_id->driver_data;
1da177e4
LT		 2504 switch (card_type) {
2505 case TYPE_CARD_VIA686:
2506 strcpy(card->driver, "VIA686A");
44c10138 2507 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT		 2508 chip_type = TYPE_VIA686;
2509 break;
2510 case TYPE_CARD_VIA8233:
2511 chip_type = TYPE_VIA8233;
44c10138 2512 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2513 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2514 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT		 2515 chip_type = via823x_cards[i].type;
2516 strcpy(card->shortname, via823x_cards[i].name);
2517 break;
2518 }
2519 }
2520 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2521 if (dxs_support == VIA_DXS_AUTO)
44c10138 2522 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT		 2523 /* force to use VIA8233 or 8233A model according to
2524 * dxs_support module option
2525 */
b7fe4622 2526 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT		 2527 chip_type = TYPE_VIA8233A;
2528 else
2529 chip_type = TYPE_VIA8233;
2530 }
2531 if (chip_type == TYPE_VIA8233A)
2532 strcpy(card->driver, "VIA8233A");
44c10138 2533 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT		 2534 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2535 else
2536 strcpy(card->driver, "VIA8233");
2537 break;
2538 default:
59d3acfa 2539 dev_err(card->dev, "invalid card type %d\n", card_type);
1da177e4
LT		 2540 err = -EINVAL;
2541 goto __error;
2542 }
2543
44c10138 2544 if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision,
b7fe4622 2545 ac97_clock, &chip)) < 0)
1da177e4 2546 goto __error;
57feb835 2547 card->private_data = chip;
b7fe4622 2548 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT		 2549 goto __error;
2550
2551 if (chip_type == TYPE_VIA686) {
2552 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2553 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT		 2554 goto __error;
2555 } else {
2556 if (chip_type == TYPE_VIA8233A) {
2557 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2558 goto __error;
2559 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2560 } else {
2561 if ((err = snd_via8233_pcm_new(chip)) < 0)
2562 goto __error;
b7fe4622 2563 if (dxs_support == VIA_DXS_48K)
1da177e4 2564 chip->dxs_fixed = 1;
b7fe4622 2565 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2566 chip->no_vra = 1;
b7fe4622 2567 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV		 2568 chip->no_vra = 1;
2569 chip->dxs_src = 1;
2570 }
1da177e4 2571 }
b7fe4622 2572 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT		 2573 goto __error;
2574 }
2575
1da177e4
LT		 2576 /* disable interrupts */
2577 for (i = 0; i < chip->num_devs; i++)
2578 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2579
2580 snprintf(card->longname, sizeof(card->longname),
2581 "%s with %s at %#lx, irq %d", card->shortname,
2582 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2583
2584 snd_via82xx_proc_init(chip);
2585
2586 if ((err = snd_card_register(card)) < 0) {
2587 snd_card_free(card);
2588 return err;
2589 }
2590 pci_set_drvdata(pci, card);
1da177e4
LT		 2591 return 0;
2592
2593 __error:
2594 snd_card_free(card);
2595 return err;
2596}
2597
e23e7a14 2598static void snd_via82xx_remove(struct pci_dev *pci)
1da177e4
LT		 2599{
2600 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 2601}
2602
e9f66d9b 2603static struct pci_driver via82xx_driver = {
3733e424 2604 .name = KBUILD_MODNAME,
1da177e4
LT		 2605 .id_table = snd_via82xx_ids,
2606 .probe = snd_via82xx_probe,
e23e7a14 2607 .remove = snd_via82xx_remove,
68cb2b55
TI		 2608 .driver = {
2609 .pm = SND_VIA82XX_PM_OPS,
2610 },
1da177e4
LT		 2611};
2612
e9f66d9b 2613module_pci_driver(via82xx_driver);
Linux 6.x block layer and io_uring tree(s)