Merge tag 'staging-4.20-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[linux-2.6-block.git] / sound / pci / via82xx.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for VIA VT82xx (South Bridge)
3 *
4 * VT82C686A/B/C, VT8233A/C, VT8235
5 *
c1017a4c 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT
7 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
8 * 2002 Takashi Iwai <tiwai@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Changes:
28 *
29 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
30 * - use the DSX channels for the first pcm playback.
31 * (on VIA8233, 8233C and 8235 only)
32 * this will allow you play simultaneously up to 4 streams.
33 * multi-channel playback is assigned to the second device
34 * on these chips.
35 * - support the secondary capture (on VIA8233/C,8235)
36 * - SPDIF support
37 * the DSX3 channel can be used for SPDIF output.
38 * on VIA8233A, this channel is assigned to the second pcm
39 * playback.
40 * the card config of alsa-lib will assign the correct
41 * device for applications.
42 * - clean up the code, separate low-level initialization
43 * routines for each chipset.
4f550df5
KW
44 *
45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
46 * - Optimize position calculation for the 823x chips.
1da177e4
LT
47 */
48
6cbbfe1c 49#include <linux/io.h>
1da177e4
LT
50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
54#include <linux/slab.h>
55#include <linux/gameport.h>
65a77217 56#include <linux/module.h>
1da177e4
LT
57#include <sound/core.h>
58#include <sound/pcm.h>
59#include <sound/pcm_params.h>
60#include <sound/info.h>
7058c042 61#include <sound/tlv.h>
1da177e4
LT
62#include <sound/ac97_codec.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
65
66#if 0
67#define POINTER_DEBUG
68#endif
69
c1017a4c 70MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT
71MODULE_DESCRIPTION("VIA VT82xx audio");
72MODULE_LICENSE("GPL");
73MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
74
b2fac073 75#if IS_REACHABLE(CONFIG_GAMEPORT)
1da177e4
LT
76#define SUPPORT_JOYSTICK 1
77#endif
78
b7fe4622
CL
79static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
80static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
81static long mpu_port;
1da177e4 82#ifdef SUPPORT_JOYSTICK
a67ff6a5 83static bool joystick;
1da177e4 84#endif
b7fe4622
CL
85static int ac97_clock = 48000;
86static char *ac97_quirk;
87static int dxs_support;
395c61d1 88static int dxs_init_volume = 31;
115551d9 89static int nodelay;
1da177e4 90
b7fe4622 91module_param(index, int, 0444);
1da177e4 92MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 93module_param(id, charp, 0444);
1da177e4 94MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
6192c41f 95module_param_hw(mpu_port, long, ioport, 0444);
1da177e4
LT
96MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
97#ifdef SUPPORT_JOYSTICK
b7fe4622 98module_param(joystick, bool, 0444);
1da177e4
LT
99MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
100#endif
b7fe4622 101module_param(ac97_clock, int, 0444);
1da177e4 102MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 103module_param(ac97_quirk, charp, 0444);
1da177e4 104MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 105module_param(dxs_support, int, 0444);
2d7eb7cb 106MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
395c61d1
CL
107module_param(dxs_init_volume, int, 0644);
108MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
115551d9
SA
109module_param(nodelay, int, 0444);
110MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 111
2b3e584b 112/* just for backward compatibility */
a67ff6a5 113static bool enable;
698444f3 114module_param(enable, bool, 0444);
2b3e584b 115
1da177e4 116
1da177e4
LT
117/* revision numbers for via686 */
118#define VIA_REV_686_A 0x10
119#define VIA_REV_686_B 0x11
120#define VIA_REV_686_C 0x12
121#define VIA_REV_686_D 0x13
122#define VIA_REV_686_E 0x14
123#define VIA_REV_686_H 0x20
124
125/* revision numbers for via8233 */
126#define VIA_REV_PRE_8233 0x10 /* not in market */
127#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
128#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
129#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
130#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
131#define VIA_REV_8237 0x60
8263c65f 132#define VIA_REV_8251 0x70
1da177e4
LT
133
134/*
135 * Direct registers
136 */
137
138#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
139#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
140
141/* common offsets */
142#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
143#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 144#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT
145#define VIA_REG_STAT_PAUSED 0x40 /* RO */
146#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
147#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
148#define VIA_REG_STAT_EOL 0x02 /* RWC */
149#define VIA_REG_STAT_FLAG 0x01 /* RWC */
150#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
151#define VIA_REG_CTRL_START 0x80 /* WO */
152#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
153#define VIA_REG_CTRL_AUTOSTART 0x20
154#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
155#define VIA_REG_CTRL_INT_STOP 0x04
156#define VIA_REG_CTRL_INT_EOL 0x02
157#define VIA_REG_CTRL_INT_FLAG 0x01
158#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
159#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
160#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
161#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
162#define VIA_REG_TYPE_16BIT 0x20 /* RW */
163#define VIA_REG_TYPE_STEREO 0x10 /* RW */
164#define VIA_REG_TYPE_INT_LLINE 0x00
165#define VIA_REG_TYPE_INT_LSAMPLE 0x04
166#define VIA_REG_TYPE_INT_LESSONE 0x08
167#define VIA_REG_TYPE_INT_MASK 0x0c
168#define VIA_REG_TYPE_INT_EOL 0x02
169#define VIA_REG_TYPE_INT_FLAG 0x01
170#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
171#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
172#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
173#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
174#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
175#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
176#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
177
178#define DEFINE_VIA_REGSET(name,val) \
179enum {\
180 VIA_REG_##name##_STATUS = (val),\
181 VIA_REG_##name##_CONTROL = (val) + 0x01,\
182 VIA_REG_##name##_TYPE = (val) + 0x02,\
183 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
184 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
185 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
186 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
187}
188
189/* playback block */
190DEFINE_VIA_REGSET(PLAYBACK, 0x00);
191DEFINE_VIA_REGSET(CAPTURE, 0x10);
192DEFINE_VIA_REGSET(FM, 0x20);
193
194/* AC'97 */
195#define VIA_REG_AC97 0x80 /* dword */
196#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
197#define VIA_REG_AC97_CODEC_ID_SHIFT 30
198#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
199#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
200#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
201#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
202#define VIA_REG_AC97_BUSY (1<<24)
203#define VIA_REG_AC97_READ (1<<23)
204#define VIA_REG_AC97_CMD_SHIFT 16
205#define VIA_REG_AC97_CMD_MASK 0x7e
206#define VIA_REG_AC97_DATA_SHIFT 0
207#define VIA_REG_AC97_DATA_MASK 0xffff
208
209#define VIA_REG_SGD_SHADOW 0x84 /* dword */
210/* via686 */
211#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
212#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
213#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
214#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
215#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
216#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
217#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
218#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
219#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
220#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
221#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
222#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
223/* via8233 */
224#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
225#define VIA8233_REG_SGD_STAT_EOL (1<<1)
226#define VIA8233_REG_SGD_STAT_STOP (1<<2)
227#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
228#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
229#define VIA8233_REG_SGD_CHAN_SDX 0
230#define VIA8233_REG_SGD_CHAN_MULTI 4
231#define VIA8233_REG_SGD_CHAN_REC 6
232#define VIA8233_REG_SGD_CHAN_REC1 7
233
234#define VIA_REG_GPI_STATUS 0x88
235#define VIA_REG_GPI_INTR 0x8c
236
237/* multi-channel and capture registers for via8233 */
238DEFINE_VIA_REGSET(MULTPLAY, 0x40);
239DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
240
241/* via8233-specific registers */
242#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
243#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
244#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
245#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
246#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
247#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
248#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
249#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
250
251#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
252
253#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
254#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
255#define VIA_REG_CAPTURE_CHANNEL_LINE 0
256#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
257
258#define VIA_TBL_BIT_FLAG 0x40000000
259#define VIA_TBL_BIT_EOL 0x80000000
260
261/* pci space */
262#define VIA_ACLINK_STAT 0x40
263#define VIA_ACLINK_C11_READY 0x20
264#define VIA_ACLINK_C10_READY 0x10
265#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
266#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
267#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
268#define VIA_ACLINK_CTRL 0x41
269#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
270#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
271#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
272#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
273#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
274#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
275#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
276#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
277#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
278 VIA_ACLINK_CTRL_RESET|\
279 VIA_ACLINK_CTRL_PCM|\
280 VIA_ACLINK_CTRL_VRA)
281#define VIA_FUNC_ENABLE 0x42
282#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
283#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
284#define VIA_FUNC_RX2C_WRITE 0x20
285#define VIA_FUNC_SB_FIFO_EMPTY 0x10
286#define VIA_FUNC_ENABLE_GAME 0x08
287#define VIA_FUNC_ENABLE_FM 0x04
288#define VIA_FUNC_ENABLE_MIDI 0x02
289#define VIA_FUNC_ENABLE_SB 0x01
290#define VIA_PNP_CONTROL 0x43
291#define VIA_FM_NMI_CTRL 0x48
292#define VIA8233_VOLCHG_CTRL 0x48
293#define VIA8233_SPDIF_CTRL 0x49
294#define VIA8233_SPDIF_DX3 0x08
295#define VIA8233_SPDIF_SLOT_MASK 0x03
296#define VIA8233_SPDIF_SLOT_1011 0x00
297#define VIA8233_SPDIF_SLOT_34 0x01
298#define VIA8233_SPDIF_SLOT_78 0x02
299#define VIA8233_SPDIF_SLOT_69 0x03
300
301/*
302 */
303
304#define VIA_DXS_AUTO 0
305#define VIA_DXS_ENABLE 1
306#define VIA_DXS_DISABLE 2
307#define VIA_DXS_48K 3
308#define VIA_DXS_NO_VRA 4
2d7eb7cb 309#define VIA_DXS_SRC 5
1da177e4
LT
310
311
1da177e4
LT
312/*
313 * pcm stream
314 */
315
316struct snd_via_sg_table {
317 unsigned int offset;
318 unsigned int size;
319} ;
320
321#define VIA_TABLE_SIZE 255
5503600a 322#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 323
e437e3d7 324struct viadev {
1da177e4
LT
325 unsigned int reg_offset;
326 unsigned long port;
327 int direction; /* playback = 0, capture = 1 */
e437e3d7 328 struct snd_pcm_substream *substream;
1da177e4
LT
329 int running;
330 unsigned int tbl_entries; /* # descriptors */
331 struct snd_dma_buffer table;
332 struct snd_via_sg_table *idx_table;
333 /* for recovery from the unexpected pointer */
334 unsigned int lastpos;
335 unsigned int fragsize;
336 unsigned int bufsize;
337 unsigned int bufsize2;
4f550df5
KW
338 int hwptr_done; /* processed frame position in the buffer */
339 int in_interrupt;
340 int shadow_shift;
1da177e4
LT
341};
342
343
344enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
345enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
346
347#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
348
349struct via_rate_lock {
350 spinlock_t lock;
351 int rate;
352 int used;
353};
354
e437e3d7 355struct via82xx {
1da177e4
LT
356 int irq;
357
358 unsigned long port;
359 struct resource *mpu_res;
360 int chip_type;
361 unsigned char revision;
362
363 unsigned char old_legacy;
364 unsigned char old_legacy_cfg;
c7561cd8 365#ifdef CONFIG_PM_SLEEP
1da177e4
LT
366 unsigned char legacy_saved;
367 unsigned char legacy_cfg_saved;
368 unsigned char spdif_ctrl_saved;
369 unsigned char capture_src_saved[2];
370 unsigned int mpu_port_saved;
371#endif
372
00f226d4
HM
373 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
374 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT
375
376 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
377
378 struct pci_dev *pci;
e437e3d7 379 struct snd_card *card;
1da177e4
LT
380
381 unsigned int num_devs;
382 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 383 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT
384 struct via_rate_lock rates[2]; /* playback and capture */
385 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
386 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 387 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT
388 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
389
e437e3d7
TI
390 struct snd_pcm *pcms[2];
391 struct snd_rawmidi *rmidi;
3d009413 392 struct snd_kcontrol *dxs_controls[4];
1da177e4 393
e437e3d7
TI
394 struct snd_ac97_bus *ac97_bus;
395 struct snd_ac97 *ac97;
1da177e4
LT
396 unsigned int ac97_clock;
397 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
398
399 spinlock_t reg_lock;
e437e3d7 400 struct snd_info_entry *proc_entry;
1da177e4
LT
401
402#ifdef SUPPORT_JOYSTICK
403 struct gameport *gameport;
404#endif
405};
406
9baa3c34 407static const struct pci_device_id snd_via82xx_ids[] = {
4f550df5 408 /* 0x1106, 0x3058 */
28d27aae 409 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 410 /* 0x1106, 0x3059 */
28d27aae 411 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT
412 { 0, }
413};
414
415MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
416
417/*
418 */
419
420/*
421 * allocate and initialize the descriptor buffers
422 * periods = number of periods
423 * fragsize = period size in bytes
424 */
e437e3d7 425static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT
426 struct pci_dev *pci,
427 unsigned int periods, unsigned int fragsize)
428{
429 unsigned int i, idx, ofs, rest;
e437e3d7 430 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
431
432 if (dev->table.area == NULL) {
433 /* the start of each lists must be aligned to 8 bytes,
434 * but the kernel pages are much bigger, so we don't care
435 */
436 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
437 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
438 &dev->table) < 0)
439 return -ENOMEM;
440 }
441 if (! dev->idx_table) {
6da2ec56
KC
442 dev->idx_table = kmalloc_array(VIA_TABLE_SIZE,
443 sizeof(*dev->idx_table),
444 GFP_KERNEL);
1da177e4
LT
445 if (! dev->idx_table)
446 return -ENOMEM;
447 }
448
449 /* fill the entries */
450 idx = 0;
451 ofs = 0;
452 for (i = 0; i < periods; i++) {
453 rest = fragsize;
454 /* fill descriptors for a period.
455 * a period can be split to several descriptors if it's
456 * over page boundary.
457 */
458 do {
459 unsigned int r;
460 unsigned int flag;
77a23f26 461 unsigned int addr;
1da177e4
LT
462
463 if (idx >= VIA_TABLE_SIZE) {
59d3acfa 464 dev_err(&pci->dev, "too much table size!\n");
1da177e4
LT
465 return -EINVAL;
466 }
77a23f26
TI
467 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
468 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr);
5503600a 469 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT
470 rest -= r;
471 if (! rest) {
472 if (i == periods - 1)
473 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
474 else
475 flag = VIA_TBL_BIT_FLAG; /* period boundary */
476 } else
477 flag = 0; /* period continues to the next */
ee419653 478 /*
59d3acfa
TI
479 dev_dbg(&pci->dev,
480 "tbl %d: at %d size %d (rest %d)\n",
481 idx, ofs, r, rest);
ee419653 482 */
1da177e4
LT
483 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
484 dev->idx_table[idx].offset = ofs;
485 dev->idx_table[idx].size = r;
486 ofs += r;
487 idx++;
488 } while (rest > 0);
489 }
490 dev->tbl_entries = idx;
491 dev->bufsize = periods * fragsize;
492 dev->bufsize2 = dev->bufsize / 2;
493 dev->fragsize = fragsize;
494 return 0;
495}
496
497
e437e3d7 498static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT
499 struct pci_dev *pci)
500{
501 if (dev->table.area) {
502 snd_dma_free_pages(&dev->table);
503 dev->table.area = NULL;
504 }
4d572776
JJ
505 kfree(dev->idx_table);
506 dev->idx_table = NULL;
1da177e4
LT
507 return 0;
508}
509
510/*
511 * Basic I/O
512 */
513
e437e3d7 514static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT
515{
516 return inl(VIAREG(chip, AC97));
517}
518
e437e3d7 519static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT
520{
521 outl(val, VIAREG(chip, AC97));
522}
523
e437e3d7 524static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT
525{
526 unsigned int timeout = 1000; /* 1ms */
527 unsigned int val;
528
529 while (timeout-- > 0) {
530 udelay(1);
531 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
532 return val & 0xffff;
533 }
59d3acfa 534 dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
e437e3d7 535 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT
536 return -EIO;
537}
538
e437e3d7 539static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT
540{
541 unsigned int timeout = 1000; /* 1ms */
542 unsigned int val, val1;
543 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
544 VIA_REG_AC97_SECONDARY_VALID;
545
546 while (timeout-- > 0) {
547 val = snd_via82xx_codec_xread(chip);
548 val1 = val & (VIA_REG_AC97_BUSY | stat);
549 if (val1 == stat)
550 return val & 0xffff;
551 udelay(1);
552 }
553 return -EIO;
554}
555
e437e3d7 556static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 557{
e437e3d7 558 struct via82xx *chip = ac97->private_data;
1da177e4
LT
559 int err;
560 err = snd_via82xx_codec_ready(chip, ac97->num);
561 /* here we need to wait fairly for long time.. */
115551d9
SA
562 if (!nodelay)
563 msleep(500);
1da177e4
LT
564}
565
e437e3d7 566static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT
567 unsigned short reg,
568 unsigned short val)
569{
e437e3d7 570 struct via82xx *chip = ac97->private_data;
1da177e4 571 unsigned int xval;
4f550df5 572
1da177e4
LT
573 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
574 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
575 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
576 xval |= val << VIA_REG_AC97_DATA_SHIFT;
577 snd_via82xx_codec_xwrite(chip, xval);
578 snd_via82xx_codec_ready(chip, ac97->num);
579}
580
e437e3d7 581static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 582{
e437e3d7 583 struct via82xx *chip = ac97->private_data;
1da177e4
LT
584 unsigned int xval, val = 0xffff;
585 int again = 0;
586
587 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
588 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
589 xval |= VIA_REG_AC97_READ;
590 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
591 while (1) {
592 if (again++ > 3) {
59d3acfa
TI
593 dev_err(chip->card->dev,
594 "codec_read: codec %i is not valid [0x%x]\n",
e437e3d7 595 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT
596 return 0xffff;
597 }
598 snd_via82xx_codec_xwrite(chip, xval);
599 udelay (20);
600 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
601 udelay(25);
602 val = snd_via82xx_codec_xread(chip);
603 break;
604 }
605 }
606 return val & 0xffff;
607}
608
e437e3d7 609static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT
610{
611 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
612 VIADEV_REG(viadev, OFFSET_CONTROL));
613 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
614 udelay(50);
615 /* disable interrupts */
616 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
617 /* clear interrupts */
618 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
619 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
620 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
621 viadev->lastpos = 0;
4f550df5 622 viadev->hwptr_done = 0;
1da177e4
LT
623}
624
625
626/*
627 * Interrupt handler
4f550df5 628 * Used for 686 and 8233A
1da177e4 629 */
7d12e780 630static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 631{
e437e3d7 632 struct via82xx *chip = dev_id;
1da177e4
LT
633 unsigned int status;
634 unsigned int i;
635
636 status = inl(VIAREG(chip, SGD_SHADOW));
637 if (! (status & chip->intr_mask)) {
638 if (chip->rmidi)
639 /* check mpu401 interrupt */
7d12e780 640 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT
641 return IRQ_NONE;
642 }
643
644 /* check status for each stream */
645 spin_lock(&chip->reg_lock);
646 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 647 struct viadev *viadev = &chip->devs[i];
1da177e4 648 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 649 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT
650 continue;
651 if (viadev->substream && viadev->running) {
4f550df5
KW
652 /*
653 * Update hwptr_done based on 'period elapsed'
654 * interrupts. We'll use it, when the chip returns 0
655 * for OFFSET_CURR_COUNT.
656 */
657 if (c_status & VIA_REG_STAT_EOL)
658 viadev->hwptr_done = 0;
659 else
660 viadev->hwptr_done += viadev->fragsize;
661 viadev->in_interrupt = c_status;
1da177e4
LT
662 spin_unlock(&chip->reg_lock);
663 snd_pcm_period_elapsed(viadev->substream);
664 spin_lock(&chip->reg_lock);
4f550df5 665 viadev->in_interrupt = 0;
1da177e4
LT
666 }
667 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
668 }
669 spin_unlock(&chip->reg_lock);
670 return IRQ_HANDLED;
671}
672
4f550df5
KW
673/*
674 * Interrupt handler
675 */
7d12e780 676static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 677{
e437e3d7 678 struct via82xx *chip = dev_id;
4f550df5
KW
679 unsigned int status;
680 unsigned int i;
681 int irqreturn = 0;
682
683 /* check status for each stream */
684 spin_lock(&chip->reg_lock);
685 status = inl(VIAREG(chip, SGD_SHADOW));
686
687 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI
688 struct viadev *viadev = &chip->devs[i];
689 struct snd_pcm_substream *substream;
4f550df5
KW
690 unsigned char c_status, shadow_status;
691
692 shadow_status = (status >> viadev->shadow_shift) &
693 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
694 VIA_REG_STAT_FLAG);
695 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
696 if (!c_status)
697 continue;
698
699 substream = viadev->substream;
700 if (substream && viadev->running) {
701 /*
702 * Update hwptr_done based on 'period elapsed'
703 * interrupts. We'll use it, when the chip returns 0
704 * for OFFSET_CURR_COUNT.
705 */
706 if (c_status & VIA_REG_STAT_EOL)
707 viadev->hwptr_done = 0;
708 else
709 viadev->hwptr_done += viadev->fragsize;
710 viadev->in_interrupt = c_status;
711 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
712 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
713 spin_unlock(&chip->reg_lock);
714
715 snd_pcm_period_elapsed(substream);
716
717 spin_lock(&chip->reg_lock);
718 viadev->in_interrupt = 0;
719 }
720 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
721 irqreturn = 1;
722 }
723 spin_unlock(&chip->reg_lock);
724 return IRQ_RETVAL(irqreturn);
725}
726
1da177e4
LT
727/*
728 * PCM callbacks
729 */
730
731/*
732 * trigger callback
733 */
e437e3d7 734static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 735{
e437e3d7
TI
736 struct via82xx *chip = snd_pcm_substream_chip(substream);
737 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
738 unsigned char val;
739
740 if (chip->chip_type != TYPE_VIA686)
741 val = VIA_REG_CTRL_INT;
742 else
743 val = 0;
744 switch (cmd) {
745 case SNDRV_PCM_TRIGGER_START:
41e4845c 746 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
747 val |= VIA_REG_CTRL_START;
748 viadev->running = 1;
749 break;
750 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 751 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
752 val = VIA_REG_CTRL_TERMINATE;
753 viadev->running = 0;
754 break;
755 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
756 val |= VIA_REG_CTRL_PAUSE;
757 viadev->running = 0;
758 break;
759 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
760 viadev->running = 1;
761 break;
762 default:
763 return -EINVAL;
764 }
765 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
766 if (cmd == SNDRV_PCM_TRIGGER_STOP)
767 snd_via82xx_channel_reset(chip, viadev);
768 return 0;
769}
770
771
772/*
773 * pointer callbacks
774 */
775
776/*
777 * calculate the linear position at the given sg-buffer index and the rest count
778 */
779
780#define check_invalid_pos(viadev,pos) \
e437e3d7
TI
781 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
782 viadev->lastpos < viadev->bufsize2))
1da177e4 783
59d3acfa
TI
784static inline unsigned int calc_linear_pos(struct via82xx *chip,
785 struct viadev *viadev,
786 unsigned int idx,
e437e3d7 787 unsigned int count)
1da177e4
LT
788{
789 unsigned int size, base, res;
790
791 size = viadev->idx_table[idx].size;
792 base = viadev->idx_table[idx].offset;
793 res = base + size - count;
4f550df5
KW
794 if (res >= viadev->bufsize)
795 res -= viadev->bufsize;
1da177e4
LT
796
797 /* check the validity of the calculated position */
798 if (size < count) {
59d3acfa
TI
799 dev_dbg(chip->card->dev,
800 "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
e437e3d7 801 (int)size, (int)count);
1da177e4
LT
802 res = viadev->lastpos;
803 } else {
804 if (! count) {
805 /* Some mobos report count = 0 on the DMA boundary,
806 * i.e. count = size indeed.
807 * Let's check whether this step is above the expected size.
808 */
809 int delta = res - viadev->lastpos;
810 if (delta < 0)
811 delta += viadev->bufsize;
812 if ((unsigned int)delta > viadev->fragsize)
813 res = base;
814 }
815 if (check_invalid_pos(viadev, res)) {
816#ifdef POINTER_DEBUG
59d3acfa
TI
817 dev_dbg(chip->card->dev,
818 "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
819 idx, viadev->tbl_entries,
e437e3d7
TI
820 viadev->lastpos, viadev->bufsize2,
821 viadev->idx_table[idx].offset,
822 viadev->idx_table[idx].size, count);
1da177e4
LT
823#endif
824 /* count register returns full size when end of buffer is reached */
825 res = base + size;
826 if (check_invalid_pos(viadev, res)) {
59d3acfa
TI
827 dev_dbg(chip->card->dev,
828 "invalid via82xx_cur_ptr (2), using last valid pointer\n");
1da177e4
LT
829 res = viadev->lastpos;
830 }
831 }
832 }
1da177e4
LT
833 return res;
834}
835
836/*
837 * get the current pointer on via686
838 */
e437e3d7 839static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 840{
e437e3d7
TI
841 struct via82xx *chip = snd_pcm_substream_chip(substream);
842 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
843 unsigned int idx, ptr, count, res;
844
da3cec35
TI
845 if (snd_BUG_ON(!viadev->tbl_entries))
846 return 0;
1da177e4
LT
847 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
848 return 0;
849
850 spin_lock(&chip->reg_lock);
851 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
852 /* The via686a does not have the current index register,
853 * so we need to calculate the index from CURR_PTR.
854 */
855 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
856 if (ptr <= (unsigned int)viadev->table.addr)
857 idx = 0;
858 else /* CURR_PTR holds the address + 8 */
859 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
59d3acfa 860 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 861 viadev->lastpos = res; /* remember the last position */
1da177e4
LT
862 spin_unlock(&chip->reg_lock);
863
864 return bytes_to_frames(substream->runtime, res);
865}
866
867/*
868 * get the current pointer on via823x
869 */
e437e3d7 870static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 871{
e437e3d7
TI
872 struct via82xx *chip = snd_pcm_substream_chip(substream);
873 struct viadev *viadev = substream->runtime->private_data;
1da177e4 874 unsigned int idx, count, res;
4f550df5 875 int status;
1da177e4 876
da3cec35
TI
877 if (snd_BUG_ON(!viadev->tbl_entries))
878 return 0;
4f550df5 879
1da177e4 880 spin_lock(&chip->reg_lock);
4f550df5
KW
881 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
882 status = viadev->in_interrupt;
883 if (!status)
884 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
885
c6cc0e3b
BJ
886 /* An apparent bug in the 8251 is worked around by sending a
887 * REG_CTRL_START. */
888 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
889 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
890
4f550df5 891 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ
892 res = 0;
893 goto unlock;
4f550df5
KW
894 }
895 if (count & 0xffffff) {
896 idx = count >> 24;
897 if (idx >= viadev->tbl_entries) {
1da177e4 898#ifdef POINTER_DEBUG
59d3acfa
TI
899 dev_dbg(chip->card->dev,
900 "fail: invalid idx = %i/%i\n", idx,
e437e3d7 901 viadev->tbl_entries);
1da177e4 902#endif
4f550df5
KW
903 res = viadev->lastpos;
904 } else {
905 count &= 0xffffff;
59d3acfa 906 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 907 }
1da177e4 908 } else {
4f550df5
KW
909 res = viadev->hwptr_done;
910 if (!viadev->in_interrupt) {
911 if (status & VIA_REG_STAT_EOL) {
912 res = 0;
913 } else
914 if (status & VIA_REG_STAT_FLAG) {
915 res += viadev->fragsize;
916 }
917 }
918 }
919unlock:
920 viadev->lastpos = res;
1da177e4
LT
921 spin_unlock(&chip->reg_lock);
922
923 return bytes_to_frames(substream->runtime, res);
924}
925
926
927/*
928 * hw_params callback:
929 * allocate the buffer and build up the buffer description table
930 */
e437e3d7
TI
931static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
932 struct snd_pcm_hw_params *hw_params)
1da177e4 933{
e437e3d7
TI
934 struct via82xx *chip = snd_pcm_substream_chip(substream);
935 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
936 int err;
937
938 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
939 if (err < 0)
940 return err;
941 err = build_via_table(viadev, substream, chip->pci,
942 params_periods(hw_params),
943 params_period_bytes(hw_params));
944 if (err < 0)
945 return err;
946
947 return 0;
948}
949
950/*
951 * hw_free callback:
952 * clean up the buffer description table and release the buffer
953 */
e437e3d7 954static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 955{
e437e3d7
TI
956 struct via82xx *chip = snd_pcm_substream_chip(substream);
957 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
958
959 clean_via_table(viadev, substream, chip->pci);
960 snd_pcm_lib_free_pages(substream);
961 return 0;
962}
963
964
965/*
966 * set up the table pointer
967 */
e437e3d7 968static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT
969{
970 snd_via82xx_codec_ready(chip, 0);
971 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
972 udelay(20);
973 snd_via82xx_codec_ready(chip, 0);
974}
975
976/*
977 * prepare callback for playback and capture on via686
978 */
e437e3d7
TI
979static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
980 struct snd_pcm_runtime *runtime)
1da177e4
LT
981{
982 snd_via82xx_channel_reset(chip, viadev);
983 /* this must be set after channel_reset */
984 snd_via82xx_set_table_ptr(chip, viadev);
985 outb(VIA_REG_TYPE_AUTOSTART |
986 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
987 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
988 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
989 VIA_REG_TYPE_INT_EOL |
990 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
991}
992
e437e3d7 993static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 994{
e437e3d7
TI
995 struct via82xx *chip = snd_pcm_substream_chip(substream);
996 struct viadev *viadev = substream->runtime->private_data;
997 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
998
999 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1000 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1001 via686_setup_format(chip, viadev, runtime);
1002 return 0;
1003}
1004
e437e3d7 1005static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1006{
e437e3d7
TI
1007 struct via82xx *chip = snd_pcm_substream_chip(substream);
1008 struct viadev *viadev = substream->runtime->private_data;
1009 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1010
1011 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1012 via686_setup_format(chip, viadev, runtime);
1013 return 0;
1014}
1015
1016/*
1017 * lock the current rate
1018 */
1019static int via_lock_rate(struct via_rate_lock *rec, int rate)
1020{
1021 int changed = 0;
1022
1023 spin_lock_irq(&rec->lock);
1024 if (rec->rate != rate) {
1025 if (rec->rate && rec->used > 1) /* already set */
1026 changed = -EINVAL;
1027 else {
1028 rec->rate = rate;
1029 changed = 1;
1030 }
1031 }
1032 spin_unlock_irq(&rec->lock);
1033 return changed;
1034}
1035
1036/*
1037 * prepare callback for DSX playback on via823x
1038 */
e437e3d7 1039static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1040{
e437e3d7
TI
1041 struct via82xx *chip = snd_pcm_substream_chip(substream);
1042 struct viadev *viadev = substream->runtime->private_data;
1043 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1044 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT
1045 int rate_changed;
1046 u32 rbits;
1047
2d7eb7cb 1048 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1049 return rate_changed;
16d3f140 1050 if (rate_changed)
1da177e4
LT
1051 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1052 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI
1053 if (chip->spdif_on && viadev->reg_offset == 0x30)
1054 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1055
1da177e4
LT
1056 if (runtime->rate == 48000)
1057 rbits = 0xfffff;
1058 else
e437e3d7
TI
1059 rbits = (0x100000 / 48000) * runtime->rate +
1060 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1061 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT
1062 snd_via82xx_channel_reset(chip, viadev);
1063 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI
1064 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1065 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1066 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1067 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT
1068 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1069 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1070 rbits | /* rate */
1071 0xff000000, /* STOP index is never reached */
1072 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1073 udelay(20);
1074 snd_via82xx_codec_ready(chip, 0);
1075 return 0;
1076}
1077
1078/*
1079 * prepare callback for multi-channel playback on via823x
1080 */
e437e3d7 1081static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1082{
e437e3d7
TI
1083 struct via82xx *chip = snd_pcm_substream_chip(substream);
1084 struct viadev *viadev = substream->runtime->private_data;
1085 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1086 unsigned int slots;
1087 int fmt;
1088
1089 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1090 return -EINVAL;
1091 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1092 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1093 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1094 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1095 snd_via82xx_channel_reset(chip, viadev);
1096 snd_via82xx_set_table_ptr(chip, viadev);
1097
e437e3d7
TI
1098 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1099 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT
1100 fmt |= runtime->channels << 4;
1101 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1102#if 0
1103 if (chip->revision == VIA_REV_8233A)
1104 slots = 0;
1105 else
1106#endif
1107 {
1108 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1109 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1110 switch (runtime->channels) {
1111 case 1: slots = (1<<0) | (1<<4); break;
1112 case 2: slots = (1<<0) | (2<<4); break;
1113 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1114 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1115 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1116 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1117 default: slots = 0; break;
1118 }
1119 }
1120 /* STOP index is never reached */
1121 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1122 udelay(20);
1123 snd_via82xx_codec_ready(chip, 0);
1124 return 0;
1125}
1126
1127/*
1128 * prepare callback for capture on via823x
1129 */
e437e3d7 1130static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1131{
e437e3d7
TI
1132 struct via82xx *chip = snd_pcm_substream_chip(substream);
1133 struct viadev *viadev = substream->runtime->private_data;
1134 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1135
1136 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1137 return -EINVAL;
1138 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1139 snd_via82xx_channel_reset(chip, viadev);
1140 snd_via82xx_set_table_ptr(chip, viadev);
1141 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1142 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1143 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1144 0xff000000, /* STOP index is never reached */
1145 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1146 udelay(20);
1147 snd_via82xx_codec_ready(chip, 0);
1148 return 0;
1149}
1150
1151
1152/*
1153 * pcm hardware definition, identical for both playback and capture
1154 */
dee49895 1155static const struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT
1156{
1157 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1158 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1159 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1160 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT
1161 SNDRV_PCM_INFO_PAUSE),
1162 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1163 .rates = SNDRV_PCM_RATE_48000,
1164 .rate_min = 48000,
1165 .rate_max = 48000,
1166 .channels_min = 1,
1167 .channels_max = 2,
5503600a 1168 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1169 .period_bytes_min = 32,
5503600a 1170 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT
1171 .periods_min = 2,
1172 .periods_max = VIA_TABLE_SIZE / 2,
1173 .fifo_size = 0,
1174};
1175
1176
1177/*
1178 * open callback skeleton
1179 */
e437e3d7
TI
1180static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1181 struct snd_pcm_substream *substream)
1da177e4 1182{
e437e3d7 1183 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1184 int err;
1185 struct via_rate_lock *ratep;
5495ffbd 1186 bool use_src = false;
1da177e4
LT
1187
1188 runtime->hw = snd_via82xx_hw;
1189
1190 /* set the hw rate condition */
1191 ratep = &chip->rates[viadev->direction];
1192 spin_lock_irq(&ratep->lock);
1193 ratep->used++;
1194 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1195 /* DXS#3 and spdif is on */
1196 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1197 snd_pcm_limit_hw_rates(runtime);
1198 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1199 /* fixed DXS playback rate */
1200 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1201 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV
1202 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1203 /* use full SRC capabilities of DXS */
1204 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1205 SNDRV_PCM_RATE_8000_48000);
1206 runtime->hw.rate_min = 8000;
1207 runtime->hw.rate_max = 48000;
5495ffbd 1208 use_src = true;
1da177e4
LT
1209 } else if (! ratep->rate) {
1210 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1211 runtime->hw.rates = chip->ac97->rates[idx];
1212 snd_pcm_limit_hw_rates(runtime);
1213 } else {
1214 /* a fixed rate */
1215 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1216 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1217 }
1218 spin_unlock_irq(&ratep->lock);
1219
1220 /* we may remove following constaint when we modify table entries
1221 in interrupt */
1222 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1223 return err;
1224
5495ffbd
CL
1225 if (use_src) {
1226 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1227 if (err < 0)
1228 return err;
1229 }
1230
1da177e4
LT
1231 runtime->private_data = viadev;
1232 viadev->substream = substream;
1233
1234 return 0;
1235}
1236
1237
1238/*
3d009413 1239 * open callback for playback on via686
1da177e4 1240 */
3d009413 1241static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1242{
e437e3d7
TI
1243 struct via82xx *chip = snd_pcm_substream_chip(substream);
1244 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT
1245 int err;
1246
1247 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1248 return err;
1249 return 0;
1250}
1251
3d009413
CL
1252/*
1253 * open callback for playback on via823x DXS
1254 */
1255static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1256{
1257 struct via82xx *chip = snd_pcm_substream_chip(substream);
1258 struct viadev *viadev;
1259 unsigned int stream;
1260 int err;
1261
1262 viadev = &chip->devs[chip->playback_devno + substream->number];
1263 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1264 return err;
1265 stream = viadev->reg_offset / 0x10;
1266 if (chip->dxs_controls[stream]) {
395c61d1
CL
1267 chip->playback_volume[stream][0] =
1268 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
1269 chip->playback_volume[stream][1] =
1270 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
3d009413
CL
1271 chip->dxs_controls[stream]->vd[0].access &=
1272 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1273 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1274 SNDRV_CTL_EVENT_MASK_INFO,
1275 &chip->dxs_controls[stream]->id);
1276 }
1277 return 0;
1278}
1279
1da177e4
LT
1280/*
1281 * open callback for playback on via823x multi-channel
1282 */
e437e3d7 1283static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1284{
e437e3d7
TI
1285 struct via82xx *chip = snd_pcm_substream_chip(substream);
1286 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT
1287 int err;
1288 /* channels constraint for VIA8233A
1289 * 3 and 5 channels are not supported
1290 */
fbc57b2a 1291 static const unsigned int channels[] = {
1da177e4
LT
1292 1, 2, 4, 6
1293 };
fbc57b2a 1294 static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT
1295 .count = ARRAY_SIZE(channels),
1296 .list = channels,
1297 .mask = 0,
1298 };
1299
1300 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1301 return err;
1302 substream->runtime->hw.channels_max = 6;
1303 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI
1304 snd_pcm_hw_constraint_list(substream->runtime, 0,
1305 SNDRV_PCM_HW_PARAM_CHANNELS,
1306 &hw_constraints_channels);
1da177e4
LT
1307 return 0;
1308}
1309
1310/*
1311 * open callback for capture on via686 and via823x
1312 */
e437e3d7 1313static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1314{
e437e3d7
TI
1315 struct via82xx *chip = snd_pcm_substream_chip(substream);
1316 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT
1317
1318 return snd_via82xx_pcm_open(chip, viadev, substream);
1319}
1320
1321/*
1322 * close callback
1323 */
e437e3d7 1324static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1325{
e437e3d7
TI
1326 struct via82xx *chip = snd_pcm_substream_chip(substream);
1327 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
1328 struct via_rate_lock *ratep;
1329
1330 /* release the rate lock */
1331 ratep = &chip->rates[viadev->direction];
1332 spin_lock_irq(&ratep->lock);
1333 ratep->used--;
1334 if (! ratep->used)
1335 ratep->rate = 0;
1336 spin_unlock_irq(&ratep->lock);
6dbe6628
TI
1337 if (! ratep->rate) {
1338 if (! viadev->direction) {
1339 snd_ac97_update_power(chip->ac97,
1340 AC97_PCM_FRONT_DAC_RATE, 0);
1341 snd_ac97_update_power(chip->ac97,
1342 AC97_PCM_SURR_DAC_RATE, 0);
1343 snd_ac97_update_power(chip->ac97,
1344 AC97_PCM_LFE_DAC_RATE, 0);
1345 } else
1346 snd_ac97_update_power(chip->ac97,
1347 AC97_PCM_LR_ADC_RATE, 0);
1348 }
1da177e4
LT
1349 viadev->substream = NULL;
1350 return 0;
1351}
1352
3d009413
CL
1353static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1354{
1355 struct via82xx *chip = snd_pcm_substream_chip(substream);
1356 struct viadev *viadev = substream->runtime->private_data;
1357 unsigned int stream;
1358
1359 stream = viadev->reg_offset / 0x10;
1360 if (chip->dxs_controls[stream]) {
1361 chip->dxs_controls[stream]->vd[0].access |=
1362 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1363 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1364 &chip->dxs_controls[stream]->id);
1365 }
1366 return snd_via82xx_pcm_close(substream);
1367}
1368
1da177e4
LT
1369
1370/* via686 playback callbacks */
6769e988 1371static const struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1372 .open = snd_via686_playback_open,
1da177e4
LT
1373 .close = snd_via82xx_pcm_close,
1374 .ioctl = snd_pcm_lib_ioctl,
1375 .hw_params = snd_via82xx_hw_params,
1376 .hw_free = snd_via82xx_hw_free,
1377 .prepare = snd_via686_playback_prepare,
1378 .trigger = snd_via82xx_pcm_trigger,
1379 .pointer = snd_via686_pcm_pointer,
1380 .page = snd_pcm_sgbuf_ops_page,
1381};
1382
1383/* via686 capture callbacks */
6769e988 1384static const struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT
1385 .open = snd_via82xx_capture_open,
1386 .close = snd_via82xx_pcm_close,
1387 .ioctl = snd_pcm_lib_ioctl,
1388 .hw_params = snd_via82xx_hw_params,
1389 .hw_free = snd_via82xx_hw_free,
1390 .prepare = snd_via686_capture_prepare,
1391 .trigger = snd_via82xx_pcm_trigger,
1392 .pointer = snd_via686_pcm_pointer,
1393 .page = snd_pcm_sgbuf_ops_page,
1394};
1395
1396/* via823x DSX playback callbacks */
6769e988 1397static const struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL
1398 .open = snd_via8233_playback_open,
1399 .close = snd_via8233_playback_close,
1da177e4
LT
1400 .ioctl = snd_pcm_lib_ioctl,
1401 .hw_params = snd_via82xx_hw_params,
1402 .hw_free = snd_via82xx_hw_free,
1403 .prepare = snd_via8233_playback_prepare,
1404 .trigger = snd_via82xx_pcm_trigger,
1405 .pointer = snd_via8233_pcm_pointer,
1406 .page = snd_pcm_sgbuf_ops_page,
1407};
1408
1409/* via823x multi-channel playback callbacks */
6769e988 1410static const struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT
1411 .open = snd_via8233_multi_open,
1412 .close = snd_via82xx_pcm_close,
1413 .ioctl = snd_pcm_lib_ioctl,
1414 .hw_params = snd_via82xx_hw_params,
1415 .hw_free = snd_via82xx_hw_free,
1416 .prepare = snd_via8233_multi_prepare,
1417 .trigger = snd_via82xx_pcm_trigger,
1418 .pointer = snd_via8233_pcm_pointer,
1419 .page = snd_pcm_sgbuf_ops_page,
1420};
1421
1422/* via823x capture callbacks */
6769e988 1423static const struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT
1424 .open = snd_via82xx_capture_open,
1425 .close = snd_via82xx_pcm_close,
1426 .ioctl = snd_pcm_lib_ioctl,
1427 .hw_params = snd_via82xx_hw_params,
1428 .hw_free = snd_via82xx_hw_free,
1429 .prepare = snd_via8233_capture_prepare,
1430 .trigger = snd_via82xx_pcm_trigger,
1431 .pointer = snd_via8233_pcm_pointer,
1432 .page = snd_pcm_sgbuf_ops_page,
1433};
1434
1435
e437e3d7
TI
1436static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1437 int shadow_pos, int direction)
1da177e4
LT
1438{
1439 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1440 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT
1441 chip->devs[idx].direction = direction;
1442 chip->devs[idx].port = chip->port + reg_offset;
1443}
1444
1445/*
1446 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1447 */
e23e7a14 1448static int snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1449{
e437e3d7 1450 struct snd_pcm *pcm;
e36e3b86 1451 struct snd_pcm_chmap *chmap;
1da177e4
LT
1452 int i, err;
1453
1454 chip->playback_devno = 0; /* x 4 */
1455 chip->multi_devno = 4; /* x 1 */
1456 chip->capture_devno = 5; /* x 2 */
1457 chip->num_devs = 7;
1458 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1459
1460 /* PCM #0: 4 DSX playbacks and 1 capture */
1461 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1462 if (err < 0)
1463 return err;
1464 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1465 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1466 pcm->private_data = chip;
1467 strcpy(pcm->name, chip->card->shortname);
1468 chip->pcms[0] = pcm;
1469 /* set up playbacks */
1470 for (i = 0; i < 4; i++)
4f550df5 1471 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1472 /* capture */
4f550df5 1473 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1474
a2e3961d
TI
1475 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1476 snd_dma_pci_data(chip->pci),
5503600a 1477 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1478
e36e3b86
TI
1479 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1480 snd_pcm_std_chmaps, 2, 0,
1481 &chmap);
1482 if (err < 0)
1483 return err;
1484
1da177e4
LT
1485 /* PCM #1: multi-channel playback and 2nd capture */
1486 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1487 if (err < 0)
1488 return err;
1489 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1490 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1491 pcm->private_data = chip;
1492 strcpy(pcm->name, chip->card->shortname);
1493 chip->pcms[1] = pcm;
1494 /* set up playback */
4f550df5 1495 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1496 /* set up capture */
4f550df5 1497 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1498
a2e3961d
TI
1499 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1500 snd_dma_pci_data(chip->pci),
5503600a 1501 64*1024, VIA_MAX_BUFSIZE);
e36e3b86
TI
1502
1503 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1504 snd_pcm_alt_chmaps, 6, 0,
1505 &chmap);
1506 if (err < 0)
1507 return err;
1508 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1509
1da177e4
LT
1510 return 0;
1511}
1512
1513/*
1514 * create pcm instances for VIA8233A
1515 */
e23e7a14 1516static int snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1517{
e437e3d7 1518 struct snd_pcm *pcm;
e36e3b86 1519 struct snd_pcm_chmap *chmap;
1da177e4
LT
1520 int err;
1521
1522 chip->multi_devno = 0;
1523 chip->playback_devno = 1;
1524 chip->capture_devno = 2;
1525 chip->num_devs = 3;
1526 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1527
1528 /* PCM #0: multi-channel playback and capture */
1529 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1530 if (err < 0)
1531 return err;
1532 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1533 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1534 pcm->private_data = chip;
1535 strcpy(pcm->name, chip->card->shortname);
1536 chip->pcms[0] = pcm;
1537 /* set up playback */
4f550df5 1538 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1539 /* capture */
4f550df5 1540 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1541
a2e3961d
TI
1542 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1543 snd_dma_pci_data(chip->pci),
5503600a 1544 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1545
e36e3b86
TI
1546 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1547 snd_pcm_alt_chmaps, 6, 0,
1548 &chmap);
1549 if (err < 0)
1550 return err;
1551 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1552
1da177e4
LT
1553 /* SPDIF supported? */
1554 if (! ac97_can_spdif(chip->ac97))
1555 return 0;
1556
1557 /* PCM #1: DXS3 playback (for spdif) */
1558 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1559 if (err < 0)
1560 return err;
1561 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1562 pcm->private_data = chip;
1563 strcpy(pcm->name, chip->card->shortname);
1564 chip->pcms[1] = pcm;
1565 /* set up playback */
4f550df5 1566 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1567
a2e3961d
TI
1568 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1569 snd_dma_pci_data(chip->pci),
5503600a 1570 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT
1571 return 0;
1572}
1573
1574/*
1575 * create a pcm instance for via686a/b
1576 */
e23e7a14 1577static int snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1578{
e437e3d7 1579 struct snd_pcm *pcm;
1da177e4
LT
1580 int err;
1581
1582 chip->playback_devno = 0;
1583 chip->capture_devno = 1;
1584 chip->num_devs = 2;
1585 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1586
1587 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1588 if (err < 0)
1589 return err;
1590 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1591 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1592 pcm->private_data = chip;
1593 strcpy(pcm->name, chip->card->shortname);
1594 chip->pcms[0] = pcm;
4f550df5
KW
1595 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1596 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1597
a2e3961d
TI
1598 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1599 snd_dma_pci_data(chip->pci),
5503600a 1600 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT
1601 return 0;
1602}
1603
1604
1605/*
1606 * Mixer part
1607 */
1608
e437e3d7
TI
1609static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1610 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1611{
1612 /* formerly they were "Line" and "Mic", but it looks like that they
1613 * have nothing to do with the actual physical connections...
1614 */
9883ab91 1615 static const char * const texts[2] = {
1da177e4
LT
1616 "Input1", "Input2"
1617 };
9883ab91 1618 return snd_ctl_enum_info(uinfo, 1, 2, texts);
1da177e4
LT
1619}
1620
e437e3d7
TI
1621static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1622 struct snd_ctl_elem_value *ucontrol)
1da177e4 1623{
e437e3d7 1624 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1625 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1626 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1627 return 0;
1628}
1629
e437e3d7
TI
1630static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol)
1da177e4 1632{
e437e3d7 1633 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1634 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1635 u8 val, oval;
1636
1637 spin_lock_irq(&chip->reg_lock);
1638 oval = inb(port);
1639 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1640 if (ucontrol->value.enumerated.item[0])
1641 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1642 if (val != oval)
1643 outb(val, port);
1644 spin_unlock_irq(&chip->reg_lock);
1645 return val != oval;
1646}
1647
e23e7a14 1648static struct snd_kcontrol_new snd_via8233_capture_source = {
1da177e4
LT
1649 .name = "Input Source Select",
1650 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1651 .info = snd_via8233_capture_source_info,
1652 .get = snd_via8233_capture_source_get,
1653 .put = snd_via8233_capture_source_put,
1654};
1655
a5ce8890 1656#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1657
e437e3d7
TI
1658static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1da177e4 1660{
e437e3d7 1661 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1662 u8 val;
1663
1664 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1665 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1666 return 0;
1667}
1668
e437e3d7
TI
1669static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1670 struct snd_ctl_elem_value *ucontrol)
1da177e4 1671{
e437e3d7 1672 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1673 u8 val, oval;
1674
1675 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1676 val = oval & ~VIA8233_SPDIF_DX3;
1677 if (ucontrol->value.integer.value[0])
1678 val |= VIA8233_SPDIF_DX3;
1679 /* save the spdif flag for rate filtering */
1680 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1681 if (val != oval) {
1682 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1683 return 1;
1684 }
1685 return 0;
1686}
1687
f3b827e0 1688static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
10e8d78a 1689 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT
1690 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1691 .info = snd_via8233_dxs3_spdif_info,
1692 .get = snd_via8233_dxs3_spdif_get,
1693 .put = snd_via8233_dxs3_spdif_put,
1694};
1695
e437e3d7
TI
1696static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1697 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1698{
1699 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1700 uinfo->count = 2;
1701 uinfo->value.integer.min = 0;
1702 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1703 return 0;
1704}
1705
e437e3d7
TI
1706static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1707 struct snd_ctl_elem_value *ucontrol)
1da177e4 1708{
e437e3d7 1709 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1710 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM
1711
1712 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1713 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1714 return 0;
1715}
1716
e437e3d7
TI
1717static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1718 struct snd_ctl_elem_value *ucontrol)
00f226d4 1719{
e437e3d7 1720 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM
1721 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1722 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT
1723 return 0;
1724}
1725
e437e3d7
TI
1726static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1727 struct snd_ctl_elem_value *ucontrol)
00f226d4 1728{
e437e3d7 1729 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1730 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM
1731 unsigned long port = chip->port + 0x10 * idx;
1732 unsigned char val;
1733 int i, change = 0;
1734
1735 for (i = 0; i < 2; i++) {
1736 val = ucontrol->value.integer.value[i];
1737 if (val > VIA_DXS_MAX_VOLUME)
1738 val = VIA_DXS_MAX_VOLUME;
1739 val = VIA_DXS_MAX_VOLUME - val;
1740 change |= val != chip->playback_volume[idx][i];
1741 if (change) {
1742 chip->playback_volume[idx][i] = val;
1743 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1744 }
1745 }
1746 return change;
1747}
1748
e437e3d7
TI
1749static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1750 struct snd_ctl_elem_value *ucontrol)
1da177e4 1751{
e437e3d7 1752 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1753 unsigned int idx;
1754 unsigned char val;
1755 int i, change = 0;
1756
1757 for (i = 0; i < 2; i++) {
1758 val = ucontrol->value.integer.value[i];
1759 if (val > VIA_DXS_MAX_VOLUME)
1760 val = VIA_DXS_MAX_VOLUME;
1761 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1762 if (val != chip->playback_volume_c[i]) {
1da177e4 1763 change = 1;
00f226d4 1764 chip->playback_volume_c[i] = val;
1da177e4
LT
1765 for (idx = 0; idx < 4; idx++) {
1766 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1767 chip->playback_volume[idx][i] = val;
1da177e4
LT
1768 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1769 }
1770 }
1771 }
1772 return change;
1773}
1774
b452e08e 1775static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1776
f3b827e0 1777static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
1da177e4
LT
1778 .name = "PCM Playback Volume",
1779 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI
1780 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1781 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1782 .info = snd_via8233_dxs_volume_info,
00f226d4
HM
1783 .get = snd_via8233_pcmdxs_volume_get,
1784 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1785 .tlv = { .p = db_scale_dxs }
00f226d4
HM
1786};
1787
f3b827e0 1788static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
2fb930b5
CL
1789 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1790 .device = 0,
1791 /* .subdevice set later */
1792 .name = "PCM Playback Volume",
3d009413
CL
1793 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1794 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1795 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1796 .info = snd_via8233_dxs_volume_info,
1da177e4
LT
1797 .get = snd_via8233_dxs_volume_get,
1798 .put = snd_via8233_dxs_volume_put,
7058c042 1799 .tlv = { .p = db_scale_dxs }
1da177e4
LT
1800};
1801
1802/*
1803 */
1804
e437e3d7 1805static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1806{
e437e3d7 1807 struct via82xx *chip = bus->private_data;
1da177e4
LT
1808 chip->ac97_bus = NULL;
1809}
1810
e437e3d7 1811static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1812{
e437e3d7 1813 struct via82xx *chip = ac97->private_data;
1da177e4
LT
1814 chip->ac97 = NULL;
1815}
1816
eab0fbfa 1817static const struct ac97_quirk ac97_quirks[] = {
1da177e4 1818 {
69ad07cf
JK
1819 .subvendor = 0x1106,
1820 .subdevice = 0x4161,
1da177e4
LT
1821 .codec_id = 0x56494161, /* VT1612A */
1822 .name = "Soltek SL-75DRV5",
1823 .type = AC97_TUNE_NONE
1824 },
1825 { /* FIXME: which codec? */
69ad07cf
JK
1826 .subvendor = 0x1106,
1827 .subdevice = 0x4161,
1da177e4
LT
1828 .name = "ASRock K7VT2",
1829 .type = AC97_TUNE_HP_ONLY
1830 },
bf30a430
CL
1831 {
1832 .subvendor = 0x110a,
1833 .subdevice = 0x0079,
1834 .name = "Fujitsu Siemens D1289",
1835 .type = AC97_TUNE_HP_ONLY
1836 },
1da177e4 1837 {
69ad07cf
JK
1838 .subvendor = 0x1019,
1839 .subdevice = 0x0a81,
1da177e4
LT
1840 .name = "ECS K7VTA3",
1841 .type = AC97_TUNE_HP_ONLY
1842 },
1843 {
69ad07cf
JK
1844 .subvendor = 0x1019,
1845 .subdevice = 0x0a85,
1da177e4
LT
1846 .name = "ECS L7VMM2",
1847 .type = AC97_TUNE_HP_ONLY
1848 },
942fd1eb
WS
1849 {
1850 .subvendor = 0x1019,
1851 .subdevice = 0x1841,
1852 .name = "ECS K7VTA3",
1853 .type = AC97_TUNE_HP_ONLY
1854 },
1da177e4 1855 {
69ad07cf
JK
1856 .subvendor = 0x1849,
1857 .subdevice = 0x3059,
1da177e4
LT
1858 .name = "ASRock K7VM2",
1859 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1860 },
1861 {
69ad07cf
JK
1862 .subvendor = 0x14cd,
1863 .subdevice = 0x7002,
1da177e4
LT
1864 .name = "Unknown",
1865 .type = AC97_TUNE_ALC_JACK
1866 },
1867 {
69ad07cf
JK
1868 .subvendor = 0x1071,
1869 .subdevice = 0x8590,
1da177e4
LT
1870 .name = "Mitac Mobo",
1871 .type = AC97_TUNE_ALC_JACK
1872 },
1873 {
69ad07cf
JK
1874 .subvendor = 0x161f,
1875 .subdevice = 0x202b,
1da177e4
LT
1876 .name = "Arima Notebook",
1877 .type = AC97_TUNE_HP_ONLY,
1878 },
dac8dddd
TI
1879 {
1880 .subvendor = 0x161f,
1881 .subdevice = 0x2032,
1882 .name = "Targa Traveller 811",
1883 .type = AC97_TUNE_HP_ONLY,
1884 },
d4199f01
DC
1885 {
1886 .subvendor = 0x161f,
1887 .subdevice = 0x2032,
1888 .name = "m680x",
1889 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1890 },
9674513d
TI
1891 {
1892 .subvendor = 0x1297,
1893 .subdevice = 0xa232,
1894 .name = "Shuttle AK32VN",
1895 .type = AC97_TUNE_HP_ONLY
1896 },
1da177e4
LT
1897 { } /* terminator */
1898};
1899
e23e7a14 1900static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1901{
e437e3d7 1902 struct snd_ac97_template ac97;
1da177e4 1903 int err;
e437e3d7 1904 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1905 .write = snd_via82xx_codec_write,
1906 .read = snd_via82xx_codec_read,
1907 .wait = snd_via82xx_codec_wait,
1908 };
1909
1910 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1911 return err;
1912 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1913 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT
1914
1915 memset(&ac97, 0, sizeof(ac97));
1916 ac97.private_data = chip;
1917 ac97.private_free = snd_via82xx_mixer_free_ac97;
1918 ac97.pci = chip->pci;
f1a63a38 1919 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT
1920 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1921 return err;
1922
1923 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1924
1925 if (chip->chip_type != TYPE_VIA686) {
1926 /* use slot 10/11 */
1927 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1928 }
1929
1930 return 0;
1931}
1932
1933#ifdef SUPPORT_JOYSTICK
1934#define JOYSTICK_ADDR 0x200
e23e7a14 1935static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT
1936{
1937 struct gameport *gp;
1938 struct resource *r;
1939
b7fe4622 1940 if (!joystick)
1da177e4
LT
1941 return -ENODEV;
1942
1943 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1944 if (!r) {
59d3acfa 1945 dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
e437e3d7 1946 JOYSTICK_ADDR);
1da177e4
LT
1947 return -EBUSY;
1948 }
1949
1950 chip->gameport = gp = gameport_allocate_port();
1951 if (!gp) {
59d3acfa
TI
1952 dev_err(chip->card->dev,
1953 "cannot allocate memory for gameport\n");
b1d5776d 1954 release_and_free_resource(r);
1da177e4
LT
1955 return -ENOMEM;
1956 }
1957
1958 gameport_set_name(gp, "VIA686 Gameport");
1959 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1960 gameport_set_dev_parent(gp, &chip->pci->dev);
1961 gp->io = JOYSTICK_ADDR;
1962 gameport_set_port_data(gp, r);
1963
1964 /* Enable legacy joystick port */
1965 *legacy |= VIA_FUNC_ENABLE_GAME;
1966 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1967
1968 gameport_register_port(chip->gameport);
1969
1970 return 0;
1971}
1972
e437e3d7 1973static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT
1974{
1975 if (chip->gameport) {
1976 struct resource *r = gameport_get_port_data(chip->gameport);
1977
1978 gameport_unregister_port(chip->gameport);
1979 chip->gameport = NULL;
b1d5776d 1980 release_and_free_resource(r);
1da177e4
LT
1981 }
1982}
1983#else
e437e3d7 1984static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT
1985{
1986 return -ENOSYS;
1987}
e437e3d7 1988static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT
1989#endif
1990
1991
1992/*
1993 *
1994 */
1995
e23e7a14 1996static int snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT
1997{
1998 int i, err, caps;
1999 unsigned char val;
2000
2001 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
2002 for (i = 0; i < caps; i++) {
2003 snd_via8233_capture_source.index = i;
2004 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
2005 if (err < 0)
2006 return err;
2007 }
2008 if (ac97_can_spdif(chip->ac97)) {
2009 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
2010 if (err < 0)
2011 return err;
2012 }
2013 if (chip->chip_type != TYPE_VIA8233A) {
2014 /* when no h/w PCM volume control is found, use DXS volume control
2015 * as the PCM vol control
2016 */
e437e3d7 2017 struct snd_ctl_elem_id sid;
1da177e4
LT
2018 memset(&sid, 0, sizeof(sid));
2019 strcpy(sid.name, "PCM Playback Volume");
2020 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2021 if (! snd_ctl_find_id(chip->card, &sid)) {
59d3acfa
TI
2022 dev_info(chip->card->dev,
2023 "Using DXS as PCM Playback\n");
00f226d4
HM
2024 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
2025 if (err < 0)
2026 return err;
2027 }
2028 else /* Using DXS when PCM emulation is enabled is really weird */
2029 {
2fb930b5
CL
2030 for (i = 0; i < 4; ++i) {
2031 struct snd_kcontrol *kctl;
2032
2033 kctl = snd_ctl_new1(
2034 &snd_via8233_dxs_volume_control, chip);
2035 if (!kctl)
2036 return -ENOMEM;
2037 kctl->id.subdevice = i;
2038 err = snd_ctl_add(chip->card, kctl);
2039 if (err < 0)
2040 return err;
3d009413 2041 chip->dxs_controls[i] = kctl;
2fb930b5 2042 }
1da177e4
LT
2043 }
2044 }
1da177e4
LT
2045 /* select spdif data slot 10/11 */
2046 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2047 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2048 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2049 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2050
2051 return 0;
2052}
2053
e23e7a14 2054static int snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT
2055{
2056 unsigned char legacy, legacy_cfg;
2057 int rev_h = 0;
2058
2059 legacy = chip->old_legacy;
2060 legacy_cfg = chip->old_legacy_cfg;
2061 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2062 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2063 if (chip->revision >= VIA_REV_686_H) {
2064 rev_h = 1;
b7fe4622
CL
2065 if (mpu_port >= 0x200) { /* force MIDI */
2066 mpu_port &= 0xfffc;
2067 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
c7561cd8 2068#ifdef CONFIG_PM_SLEEP
b7fe4622 2069 chip->mpu_port_saved = mpu_port;
1da177e4
LT
2070#endif
2071 } else {
b7fe4622 2072 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT
2073 }
2074 } else {
b7fe4622 2075 switch (mpu_port) { /* force MIDI */
1da177e4
LT
2076 case 0x300:
2077 case 0x310:
2078 case 0x320:
2079 case 0x330:
2080 legacy_cfg &= ~(3 << 2);
b7fe4622 2081 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT
2082 break;
2083 default: /* no, use BIOS settings */
2084 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2085 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT
2086 break;
2087 }
2088 }
b7fe4622
CL
2089 if (mpu_port >= 0x200 &&
2090 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
2091 != NULL) {
1da177e4
LT
2092 if (rev_h)
2093 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2094 legacy |= VIA_FUNC_ENABLE_MIDI;
2095 } else {
2096 if (rev_h)
2097 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2098 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2099 mpu_port = 0;
1da177e4
LT
2100 }
2101
2102 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2103 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2104 if (chip->mpu_res) {
2105 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
dba8b469
CL
2106 mpu_port, MPU401_INFO_INTEGRATED |
2107 MPU401_INFO_IRQ_HOOK, -1,
2108 &chip->rmidi) < 0) {
59d3acfa
TI
2109 dev_warn(chip->card->dev,
2110 "unable to initialize MPU-401 at 0x%lx, skipping\n",
2111 mpu_port);
1da177e4
LT
2112 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2113 } else {
2114 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2115 }
2116 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2117 }
2118
b7fe4622 2119 snd_via686_create_gameport(chip, &legacy);
1da177e4 2120
c7561cd8 2121#ifdef CONFIG_PM_SLEEP
1da177e4
LT
2122 chip->legacy_saved = legacy;
2123 chip->legacy_cfg_saved = legacy_cfg;
2124#endif
2125
2126 return 0;
2127}
2128
2129
2130/*
2131 * proc interface
2132 */
e437e3d7
TI
2133static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2134 struct snd_info_buffer *buffer)
1da177e4 2135{
e437e3d7 2136 struct via82xx *chip = entry->private_data;
1da177e4
LT
2137 int i;
2138
2139 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2140 for (i = 0; i < 0xa0; i += 4) {
2141 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2142 }
2143}
2144
e23e7a14 2145static void snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2146{
e437e3d7 2147 struct snd_info_entry *entry;
1da177e4
LT
2148
2149 if (! snd_card_proc_new(chip->card, "via82xx", &entry))
bf850204 2150 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read);
1da177e4
LT
2151}
2152
2153/*
2154 *
2155 */
2156
e437e3d7 2157static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT
2158{
2159 unsigned int val;
ef21ca24 2160 unsigned long end_time;
1da177e4
LT
2161 unsigned char pval;
2162
2163#if 0 /* broken on K7M? */
2164 if (chip->chip_type == TYPE_VIA686)
2165 /* disable all legacy ports */
2166 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2167#endif
2168 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2169 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2170 /* deassert ACLink reset, force SYNC */
2171 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2172 VIA_ACLINK_CTRL_ENABLE |
2173 VIA_ACLINK_CTRL_RESET |
2174 VIA_ACLINK_CTRL_SYNC);
2175 udelay(100);
2176#if 1 /* FIXME: should we do full reset here for all chip models? */
2177 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2178 udelay(100);
2179#else
2180 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2181 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2182 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2183 udelay(2);
2184#endif
2185 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2186 /* note - FM data out has trouble with non VRA codecs !! */
2187 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2188 udelay(100);
2189 }
2190
2191 /* Make sure VRA is enabled, in case we didn't do a
2192 * complete codec reset, above */
2193 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2194 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2195 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2196 /* note - FM data out has trouble with non VRA codecs !! */
2197 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2198 udelay(100);
2199 }
2200
2201 /* wait until codec ready */
ef21ca24 2202 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
2203 do {
2204 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2205 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2206 break;
d86d0193 2207 schedule_timeout_uninterruptible(1);
ef21ca24 2208 } while (time_before(jiffies, end_time));
1da177e4
LT
2209
2210 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
59d3acfa
TI
2211 dev_err(chip->card->dev,
2212 "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT
2213
2214#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2215 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2216 VIA_REG_AC97_SECONDARY_VALID |
2217 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2218 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
2219 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2220 VIA_REG_AC97_SECONDARY_VALID |
2221 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2222 do {
2223 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2224 chip->ac97_secondary = 1;
2225 goto __ac97_ok2;
2226 }
d86d0193 2227 schedule_timeout_uninterruptible(1);
ef21ca24 2228 } while (time_before(jiffies, end_time));
1da177e4
LT
2229 /* This is ok, the most of motherboards have only one codec */
2230
2231 __ac97_ok2:
2232#endif
2233
2234 if (chip->chip_type == TYPE_VIA686) {
2235 /* route FM trap to IRQ, disable FM trap */
2236 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2237 /* disable all GPI interrupts */
2238 outl(0, VIAREG(chip, GPI_INTR));
2239 }
2240
2241 if (chip->chip_type != TYPE_VIA686) {
2242 /* Workaround for Award BIOS bug:
2243 * DXS channels don't work properly with VRA if MC97 is disabled.
2244 */
2245 struct pci_dev *pci;
0dd119f7 2246 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT
2247 if (pci) {
2248 unsigned char data;
2249 pci_read_config_byte(pci, 0x44, &data);
2250 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2251 pci_dev_put(pci);
1da177e4
LT
2252 }
2253 }
2254
2255 if (chip->chip_type != TYPE_VIA8233A) {
2256 int i, idx;
2257 for (idx = 0; idx < 4; idx++) {
2258 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM
2259 for (i = 0; i < 2; i++) {
2260 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI
2261 outb(chip->playback_volume_c[i],
2262 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2263 }
1da177e4
LT
2264 }
2265 }
2266
2267 return 0;
2268}
2269
c7561cd8 2270#ifdef CONFIG_PM_SLEEP
1da177e4
LT
2271/*
2272 * power management
2273 */
68cb2b55 2274static int snd_via82xx_suspend(struct device *dev)
1da177e4 2275{
68cb2b55 2276 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2277 struct via82xx *chip = card->private_data;
1da177e4
LT
2278 int i;
2279
57feb835 2280 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2281 for (i = 0; i < 2; i++)
57feb835 2282 snd_pcm_suspend_all(chip->pcms[i]);
1da177e4
LT
2283 for (i = 0; i < chip->num_devs; i++)
2284 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2285 synchronize_irq(chip->irq);
2286 snd_ac97_suspend(chip->ac97);
2287
2288 /* save misc values */
2289 if (chip->chip_type != TYPE_VIA686) {
2290 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2291 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2292 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2293 }
2294
1da177e4
LT
2295 return 0;
2296}
2297
68cb2b55 2298static int snd_via82xx_resume(struct device *dev)
1da177e4 2299{
68cb2b55 2300 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2301 struct via82xx *chip = card->private_data;
1da177e4
LT
2302 int i;
2303
1da177e4
LT
2304 snd_via82xx_chip_init(chip);
2305
2306 if (chip->chip_type == TYPE_VIA686) {
2307 if (chip->mpu_port_saved)
2308 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2309 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2310 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2311 } else {
2312 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2313 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2314 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2315 }
2316
2317 snd_ac97_resume(chip->ac97);
2318
2319 for (i = 0; i < chip->num_devs; i++)
2320 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2321
57feb835 2322 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
2323 return 0;
2324}
68cb2b55
TI
2325
2326static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
2327#define SND_VIA82XX_PM_OPS &snd_via82xx_pm
2328#else
2329#define SND_VIA82XX_PM_OPS NULL
c7561cd8 2330#endif /* CONFIG_PM_SLEEP */
1da177e4 2331
e437e3d7 2332static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT
2333{
2334 unsigned int i;
2335
2336 if (chip->irq < 0)
2337 goto __end_hw;
2338 /* disable interrupts */
2339 for (i = 0; i < chip->num_devs; i++)
2340 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2341
1da177e4 2342 if (chip->irq >= 0)
e437e3d7 2343 free_irq(chip->irq, chip);
757d5a75 2344 __end_hw:
b1d5776d 2345 release_and_free_resource(chip->mpu_res);
1da177e4
LT
2346 pci_release_regions(chip->pci);
2347
2348 if (chip->chip_type == TYPE_VIA686) {
2349 snd_via686_free_gameport(chip);
2350 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2351 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2352 }
2353 pci_disable_device(chip->pci);
2354 kfree(chip);
2355 return 0;
2356}
2357
e437e3d7 2358static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2359{
e437e3d7 2360 struct via82xx *chip = device->device_data;
1da177e4
LT
2361 return snd_via82xx_free(chip);
2362}
2363
e23e7a14
BP
2364static int snd_via82xx_create(struct snd_card *card,
2365 struct pci_dev *pci,
2366 int chip_type,
2367 int revision,
2368 unsigned int ac97_clock,
2369 struct via82xx **r_via)
1da177e4 2370{
e437e3d7 2371 struct via82xx *chip;
1da177e4 2372 int err;
e437e3d7 2373 static struct snd_device_ops ops = {
1da177e4
LT
2374 .dev_free = snd_via82xx_dev_free,
2375 };
2376
2377 if ((err = pci_enable_device(pci)) < 0)
2378 return err;
2379
e560d8d8 2380 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT
2381 pci_disable_device(pci);
2382 return -ENOMEM;
2383 }
2384
2385 chip->chip_type = chip_type;
2386 chip->revision = revision;
2387
2388 spin_lock_init(&chip->reg_lock);
2389 spin_lock_init(&chip->rates[0].lock);
2390 spin_lock_init(&chip->rates[1].lock);
2391 chip->card = card;
2392 chip->pci = pci;
2393 chip->irq = -1;
2394
2395 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2396 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2397 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2398 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2399
2400 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2401 kfree(chip);
2402 pci_disable_device(pci);
2403 return err;
2404 }
2405 chip->port = pci_resource_start(pci, 0);
4f550df5
KW
2406 if (request_irq(pci->irq,
2407 chip_type == TYPE_VIA8233 ?
2408 snd_via8233_interrupt : snd_via686_interrupt,
437a5a46 2409 IRQF_SHARED,
934c2b6d 2410 KBUILD_MODNAME, chip)) {
59d3acfa 2411 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2412 snd_via82xx_free(chip);
2413 return -EBUSY;
2414 }
2415 chip->irq = pci->irq;
2416 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2417 chip->ac97_clock = ac97_clock;
2418 synchronize_irq(chip->irq);
2419
2420 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2421 snd_via82xx_free(chip);
2422 return err;
2423 }
2424
2425 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2426 snd_via82xx_free(chip);
2427 return err;
2428 }
2429
2430 /* The 8233 ac97 controller does not implement the master bit
2431 * in the pci command register. IMHO this is a violation of the PCI spec.
2432 * We call pci_set_master here because it does not hurt. */
2433 pci_set_master(pci);
2434
1da177e4
LT
2435 *r_via = chip;
2436 return 0;
2437}
2438
2439struct via823x_info {
2440 int revision;
2441 char *name;
2442 int type;
2443};
e23e7a14 2444static struct via823x_info via823x_cards[] = {
1da177e4
LT
2445 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2446 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2447 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2448 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2449 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2450 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2451 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT
2452};
2453
2454/*
2455 * auto detection of DXS channel supports.
2456 */
9d74958a 2457
e23e7a14 2458static struct snd_pci_quirk dxs_whitelist[] = {
9d74958a
TI
2459 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2460 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2461 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2462 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2463 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI
2464 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2465 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2466 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI
2467 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2468 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2469 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2470 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2471 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI
2472 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2473 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI
2474 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2475 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2476 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2477 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2478 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI
2479 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2480 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2481 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2482 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2483 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2484 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2485 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2486 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2487 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2488 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2489 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2490 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2491 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI
2492 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2493 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2494 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2495 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2496 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI
2497 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2498 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2499 { } /* terminator */
1da177e4
LT
2500};
2501
e23e7a14 2502static int check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2503{
9d74958a 2504 const struct snd_pci_quirk *w;
1da177e4 2505
9d74958a
TI
2506 w = snd_pci_quirk_lookup(pci, dxs_whitelist);
2507 if (w) {
59d3acfa 2508 dev_dbg(&pci->dev, "DXS white list for %s found\n",
86b27237 2509 snd_pci_quirk_name(w));
9d74958a 2510 return w->value;
1da177e4
LT
2511 }
2512
a769577b
TI
2513 /* for newer revision, default to DXS_SRC */
2514 if (revision >= VIA_REV_8235)
2515 return VIA_DXS_SRC;
2516
1da177e4
LT
2517 /*
2518 * not detected, try 48k rate only to be sure.
2519 */
59d3acfa
TI
2520 dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
2521 dev_info(&pci->dev, " Please try dxs_support=5 option\n");
2522 dev_info(&pci->dev, " and report if it works on your machine.\n");
2523 dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT
2524 return VIA_DXS_48K;
2525};
2526
e23e7a14
BP
2527static int snd_via82xx_probe(struct pci_dev *pci,
2528 const struct pci_device_id *pci_id)
1da177e4 2529{
e437e3d7
TI
2530 struct snd_card *card;
2531 struct via82xx *chip;
1da177e4
LT
2532 int chip_type = 0, card_type;
2533 unsigned int i;
2534 int err;
2535
60c5772b 2536 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
e58de7ba
TI
2537 if (err < 0)
2538 return err;
1da177e4
LT
2539
2540 card_type = pci_id->driver_data;
1da177e4
LT
2541 switch (card_type) {
2542 case TYPE_CARD_VIA686:
2543 strcpy(card->driver, "VIA686A");
44c10138 2544 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT
2545 chip_type = TYPE_VIA686;
2546 break;
2547 case TYPE_CARD_VIA8233:
2548 chip_type = TYPE_VIA8233;
44c10138 2549 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2550 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2551 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT
2552 chip_type = via823x_cards[i].type;
2553 strcpy(card->shortname, via823x_cards[i].name);
2554 break;
2555 }
2556 }
2557 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2558 if (dxs_support == VIA_DXS_AUTO)
44c10138 2559 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT
2560 /* force to use VIA8233 or 8233A model according to
2561 * dxs_support module option
2562 */
b7fe4622 2563 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT
2564 chip_type = TYPE_VIA8233A;
2565 else
2566 chip_type = TYPE_VIA8233;
2567 }
2568 if (chip_type == TYPE_VIA8233A)
2569 strcpy(card->driver, "VIA8233A");
44c10138 2570 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT
2571 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2572 else
2573 strcpy(card->driver, "VIA8233");
2574 break;
2575 default:
59d3acfa 2576 dev_err(card->dev, "invalid card type %d\n", card_type);
1da177e4
LT
2577 err = -EINVAL;
2578 goto __error;
2579 }
2580
44c10138 2581 if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision,
b7fe4622 2582 ac97_clock, &chip)) < 0)
1da177e4 2583 goto __error;
57feb835 2584 card->private_data = chip;
b7fe4622 2585 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT
2586 goto __error;
2587
2588 if (chip_type == TYPE_VIA686) {
2589 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2590 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT
2591 goto __error;
2592 } else {
2593 if (chip_type == TYPE_VIA8233A) {
2594 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2595 goto __error;
2596 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2597 } else {
2598 if ((err = snd_via8233_pcm_new(chip)) < 0)
2599 goto __error;
b7fe4622 2600 if (dxs_support == VIA_DXS_48K)
1da177e4 2601 chip->dxs_fixed = 1;
b7fe4622 2602 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2603 chip->no_vra = 1;
b7fe4622 2604 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV
2605 chip->no_vra = 1;
2606 chip->dxs_src = 1;
2607 }
1da177e4 2608 }
b7fe4622 2609 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT
2610 goto __error;
2611 }
2612
1da177e4
LT
2613 /* disable interrupts */
2614 for (i = 0; i < chip->num_devs; i++)
2615 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2616
2617 snprintf(card->longname, sizeof(card->longname),
2618 "%s with %s at %#lx, irq %d", card->shortname,
2619 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2620
2621 snd_via82xx_proc_init(chip);
2622
2623 if ((err = snd_card_register(card)) < 0) {
2624 snd_card_free(card);
2625 return err;
2626 }
2627 pci_set_drvdata(pci, card);
1da177e4
LT
2628 return 0;
2629
2630 __error:
2631 snd_card_free(card);
2632 return err;
2633}
2634
e23e7a14 2635static void snd_via82xx_remove(struct pci_dev *pci)
1da177e4
LT
2636{
2637 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
2638}
2639
e9f66d9b 2640static struct pci_driver via82xx_driver = {
3733e424 2641 .name = KBUILD_MODNAME,
1da177e4
LT
2642 .id_table = snd_via82xx_ids,
2643 .probe = snd_via82xx_probe,
e23e7a14 2644 .remove = snd_via82xx_remove,
68cb2b55
TI
2645 .driver = {
2646 .pm = SND_VIA82XX_PM_OPS,
2647 },
1da177e4
LT
2648};
2649
e9f66d9b 2650module_pci_driver(via82xx_driver);