projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'trace-tracefs-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / sound / pci / via82xx.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * ALSA driver for VIA VT82xx (South Bridge)
4 *
5 * VT82C686A/B/C, VT8233A/C, VT8235
6 *
c1017a4c 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 8 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
9 * 2002 Takashi Iwai <tiwai@suse.de>
1da177e4
LT		 10 */
11
12/*
13 * Changes:
14 *
15 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
16 * - use the DSX channels for the first pcm playback.
17 * (on VIA8233, 8233C and 8235 only)
18 * this will allow you play simultaneously up to 4 streams.
19 * multi-channel playback is assigned to the second device
20 * on these chips.
21 * - support the secondary capture (on VIA8233/C,8235)
22 * - SPDIF support
23 * the DSX3 channel can be used for SPDIF output.
24 * on VIA8233A, this channel is assigned to the second pcm
25 * playback.
26 * the card config of alsa-lib will assign the correct
27 * device for applications.
28 * - clean up the code, separate low-level initialization
29 * routines for each chipset.
4f550df5
KW		 30 *
31 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
32 * - Optimize position calculation for the 823x chips.
1da177e4
LT		 33 */
34
6cbbfe1c 35#include <linux/io.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/interrupt.h>
38#include <linux/init.h>
39#include <linux/pci.h>
40#include <linux/slab.h>
41#include <linux/gameport.h>
65a77217 42#include <linux/module.h>
1da177e4
LT		 43#include <sound/core.h>
44#include <sound/pcm.h>
45#include <sound/pcm_params.h>
46#include <sound/info.h>
7058c042 47#include <sound/tlv.h>
1da177e4
LT		 48#include <sound/ac97_codec.h>
49#include <sound/mpu401.h>
50#include <sound/initval.h>
51
52#if 0
53#define POINTER_DEBUG
54#endif
55
c1017a4c 56MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 57MODULE_DESCRIPTION("VIA VT82xx audio");
58MODULE_LICENSE("GPL");
1da177e4 59
b2fac073 60#if IS_REACHABLE(CONFIG_GAMEPORT)
1da177e4
LT		 61#define SUPPORT_JOYSTICK 1
62#endif
63
b7fe4622
CL		 64static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
65static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
66static long mpu_port;
1da177e4 67#ifdef SUPPORT_JOYSTICK
a67ff6a5 68static bool joystick;
1da177e4 69#endif
b7fe4622
CL		 70static int ac97_clock = 48000;
71static char *ac97_quirk;
72static int dxs_support;
395c61d1 73static int dxs_init_volume = 31;
115551d9 74static int nodelay;
1da177e4 75
b7fe4622 76module_param(index, int, 0444);
1da177e4 77MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 78module_param(id, charp, 0444);
1da177e4 79MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
6192c41f 80module_param_hw(mpu_port, long, ioport, 0444);
1da177e4
LT		 81MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
82#ifdef SUPPORT_JOYSTICK
b7fe4622 83module_param(joystick, bool, 0444);
1da177e4
LT		 84MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
85#endif
b7fe4622 86module_param(ac97_clock, int, 0444);
1da177e4 87MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 88module_param(ac97_quirk, charp, 0444);
1da177e4 89MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 90module_param(dxs_support, int, 0444);
2d7eb7cb 91MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
395c61d1
CL		 92module_param(dxs_init_volume, int, 0644);
93MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
115551d9
SA		 94module_param(nodelay, int, 0444);
95MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 96
2b3e584b 97/* just for backward compatibility */
a67ff6a5 98static bool enable;
698444f3 99module_param(enable, bool, 0444);
2b3e584b 100
1da177e4 101
1da177e4
LT		 102/* revision numbers for via686 */
103#define VIA_REV_686_A 0x10
104#define VIA_REV_686_B 0x11
105#define VIA_REV_686_C 0x12
106#define VIA_REV_686_D 0x13
107#define VIA_REV_686_E 0x14
108#define VIA_REV_686_H 0x20
109
110/* revision numbers for via8233 */
111#define VIA_REV_PRE_8233 0x10 /* not in market */
112#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
113#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
114#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
115#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
116#define VIA_REV_8237 0x60
8263c65f 117#define VIA_REV_8251 0x70
1da177e4
LT		 118
119/*
120 * Direct registers
121 */
122
123#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
124#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
125
126/* common offsets */
127#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
128#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 129#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT		 130#define VIA_REG_STAT_PAUSED 0x40 /* RO */
131#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
132#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
133#define VIA_REG_STAT_EOL 0x02 /* RWC */
134#define VIA_REG_STAT_FLAG 0x01 /* RWC */
135#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
136#define VIA_REG_CTRL_START 0x80 /* WO */
137#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
138#define VIA_REG_CTRL_AUTOSTART 0x20
139#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
140#define VIA_REG_CTRL_INT_STOP 0x04
141#define VIA_REG_CTRL_INT_EOL 0x02
142#define VIA_REG_CTRL_INT_FLAG 0x01
143#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
144#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
145#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
146#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
147#define VIA_REG_TYPE_16BIT 0x20 /* RW */
148#define VIA_REG_TYPE_STEREO 0x10 /* RW */
149#define VIA_REG_TYPE_INT_LLINE 0x00
150#define VIA_REG_TYPE_INT_LSAMPLE 0x04
151#define VIA_REG_TYPE_INT_LESSONE 0x08
152#define VIA_REG_TYPE_INT_MASK 0x0c
153#define VIA_REG_TYPE_INT_EOL 0x02
154#define VIA_REG_TYPE_INT_FLAG 0x01
155#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
156#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
157#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
158#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
159#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
160#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
161#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
162
163#define DEFINE_VIA_REGSET(name,val) \
164enum {\
165 VIA_REG_##name##_STATUS = (val),\
166 VIA_REG_##name##_CONTROL = (val) + 0x01,\
167 VIA_REG_##name##_TYPE = (val) + 0x02,\
168 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
169 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
170 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
171 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
172}
173
174/* playback block */
175DEFINE_VIA_REGSET(PLAYBACK, 0x00);
176DEFINE_VIA_REGSET(CAPTURE, 0x10);
177DEFINE_VIA_REGSET(FM, 0x20);
178
179/* AC'97 */
180#define VIA_REG_AC97 0x80 /* dword */
181#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
182#define VIA_REG_AC97_CODEC_ID_SHIFT 30
183#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
184#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
185#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
186#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
187#define VIA_REG_AC97_BUSY (1<<24)
188#define VIA_REG_AC97_READ (1<<23)
189#define VIA_REG_AC97_CMD_SHIFT 16
190#define VIA_REG_AC97_CMD_MASK 0x7e
191#define VIA_REG_AC97_DATA_SHIFT 0
192#define VIA_REG_AC97_DATA_MASK 0xffff
193
194#define VIA_REG_SGD_SHADOW 0x84 /* dword */
195/* via686 */
196#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
197#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
198#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
199#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
200#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
201#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
202#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
203#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
204#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
205#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
206#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
207#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
208/* via8233 */
209#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
210#define VIA8233_REG_SGD_STAT_EOL (1<<1)
211#define VIA8233_REG_SGD_STAT_STOP (1<<2)
212#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
213#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
214#define VIA8233_REG_SGD_CHAN_SDX 0
215#define VIA8233_REG_SGD_CHAN_MULTI 4
216#define VIA8233_REG_SGD_CHAN_REC 6
217#define VIA8233_REG_SGD_CHAN_REC1 7
218
219#define VIA_REG_GPI_STATUS 0x88
220#define VIA_REG_GPI_INTR 0x8c
221
222/* multi-channel and capture registers for via8233 */
223DEFINE_VIA_REGSET(MULTPLAY, 0x40);
224DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
225
226/* via8233-specific registers */
227#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
228#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
229#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
230#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
231#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
232#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
233#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
234#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
235
236#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
237
238#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
239#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
240#define VIA_REG_CAPTURE_CHANNEL_LINE 0
241#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
242
243#define VIA_TBL_BIT_FLAG 0x40000000
244#define VIA_TBL_BIT_EOL 0x80000000
245
246/* pci space */
247#define VIA_ACLINK_STAT 0x40
248#define VIA_ACLINK_C11_READY 0x20
249#define VIA_ACLINK_C10_READY 0x10
250#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
251#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
252#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
253#define VIA_ACLINK_CTRL 0x41
254#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
255#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
256#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
257#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
258#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
259#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
260#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
261#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
262#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
263 VIA_ACLINK_CTRL_RESET|\
264 VIA_ACLINK_CTRL_PCM|\
265 VIA_ACLINK_CTRL_VRA)
266#define VIA_FUNC_ENABLE 0x42
267#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
268#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
269#define VIA_FUNC_RX2C_WRITE 0x20
270#define VIA_FUNC_SB_FIFO_EMPTY 0x10
271#define VIA_FUNC_ENABLE_GAME 0x08
272#define VIA_FUNC_ENABLE_FM 0x04
273#define VIA_FUNC_ENABLE_MIDI 0x02
274#define VIA_FUNC_ENABLE_SB 0x01
275#define VIA_PNP_CONTROL 0x43
276#define VIA_FM_NMI_CTRL 0x48
277#define VIA8233_VOLCHG_CTRL 0x48
278#define VIA8233_SPDIF_CTRL 0x49
279#define VIA8233_SPDIF_DX3 0x08
280#define VIA8233_SPDIF_SLOT_MASK 0x03
281#define VIA8233_SPDIF_SLOT_1011 0x00
282#define VIA8233_SPDIF_SLOT_34 0x01
283#define VIA8233_SPDIF_SLOT_78 0x02
284#define VIA8233_SPDIF_SLOT_69 0x03
285
286/*
287 */
288
289#define VIA_DXS_AUTO 0
290#define VIA_DXS_ENABLE 1
291#define VIA_DXS_DISABLE 2
292#define VIA_DXS_48K 3
293#define VIA_DXS_NO_VRA 4
2d7eb7cb 294#define VIA_DXS_SRC 5
1da177e4
LT		 295
296
1da177e4
LT		 297/*
298 * pcm stream
299 */
300
301struct snd_via_sg_table {
302 unsigned int offset;
303 unsigned int size;
304} ;
305
306#define VIA_TABLE_SIZE 255
5503600a 307#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 308
e437e3d7 309struct viadev {
1da177e4
LT		 310 unsigned int reg_offset;
311 unsigned long port;
312 int direction; /* playback = 0, capture = 1 */
e437e3d7 313 struct snd_pcm_substream *substream;
1da177e4
LT		 314 int running;
315 unsigned int tbl_entries; /* # descriptors */
316 struct snd_dma_buffer table;
317 struct snd_via_sg_table *idx_table;
318 /* for recovery from the unexpected pointer */
319 unsigned int lastpos;
320 unsigned int fragsize;
321 unsigned int bufsize;
322 unsigned int bufsize2;
4f550df5
KW		 323 int hwptr_done; /* processed frame position in the buffer */
324 int in_interrupt;
325 int shadow_shift;
1da177e4
LT		 326};
327
328
329enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
330enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
331
332#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
333
334struct via_rate_lock {
335 spinlock_t lock;
336 int rate;
337 int used;
338};
339
e437e3d7 340struct via82xx {
1da177e4
LT		 341 int irq;
342
343 unsigned long port;
344 struct resource *mpu_res;
345 int chip_type;
346 unsigned char revision;
347
348 unsigned char old_legacy;
349 unsigned char old_legacy_cfg;
1da177e4
LT		 350 unsigned char legacy_saved;
351 unsigned char legacy_cfg_saved;
352 unsigned char spdif_ctrl_saved;
353 unsigned char capture_src_saved[2];
354 unsigned int mpu_port_saved;
1da177e4 355
00f226d4
HM		 356 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
357 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT		 358
359 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
360
361 struct pci_dev *pci;
e437e3d7 362 struct snd_card *card;
1da177e4
LT		 363
364 unsigned int num_devs;
365 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 366 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT		 367 struct via_rate_lock rates[2]; /* playback and capture */
368 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
369 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 370 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT		 371 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
372
e437e3d7
TI		 373 struct snd_pcm *pcms[2];
374 struct snd_rawmidi *rmidi;
3d009413 375 struct snd_kcontrol *dxs_controls[4];
1da177e4 376
e437e3d7
TI		 377 struct snd_ac97_bus *ac97_bus;
378 struct snd_ac97 *ac97;
1da177e4
LT		 379 unsigned int ac97_clock;
380 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
381
382 spinlock_t reg_lock;
e437e3d7 383 struct snd_info_entry *proc_entry;
1da177e4
LT		 384
385#ifdef SUPPORT_JOYSTICK
386 struct gameport *gameport;
387#endif
388};
389
9baa3c34 390static const struct pci_device_id snd_via82xx_ids[] = {
4f550df5 391 /* 0x1106, 0x3058 */
28d27aae 392 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 393 /* 0x1106, 0x3059 */
28d27aae 394 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT		 395 { 0, }
396};
397
398MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
399
400/*
401 */
402
403/*
404 * allocate and initialize the descriptor buffers
405 * periods = number of periods
406 * fragsize = period size in bytes
407 */
e437e3d7 408static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 409 struct pci_dev *pci,
410 unsigned int periods, unsigned int fragsize)
411{
412 unsigned int i, idx, ofs, rest;
e437e3d7 413 struct via82xx *chip = snd_pcm_substream_chip(substream);
c5bb0867 414 __le32 *pgtbl;
1da177e4
LT		 415
416 if (dev->table.area == NULL) {
417 /* the start of each lists must be aligned to 8 bytes,
418 * but the kernel pages are much bigger, so we don't care
419 */
6974f8ad 420 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1da177e4
LT		 421 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
422 &dev->table) < 0)
423 return -ENOMEM;
424 }
425 if (! dev->idx_table) {
6da2ec56
KC		 426 dev->idx_table = kmalloc_array(VIA_TABLE_SIZE,
427 sizeof(*dev->idx_table),
428 GFP_KERNEL);
1da177e4
LT		 429 if (! dev->idx_table)
430 return -ENOMEM;
431 }
432
433 /* fill the entries */
434 idx = 0;
435 ofs = 0;
c5bb0867 436 pgtbl = (__le32 *)dev->table.area;
1da177e4
LT		 437 for (i = 0; i < periods; i++) {
438 rest = fragsize;
439 /* fill descriptors for a period.
440 * a period can be split to several descriptors if it's
441 * over page boundary.
442 */
443 do {
444 unsigned int r;
445 unsigned int flag;
77a23f26 446 unsigned int addr;
1da177e4
LT		 447
448 if (idx >= VIA_TABLE_SIZE) {
59d3acfa 449 dev_err(&pci->dev, "too much table size!\n");
1da177e4
LT		 450 return -EINVAL;
451 }
77a23f26 452 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
c5bb0867 453 pgtbl[idx << 1] = cpu_to_le32(addr);
5503600a 454 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT		 455 rest -= r;
456 if (! rest) {
457 if (i == periods - 1)
458 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
459 else
460 flag = VIA_TBL_BIT_FLAG; /* period boundary */
461 } else
462 flag = 0; /* period continues to the next */
ee419653 463 /*
59d3acfa
TI		 464 dev_dbg(&pci->dev,
465 "tbl %d: at %d size %d (rest %d)\n",
466 idx, ofs, r, rest);
ee419653 467 */
c5bb0867 468 pgtbl[(idx<<1) + 1] = cpu_to_le32(r | flag);
1da177e4
LT		 469 dev->idx_table[idx].offset = ofs;
470 dev->idx_table[idx].size = r;
471 ofs += r;
472 idx++;
473 } while (rest > 0);
474 }
475 dev->tbl_entries = idx;
476 dev->bufsize = periods * fragsize;
477 dev->bufsize2 = dev->bufsize / 2;
478 dev->fragsize = fragsize;
479 return 0;
480}
481
482
e437e3d7 483static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 484 struct pci_dev *pci)
485{
486 if (dev->table.area) {
487 snd_dma_free_pages(&dev->table);
488 dev->table.area = NULL;
489 }
4d572776
JJ		 490 kfree(dev->idx_table);
491 dev->idx_table = NULL;
1da177e4
LT		 492 return 0;
493}
494
495/*
496 * Basic I/O
497 */
498
e437e3d7 499static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT		 500{
501 return inl(VIAREG(chip, AC97));
502}
503
e437e3d7 504static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT		 505{
506 outl(val, VIAREG(chip, AC97));
507}
508
e437e3d7 509static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT		 510{
511 unsigned int timeout = 1000; /* 1ms */
512 unsigned int val;
513
514 while (timeout-- > 0) {
515 udelay(1);
afb342f0
TI		 516 val = snd_via82xx_codec_xread(chip);
517 if (!(val & VIA_REG_AC97_BUSY))
1da177e4
LT		 518 return val & 0xffff;
519 }
59d3acfa 520 dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
e437e3d7 521 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT		 522 return -EIO;
523}
524
e437e3d7 525static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT		 526{
527 unsigned int timeout = 1000; /* 1ms */
528 unsigned int val, val1;
529 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
530 VIA_REG_AC97_SECONDARY_VALID;
531
532 while (timeout-- > 0) {
533 val = snd_via82xx_codec_xread(chip);
534 val1 = val & (VIA_REG_AC97_BUSY | stat);
535 if (val1 == stat)
536 return val & 0xffff;
537 udelay(1);
538 }
539 return -EIO;
540}
541
e437e3d7 542static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 543{
e437e3d7 544 struct via82xx *chip = ac97->private_data;
86a5d9cf 545 __always_unused int err;
1da177e4
LT		 546 err = snd_via82xx_codec_ready(chip, ac97->num);
547 /* here we need to wait fairly for long time.. */
115551d9
SA		 548 if (!nodelay)
549 msleep(500);
1da177e4
LT		 550}
551
e437e3d7 552static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 553 unsigned short reg,
554 unsigned short val)
555{
e437e3d7 556 struct via82xx *chip = ac97->private_data;
1da177e4 557 unsigned int xval;
4f550df5 558
1da177e4
LT		 559 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
560 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
561 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
562 xval |= val << VIA_REG_AC97_DATA_SHIFT;
563 snd_via82xx_codec_xwrite(chip, xval);
564 snd_via82xx_codec_ready(chip, ac97->num);
565}
566
e437e3d7 567static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 568{
e437e3d7 569 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 570 unsigned int xval, val = 0xffff;
571 int again = 0;
572
573 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
574 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
575 xval |= VIA_REG_AC97_READ;
576 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
577 while (1) {
578 if (again++ > 3) {
59d3acfa
TI		 579 dev_err(chip->card->dev,
580 "codec_read: codec %i is not valid [0x%x]\n",
e437e3d7 581 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT		 582 return 0xffff;
583 }
584 snd_via82xx_codec_xwrite(chip, xval);
585 udelay (20);
586 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
587 udelay(25);
588 val = snd_via82xx_codec_xread(chip);
589 break;
590 }
591 }
592 return val & 0xffff;
593}
594
e437e3d7 595static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 596{
597 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
598 VIADEV_REG(viadev, OFFSET_CONTROL));
599 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
600 udelay(50);
601 /* disable interrupts */
602 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
603 /* clear interrupts */
604 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
605 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
606 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
607 viadev->lastpos = 0;
4f550df5 608 viadev->hwptr_done = 0;
1da177e4
LT		 609}
610
611
612/*
613 * Interrupt handler
4f550df5 614 * Used for 686 and 8233A
1da177e4 615 */
7d12e780 616static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 617{
e437e3d7 618 struct via82xx *chip = dev_id;
1da177e4
LT		 619 unsigned int status;
620 unsigned int i;
621
622 status = inl(VIAREG(chip, SGD_SHADOW));
623 if (! (status & chip->intr_mask)) {
624 if (chip->rmidi)
625 /* check mpu401 interrupt */
7d12e780 626 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 627 return IRQ_NONE;
628 }
629
630 /* check status for each stream */
631 spin_lock(&chip->reg_lock);
632 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 633 struct viadev *viadev = &chip->devs[i];
1da177e4 634 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 635 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT		 636 continue;
637 if (viadev->substream && viadev->running) {
4f550df5
KW		 638 /*
639 * Update hwptr_done based on 'period elapsed'
640 * interrupts. We'll use it, when the chip returns 0
641 * for OFFSET_CURR_COUNT.
642 */
643 if (c_status & VIA_REG_STAT_EOL)
644 viadev->hwptr_done = 0;
645 else
646 viadev->hwptr_done += viadev->fragsize;
647 viadev->in_interrupt = c_status;
1da177e4
LT		 648 spin_unlock(&chip->reg_lock);
649 snd_pcm_period_elapsed(viadev->substream);
650 spin_lock(&chip->reg_lock);
4f550df5 651 viadev->in_interrupt = 0;
1da177e4
LT		 652 }
653 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
654 }
655 spin_unlock(&chip->reg_lock);
656 return IRQ_HANDLED;
657}
658
4f550df5
KW		 659/*
660 * Interrupt handler
661 */
7d12e780 662static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 663{
e437e3d7 664 struct via82xx *chip = dev_id;
4f550df5
KW		 665 unsigned int status;
666 unsigned int i;
667 int irqreturn = 0;
668
669 /* check status for each stream */
670 spin_lock(&chip->reg_lock);
671 status = inl(VIAREG(chip, SGD_SHADOW));
672
673 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI		 674 struct viadev *viadev = &chip->devs[i];
675 struct snd_pcm_substream *substream;
4f550df5
KW		 676 unsigned char c_status, shadow_status;
677
678 shadow_status = (status >> viadev->shadow_shift) &
679 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
680 VIA_REG_STAT_FLAG);
681 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
682 if (!c_status)
683 continue;
684
685 substream = viadev->substream;
686 if (substream && viadev->running) {
687 /*
688 * Update hwptr_done based on 'period elapsed'
689 * interrupts. We'll use it, when the chip returns 0
690 * for OFFSET_CURR_COUNT.
691 */
692 if (c_status & VIA_REG_STAT_EOL)
693 viadev->hwptr_done = 0;
694 else
695 viadev->hwptr_done += viadev->fragsize;
696 viadev->in_interrupt = c_status;
697 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
698 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
699 spin_unlock(&chip->reg_lock);
700
701 snd_pcm_period_elapsed(substream);
702
703 spin_lock(&chip->reg_lock);
704 viadev->in_interrupt = 0;
705 }
706 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
707 irqreturn = 1;
708 }
709 spin_unlock(&chip->reg_lock);
710 return IRQ_RETVAL(irqreturn);
711}
712
1da177e4
LT		 713/*
714 * PCM callbacks
715 */
716
717/*
718 * trigger callback
719 */
e437e3d7 720static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 721{
e437e3d7
TI		 722 struct via82xx *chip = snd_pcm_substream_chip(substream);
723 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 724 unsigned char val;
725
726 if (chip->chip_type != TYPE_VIA686)
727 val = VIA_REG_CTRL_INT;
728 else
729 val = 0;
730 switch (cmd) {
731 case SNDRV_PCM_TRIGGER_START:
41e4845c 732 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 733 val |= VIA_REG_CTRL_START;
734 viadev->running = 1;
735 break;
736 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 737 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 738 val = VIA_REG_CTRL_TERMINATE;
739 viadev->running = 0;
740 break;
741 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
742 val |= VIA_REG_CTRL_PAUSE;
743 viadev->running = 0;
744 break;
745 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
746 viadev->running = 1;
747 break;
748 default:
749 return -EINVAL;
750 }
751 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
752 if (cmd == SNDRV_PCM_TRIGGER_STOP)
753 snd_via82xx_channel_reset(chip, viadev);
754 return 0;
755}
756
757
758/*
759 * pointer callbacks
760 */
761
762/*
763 * calculate the linear position at the given sg-buffer index and the rest count
764 */
765
766#define check_invalid_pos(viadev,pos) \
e437e3d7
TI		 767 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
768 viadev->lastpos < viadev->bufsize2))
1da177e4 769
59d3acfa
TI		 770static inline unsigned int calc_linear_pos(struct via82xx *chip,
771 struct viadev *viadev,
772 unsigned int idx,
e437e3d7 773 unsigned int count)
1da177e4
LT		 774{
775 unsigned int size, base, res;
776
777 size = viadev->idx_table[idx].size;
778 base = viadev->idx_table[idx].offset;
779 res = base + size - count;
4f550df5
KW		 780 if (res >= viadev->bufsize)
781 res -= viadev->bufsize;
1da177e4
LT		 782
783 /* check the validity of the calculated position */
784 if (size < count) {
59d3acfa
TI		 785 dev_dbg(chip->card->dev,
786 "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
e437e3d7 787 (int)size, (int)count);
1da177e4
LT		 788 res = viadev->lastpos;
789 } else {
790 if (! count) {
791 /* Some mobos report count = 0 on the DMA boundary,
792 * i.e. count = size indeed.
793 * Let's check whether this step is above the expected size.
794 */
795 int delta = res - viadev->lastpos;
796 if (delta < 0)
797 delta += viadev->bufsize;
798 if ((unsigned int)delta > viadev->fragsize)
799 res = base;
800 }
801 if (check_invalid_pos(viadev, res)) {
802#ifdef POINTER_DEBUG
59d3acfa
TI		 803 dev_dbg(chip->card->dev,
804 "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
805 idx, viadev->tbl_entries,
e437e3d7
TI		 806 viadev->lastpos, viadev->bufsize2,
807 viadev->idx_table[idx].offset,
808 viadev->idx_table[idx].size, count);
1da177e4
LT		 809#endif
810 /* count register returns full size when end of buffer is reached */
811 res = base + size;
812 if (check_invalid_pos(viadev, res)) {
59d3acfa
TI		 813 dev_dbg(chip->card->dev,
814 "invalid via82xx_cur_ptr (2), using last valid pointer\n");
1da177e4
LT		 815 res = viadev->lastpos;
816 }
817 }
818 }
1da177e4
LT		 819 return res;
820}
821
822/*
823 * get the current pointer on via686
824 */
e437e3d7 825static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 826{
e437e3d7
TI		 827 struct via82xx *chip = snd_pcm_substream_chip(substream);
828 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 829 unsigned int idx, ptr, count, res;
830
da3cec35
TI		 831 if (snd_BUG_ON(!viadev->tbl_entries))
832 return 0;
1da177e4
LT		 833 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
834 return 0;
835
836 spin_lock(&chip->reg_lock);
837 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
838 /* The via686a does not have the current index register,
839 * so we need to calculate the index from CURR_PTR.
840 */
841 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
842 if (ptr <= (unsigned int)viadev->table.addr)
843 idx = 0;
844 else /* CURR_PTR holds the address + 8 */
845 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
59d3acfa 846 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 847 viadev->lastpos = res; /* remember the last position */
1da177e4
LT		 848 spin_unlock(&chip->reg_lock);
849
850 return bytes_to_frames(substream->runtime, res);
851}
852
853/*
854 * get the current pointer on via823x
855 */
e437e3d7 856static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 857{
e437e3d7
TI		 858 struct via82xx *chip = snd_pcm_substream_chip(substream);
859 struct viadev *viadev = substream->runtime->private_data;
1da177e4 860 unsigned int idx, count, res;
4f550df5 861 int status;
1da177e4 862
da3cec35
TI		 863 if (snd_BUG_ON(!viadev->tbl_entries))
864 return 0;
4f550df5 865
1da177e4 866 spin_lock(&chip->reg_lock);
4f550df5
KW		 867 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
868 status = viadev->in_interrupt;
869 if (!status)
870 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
871
c6cc0e3b
BJ		 872 /* An apparent bug in the 8251 is worked around by sending a
873 * REG_CTRL_START. */
874 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
875 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
876
4f550df5 877 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ		 878 res = 0;
879 goto unlock;
4f550df5
KW		 880 }
881 if (count & 0xffffff) {
882 idx = count >> 24;
883 if (idx >= viadev->tbl_entries) {
1da177e4 884#ifdef POINTER_DEBUG
59d3acfa
TI		 885 dev_dbg(chip->card->dev,
886 "fail: invalid idx = %i/%i\n", idx,
e437e3d7 887 viadev->tbl_entries);
1da177e4 888#endif
4f550df5
KW		 889 res = viadev->lastpos;
890 } else {
891 count &= 0xffffff;
59d3acfa 892 res = calc_linear_pos(chip, viadev, idx, count);
4f550df5 893 }
1da177e4 894 } else {
4f550df5
KW		 895 res = viadev->hwptr_done;
896 if (!viadev->in_interrupt) {
897 if (status & VIA_REG_STAT_EOL) {
898 res = 0;
899 } else
900 if (status & VIA_REG_STAT_FLAG) {
901 res += viadev->fragsize;
902 }
903 }
904 }
905unlock:
906 viadev->lastpos = res;
1da177e4
LT		 907 spin_unlock(&chip->reg_lock);
908
909 return bytes_to_frames(substream->runtime, res);
910}
911
912
913/*
914 * hw_params callback:
915 * allocate the buffer and build up the buffer description table
916 */
e437e3d7
TI		 917static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
918 struct snd_pcm_hw_params *hw_params)
1da177e4 919{
e437e3d7
TI		 920 struct via82xx *chip = snd_pcm_substream_chip(substream);
921 struct viadev *viadev = substream->runtime->private_data;
1da177e4 922
8e2c7524
TI		 923 return build_via_table(viadev, substream, chip->pci,
924 params_periods(hw_params),
925 params_period_bytes(hw_params));
1da177e4
LT		 926}
927
928/*
929 * hw_free callback:
930 * clean up the buffer description table and release the buffer
931 */
e437e3d7 932static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 933{
e437e3d7
TI		 934 struct via82xx *chip = snd_pcm_substream_chip(substream);
935 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 936
937 clean_via_table(viadev, substream, chip->pci);
1da177e4
LT		 938 return 0;
939}
940
941
942/*
943 * set up the table pointer
944 */
e437e3d7 945static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 946{
947 snd_via82xx_codec_ready(chip, 0);
948 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
949 udelay(20);
950 snd_via82xx_codec_ready(chip, 0);
951}
952
953/*
954 * prepare callback for playback and capture on via686
955 */
e437e3d7
TI		 956static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
957 struct snd_pcm_runtime *runtime)
1da177e4
LT		 958{
959 snd_via82xx_channel_reset(chip, viadev);
960 /* this must be set after channel_reset */
961 snd_via82xx_set_table_ptr(chip, viadev);
962 outb(VIA_REG_TYPE_AUTOSTART |
963 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
964 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
965 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
966 VIA_REG_TYPE_INT_EOL |
967 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
968}
969
e437e3d7 970static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 971{
e437e3d7
TI		 972 struct via82xx *chip = snd_pcm_substream_chip(substream);
973 struct viadev *viadev = substream->runtime->private_data;
974 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 975
976 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
977 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
978 via686_setup_format(chip, viadev, runtime);
979 return 0;
980}
981
e437e3d7 982static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 983{
e437e3d7
TI		 984 struct via82xx *chip = snd_pcm_substream_chip(substream);
985 struct viadev *viadev = substream->runtime->private_data;
986 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 987
988 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
989 via686_setup_format(chip, viadev, runtime);
990 return 0;
991}
992
993/*
994 * lock the current rate
995 */
996static int via_lock_rate(struct via_rate_lock *rec, int rate)
997{
998 int changed = 0;
999
1000 spin_lock_irq(&rec->lock);
1001 if (rec->rate != rate) {
1002 if (rec->rate && rec->used > 1) /* already set */
1003 changed = -EINVAL;
1004 else {
1005 rec->rate = rate;
1006 changed = 1;
1007 }
1008 }
1009 spin_unlock_irq(&rec->lock);
1010 return changed;
1011}
1012
1013/*
1014 * prepare callback for DSX playback on via823x
1015 */
e437e3d7 1016static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1017{
e437e3d7
TI		 1018 struct via82xx *chip = snd_pcm_substream_chip(substream);
1019 struct viadev *viadev = substream->runtime->private_data;
1020 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1021 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT		 1022 int rate_changed;
1023 u32 rbits;
1024
afb342f0
TI		 1025 rate_changed = via_lock_rate(&chip->rates[0], ac97_rate);
1026 if (rate_changed < 0)
1da177e4 1027 return rate_changed;
16d3f140 1028 if (rate_changed)
1da177e4
LT		 1029 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1030 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI		 1031 if (chip->spdif_on && viadev->reg_offset == 0x30)
1032 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1033
1da177e4
LT		 1034 if (runtime->rate == 48000)
1035 rbits = 0xfffff;
1036 else
e437e3d7
TI		 1037 rbits = (0x100000 / 48000) * runtime->rate +
1038 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1039 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT		 1040 snd_via82xx_channel_reset(chip, viadev);
1041 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI		 1042 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1043 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1044 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1045 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT		 1046 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1047 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1048 rbits | /* rate */
1049 0xff000000, /* STOP index is never reached */
1050 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1051 udelay(20);
1052 snd_via82xx_codec_ready(chip, 0);
1053 return 0;
1054}
1055
1056/*
1057 * prepare callback for multi-channel playback on via823x
1058 */
e437e3d7 1059static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1060{
e437e3d7
TI		 1061 struct via82xx *chip = snd_pcm_substream_chip(substream);
1062 struct viadev *viadev = substream->runtime->private_data;
1063 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1064 unsigned int slots;
1065 int fmt;
1066
1067 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1068 return -EINVAL;
1069 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1070 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1071 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1072 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1073 snd_via82xx_channel_reset(chip, viadev);
1074 snd_via82xx_set_table_ptr(chip, viadev);
1075
e437e3d7
TI		 1076 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1077 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT		 1078 fmt |= runtime->channels << 4;
1079 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1080#if 0
1081 if (chip->revision == VIA_REV_8233A)
1082 slots = 0;
1083 else
1084#endif
1085 {
1086 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1087 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1088 switch (runtime->channels) {
1089 case 1: slots = (1<<0) | (1<<4); break;
1090 case 2: slots = (1<<0) | (2<<4); break;
1091 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1092 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1093 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1094 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1095 default: slots = 0; break;
1096 }
1097 }
1098 /* STOP index is never reached */
1099 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1100 udelay(20);
1101 snd_via82xx_codec_ready(chip, 0);
1102 return 0;
1103}
1104
1105/*
1106 * prepare callback for capture on via823x
1107 */
e437e3d7 1108static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1109{
e437e3d7
TI		 1110 struct via82xx *chip = snd_pcm_substream_chip(substream);
1111 struct viadev *viadev = substream->runtime->private_data;
1112 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1113
1114 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1115 return -EINVAL;
1116 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1117 snd_via82xx_channel_reset(chip, viadev);
1118 snd_via82xx_set_table_ptr(chip, viadev);
1119 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1120 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1121 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1122 0xff000000, /* STOP index is never reached */
1123 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1124 udelay(20);
1125 snd_via82xx_codec_ready(chip, 0);
1126 return 0;
1127}
1128
1129
1130/*
1131 * pcm hardware definition, identical for both playback and capture
1132 */
dee49895 1133static const struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT		 1134{
1135 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1136 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1137 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1138 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT		 1139 SNDRV_PCM_INFO_PAUSE),
1140 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1141 .rates = SNDRV_PCM_RATE_48000,
1142 .rate_min = 48000,
1143 .rate_max = 48000,
1144 .channels_min = 1,
1145 .channels_max = 2,
5503600a 1146 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1147 .period_bytes_min = 32,
5503600a 1148 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT		 1149 .periods_min = 2,
1150 .periods_max = VIA_TABLE_SIZE / 2,
1151 .fifo_size = 0,
1152};
1153
1154
1155/*
1156 * open callback skeleton
1157 */
e437e3d7
TI		 1158static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1159 struct snd_pcm_substream *substream)
1da177e4 1160{
e437e3d7 1161 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1162 int err;
1163 struct via_rate_lock *ratep;
5495ffbd 1164 bool use_src = false;
1da177e4
LT		 1165
1166 runtime->hw = snd_via82xx_hw;
1167
1168 /* set the hw rate condition */
1169 ratep = &chip->rates[viadev->direction];
1170 spin_lock_irq(&ratep->lock);
1171 ratep->used++;
1172 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1173 /* DXS#3 and spdif is on */
1174 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1175 snd_pcm_limit_hw_rates(runtime);
1176 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1177 /* fixed DXS playback rate */
1178 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1179 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV		 1180 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1181 /* use full SRC capabilities of DXS */
1182 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1183 SNDRV_PCM_RATE_8000_48000);
1184 runtime->hw.rate_min = 8000;
1185 runtime->hw.rate_max = 48000;
5495ffbd 1186 use_src = true;
1da177e4
LT		 1187 } else if (! ratep->rate) {
1188 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1189 runtime->hw.rates = chip->ac97->rates[idx];
1190 snd_pcm_limit_hw_rates(runtime);
1191 } else {
1192 /* a fixed rate */
1193 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1194 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1195 }
1196 spin_unlock_irq(&ratep->lock);
1197
1198 /* we may remove following constaint when we modify table entries
1199 in interrupt */
afb342f0
TI		 1200 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
1201 if (err < 0)
1da177e4
LT		 1202 return err;
1203
5495ffbd
CL		 1204 if (use_src) {
1205 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1206 if (err < 0)
1207 return err;
1208 }
1209
1da177e4
LT		 1210 runtime->private_data = viadev;
1211 viadev->substream = substream;
1212
1213 return 0;
1214}
1215
1216
1217/*
3d009413 1218 * open callback for playback on via686
1da177e4 1219 */
3d009413 1220static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1221{
e437e3d7
TI		 1222 struct via82xx *chip = snd_pcm_substream_chip(substream);
1223 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT		 1224 int err;
1225
afb342f0
TI		 1226 err = snd_via82xx_pcm_open(chip, viadev, substream);
1227 if (err < 0)
1da177e4
LT		 1228 return err;
1229 return 0;
1230}
1231
3d009413
CL		 1232/*
1233 * open callback for playback on via823x DXS
1234 */
1235static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1236{
1237 struct via82xx *chip = snd_pcm_substream_chip(substream);
1238 struct viadev *viadev;
1239 unsigned int stream;
1240 int err;
1241
1242 viadev = &chip->devs[chip->playback_devno + substream->number];
afb342f0
TI		 1243 err = snd_via82xx_pcm_open(chip, viadev, substream);
1244 if (err < 0)
3d009413
CL		 1245 return err;
1246 stream = viadev->reg_offset / 0x10;
1247 if (chip->dxs_controls[stream]) {
395c61d1
CL		 1248 chip->playback_volume[stream][0] =
1249 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
1250 chip->playback_volume[stream][1] =
1251 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
3d009413
CL		 1252 chip->dxs_controls[stream]->vd[0].access &=
1253 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1254 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1255 SNDRV_CTL_EVENT_MASK_INFO,
1256 &chip->dxs_controls[stream]->id);
1257 }
1258 return 0;
1259}
1260
1da177e4
LT		 1261/*
1262 * open callback for playback on via823x multi-channel
1263 */
e437e3d7 1264static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1265{
e437e3d7
TI		 1266 struct via82xx *chip = snd_pcm_substream_chip(substream);
1267 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT		 1268 int err;
1269 /* channels constraint for VIA8233A
1270 * 3 and 5 channels are not supported
1271 */
fbc57b2a 1272 static const unsigned int channels[] = {
1da177e4
LT		 1273 1, 2, 4, 6
1274 };
fbc57b2a 1275 static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT		 1276 .count = ARRAY_SIZE(channels),
1277 .list = channels,
1278 .mask = 0,
1279 };
1280
afb342f0
TI		 1281 err = snd_via82xx_pcm_open(chip, viadev, substream);
1282 if (err < 0)
1da177e4
LT		 1283 return err;
1284 substream->runtime->hw.channels_max = 6;
1285 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI		 1286 snd_pcm_hw_constraint_list(substream->runtime, 0,
1287 SNDRV_PCM_HW_PARAM_CHANNELS,
1288 &hw_constraints_channels);
1da177e4
LT		 1289 return 0;
1290}
1291
1292/*
1293 * open callback for capture on via686 and via823x
1294 */
e437e3d7 1295static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1296{
e437e3d7
TI		 1297 struct via82xx *chip = snd_pcm_substream_chip(substream);
1298 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT		 1299
1300 return snd_via82xx_pcm_open(chip, viadev, substream);
1301}
1302
1303/*
1304 * close callback
1305 */
e437e3d7 1306static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1307{
e437e3d7
TI		 1308 struct via82xx *chip = snd_pcm_substream_chip(substream);
1309 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 1310 struct via_rate_lock *ratep;
1311
1312 /* release the rate lock */
1313 ratep = &chip->rates[viadev->direction];
1314 spin_lock_irq(&ratep->lock);
1315 ratep->used--;
1316 if (! ratep->used)
1317 ratep->rate = 0;
1318 spin_unlock_irq(&ratep->lock);
6dbe6628
TI		 1319 if (! ratep->rate) {
1320 if (! viadev->direction) {
1321 snd_ac97_update_power(chip->ac97,
1322 AC97_PCM_FRONT_DAC_RATE, 0);
1323 snd_ac97_update_power(chip->ac97,
1324 AC97_PCM_SURR_DAC_RATE, 0);
1325 snd_ac97_update_power(chip->ac97,
1326 AC97_PCM_LFE_DAC_RATE, 0);
1327 } else
1328 snd_ac97_update_power(chip->ac97,
1329 AC97_PCM_LR_ADC_RATE, 0);
1330 }
1da177e4
LT		 1331 viadev->substream = NULL;
1332 return 0;
1333}
1334
3d009413
CL		 1335static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1336{
1337 struct via82xx *chip = snd_pcm_substream_chip(substream);
1338 struct viadev *viadev = substream->runtime->private_data;
1339 unsigned int stream;
1340
1341 stream = viadev->reg_offset / 0x10;
1342 if (chip->dxs_controls[stream]) {
1343 chip->dxs_controls[stream]->vd[0].access |=
1344 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1345 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1346 &chip->dxs_controls[stream]->id);
1347 }
1348 return snd_via82xx_pcm_close(substream);
1349}
1350
1da177e4
LT		 1351
1352/* via686 playback callbacks */
6769e988 1353static const struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1354 .open = snd_via686_playback_open,
1da177e4 1355 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1356 .hw_params = snd_via82xx_hw_params,
1357 .hw_free = snd_via82xx_hw_free,
1358 .prepare = snd_via686_playback_prepare,
1359 .trigger = snd_via82xx_pcm_trigger,
1360 .pointer = snd_via686_pcm_pointer,
1da177e4
LT		 1361};
1362
1363/* via686 capture callbacks */
6769e988 1364static const struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT		 1365 .open = snd_via82xx_capture_open,
1366 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1367 .hw_params = snd_via82xx_hw_params,
1368 .hw_free = snd_via82xx_hw_free,
1369 .prepare = snd_via686_capture_prepare,
1370 .trigger = snd_via82xx_pcm_trigger,
1371 .pointer = snd_via686_pcm_pointer,
1da177e4
LT		 1372};
1373
1374/* via823x DSX playback callbacks */
6769e988 1375static const struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL		 1376 .open = snd_via8233_playback_open,
1377 .close = snd_via8233_playback_close,
1da177e4
LT		 1378 .hw_params = snd_via82xx_hw_params,
1379 .hw_free = snd_via82xx_hw_free,
1380 .prepare = snd_via8233_playback_prepare,
1381 .trigger = snd_via82xx_pcm_trigger,
1382 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1383};
1384
1385/* via823x multi-channel playback callbacks */
6769e988 1386static const struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT		 1387 .open = snd_via8233_multi_open,
1388 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1389 .hw_params = snd_via82xx_hw_params,
1390 .hw_free = snd_via82xx_hw_free,
1391 .prepare = snd_via8233_multi_prepare,
1392 .trigger = snd_via82xx_pcm_trigger,
1393 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1394};
1395
1396/* via823x capture callbacks */
6769e988 1397static const struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT		 1398 .open = snd_via82xx_capture_open,
1399 .close = snd_via82xx_pcm_close,
1da177e4
LT		 1400 .hw_params = snd_via82xx_hw_params,
1401 .hw_free = snd_via82xx_hw_free,
1402 .prepare = snd_via8233_capture_prepare,
1403 .trigger = snd_via82xx_pcm_trigger,
1404 .pointer = snd_via8233_pcm_pointer,
1da177e4
LT		 1405};
1406
1407
e437e3d7
TI		 1408static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1409 int shadow_pos, int direction)
1da177e4
LT		 1410{
1411 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1412 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT		 1413 chip->devs[idx].direction = direction;
1414 chip->devs[idx].port = chip->port + reg_offset;
1415}
1416
1417/*
1418 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1419 */
e23e7a14 1420static int snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1421{
e437e3d7 1422 struct snd_pcm *pcm;
e36e3b86 1423 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1424 int i, err;
1425
1426 chip->playback_devno = 0; /* x 4 */
1427 chip->multi_devno = 4; /* x 1 */
1428 chip->capture_devno = 5; /* x 2 */
1429 chip->num_devs = 7;
1430 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1431
1432 /* PCM #0: 4 DSX playbacks and 1 capture */
1433 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1434 if (err < 0)
1435 return err;
1436 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1437 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1438 pcm->private_data = chip;
1439 strcpy(pcm->name, chip->card->shortname);
1440 chip->pcms[0] = pcm;
1441 /* set up playbacks */
1442 for (i = 0; i < 4; i++)
4f550df5 1443 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1444 /* capture */
4f550df5 1445 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1446
8e2c7524
TI		 1447 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1448 &chip->pci->dev,
1449 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1450
e36e3b86
TI		 1451 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1452 snd_pcm_std_chmaps, 2, 0,
1453 &chmap);
1454 if (err < 0)
1455 return err;
1456
1da177e4
LT		 1457 /* PCM #1: multi-channel playback and 2nd capture */
1458 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1459 if (err < 0)
1460 return err;
1461 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1462 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1463 pcm->private_data = chip;
1464 strcpy(pcm->name, chip->card->shortname);
1465 chip->pcms[1] = pcm;
1466 /* set up playback */
4f550df5 1467 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1468 /* set up capture */
4f550df5 1469 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1470
8e2c7524
TI		 1471 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1472 &chip->pci->dev,
1473 64*1024, VIA_MAX_BUFSIZE);
e36e3b86
TI		 1474
1475 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1476 snd_pcm_alt_chmaps, 6, 0,
1477 &chmap);
1478 if (err < 0)
1479 return err;
1480 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1481
1da177e4
LT		 1482 return 0;
1483}
1484
1485/*
1486 * create pcm instances for VIA8233A
1487 */
e23e7a14 1488static int snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1489{
e437e3d7 1490 struct snd_pcm *pcm;
e36e3b86 1491 struct snd_pcm_chmap *chmap;
1da177e4
LT		 1492 int err;
1493
1494 chip->multi_devno = 0;
1495 chip->playback_devno = 1;
1496 chip->capture_devno = 2;
1497 chip->num_devs = 3;
1498 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1499
1500 /* PCM #0: multi-channel playback and capture */
1501 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1502 if (err < 0)
1503 return err;
1504 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1505 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1506 pcm->private_data = chip;
1507 strcpy(pcm->name, chip->card->shortname);
1508 chip->pcms[0] = pcm;
1509 /* set up playback */
4f550df5 1510 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1511 /* capture */
4f550df5 1512 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1513
8e2c7524
TI		 1514 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1515 &chip->pci->dev,
1516 64*1024, VIA_MAX_BUFSIZE);
1da177e4 1517
e36e3b86
TI		 1518 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1519 snd_pcm_alt_chmaps, 6, 0,
1520 &chmap);
1521 if (err < 0)
1522 return err;
1523 chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1524
1da177e4
LT		 1525 /* SPDIF supported? */
1526 if (! ac97_can_spdif(chip->ac97))
1527 return 0;
1528
1529 /* PCM #1: DXS3 playback (for spdif) */
1530 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1531 if (err < 0)
1532 return err;
1533 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1534 pcm->private_data = chip;
1535 strcpy(pcm->name, chip->card->shortname);
1536 chip->pcms[1] = pcm;
1537 /* set up playback */
4f550df5 1538 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1539
8e2c7524
TI		 1540 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1541 &chip->pci->dev,
1542 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1543 return 0;
1544}
1545
1546/*
1547 * create a pcm instance for via686a/b
1548 */
e23e7a14 1549static int snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1550{
e437e3d7 1551 struct snd_pcm *pcm;
1da177e4
LT		 1552 int err;
1553
1554 chip->playback_devno = 0;
1555 chip->capture_devno = 1;
1556 chip->num_devs = 2;
1557 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1558
1559 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1560 if (err < 0)
1561 return err;
1562 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1563 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1564 pcm->private_data = chip;
1565 strcpy(pcm->name, chip->card->shortname);
1566 chip->pcms[0] = pcm;
4f550df5
KW		 1567 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1568 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1569
8e2c7524
TI		 1570 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1571 &chip->pci->dev,
1572 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1573 return 0;
1574}
1575
1576
1577/*
1578 * Mixer part
1579 */
1580
e437e3d7
TI		 1581static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1582 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1583{
1584 /* formerly they were "Line" and "Mic", but it looks like that they
1585 * have nothing to do with the actual physical connections...
1586 */
9883ab91 1587 static const char * const texts[2] = {
1da177e4
LT		 1588 "Input1", "Input2"
1589 };
9883ab91 1590 return snd_ctl_enum_info(uinfo, 1, 2, texts);
1da177e4
LT		 1591}
1592
e437e3d7
TI		 1593static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1594 struct snd_ctl_elem_value *ucontrol)
1da177e4 1595{
e437e3d7 1596 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1597 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1598 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1599 return 0;
1600}
1601
e437e3d7
TI		 1602static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1603 struct snd_ctl_elem_value *ucontrol)
1da177e4 1604{
e437e3d7 1605 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1606 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1607 u8 val, oval;
1608
1609 spin_lock_irq(&chip->reg_lock);
1610 oval = inb(port);
1611 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1612 if (ucontrol->value.enumerated.item[0])
1613 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1614 if (val != oval)
1615 outb(val, port);
1616 spin_unlock_irq(&chip->reg_lock);
1617 return val != oval;
1618}
1619
e23e7a14 1620static struct snd_kcontrol_new snd_via8233_capture_source = {
1da177e4
LT		 1621 .name = "Input Source Select",
1622 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1623 .info = snd_via8233_capture_source_info,
1624 .get = snd_via8233_capture_source_get,
1625 .put = snd_via8233_capture_source_put,
1626};
1627
a5ce8890 1628#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1629
e437e3d7
TI		 1630static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol)
1da177e4 1632{
e437e3d7 1633 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1634 u8 val;
1635
1636 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1637 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1638 return 0;
1639}
1640
e437e3d7
TI		 1641static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1da177e4 1643{
e437e3d7 1644 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1645 u8 val, oval;
1646
1647 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1648 val = oval & ~VIA8233_SPDIF_DX3;
1649 if (ucontrol->value.integer.value[0])
1650 val |= VIA8233_SPDIF_DX3;
1651 /* save the spdif flag for rate filtering */
1652 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1653 if (val != oval) {
1654 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1655 return 1;
1656 }
1657 return 0;
1658}
1659
f3b827e0 1660static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
10e8d78a 1661 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1662 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1663 .info = snd_via8233_dxs3_spdif_info,
1664 .get = snd_via8233_dxs3_spdif_get,
1665 .put = snd_via8233_dxs3_spdif_put,
1666};
1667
e437e3d7
TI		 1668static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1669 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1670{
1671 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1672 uinfo->count = 2;
1673 uinfo->value.integer.min = 0;
1674 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1675 return 0;
1676}
1677
e437e3d7
TI		 1678static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
1da177e4 1680{
e437e3d7 1681 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1682 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1683
1684 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1685 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1686 return 0;
1687}
1688
e437e3d7
TI		 1689static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1690 struct snd_ctl_elem_value *ucontrol)
00f226d4 1691{
e437e3d7 1692 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM		 1693 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1694 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT		 1695 return 0;
1696}
1697
e437e3d7
TI		 1698static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1699 struct snd_ctl_elem_value *ucontrol)
00f226d4 1700{
e437e3d7 1701 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1702 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1703 unsigned long port = chip->port + 0x10 * idx;
1704 unsigned char val;
1705 int i, change = 0;
1706
1707 for (i = 0; i < 2; i++) {
1708 val = ucontrol->value.integer.value[i];
1709 if (val > VIA_DXS_MAX_VOLUME)
1710 val = VIA_DXS_MAX_VOLUME;
1711 val = VIA_DXS_MAX_VOLUME - val;
1712 change |= val != chip->playback_volume[idx][i];
1713 if (change) {
1714 chip->playback_volume[idx][i] = val;
1715 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1716 }
1717 }
1718 return change;
1719}
1720
e437e3d7
TI		 1721static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1722 struct snd_ctl_elem_value *ucontrol)
1da177e4 1723{
e437e3d7 1724 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1725 unsigned int idx;
1726 unsigned char val;
1727 int i, change = 0;
1728
1729 for (i = 0; i < 2; i++) {
1730 val = ucontrol->value.integer.value[i];
1731 if (val > VIA_DXS_MAX_VOLUME)
1732 val = VIA_DXS_MAX_VOLUME;
1733 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1734 if (val != chip->playback_volume_c[i]) {
1da177e4 1735 change = 1;
00f226d4 1736 chip->playback_volume_c[i] = val;
1da177e4
LT		 1737 for (idx = 0; idx < 4; idx++) {
1738 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1739 chip->playback_volume[idx][i] = val;
1da177e4
LT		 1740 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1741 }
1742 }
1743 }
1744 return change;
1745}
1746
b452e08e 1747static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1748
f3b827e0 1749static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
1da177e4
LT		 1750 .name = "PCM Playback Volume",
1751 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI		 1752 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1753 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1754 .info = snd_via8233_dxs_volume_info,
00f226d4
HM		 1755 .get = snd_via8233_pcmdxs_volume_get,
1756 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1757 .tlv = { .p = db_scale_dxs }
00f226d4
HM		 1758};
1759
f3b827e0 1760static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
2fb930b5
CL		 1761 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1762 .device = 0,
1763 /* .subdevice set later */
1764 .name = "PCM Playback Volume",
3d009413
CL		 1765 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1766 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1767 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1768 .info = snd_via8233_dxs_volume_info,
1da177e4
LT		 1769 .get = snd_via8233_dxs_volume_get,
1770 .put = snd_via8233_dxs_volume_put,
7058c042 1771 .tlv = { .p = db_scale_dxs }
1da177e4
LT		 1772};
1773
1774/*
1775 */
1776
e437e3d7 1777static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1778{
e437e3d7 1779 struct via82xx *chip = bus->private_data;
1da177e4
LT		 1780 chip->ac97_bus = NULL;
1781}
1782
e437e3d7 1783static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1784{
e437e3d7 1785 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 1786 chip->ac97 = NULL;
1787}
1788
eab0fbfa 1789static const struct ac97_quirk ac97_quirks[] = {
1da177e4 1790 {
69ad07cf
JK		 1791 .subvendor = 0x1106,
1792 .subdevice = 0x4161,
1da177e4
LT		 1793 .codec_id = 0x56494161, /* VT1612A */
1794 .name = "Soltek SL-75DRV5",
1795 .type = AC97_TUNE_NONE
1796 },
1797 { /* FIXME: which codec? */
69ad07cf
JK		 1798 .subvendor = 0x1106,
1799 .subdevice = 0x4161,
1da177e4
LT		 1800 .name = "ASRock K7VT2",
1801 .type = AC97_TUNE_HP_ONLY
1802 },
bf30a430
CL		 1803 {
1804 .subvendor = 0x110a,
1805 .subdevice = 0x0079,
1806 .name = "Fujitsu Siemens D1289",
1807 .type = AC97_TUNE_HP_ONLY
1808 },
1da177e4 1809 {
69ad07cf
JK		 1810 .subvendor = 0x1019,
1811 .subdevice = 0x0a81,
1da177e4
LT		 1812 .name = "ECS K7VTA3",
1813 .type = AC97_TUNE_HP_ONLY
1814 },
1815 {
69ad07cf
JK		 1816 .subvendor = 0x1019,
1817 .subdevice = 0x0a85,
1da177e4
LT		 1818 .name = "ECS L7VMM2",
1819 .type = AC97_TUNE_HP_ONLY
1820 },
942fd1eb
WS		 1821 {
1822 .subvendor = 0x1019,
1823 .subdevice = 0x1841,
1824 .name = "ECS K7VTA3",
1825 .type = AC97_TUNE_HP_ONLY
1826 },
1da177e4 1827 {
69ad07cf
JK		 1828 .subvendor = 0x1849,
1829 .subdevice = 0x3059,
1da177e4
LT		 1830 .name = "ASRock K7VM2",
1831 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1832 },
1833 {
69ad07cf
JK		 1834 .subvendor = 0x14cd,
1835 .subdevice = 0x7002,
1da177e4
LT		 1836 .name = "Unknown",
1837 .type = AC97_TUNE_ALC_JACK
1838 },
1839 {
69ad07cf
JK		 1840 .subvendor = 0x1071,
1841 .subdevice = 0x8590,
1da177e4
LT		 1842 .name = "Mitac Mobo",
1843 .type = AC97_TUNE_ALC_JACK
1844 },
1845 {
69ad07cf
JK		 1846 .subvendor = 0x161f,
1847 .subdevice = 0x202b,
1da177e4
LT		 1848 .name = "Arima Notebook",
1849 .type = AC97_TUNE_HP_ONLY,
1850 },
dac8dddd
TI		 1851 {
1852 .subvendor = 0x161f,
1853 .subdevice = 0x2032,
1854 .name = "Targa Traveller 811",
1855 .type = AC97_TUNE_HP_ONLY,
1856 },
d4199f01
DC		 1857 {
1858 .subvendor = 0x161f,
1859 .subdevice = 0x2032,
1860 .name = "m680x",
1861 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1862 },
9674513d
TI		 1863 {
1864 .subvendor = 0x1297,
1865 .subdevice = 0xa232,
1866 .name = "Shuttle AK32VN",
1867 .type = AC97_TUNE_HP_ONLY
1868 },
1da177e4
LT		 1869 { } /* terminator */
1870};
1871
e23e7a14 1872static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1873{
e437e3d7 1874 struct snd_ac97_template ac97;
1da177e4 1875 int err;
51055da5 1876 static const struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1877 .write = snd_via82xx_codec_write,
1878 .read = snd_via82xx_codec_read,
1879 .wait = snd_via82xx_codec_wait,
1880 };
1881
afb342f0
TI		 1882 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1883 if (err < 0)
1da177e4
LT		 1884 return err;
1885 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1886 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT		 1887
1888 memset(&ac97, 0, sizeof(ac97));
1889 ac97.private_data = chip;
1890 ac97.private_free = snd_via82xx_mixer_free_ac97;
1891 ac97.pci = chip->pci;
f1a63a38 1892 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
afb342f0
TI		 1893 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1894 if (err < 0)
1da177e4
LT		 1895 return err;
1896
1897 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1898
1899 if (chip->chip_type != TYPE_VIA686) {
1900 /* use slot 10/11 */
1901 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1902 }
1903
1904 return 0;
1905}
1906
1907#ifdef SUPPORT_JOYSTICK
1908#define JOYSTICK_ADDR 0x200
e23e7a14 1909static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1910{
1911 struct gameport *gp;
1da177e4 1912
b7fe4622 1913 if (!joystick)
1da177e4
LT		 1914 return -ENODEV;
1915
afaf9975
TI		 1916 if (!devm_request_region(chip->card->dev, JOYSTICK_ADDR, 8,
1917 "VIA686 gameport")) {
59d3acfa 1918 dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
e437e3d7 1919 JOYSTICK_ADDR);
1da177e4
LT		 1920 return -EBUSY;
1921 }
1922
1923 chip->gameport = gp = gameport_allocate_port();
1924 if (!gp) {
59d3acfa
TI		 1925 dev_err(chip->card->dev,
1926 "cannot allocate memory for gameport\n");
1da177e4
LT		 1927 return -ENOMEM;
1928 }
1929
1930 gameport_set_name(gp, "VIA686 Gameport");
1931 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1932 gameport_set_dev_parent(gp, &chip->pci->dev);
1933 gp->io = JOYSTICK_ADDR;
1da177e4
LT		 1934
1935 /* Enable legacy joystick port */
1936 *legacy |= VIA_FUNC_ENABLE_GAME;
1937 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1938
1939 gameport_register_port(chip->gameport);
1940
1941 return 0;
1942}
1943
e437e3d7 1944static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT		 1945{
1946 if (chip->gameport) {
1da177e4
LT		 1947 gameport_unregister_port(chip->gameport);
1948 chip->gameport = NULL;
1da177e4
LT		 1949 }
1950}
1951#else
e437e3d7 1952static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1953{
1954 return -ENOSYS;
1955}
e437e3d7 1956static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT		 1957#endif
1958
1959
1960/*
1961 *
1962 */
1963
e23e7a14 1964static int snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT		 1965{
1966 int i, err, caps;
1967 unsigned char val;
1968
1969 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
1970 for (i = 0; i < caps; i++) {
1971 snd_via8233_capture_source.index = i;
1972 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
1973 if (err < 0)
1974 return err;
1975 }
1976 if (ac97_can_spdif(chip->ac97)) {
1977 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
1978 if (err < 0)
1979 return err;
1980 }
1981 if (chip->chip_type != TYPE_VIA8233A) {
1982 /* when no h/w PCM volume control is found, use DXS volume control
1983 * as the PCM vol control
1984 */
a16ea09d 1985 if (!snd_ctl_find_id_mixer(chip->card, "PCM Playback Volume")) {
59d3acfa
TI		 1986 dev_info(chip->card->dev,
1987 "Using DXS as PCM Playback\n");
00f226d4
HM		 1988 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
1989 if (err < 0)
1990 return err;
1991 }
1992 else /* Using DXS when PCM emulation is enabled is really weird */
1993 {
2fb930b5
CL		 1994 for (i = 0; i < 4; ++i) {
1995 struct snd_kcontrol *kctl;
1996
1997 kctl = snd_ctl_new1(
1998 &snd_via8233_dxs_volume_control, chip);
1999 if (!kctl)
2000 return -ENOMEM;
2001 kctl->id.subdevice = i;
2002 err = snd_ctl_add(chip->card, kctl);
2003 if (err < 0)
2004 return err;
3d009413 2005 chip->dxs_controls[i] = kctl;
2fb930b5 2006 }
1da177e4
LT		 2007 }
2008 }
1da177e4
LT		 2009 /* select spdif data slot 10/11 */
2010 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2011 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2012 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2013 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2014
2015 return 0;
2016}
2017
e23e7a14 2018static int snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT		 2019{
2020 unsigned char legacy, legacy_cfg;
2021 int rev_h = 0;
2022
2023 legacy = chip->old_legacy;
2024 legacy_cfg = chip->old_legacy_cfg;
2025 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2026 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2027 if (chip->revision >= VIA_REV_686_H) {
2028 rev_h = 1;
b7fe4622
CL		 2029 if (mpu_port >= 0x200) { /* force MIDI */
2030 mpu_port &= 0xfffc;
2031 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
b7fe4622 2032 chip->mpu_port_saved = mpu_port;
1da177e4 2033 } else {
b7fe4622 2034 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT		 2035 }
2036 } else {
b7fe4622 2037 switch (mpu_port) { /* force MIDI */
1da177e4
LT		 2038 case 0x300:
2039 case 0x310:
2040 case 0x320:
2041 case 0x330:
2042 legacy_cfg &= ~(3 << 2);
b7fe4622 2043 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT		 2044 break;
2045 default: /* no, use BIOS settings */
2046 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2047 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT		 2048 break;
2049 }
2050 }
afb342f0 2051 if (mpu_port >= 0x200)
afaf9975
TI		 2052 chip->mpu_res = devm_request_region(&chip->pci->dev, mpu_port,
2053 2, "VIA82xx MPU401");
afb342f0 2054 if (chip->mpu_res) {
1da177e4
LT		 2055 if (rev_h)
2056 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2057 legacy |= VIA_FUNC_ENABLE_MIDI;
2058 } else {
2059 if (rev_h)
2060 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2061 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2062 mpu_port = 0;
1da177e4
LT		 2063 }
2064
2065 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2066 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2067 if (chip->mpu_res) {
2068 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
dba8b469
CL		 2069 mpu_port, MPU401_INFO_INTEGRATED |
2070 MPU401_INFO_IRQ_HOOK, -1,
2071 &chip->rmidi) < 0) {
59d3acfa
TI		 2072 dev_warn(chip->card->dev,
2073 "unable to initialize MPU-401 at 0x%lx, skipping\n",
2074 mpu_port);
1da177e4
LT		 2075 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2076 } else {
2077 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2078 }
2079 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2080 }
2081
b7fe4622 2082 snd_via686_create_gameport(chip, &legacy);
1da177e4 2083
1da177e4
LT		 2084 chip->legacy_saved = legacy;
2085 chip->legacy_cfg_saved = legacy_cfg;
1da177e4
LT		 2086
2087 return 0;
2088}
2089
2090
2091/*
2092 * proc interface
2093 */
e437e3d7
TI		 2094static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2095 struct snd_info_buffer *buffer)
1da177e4 2096{
e437e3d7 2097 struct via82xx *chip = entry->private_data;
1da177e4
LT		 2098 int i;
2099
2100 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2101 for (i = 0; i < 0xa0; i += 4) {
2102 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2103 }
2104}
2105
e23e7a14 2106static void snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2107{
47f2769b
TI		 2108 snd_card_ro_proc_new(chip->card, "via82xx", chip,
2109 snd_via82xx_proc_read);
1da177e4
LT		 2110}
2111
2112/*
2113 *
2114 */
2115
e437e3d7 2116static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT		 2117{
2118 unsigned int val;
ef21ca24 2119 unsigned long end_time;
1da177e4
LT		 2120 unsigned char pval;
2121
2122#if 0 /* broken on K7M? */
2123 if (chip->chip_type == TYPE_VIA686)
2124 /* disable all legacy ports */
2125 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2126#endif
2127 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2128 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2129 /* deassert ACLink reset, force SYNC */
2130 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2131 VIA_ACLINK_CTRL_ENABLE |
2132 VIA_ACLINK_CTRL_RESET |
2133 VIA_ACLINK_CTRL_SYNC);
2134 udelay(100);
2135#if 1 /* FIXME: should we do full reset here for all chip models? */
2136 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2137 udelay(100);
2138#else
2139 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2140 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2141 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2142 udelay(2);
2143#endif
2144 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2145 /* note - FM data out has trouble with non VRA codecs !! */
2146 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2147 udelay(100);
2148 }
2149
2150 /* Make sure VRA is enabled, in case we didn't do a
2151 * complete codec reset, above */
2152 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2153 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2154 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2155 /* note - FM data out has trouble with non VRA codecs !! */
2156 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2157 udelay(100);
2158 }
2159
2160 /* wait until codec ready */
ef21ca24 2161 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2162 do {
2163 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2164 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2165 break;
d86d0193 2166 schedule_timeout_uninterruptible(1);
ef21ca24 2167 } while (time_before(jiffies, end_time));
1da177e4 2168
afb342f0
TI		 2169 val = snd_via82xx_codec_xread(chip);
2170 if (val & VIA_REG_AC97_BUSY)
59d3acfa
TI		 2171 dev_err(chip->card->dev,
2172 "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT		 2173
2174#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2175 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2176 VIA_REG_AC97_SECONDARY_VALID |
2177 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2178 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2179 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2180 VIA_REG_AC97_SECONDARY_VALID |
2181 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2182 do {
afb342f0
TI		 2183 val = snd_via82xx_codec_xread(chip);
2184 if (val & VIA_REG_AC97_SECONDARY_VALID) {
1da177e4
LT		 2185 chip->ac97_secondary = 1;
2186 goto __ac97_ok2;
2187 }
d86d0193 2188 schedule_timeout_uninterruptible(1);
ef21ca24 2189 } while (time_before(jiffies, end_time));
1da177e4
LT		 2190 /* This is ok, the most of motherboards have only one codec */
2191
2192 __ac97_ok2:
2193#endif
2194
2195 if (chip->chip_type == TYPE_VIA686) {
2196 /* route FM trap to IRQ, disable FM trap */
2197 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2198 /* disable all GPI interrupts */
2199 outl(0, VIAREG(chip, GPI_INTR));
2200 }
2201
2202 if (chip->chip_type != TYPE_VIA686) {
2203 /* Workaround for Award BIOS bug:
2204 * DXS channels don't work properly with VRA if MC97 is disabled.
2205 */
2206 struct pci_dev *pci;
0dd119f7 2207 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT		 2208 if (pci) {
2209 unsigned char data;
2210 pci_read_config_byte(pci, 0x44, &data);
2211 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2212 pci_dev_put(pci);
1da177e4
LT		 2213 }
2214 }
2215
2216 if (chip->chip_type != TYPE_VIA8233A) {
2217 int i, idx;
2218 for (idx = 0; idx < 4; idx++) {
2219 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM		 2220 for (i = 0; i < 2; i++) {
2221 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI		 2222 outb(chip->playback_volume_c[i],
2223 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2224 }
1da177e4
LT		 2225 }
2226 }
2227
2228 return 0;
2229}
2230
1da177e4
LT		 2231/*
2232 * power management
2233 */
68cb2b55 2234static int snd_via82xx_suspend(struct device *dev)
1da177e4 2235{
68cb2b55 2236 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2237 struct via82xx *chip = card->private_data;
1da177e4
LT		 2238 int i;
2239
57feb835 2240 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 2241 for (i = 0; i < chip->num_devs; i++)
2242 snd_via82xx_channel_reset(chip, &chip->devs[i]);
1da177e4
LT		 2243 snd_ac97_suspend(chip->ac97);
2244
2245 /* save misc values */
2246 if (chip->chip_type != TYPE_VIA686) {
2247 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2248 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2249 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2250 }
2251
1da177e4
LT		 2252 return 0;
2253}
2254
68cb2b55 2255static int snd_via82xx_resume(struct device *dev)
1da177e4 2256{
68cb2b55 2257 struct snd_card *card = dev_get_drvdata(dev);
57feb835 2258 struct via82xx *chip = card->private_data;
1da177e4
LT		 2259 int i;
2260
1da177e4
LT		 2261 snd_via82xx_chip_init(chip);
2262
2263 if (chip->chip_type == TYPE_VIA686) {
2264 if (chip->mpu_port_saved)
2265 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2266 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2267 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2268 } else {
2269 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2270 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2271 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2272 }
2273
2274 snd_ac97_resume(chip->ac97);
2275
2276 for (i = 0; i < chip->num_devs; i++)
2277 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2278
57feb835 2279 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2280 return 0;
2281}
68cb2b55 2282
8dbcc799 2283static DEFINE_SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
1da177e4 2284
afaf9975 2285static void snd_via82xx_free(struct snd_card *card)
1da177e4 2286{
afaf9975 2287 struct via82xx *chip = card->private_data;
1da177e4
LT		 2288 unsigned int i;
2289
1da177e4
LT		 2290 /* disable interrupts */
2291 for (i = 0; i < chip->num_devs; i++)
2292 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2293
1da177e4
LT		 2294 if (chip->chip_type == TYPE_VIA686) {
2295 snd_via686_free_gameport(chip);
2296 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2297 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2298 }
1da177e4
LT		 2299}
2300
e23e7a14
BP		 2301static int snd_via82xx_create(struct snd_card *card,
2302 struct pci_dev *pci,
2303 int chip_type,
2304 int revision,
afaf9975 2305 unsigned int ac97_clock)
1da177e4 2306{
afaf9975 2307 struct via82xx *chip = card->private_data;
1da177e4 2308 int err;
1da177e4 2309
afaf9975 2310 err = pcim_enable_device(pci);
afb342f0 2311 if (err < 0)
1da177e4
LT		 2312 return err;
2313
1da177e4
LT		 2314 chip->chip_type = chip_type;
2315 chip->revision = revision;
2316
2317 spin_lock_init(&chip->reg_lock);
2318 spin_lock_init(&chip->rates[0].lock);
2319 spin_lock_init(&chip->rates[1].lock);
2320 chip->card = card;
2321 chip->pci = pci;
2322 chip->irq = -1;
2323
2324 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2325 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2326 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2327 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2328
afb342f0 2329 err = pci_request_regions(pci, card->driver);
afaf9975 2330 if (err < 0)
1da177e4 2331 return err;
1da177e4 2332 chip->port = pci_resource_start(pci, 0);
afaf9975
TI		 2333 if (devm_request_irq(&pci->dev, pci->irq,
2334 chip_type == TYPE_VIA8233 ?
2335 snd_via8233_interrupt : snd_via686_interrupt,
2336 IRQF_SHARED,
2337 KBUILD_MODNAME, chip)) {
59d3acfa 2338 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2339 return -EBUSY;
2340 }
2341 chip->irq = pci->irq;
c47583b0 2342 card->sync_irq = chip->irq;
afaf9975 2343 card->private_free = snd_via82xx_free;
1da177e4
LT		 2344 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2345 chip->ac97_clock = ac97_clock;
1da177e4 2346
afb342f0 2347 err = snd_via82xx_chip_init(chip);
afaf9975 2348 if (err < 0)
1da177e4 2349 return err;
1da177e4
LT		 2350
2351 /* The 8233 ac97 controller does not implement the master bit
2352 * in the pci command register. IMHO this is a violation of the PCI spec.
2353 * We call pci_set_master here because it does not hurt. */
2354 pci_set_master(pci);
1da177e4
LT		 2355 return 0;
2356}
2357
2358struct via823x_info {
2359 int revision;
2360 char *name;
2361 int type;
2362};
a05c0737 2363static const struct via823x_info via823x_cards[] = {
1da177e4
LT		 2364 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2365 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2366 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2367 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2368 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2369 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2370 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT		 2371};
2372
2373/*
2374 * auto detection of DXS channel supports.
2375 */
9d74958a 2376
21641672 2377static const struct snd_pci_quirk dxs_allowlist[] = {
9d74958a
TI		 2378 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2379 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2380 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2381 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2382 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI		 2383 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2384 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2385 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI		 2386 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2387 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2388 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2389 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2390 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI		 2391 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2392 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI		 2393 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2394 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2395 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2396 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2397 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI		 2398 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2399 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2400 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2401 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2402 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2403 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2404 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2405 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2406 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2407 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2408 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2409 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2410 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI		 2411 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2412 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2413 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2414 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2415 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI		 2416 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2417 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2418 { } /* terminator */
1da177e4
LT		 2419};
2420
e23e7a14 2421static int check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2422{
9d74958a 2423 const struct snd_pci_quirk *w;
1da177e4 2424
21641672 2425 w = snd_pci_quirk_lookup(pci, dxs_allowlist);
9d74958a 2426 if (w) {
21641672 2427 dev_dbg(&pci->dev, "DXS allow list for %s found\n",
86b27237 2428 snd_pci_quirk_name(w));
9d74958a 2429 return w->value;
1da177e4
LT		 2430 }
2431
a769577b
TI		 2432 /* for newer revision, default to DXS_SRC */
2433 if (revision >= VIA_REV_8235)
2434 return VIA_DXS_SRC;
2435
1da177e4
LT		 2436 /*
2437 * not detected, try 48k rate only to be sure.
2438 */
59d3acfa
TI		 2439 dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
2440 dev_info(&pci->dev, " Please try dxs_support=5 option\n");
2441 dev_info(&pci->dev, " and report if it works on your machine.\n");
2442 dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT		 2443 return VIA_DXS_48K;
2444};
2445
27a0963f
TI		 2446static int __snd_via82xx_probe(struct pci_dev *pci,
2447 const struct pci_device_id *pci_id)
1da177e4 2448{
e437e3d7
TI		 2449 struct snd_card *card;
2450 struct via82xx *chip;
1da177e4
LT		 2451 int chip_type = 0, card_type;
2452 unsigned int i;
2453 int err;
2454
afaf9975
TI		 2455 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
2456 sizeof(*chip), &card);
e58de7ba
TI		 2457 if (err < 0)
2458 return err;
afaf9975 2459 chip = card->private_data;
1da177e4
LT		 2460
2461 card_type = pci_id->driver_data;
1da177e4
LT		 2462 switch (card_type) {
2463 case TYPE_CARD_VIA686:
2464 strcpy(card->driver, "VIA686A");
44c10138 2465 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT		 2466 chip_type = TYPE_VIA686;
2467 break;
2468 case TYPE_CARD_VIA8233:
2469 chip_type = TYPE_VIA8233;
44c10138 2470 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2471 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2472 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT		 2473 chip_type = via823x_cards[i].type;
2474 strcpy(card->shortname, via823x_cards[i].name);
2475 break;
2476 }
2477 }
2478 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2479 if (dxs_support == VIA_DXS_AUTO)
44c10138 2480 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT		 2481 /* force to use VIA8233 or 8233A model according to
2482 * dxs_support module option
2483 */
b7fe4622 2484 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT		 2485 chip_type = TYPE_VIA8233A;
2486 else
2487 chip_type = TYPE_VIA8233;
2488 }
2489 if (chip_type == TYPE_VIA8233A)
2490 strcpy(card->driver, "VIA8233A");
44c10138 2491 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT		 2492 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2493 else
2494 strcpy(card->driver, "VIA8233");
2495 break;
2496 default:
59d3acfa 2497 dev_err(card->dev, "invalid card type %d\n", card_type);
afaf9975 2498 return -EINVAL;
1da177e4
LT		 2499 }
2500
afb342f0 2501 err = snd_via82xx_create(card, pci, chip_type, pci->revision,
afaf9975 2502 ac97_clock);
afb342f0 2503 if (err < 0)
afaf9975 2504 return err;
afb342f0
TI		 2505 err = snd_via82xx_mixer_new(chip, ac97_quirk);
2506 if (err < 0)
afaf9975 2507 return err;
1da177e4
LT		 2508
2509 if (chip_type == TYPE_VIA686) {
afb342f0
TI		 2510 err = snd_via686_pcm_new(chip);
2511 if (err < 0)
afaf9975 2512 return err;
afb342f0
TI		 2513 err = snd_via686_init_misc(chip);
2514 if (err < 0)
afaf9975 2515 return err;
1da177e4
LT		 2516 } else {
2517 if (chip_type == TYPE_VIA8233A) {
afb342f0
TI		 2518 err = snd_via8233a_pcm_new(chip);
2519 if (err < 0)
afaf9975 2520 return err;
1da177e4
LT		 2521 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2522 } else {
afb342f0
TI		 2523 err = snd_via8233_pcm_new(chip);
2524 if (err < 0)
afaf9975 2525 return err;
b7fe4622 2526 if (dxs_support == VIA_DXS_48K)
1da177e4 2527 chip->dxs_fixed = 1;
b7fe4622 2528 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2529 chip->no_vra = 1;
b7fe4622 2530 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV		 2531 chip->no_vra = 1;
2532 chip->dxs_src = 1;
2533 }
1da177e4 2534 }
afb342f0
TI		 2535 err = snd_via8233_init_misc(chip);
2536 if (err < 0)
afaf9975 2537 return err;
1da177e4
LT		 2538 }
2539
1da177e4
LT		 2540 /* disable interrupts */
2541 for (i = 0; i < chip->num_devs; i++)
2542 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2543
2544 snprintf(card->longname, sizeof(card->longname),
2545 "%s with %s at %#lx, irq %d", card->shortname,
2546 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2547
2548 snd_via82xx_proc_init(chip);
2549
afb342f0 2550 err = snd_card_register(card);
afaf9975 2551 if (err < 0)
1da177e4 2552 return err;
1da177e4 2553 pci_set_drvdata(pci, card);
1da177e4 2554 return 0;
1da177e4
LT		 2555}
2556
27a0963f
TI		 2557static int snd_via82xx_probe(struct pci_dev *pci,
2558 const struct pci_device_id *pci_id)
2559{
2560 return snd_card_free_on_error(&pci->dev, __snd_via82xx_probe(pci, pci_id));
2561}
2562
e9f66d9b 2563static struct pci_driver via82xx_driver = {
3733e424 2564 .name = KBUILD_MODNAME,
1da177e4
LT		 2565 .id_table = snd_via82xx_ids,
2566 .probe = snd_via82xx_probe,
68cb2b55 2567 .driver = {
8dbcc799 2568 .pm = &snd_via82xx_pm,
68cb2b55 2569 },
1da177e4
LT		 2570};
2571
e9f66d9b 2572module_pci_driver(via82xx_driver);
Linux 6.x block layer and io_uring tree(s)