treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
[linux-block.git] / sound / pci / trident / trident.h
CommitLineData
1a59d1b8 1/* SPDX-License-Identifier: GPL-2.0-or-later */
1da177e4
LT
2#ifndef __SOUND_TRIDENT_H
3#define __SOUND_TRIDENT_H
4
5/*
6 * audio@tridentmicro.com
7 * Fri Feb 19 15:55:28 MST 1999
8 * Definitions for Trident 4DWave DX/NX chips
1da177e4
LT
9 */
10
81fcb170
TI
11#include <sound/pcm.h>
12#include <sound/mpu401.h>
13#include <sound/ac97_codec.h>
14#include <sound/util_mem.h>
1da177e4 15
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LT
16#define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX)
17#define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX)
18#define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018)
19
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LT
20#define SNDRV_TRIDENT_VOICE_TYPE_PCM 0
21#define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1
22#define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2
23
24#define SNDRV_TRIDENT_VFLG_RUNNING (1<<0)
25
26/* TLB code constants */
27#define SNDRV_TRIDENT_PAGE_SIZE 4096
28#define SNDRV_TRIDENT_PAGE_SHIFT 12
29#define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1)
30#define SNDRV_TRIDENT_MAX_PAGES 4096
31
32/*
33 * Direct registers
34 */
35
36#define TRID_REG(trident, x) ((trident)->port + (x))
37
38#define ID_4DWAVE_DX 0x2000
39#define ID_4DWAVE_NX 0x2001
40
41/* Bank definitions */
42
43#define T4D_BANK_A 0
44#define T4D_BANK_B 1
45#define T4D_NUM_BANKS 2
46
47/* Register definitions */
48
49/* Global registers */
50
51enum global_control_bits {
52 CHANNEL_IDX = 0x0000003f,
53 OVERRUN_IE = 0x00000400, /* interrupt enable: capture overrun */
54 UNDERRUN_IE = 0x00000800, /* interrupt enable: playback underrun */
55 ENDLP_IE = 0x00001000, /* interrupt enable: end of buffer */
56 MIDLP_IE = 0x00002000, /* interrupt enable: middle buffer */
57 ETOG_IE = 0x00004000, /* interrupt enable: envelope toggling */
58 EDROP_IE = 0x00008000, /* interrupt enable: envelope drop */
59 BANK_B_EN = 0x00010000, /* SiS: enable bank B (64 channels) */
60 PCMIN_B_MIX = 0x00020000, /* SiS: PCM IN B mixing enable */
61 I2S_OUT_ASSIGN = 0x00040000, /* SiS: I2S Out contains surround PCM */
62 SPDIF_OUT_ASSIGN= 0x00080000, /* SiS: 0=S/PDIF L/R | 1=PCM Out FIFO */
63 MAIN_OUT_ASSIGN = 0x00100000, /* SiS: 0=PCM Out FIFO | 1=MMC Out buffer */
64};
65
66enum miscint_bits {
67 PB_UNDERRUN_IRQ = 0x00000001, REC_OVERRUN_IRQ = 0x00000002,
68 SB_IRQ = 0x00000004, MPU401_IRQ = 0x00000008,
69 OPL3_IRQ = 0x00000010, ADDRESS_IRQ = 0x00000020,
70 ENVELOPE_IRQ = 0x00000040, PB_UNDERRUN = 0x00000100,
71 REC_OVERRUN = 0x00000200, MIXER_UNDERFLOW = 0x00000400,
72 MIXER_OVERFLOW = 0x00000800, NX_SB_IRQ_DISABLE = 0x00001000,
73 ST_TARGET_REACHED = 0x00008000,
74 PB_24K_MODE = 0x00010000, ST_IRQ_EN = 0x00800000,
75 ACGPIO_IRQ = 0x01000000
76};
77
78/* T2 legacy dma control registers. */
79#define LEGACY_DMAR0 0x00 // ADR0
80#define LEGACY_DMAR4 0x04 // CNT0
81#define LEGACY_DMAR6 0x06 // CNT0 - High bits
82#define LEGACY_DMAR11 0x0b // MOD
83#define LEGACY_DMAR15 0x0f // MMR
84
85#define T4D_START_A 0x80
86#define T4D_STOP_A 0x84
87#define T4D_DLY_A 0x88
88#define T4D_SIGN_CSO_A 0x8c
89#define T4D_CSPF_A 0x90
90#define T4D_CSPF_B 0xbc
91#define T4D_CEBC_A 0x94
92#define T4D_AINT_A 0x98
93#define T4D_AINTEN_A 0x9c
94#define T4D_LFO_GC_CIR 0xa0
95#define T4D_MUSICVOL_WAVEVOL 0xa8
96#define T4D_SBDELTA_DELTA_R 0xac
97#define T4D_MISCINT 0xb0
98#define T4D_START_B 0xb4
99#define T4D_STOP_B 0xb8
100#define T4D_SBBL_SBCL 0xc0
101#define T4D_SBCTRL_SBE2R_SBDD 0xc4
102#define T4D_STIMER 0xc8
103#define T4D_AINT_B 0xd8
104#define T4D_AINTEN_B 0xdc
105#define T4D_RCI 0x70
106
107/* MPU-401 UART */
108#define T4D_MPU401_BASE 0x20
109#define T4D_MPUR0 0x20
110#define T4D_MPUR1 0x21
111#define T4D_MPUR2 0x22
112#define T4D_MPUR3 0x23
113
114/* S/PDIF Registers */
115#define NX_SPCTRL_SPCSO 0x24
116#define NX_SPLBA 0x28
117#define NX_SPESO 0x2c
118#define NX_SPCSTATUS 0x64
119
120/* Joystick */
121#define GAMEPORT_GCR 0x30
122#define GAMEPORT_MODE_ADC 0x80
123#define GAMEPORT_LEGACY 0x31
124#define GAMEPORT_AXES 0x34
125
126/* NX Specific Registers */
127#define NX_TLBC 0x6c
128
129/* Channel Registers */
130
131#define CH_START 0xe0
132
133#define CH_DX_CSO_ALPHA_FMS 0xe0
134#define CH_DX_ESO_DELTA 0xe8
135#define CH_DX_FMC_RVOL_CVOL 0xec
136
137#define CH_NX_DELTA_CSO 0xe0
138#define CH_NX_DELTA_ESO 0xe8
139#define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec
140
141#define CH_LBA 0xe4
142#define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0
143#define CH_EBUF1 0xf4
144#define CH_EBUF2 0xf8
145
146/* AC-97 Registers */
147
148#define DX_ACR0_AC97_W 0x40
149#define DX_ACR1_AC97_R 0x44
150#define DX_ACR2_AC97_COM_STAT 0x48
151
152#define NX_ACR0_AC97_COM_STAT 0x40
153#define NX_ACR1_AC97_W 0x44
154#define NX_ACR2_AC97_R_PRIMARY 0x48
155#define NX_ACR3_AC97_R_SECONDARY 0x4c
156
157#define SI_AC97_WRITE 0x40
158#define SI_AC97_READ 0x44
159#define SI_SERIAL_INTF_CTRL 0x48
160#define SI_AC97_GPIO 0x4c
161#define SI_ASR0 0x50
162#define SI_SPDIF_CS 0x70
163#define SI_GPIO 0x7c
164
165enum trident_nx_ac97_bits {
166 /* ACR1-3 */
167 NX_AC97_BUSY_WRITE = 0x0800,
168 NX_AC97_BUSY_READ = 0x0800,
169 NX_AC97_BUSY_DATA = 0x0400,
170 NX_AC97_WRITE_SECONDARY = 0x0100,
171 /* ACR0 */
172 NX_AC97_SECONDARY_READY = 0x0040,
173 NX_AC97_SECONDARY_RECORD = 0x0020,
174 NX_AC97_SURROUND_OUTPUT = 0x0010,
175 NX_AC97_PRIMARY_READY = 0x0008,
176 NX_AC97_PRIMARY_RECORD = 0x0004,
177 NX_AC97_PCM_OUTPUT = 0x0002,
178 NX_AC97_WARM_RESET = 0x0001
179};
180
181enum trident_dx_ac97_bits {
182 DX_AC97_BUSY_WRITE = 0x8000,
183 DX_AC97_BUSY_READ = 0x8000,
184 DX_AC97_READY = 0x0010,
185 DX_AC97_RECORD = 0x0008,
186 DX_AC97_PLAYBACK = 0x0002
187};
188
189enum sis7018_ac97_bits {
190 SI_AC97_BUSY_WRITE = 0x00008000,
191 SI_AC97_AUDIO_BUSY = 0x00004000,
192 SI_AC97_MODEM_BUSY = 0x00002000,
193 SI_AC97_BUSY_READ = 0x00008000,
194 SI_AC97_SECONDARY = 0x00000080,
195};
196
197enum serial_intf_ctrl_bits {
198 WARM_RESET = 0x00000001,
199 COLD_RESET = 0x00000002,
200 I2S_CLOCK = 0x00000004,
201 PCM_SEC_AC97 = 0x00000008,
202 AC97_DBL_RATE = 0x00000010,
203 SPDIF_EN = 0x00000020,
204 I2S_OUTPUT_EN = 0x00000040,
205 I2S_INPUT_EN = 0x00000080,
206 PCMIN = 0x00000100,
207 LINE1IN = 0x00000200,
208 MICIN = 0x00000400,
209 LINE2IN = 0x00000800,
210 HEAD_SET_IN = 0x00001000,
211 GPIOIN = 0x00002000,
212 /* 7018 spec says id = 01 but the demo board routed to 10
213 SECONDARY_ID= 0x00004000, */
214 SECONDARY_ID = 0x00004000,
215 PCMOUT = 0x00010000,
216 SURROUT = 0x00020000,
217 CENTEROUT = 0x00040000,
218 LFEOUT = 0x00080000,
219 LINE1OUT = 0x00100000,
220 LINE2OUT = 0x00200000,
221 GPIOOUT = 0x00400000,
222 SI_AC97_PRIMARY_READY = 0x01000000,
223 SI_AC97_SECONDARY_READY = 0x02000000,
224 SI_AC97_POWERDOWN = 0x04000000,
225};
226
227/* PCM defaults */
228
229#define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */
230#define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */
231#define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */
232#define T4D_DEFAULT_PCM_CVOL 127 /* 0 - 127 */
233
bee1a5be
TI
234struct snd_trident;
235struct snd_trident_voice;
236struct snd_trident_pcm_mixer;
237
bee1a5be
TI
238struct snd_trident_port {
239 struct snd_midi_channel_set * chset;
240 struct snd_trident * trident;
1da177e4
LT
241 int mode; /* operation mode */
242 int client; /* sequencer client number */
243 int port; /* sequencer port number */
244 unsigned int midi_has_voices: 1;
bee1a5be 245};
1da177e4 246
bee1a5be 247struct snd_trident_memblk_arg {
1da177e4 248 short first_page, last_page;
bee1a5be 249};
1da177e4 250
bee1a5be 251struct snd_trident_tlb {
752089fe 252 __le32 *entries; /* 16k-aligned TLB table */
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253 dma_addr_t entries_dmaaddr; /* 16k-aligned PCI address to TLB table */
254 unsigned long * shadow_entries; /* shadow entries with virtual addresses */
255 struct snd_dma_buffer buffer;
bee1a5be 256 struct snd_util_memhdr * memhdr; /* page allocation list */
1da177e4 257 struct snd_dma_buffer silent_page;
bee1a5be 258};
1da177e4 259
bee1a5be 260struct snd_trident_voice {
1da177e4
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261 unsigned int number;
262 unsigned int use: 1,
263 pcm: 1,
264 synth:1,
265 midi: 1;
266 unsigned int flags;
267 unsigned char client;
268 unsigned char port;
269 unsigned char index;
270
bee1a5be 271 struct snd_trident_sample_ops *sample_ops;
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LT
272
273 /* channel parameters */
274 unsigned int CSO; /* 24 bits (16 on DX) */
275 unsigned int ESO; /* 24 bits (16 on DX) */
276 unsigned int LBA; /* 30 bits */
277 unsigned short EC; /* 12 bits */
278 unsigned short Alpha; /* 12 bits */
279 unsigned short Delta; /* 16 bits */
280 unsigned short Attribute; /* 16 bits - SiS 7018 */
281 unsigned short Vol; /* 12 bits (6.6) */
282 unsigned char Pan; /* 7 bits (1.4.2) */
283 unsigned char GVSel; /* 1 bit */
284 unsigned char RVol; /* 7 bits (5.2) */
285 unsigned char CVol; /* 7 bits (5.2) */
286 unsigned char FMC; /* 2 bits */
287 unsigned char CTRL; /* 4 bits */
288 unsigned char FMS; /* 4 bits */
289 unsigned char LFO; /* 8 bits */
290
291 unsigned int negCSO; /* nonzero - use negative CSO */
292
bee1a5be 293 struct snd_util_memblk *memblk; /* memory block if TLB enabled */
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LT
294
295 /* PCM data */
296
bee1a5be
TI
297 struct snd_trident *trident;
298 struct snd_pcm_substream *substream;
299 struct snd_trident_voice *extra; /* extra PCM voice (acts as interrupt generator) */
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300 unsigned int running: 1,
301 capture: 1,
302 spdif: 1,
303 foldback: 1,
304 isync: 1,
305 isync2: 1,
306 isync3: 1;
307 int foldback_chan; /* foldback subdevice number */
308 unsigned int stimer; /* global sample timer (to detect spurious interrupts) */
309 unsigned int spurious_threshold; /* spurious threshold */
310 unsigned int isync_mark;
311 unsigned int isync_max;
312 unsigned int isync_ESO;
313
314 /* --- */
315
316 void *private_data;
bee1a5be 317 void (*private_free)(struct snd_trident_voice *voice);
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LT
318};
319
bee1a5be 320struct snd_4dwave {
1da177e4
LT
321 int seq_client;
322
bee1a5be 323 struct snd_trident_port seq_ports[4];
bee1a5be 324 struct snd_trident_voice voices[64];
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LT
325
326 int ChanSynthCount; /* number of allocated synth channels */
327 int max_size; /* maximum synth memory size in bytes */
328 int current_size; /* current allocated synth mem in bytes */
329};
330
bee1a5be
TI
331struct snd_trident_pcm_mixer {
332 struct snd_trident_voice *voice; /* active voice */
1da177e4
LT
333 unsigned short vol; /* front volume */
334 unsigned char pan; /* pan control */
335 unsigned char rvol; /* rear volume */
336 unsigned char cvol; /* center volume */
337 unsigned char pad;
338};
339
bee1a5be 340struct snd_trident {
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LT
341 int irq;
342
343 unsigned int device; /* device ID */
344
345 unsigned char bDMAStart;
346
347 unsigned long port;
348 unsigned long midi_port;
349
350 unsigned int spurious_irq_count;
351 unsigned int spurious_irq_max_delta;
352
bee1a5be 353 struct snd_trident_tlb tlb; /* TLB entries for NX cards */
1da177e4
LT
354
355 unsigned char spdif_ctrl;
356 unsigned char spdif_pcm_ctrl;
357 unsigned int spdif_bits;
358 unsigned int spdif_pcm_bits;
bee1a5be 359 struct snd_kcontrol *spdif_pcm_ctl; /* S/PDIF settings */
1da177e4
LT
360 unsigned int ac97_ctrl;
361
362 unsigned int ChanMap[2]; /* allocation map for hardware channels */
363
364 int ChanPCM; /* max number of PCM channels */
365 int ChanPCMcnt; /* actual number of PCM channels */
366
367 unsigned int ac97_detect: 1; /* 1 = AC97 in detection phase */
368 unsigned int in_suspend: 1; /* 1 during suspend/resume */
369
bee1a5be 370 struct snd_4dwave synth; /* synth specific variables */
1da177e4
LT
371
372 spinlock_t event_lock;
373 spinlock_t voice_alloc;
374
375 struct snd_dma_device dma_dev;
376
377 struct pci_dev *pci;
bee1a5be
TI
378 struct snd_card *card;
379 struct snd_pcm *pcm; /* ADC/DAC PCM */
380 struct snd_pcm *foldback; /* Foldback PCM */
381 struct snd_pcm *spdif; /* SPDIF PCM */
382 struct snd_rawmidi *rmidi;
1da177e4 383
bee1a5be
TI
384 struct snd_ac97_bus *ac97_bus;
385 struct snd_ac97 *ac97;
386 struct snd_ac97 *ac97_sec;
1da177e4
LT
387
388 unsigned int musicvol_wavevol;
bee1a5be
TI
389 struct snd_trident_pcm_mixer pcm_mixer[32];
390 struct snd_kcontrol *ctl_vol; /* front volume */
391 struct snd_kcontrol *ctl_pan; /* pan */
392 struct snd_kcontrol *ctl_rvol; /* rear volume */
393 struct snd_kcontrol *ctl_cvol; /* center volume */
1da177e4
LT
394
395 spinlock_t reg_lock;
396
397 struct gameport *gameport;
398};
399
bee1a5be 400int snd_trident_create(struct snd_card *card,
1da177e4
LT
401 struct pci_dev *pci,
402 int pcm_streams,
403 int pcm_spdif_device,
404 int max_wavetable_size,
bee1a5be
TI
405 struct snd_trident ** rtrident);
406int snd_trident_create_gameport(struct snd_trident *trident);
407
1b16416f
LPC
408int snd_trident_pcm(struct snd_trident *trident, int device);
409int snd_trident_foldback_pcm(struct snd_trident *trident, int device);
410int snd_trident_spdif_pcm(struct snd_trident *trident, int device);
bee1a5be
TI
411int snd_trident_attach_synthesizer(struct snd_trident * trident);
412struct snd_trident_voice *snd_trident_alloc_voice(struct snd_trident * trident, int type,
413 int client, int port);
414void snd_trident_free_voice(struct snd_trident * trident, struct snd_trident_voice *voice);
415void snd_trident_start_voice(struct snd_trident * trident, unsigned int voice);
416void snd_trident_stop_voice(struct snd_trident * trident, unsigned int voice);
417void snd_trident_write_voice_regs(struct snd_trident * trident, struct snd_trident_voice *voice);
68cb2b55 418extern const struct dev_pm_ops snd_trident_pm;
1da177e4
LT
419
420/* TLB memory allocation */
bee1a5be
TI
421struct snd_util_memblk *snd_trident_alloc_pages(struct snd_trident *trident,
422 struct snd_pcm_substream *substream);
423int snd_trident_free_pages(struct snd_trident *trident, struct snd_util_memblk *blk);
424struct snd_util_memblk *snd_trident_synth_alloc(struct snd_trident *trident, unsigned int size);
425int snd_trident_synth_free(struct snd_trident *trident, struct snd_util_memblk *blk);
426int snd_trident_synth_copy_from_user(struct snd_trident *trident, struct snd_util_memblk *blk,
427 int offset, const char __user *data, int size);
1da177e4
LT
428
429#endif /* __SOUND_TRIDENT_H */