projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/teigland/dlm
[linux-2.6-block.git] / sound / pci / pcxhr / pcxhr_mix22.c
CommitLineData
c0193f39
MB		 1/*
2 * Driver for Digigram pcxhr compatible soundcards
3 *
4 * mixer interface for stereo cards
5 *
6 * Copyright (c) 2004 by Digigram <alsa@digigram.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/delay.h>
24#include <linux/io.h>
25#include <sound/core.h>
26#include <sound/control.h>
27#include <sound/tlv.h>
28#include <sound/asoundef.h>
29#include "pcxhr.h"
30#include "pcxhr_core.h"
31#include "pcxhr_mix22.h"
32
33
34/* registers used on the DSP and Xilinx (port 2) : HR stereo cards only */
35#define PCXHR_DSP_RESET 0x20
36#define PCXHR_XLX_CFG 0x24
37#define PCXHR_XLX_RUER 0x28
38#define PCXHR_XLX_DATA 0x2C
39#define PCXHR_XLX_STATUS 0x30
40#define PCXHR_XLX_LOFREQ 0x34
41#define PCXHR_XLX_HIFREQ 0x38
42#define PCXHR_XLX_CSUER 0x3C
43#define PCXHR_XLX_SELMIC 0x40
44
45#define PCXHR_DSP 2
46
47/* byte access only ! */
48#define PCXHR_INPB(mgr, x) inb((mgr)->port[PCXHR_DSP] + (x))
49#define PCXHR_OUTPB(mgr, x, data) outb((data), (mgr)->port[PCXHR_DSP] + (x))
50
51
52/* values for PCHR_DSP_RESET register */
53#define PCXHR_DSP_RESET_DSP 0x01
54#define PCXHR_DSP_RESET_MUTE 0x02
55#define PCXHR_DSP_RESET_CODEC 0x08
56
57/* values for PCHR_XLX_CFG register */
58#define PCXHR_CFG_SYNCDSP_MASK 0x80
59#define PCXHR_CFG_DEPENDENCY_MASK 0x60
60#define PCXHR_CFG_INDEPENDANT_SEL 0x00
61#define PCXHR_CFG_MASTER_SEL 0x40
62#define PCXHR_CFG_SLAVE_SEL 0x20
63#define PCXHR_CFG_DATA_UER1_SEL_MASK 0x10 /* 0 (UER0), 1(UER1) */
64#define PCXHR_CFG_DATAIN_SEL_MASK 0x08 /* 0 (ana), 1 (UER) */
65#define PCXHR_CFG_SRC_MASK 0x04 /* 0 (Bypass), 1 (SRC Actif) */
66#define PCXHR_CFG_CLOCK_UER1_SEL_MASK 0x02 /* 0 (UER0), 1(UER1) */
67#define PCXHR_CFG_CLOCKIN_SEL_MASK 0x01 /* 0 (internal), 1 (AES/EBU) */
68
69/* values for PCHR_XLX_DATA register */
70#define PCXHR_DATA_CODEC 0x80
71#define AKM_POWER_CONTROL_CMD 0xA007
72#define AKM_RESET_ON_CMD 0xA100
73#define AKM_RESET_OFF_CMD 0xA103
74#define AKM_CLOCK_INF_55K_CMD 0xA240
75#define AKM_CLOCK_SUP_55K_CMD 0xA24D
76#define AKM_MUTE_CMD 0xA38D
77#define AKM_UNMUTE_CMD 0xA30D
78#define AKM_LEFT_LEVEL_CMD 0xA600
79#define AKM_RIGHT_LEVEL_CMD 0xA700
80
81/* values for PCHR_XLX_STATUS register - READ */
82#define PCXHR_STAT_SRC_LOCK 0x01
83#define PCXHR_STAT_LEVEL_IN 0x02
84#define PCXHR_STAT_MIC_CAPS 0x10
85/* values for PCHR_XLX_STATUS register - WRITE */
86#define PCXHR_STAT_FREQ_SYNC_MASK 0x01
87#define PCXHR_STAT_FREQ_UER1_MASK 0x02
88#define PCXHR_STAT_FREQ_SAVE_MASK 0x80
89
90/* values for PCHR_XLX_CSUER register */
91#define PCXHR_SUER1_BIT_U_READ_MASK 0x80
92#define PCXHR_SUER1_BIT_C_READ_MASK 0x40
93#define PCXHR_SUER1_DATA_PRESENT_MASK 0x20
94#define PCXHR_SUER1_CLOCK_PRESENT_MASK 0x10
95#define PCXHR_SUER_BIT_U_READ_MASK 0x08
96#define PCXHR_SUER_BIT_C_READ_MASK 0x04
97#define PCXHR_SUER_DATA_PRESENT_MASK 0x02
98#define PCXHR_SUER_CLOCK_PRESENT_MASK 0x01
99
100#define PCXHR_SUER_BIT_U_WRITE_MASK 0x02
101#define PCXHR_SUER_BIT_C_WRITE_MASK 0x01
102
103/* values for PCXHR_XLX_SELMIC register - WRITE */
104#define PCXHR_SELMIC_PREAMPLI_OFFSET 2
105#define PCXHR_SELMIC_PREAMPLI_MASK 0x0C
106#define PCXHR_SELMIC_PHANTOM_ALIM 0x80
107
108
109static const unsigned char g_hr222_p_level[] = {
110 0x00, /* [000] -49.5 dB: AKM[000] = -1.#INF dB (mute) */
111 0x01, /* [001] -49.0 dB: AKM[001] = -48.131 dB (diff=0.86920 dB) */
112 0x01, /* [002] -48.5 dB: AKM[001] = -48.131 dB (diff=0.36920 dB) */
113 0x01, /* [003] -48.0 dB: AKM[001] = -48.131 dB (diff=0.13080 dB) */
114 0x01, /* [004] -47.5 dB: AKM[001] = -48.131 dB (diff=0.63080 dB) */
115 0x01, /* [005] -46.5 dB: AKM[001] = -48.131 dB (diff=1.63080 dB) */
116 0x01, /* [006] -47.0 dB: AKM[001] = -48.131 dB (diff=1.13080 dB) */
117 0x01, /* [007] -46.0 dB: AKM[001] = -48.131 dB (diff=2.13080 dB) */
118 0x01, /* [008] -45.5 dB: AKM[001] = -48.131 dB (diff=2.63080 dB) */
119 0x02, /* [009] -45.0 dB: AKM[002] = -42.110 dB (diff=2.88980 dB) */
120 0x02, /* [010] -44.5 dB: AKM[002] = -42.110 dB (diff=2.38980 dB) */
121 0x02, /* [011] -44.0 dB: AKM[002] = -42.110 dB (diff=1.88980 dB) */
122 0x02, /* [012] -43.5 dB: AKM[002] = -42.110 dB (diff=1.38980 dB) */
123 0x02, /* [013] -43.0 dB: AKM[002] = -42.110 dB (diff=0.88980 dB) */
124 0x02, /* [014] -42.5 dB: AKM[002] = -42.110 dB (diff=0.38980 dB) */
125 0x02, /* [015] -42.0 dB: AKM[002] = -42.110 dB (diff=0.11020 dB) */
126 0x02, /* [016] -41.5 dB: AKM[002] = -42.110 dB (diff=0.61020 dB) */
127 0x02, /* [017] -41.0 dB: AKM[002] = -42.110 dB (diff=1.11020 dB) */
128 0x02, /* [018] -40.5 dB: AKM[002] = -42.110 dB (diff=1.61020 dB) */
129 0x03, /* [019] -40.0 dB: AKM[003] = -38.588 dB (diff=1.41162 dB) */
130 0x03, /* [020] -39.5 dB: AKM[003] = -38.588 dB (diff=0.91162 dB) */
131 0x03, /* [021] -39.0 dB: AKM[003] = -38.588 dB (diff=0.41162 dB) */
132 0x03, /* [022] -38.5 dB: AKM[003] = -38.588 dB (diff=0.08838 dB) */
133 0x03, /* [023] -38.0 dB: AKM[003] = -38.588 dB (diff=0.58838 dB) */
134 0x03, /* [024] -37.5 dB: AKM[003] = -38.588 dB (diff=1.08838 dB) */
135 0x04, /* [025] -37.0 dB: AKM[004] = -36.090 dB (diff=0.91040 dB) */
136 0x04, /* [026] -36.5 dB: AKM[004] = -36.090 dB (diff=0.41040 dB) */
137 0x04, /* [027] -36.0 dB: AKM[004] = -36.090 dB (diff=0.08960 dB) */
138 0x04, /* [028] -35.5 dB: AKM[004] = -36.090 dB (diff=0.58960 dB) */
139 0x05, /* [029] -35.0 dB: AKM[005] = -34.151 dB (diff=0.84860 dB) */
140 0x05, /* [030] -34.5 dB: AKM[005] = -34.151 dB (diff=0.34860 dB) */
141 0x05, /* [031] -34.0 dB: AKM[005] = -34.151 dB (diff=0.15140 dB) */
142 0x05, /* [032] -33.5 dB: AKM[005] = -34.151 dB (diff=0.65140 dB) */
143 0x06, /* [033] -33.0 dB: AKM[006] = -32.568 dB (diff=0.43222 dB) */
144 0x06, /* [034] -32.5 dB: AKM[006] = -32.568 dB (diff=0.06778 dB) */
145 0x06, /* [035] -32.0 dB: AKM[006] = -32.568 dB (diff=0.56778 dB) */
146 0x07, /* [036] -31.5 dB: AKM[007] = -31.229 dB (diff=0.27116 dB) */
147 0x07, /* [037] -31.0 dB: AKM[007] = -31.229 dB (diff=0.22884 dB) */
148 0x08, /* [038] -30.5 dB: AKM[008] = -30.069 dB (diff=0.43100 dB) */
149 0x08, /* [039] -30.0 dB: AKM[008] = -30.069 dB (diff=0.06900 dB) */
150 0x09, /* [040] -29.5 dB: AKM[009] = -29.046 dB (diff=0.45405 dB) */
151 0x09, /* [041] -29.0 dB: AKM[009] = -29.046 dB (diff=0.04595 dB) */
152 0x0a, /* [042] -28.5 dB: AKM[010] = -28.131 dB (diff=0.36920 dB) */
153 0x0a, /* [043] -28.0 dB: AKM[010] = -28.131 dB (diff=0.13080 dB) */
154 0x0b, /* [044] -27.5 dB: AKM[011] = -27.303 dB (diff=0.19705 dB) */
155 0x0b, /* [045] -27.0 dB: AKM[011] = -27.303 dB (diff=0.30295 dB) */
156 0x0c, /* [046] -26.5 dB: AKM[012] = -26.547 dB (diff=0.04718 dB) */
157 0x0d, /* [047] -26.0 dB: AKM[013] = -25.852 dB (diff=0.14806 dB) */
158 0x0e, /* [048] -25.5 dB: AKM[014] = -25.208 dB (diff=0.29176 dB) */
159 0x0e, /* [049] -25.0 dB: AKM[014] = -25.208 dB (diff=0.20824 dB) */
160 0x0f, /* [050] -24.5 dB: AKM[015] = -24.609 dB (diff=0.10898 dB) */
161 0x10, /* [051] -24.0 dB: AKM[016] = -24.048 dB (diff=0.04840 dB) */
162 0x11, /* [052] -23.5 dB: AKM[017] = -23.522 dB (diff=0.02183 dB) */
163 0x12, /* [053] -23.0 dB: AKM[018] = -23.025 dB (diff=0.02535 dB) */
164 0x13, /* [054] -22.5 dB: AKM[019] = -22.556 dB (diff=0.05573 dB) */
165 0x14, /* [055] -22.0 dB: AKM[020] = -22.110 dB (diff=0.11020 dB) */
166 0x15, /* [056] -21.5 dB: AKM[021] = -21.686 dB (diff=0.18642 dB) */
167 0x17, /* [057] -21.0 dB: AKM[023] = -20.896 dB (diff=0.10375 dB) */
168 0x18, /* [058] -20.5 dB: AKM[024] = -20.527 dB (diff=0.02658 dB) */
169 0x1a, /* [059] -20.0 dB: AKM[026] = -19.831 dB (diff=0.16866 dB) */
170 0x1b, /* [060] -19.5 dB: AKM[027] = -19.504 dB (diff=0.00353 dB) */
171 0x1d, /* [061] -19.0 dB: AKM[029] = -18.883 dB (diff=0.11716 dB) */
172 0x1e, /* [062] -18.5 dB: AKM[030] = -18.588 dB (diff=0.08838 dB) */
173 0x20, /* [063] -18.0 dB: AKM[032] = -18.028 dB (diff=0.02780 dB) */
174 0x22, /* [064] -17.5 dB: AKM[034] = -17.501 dB (diff=0.00123 dB) */
175 0x24, /* [065] -17.0 dB: AKM[036] = -17.005 dB (diff=0.00475 dB) */
176 0x26, /* [066] -16.5 dB: AKM[038] = -16.535 dB (diff=0.03513 dB) */
177 0x28, /* [067] -16.0 dB: AKM[040] = -16.090 dB (diff=0.08960 dB) */
178 0x2b, /* [068] -15.5 dB: AKM[043] = -15.461 dB (diff=0.03857 dB) */
179 0x2d, /* [069] -15.0 dB: AKM[045] = -15.067 dB (diff=0.06655 dB) */
180 0x30, /* [070] -14.5 dB: AKM[048] = -14.506 dB (diff=0.00598 dB) */
181 0x33, /* [071] -14.0 dB: AKM[051] = -13.979 dB (diff=0.02060 dB) */
182 0x36, /* [072] -13.5 dB: AKM[054] = -13.483 dB (diff=0.01707 dB) */
183 0x39, /* [073] -13.0 dB: AKM[057] = -13.013 dB (diff=0.01331 dB) */
184 0x3c, /* [074] -12.5 dB: AKM[060] = -12.568 dB (diff=0.06778 dB) */
185 0x40, /* [075] -12.0 dB: AKM[064] = -12.007 dB (diff=0.00720 dB) */
186 0x44, /* [076] -11.5 dB: AKM[068] = -11.481 dB (diff=0.01937 dB) */
187 0x48, /* [077] -11.0 dB: AKM[072] = -10.984 dB (diff=0.01585 dB) */
188 0x4c, /* [078] -10.5 dB: AKM[076] = -10.515 dB (diff=0.01453 dB) */
189 0x51, /* [079] -10.0 dB: AKM[081] = -9.961 dB (diff=0.03890 dB) */
190 0x55, /* [080] -9.5 dB: AKM[085] = -9.542 dB (diff=0.04243 dB) */
191 0x5a, /* [081] -9.0 dB: AKM[090] = -9.046 dB (diff=0.04595 dB) */
192 0x60, /* [082] -8.5 dB: AKM[096] = -8.485 dB (diff=0.01462 dB) */
193 0x66, /* [083] -8.0 dB: AKM[102] = -7.959 dB (diff=0.04120 dB) */
194 0x6c, /* [084] -7.5 dB: AKM[108] = -7.462 dB (diff=0.03767 dB) */
195 0x72, /* [085] -7.0 dB: AKM[114] = -6.993 dB (diff=0.00729 dB) */
196 0x79, /* [086] -6.5 dB: AKM[121] = -6.475 dB (diff=0.02490 dB) */
197 0x80, /* [087] -6.0 dB: AKM[128] = -5.987 dB (diff=0.01340 dB) */
198 0x87, /* [088] -5.5 dB: AKM[135] = -5.524 dB (diff=0.02413 dB) */
199 0x8f, /* [089] -5.0 dB: AKM[143] = -5.024 dB (diff=0.02408 dB) */
200 0x98, /* [090] -4.5 dB: AKM[152] = -4.494 dB (diff=0.00607 dB) */
201 0xa1, /* [091] -4.0 dB: AKM[161] = -3.994 dB (diff=0.00571 dB) */
202 0xaa, /* [092] -3.5 dB: AKM[170] = -3.522 dB (diff=0.02183 dB) */
203 0xb5, /* [093] -3.0 dB: AKM[181] = -2.977 dB (diff=0.02277 dB) */
204 0xbf, /* [094] -2.5 dB: AKM[191] = -2.510 dB (diff=0.01014 dB) */
205 0xcb, /* [095] -2.0 dB: AKM[203] = -1.981 dB (diff=0.01912 dB) */
206 0xd7, /* [096] -1.5 dB: AKM[215] = -1.482 dB (diff=0.01797 dB) */
207 0xe3, /* [097] -1.0 dB: AKM[227] = -1.010 dB (diff=0.01029 dB) */
208 0xf1, /* [098] -0.5 dB: AKM[241] = -0.490 dB (diff=0.00954 dB) */
209 0xff, /* [099] +0.0 dB: AKM[255] = +0.000 dB (diff=0.00000 dB) */
210};
211
212
213static void hr222_config_akm(struct pcxhr_mgr *mgr, unsigned short data)
214{
215 unsigned short mask = 0x8000;
216 /* activate access to codec registers */
217 PCXHR_INPB(mgr, PCXHR_XLX_HIFREQ);
218
219 while (mask) {
220 PCXHR_OUTPB(mgr, PCXHR_XLX_DATA,
221 data & mask ? PCXHR_DATA_CODEC : 0);
222 mask >>= 1;
223 }
224 /* termiate access to codec registers */
225 PCXHR_INPB(mgr, PCXHR_XLX_RUER);
226}
227
228
229static int hr222_set_hw_playback_level(struct pcxhr_mgr *mgr,
230 int idx, int level)
231{
232 unsigned short cmd;
233 if (idx > 1 ||
234 level < 0 ||
235 level >= ARRAY_SIZE(g_hr222_p_level))
236 return -EINVAL;
237
238 if (idx == 0)
239 cmd = AKM_LEFT_LEVEL_CMD;
240 else
241 cmd = AKM_RIGHT_LEVEL_CMD;
242
243 /* conversion from PmBoardCodedLevel to AKM nonlinear programming */
244 cmd += g_hr222_p_level[level];
245
246 hr222_config_akm(mgr, cmd);
247 return 0;
248}
249
250
251static int hr222_set_hw_capture_level(struct pcxhr_mgr *mgr,
252 int level_l, int level_r, int level_mic)
253{
254 /* program all input levels at the same time */
255 unsigned int data;
256 int i;
257
258 if (!mgr->capture_chips)
259 return -EINVAL; /* no PCX22 */
260
261 data = ((level_mic & 0xff) << 24); /* micro is mono, but apply */
262 data |= ((level_mic & 0xff) << 16); /* level on both channels */
263 data |= ((level_r & 0xff) << 8); /* line input right channel */
264 data |= (level_l & 0xff); /* line input left channel */
265
266 PCXHR_INPB(mgr, PCXHR_XLX_DATA); /* activate input codec */
267 /* send 32 bits (4 x 8 bits) */
268 for (i = 0; i < 32; i++, data <<= 1) {
269 PCXHR_OUTPB(mgr, PCXHR_XLX_DATA,
270 (data & 0x80000000) ? PCXHR_DATA_CODEC : 0);
271 }
272 PCXHR_INPB(mgr, PCXHR_XLX_RUER); /* close input level codec */
273 return 0;
274}
275
276static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level);
277
278int hr222_sub_init(struct pcxhr_mgr *mgr)
279{
280 unsigned char reg;
281
282 mgr->board_has_analog = 1; /* analog always available */
283 mgr->xlx_cfg = PCXHR_CFG_SYNCDSP_MASK;
284
285 reg = PCXHR_INPB(mgr, PCXHR_XLX_STATUS);
286 if (reg & PCXHR_STAT_MIC_CAPS)
287 mgr->board_has_mic = 1; /* microphone available */
288 snd_printdd("MIC input available = %d\n", mgr->board_has_mic);
289
290 /* reset codec */
291 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET,
292 PCXHR_DSP_RESET_DSP);
293 msleep(5);
294 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET,
295 PCXHR_DSP_RESET_DSP |
296 PCXHR_DSP_RESET_MUTE |
297 PCXHR_DSP_RESET_CODEC);
298 msleep(5);
299
300 /* config AKM */
301 hr222_config_akm(mgr, AKM_POWER_CONTROL_CMD);
302 hr222_config_akm(mgr, AKM_CLOCK_INF_55K_CMD);
303 hr222_config_akm(mgr, AKM_UNMUTE_CMD);
304 hr222_config_akm(mgr, AKM_RESET_OFF_CMD);
305
306 /* init micro boost */
307 hr222_micro_boost(mgr, 0);
308
309 return 0;
310}
311
312
313/* calc PLL register */
314/* TODO : there is a very similar fct in pcxhr.c */
315static int hr222_pll_freq_register(unsigned int freq,
316 unsigned int *pllreg,
317 unsigned int *realfreq)
318{
319 unsigned int reg;
320
321 if (freq < 6900 || freq > 219000)
322 return -EINVAL;
323 reg = (28224000 * 2) / freq;
324 reg = (reg - 1) / 2;
325 if (reg < 0x100)
326 *pllreg = reg + 0xC00;
327 else if (reg < 0x200)
328 *pllreg = reg + 0x800;
329 else if (reg < 0x400)
330 *pllreg = reg & 0x1ff;
331 else if (reg < 0x800) {
332 *pllreg = ((reg >> 1) & 0x1ff) + 0x200;
333 reg &= ~1;
334 } else {
335 *pllreg = ((reg >> 2) & 0x1ff) + 0x400;
336 reg &= ~3;
337 }
338 if (realfreq)
339 *realfreq = (28224000 / (reg + 1));
340 return 0;
341}
342
343int hr222_sub_set_clock(struct pcxhr_mgr *mgr,
344 unsigned int rate,
345 int *changed)
346{
347 unsigned int speed, pllreg = 0;
348 int err;
349 unsigned realfreq = rate;
350
351 switch (mgr->use_clock_type) {
352 case HR22_CLOCK_TYPE_INTERNAL:
353 err = hr222_pll_freq_register(rate, &pllreg, &realfreq);
354 if (err)
355 return err;
356
357 mgr->xlx_cfg &= ~(PCXHR_CFG_CLOCKIN_SEL_MASK |
358 PCXHR_CFG_CLOCK_UER1_SEL_MASK);
359 break;
360 case HR22_CLOCK_TYPE_AES_SYNC:
361 mgr->xlx_cfg |= PCXHR_CFG_CLOCKIN_SEL_MASK;
362 mgr->xlx_cfg &= ~PCXHR_CFG_CLOCK_UER1_SEL_MASK;
363 break;
364 case HR22_CLOCK_TYPE_AES_1:
365 if (!mgr->board_has_aes1)
366 return -EINVAL;
367
368 mgr->xlx_cfg |= (PCXHR_CFG_CLOCKIN_SEL_MASK |
369 PCXHR_CFG_CLOCK_UER1_SEL_MASK);
370 break;
371 default:
372 return -EINVAL;
373 }
374 hr222_config_akm(mgr, AKM_MUTE_CMD);
375
376 if (mgr->use_clock_type == HR22_CLOCK_TYPE_INTERNAL) {
377 PCXHR_OUTPB(mgr, PCXHR_XLX_HIFREQ, pllreg >> 8);
378 PCXHR_OUTPB(mgr, PCXHR_XLX_LOFREQ, pllreg & 0xff);
379 }
380
381 /* set clock source */
382 PCXHR_OUTPB(mgr, PCXHR_XLX_CFG, mgr->xlx_cfg);
383
384 /* codec speed modes */
385 speed = rate < 55000 ? 0 : 1;
386 if (mgr->codec_speed != speed) {
387 mgr->codec_speed = speed;
388 if (speed == 0)
389 hr222_config_akm(mgr, AKM_CLOCK_INF_55K_CMD);
390 else
391 hr222_config_akm(mgr, AKM_CLOCK_SUP_55K_CMD);
392 }
393
394 mgr->sample_rate_real = realfreq;
395 mgr->cur_clock_type = mgr->use_clock_type;
396
397 if (changed)
398 *changed = 1;
399
400 hr222_config_akm(mgr, AKM_UNMUTE_CMD);
401
402 snd_printdd("set_clock to %dHz (realfreq=%d pllreg=%x)\n",
403 rate, realfreq, pllreg);
404 return 0;
405}
406
407int hr222_get_external_clock(struct pcxhr_mgr *mgr,
408 enum pcxhr_clock_type clock_type,
409 int *sample_rate)
410{
411 int rate, calc_rate = 0;
412 unsigned int ticks;
413 unsigned char mask, reg;
414
415 if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) {
416
417 mask = (PCXHR_SUER_CLOCK_PRESENT_MASK |
418 PCXHR_SUER_DATA_PRESENT_MASK);
419 reg = PCXHR_STAT_FREQ_SYNC_MASK;
420
421 } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) {
422
423 mask = (PCXHR_SUER1_CLOCK_PRESENT_MASK |
424 PCXHR_SUER1_DATA_PRESENT_MASK);
425 reg = PCXHR_STAT_FREQ_UER1_MASK;
426
427 } else {
428 snd_printdd("get_external_clock : type %d not supported\n",
429 clock_type);
430 return -EINVAL; /* other clocks not supported */
431 }
432
433 if ((PCXHR_INPB(mgr, PCXHR_XLX_CSUER) & mask) != mask) {
434 snd_printdd("get_external_clock(%d) = 0 Hz\n", clock_type);
435 *sample_rate = 0;
436 return 0; /* no external clock locked */
437 }
438
439 PCXHR_OUTPB(mgr, PCXHR_XLX_STATUS, reg); /* calculate freq */
440
441 /* save the measured clock frequency */
442 reg |= PCXHR_STAT_FREQ_SAVE_MASK;
443
444 if (mgr->last_reg_stat != reg) {
445 udelay(500); /* wait min 2 cycles of lowest freq (8000) */
446 mgr->last_reg_stat = reg;
447 }
448
449 PCXHR_OUTPB(mgr, PCXHR_XLX_STATUS, reg); /* save */
450
451 /* get the frequency */
452 ticks = (unsigned int)PCXHR_INPB(mgr, PCXHR_XLX_CFG);
453 ticks = (ticks & 0x03) << 8;
454 ticks |= (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP_RESET);
455
456 if (ticks != 0)
457 calc_rate = 28224000 / ticks;
458 /* rounding */
459 if (calc_rate > 184200)
460 rate = 192000;
461 else if (calc_rate > 152200)
462 rate = 176400;
463 else if (calc_rate > 112000)
464 rate = 128000;
465 else if (calc_rate > 92100)
466 rate = 96000;
467 else if (calc_rate > 76100)
468 rate = 88200;
469 else if (calc_rate > 56000)
470 rate = 64000;
471 else if (calc_rate > 46050)
472 rate = 48000;
473 else if (calc_rate > 38050)
474 rate = 44100;
475 else if (calc_rate > 28000)
476 rate = 32000;
477 else if (calc_rate > 23025)
478 rate = 24000;
479 else if (calc_rate > 19025)
480 rate = 22050;
481 else if (calc_rate > 14000)
482 rate = 16000;
483 else if (calc_rate > 11512)
484 rate = 12000;
485 else if (calc_rate > 9512)
486 rate = 11025;
487 else if (calc_rate > 7000)
488 rate = 8000;
489 else
490 rate = 0;
491
492 snd_printdd("External clock is at %d Hz (measured %d Hz)\n",
493 rate, calc_rate);
494 *sample_rate = rate;
495 return 0;
496}
497
498
499int hr222_update_analog_audio_level(struct snd_pcxhr *chip,
500 int is_capture, int channel)
501{
502 snd_printdd("hr222_update_analog_audio_level(%s chan=%d)\n",
503 is_capture ? "capture" : "playback", channel);
504 if (is_capture) {
505 int level_l, level_r, level_mic;
506 /* we have to update all levels */
507 if (chip->analog_capture_active) {
508 level_l = chip->analog_capture_volume[0];
509 level_r = chip->analog_capture_volume[1];
510 } else {
511 level_l = HR222_LINE_CAPTURE_LEVEL_MIN;
512 level_r = HR222_LINE_CAPTURE_LEVEL_MIN;
513 }
514 if (chip->mic_active)
515 level_mic = chip->mic_volume;
516 else
517 level_mic = HR222_MICRO_CAPTURE_LEVEL_MIN;
518 return hr222_set_hw_capture_level(chip->mgr,
519 level_l, level_r, level_mic);
520 } else {
521 int vol;
522 if (chip->analog_playback_active[channel])
523 vol = chip->analog_playback_volume[channel];
524 else
525 vol = HR222_LINE_PLAYBACK_LEVEL_MIN;
526 return hr222_set_hw_playback_level(chip->mgr, channel, vol);
527 }
528}
529
530
531/*texts[5] = {"Line", "Digital", "Digi+SRC", "Mic", "Line+Mic"}*/
532#define SOURCE_LINE 0
533#define SOURCE_DIGITAL 1
534#define SOURCE_DIGISRC 2
535#define SOURCE_MIC 3
536#define SOURCE_LINEMIC 4
537
538int hr222_set_audio_source(struct snd_pcxhr *chip)
539{
540 int digital = 0;
541 /* default analog source */
542 chip->mgr->xlx_cfg &= ~(PCXHR_CFG_SRC_MASK |
543 PCXHR_CFG_DATAIN_SEL_MASK |
544 PCXHR_CFG_DATA_UER1_SEL_MASK);
545
546 if (chip->audio_capture_source == SOURCE_DIGISRC) {
547 chip->mgr->xlx_cfg |= PCXHR_CFG_SRC_MASK;
548 digital = 1;
549 } else {
550 if (chip->audio_capture_source == SOURCE_DIGITAL)
551 digital = 1;
552 }
553 if (digital) {
554 chip->mgr->xlx_cfg |= PCXHR_CFG_DATAIN_SEL_MASK;
555 if (chip->mgr->board_has_aes1) {
556 /* get data from the AES1 plug */
557 chip->mgr->xlx_cfg |= PCXHR_CFG_DATA_UER1_SEL_MASK;
558 }
559 /* chip->mic_active = 0; */
560 /* chip->analog_capture_active = 0; */
561 } else {
562 int update_lvl = 0;
563 chip->analog_capture_active = 0;
564 chip->mic_active = 0;
565 if (chip->audio_capture_source == SOURCE_LINE ||
566 chip->audio_capture_source == SOURCE_LINEMIC) {
567 if (chip->analog_capture_active == 0)
568 update_lvl = 1;
569 chip->analog_capture_active = 1;
570 }
571 if (chip->audio_capture_source == SOURCE_MIC ||
572 chip->audio_capture_source == SOURCE_LINEMIC) {
573 if (chip->mic_active == 0)
574 update_lvl = 1;
575 chip->mic_active = 1;
576 }
577 if (update_lvl) {
578 /* capture: update all 3 mutes/unmutes with one call */
579 hr222_update_analog_audio_level(chip, 1, 0);
580 }
581 }
582 /* set the source infos (max 3 bits modified) */
583 PCXHR_OUTPB(chip->mgr, PCXHR_XLX_CFG, chip->mgr->xlx_cfg);
584 return 0;
585}
586
587
588int hr222_iec958_capture_byte(struct snd_pcxhr *chip,
589 int aes_idx, unsigned char *aes_bits)
590{
591 unsigned char idx = (unsigned char)(aes_idx * 8);
592 unsigned char temp = 0;
593 unsigned char mask = chip->mgr->board_has_aes1 ?
594 PCXHR_SUER1_BIT_C_READ_MASK : PCXHR_SUER_BIT_C_READ_MASK;
595 int i;
596 for (i = 0; i < 8; i++) {
597 PCXHR_OUTPB(chip->mgr, PCXHR_XLX_RUER, idx++); /* idx < 192 */
598 temp <<= 1;
599 if (PCXHR_INPB(chip->mgr, PCXHR_XLX_CSUER) & mask)
600 temp |= 1;
601 }
602 snd_printdd("read iec958 AES %d byte %d = 0x%x\n",
603 chip->chip_idx, aes_idx, temp);
604 *aes_bits = temp;
605 return 0;
606}
607
608
609int hr222_iec958_update_byte(struct snd_pcxhr *chip,
610 int aes_idx, unsigned char aes_bits)
611{
612 int i;
613 unsigned char new_bits = aes_bits;
614 unsigned char old_bits = chip->aes_bits[aes_idx];
615 unsigned char idx = (unsigned char)(aes_idx * 8);
616 for (i = 0; i < 8; i++) {
617 if ((old_bits & 0x01) != (new_bits & 0x01)) {
618 /* idx < 192 */
619 PCXHR_OUTPB(chip->mgr, PCXHR_XLX_RUER, idx);
620 /* write C and U bit */
621 PCXHR_OUTPB(chip->mgr, PCXHR_XLX_CSUER, new_bits&0x01 ?
622 PCXHR_SUER_BIT_C_WRITE_MASK : 0);
623 }
624 idx++;
625 old_bits >>= 1;
626 new_bits >>= 1;
627 }
628 chip->aes_bits[aes_idx] = aes_bits;
629 return 0;
630}
631
632static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level)
633{
634 unsigned char boost_mask;
635 boost_mask = (unsigned char) (level << PCXHR_SELMIC_PREAMPLI_OFFSET);
636 if (boost_mask & (~PCXHR_SELMIC_PREAMPLI_MASK))
637 return; /* only values form 0 to 3 accepted */
638
639 mgr->xlx_selmic &= ~PCXHR_SELMIC_PREAMPLI_MASK;
640 mgr->xlx_selmic |= boost_mask;
641
642 PCXHR_OUTPB(mgr, PCXHR_XLX_SELMIC, mgr->xlx_selmic);
643
644 snd_printdd("hr222_micro_boost : set %x\n", boost_mask);
645}
646
647static void hr222_phantom_power(struct pcxhr_mgr *mgr, int power)
648{
649 if (power)
650 mgr->xlx_selmic |= PCXHR_SELMIC_PHANTOM_ALIM;
651 else
652 mgr->xlx_selmic &= ~PCXHR_SELMIC_PHANTOM_ALIM;
653
654 PCXHR_OUTPB(mgr, PCXHR_XLX_SELMIC, mgr->xlx_selmic);
655
656 snd_printdd("hr222_phantom_power : set %d\n", power);
657}
658
659
660/* mic level */
661static const DECLARE_TLV_DB_SCALE(db_scale_mic_hr222, -9850, 50, 650);
662
663static int hr222_mic_vol_info(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_info *uinfo)
665{
666 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
667 uinfo->count = 1;
668 uinfo->value.integer.min = HR222_MICRO_CAPTURE_LEVEL_MIN; /* -98 dB */
669 /* gains from 9 dB to 31.5 dB not recommended; use micboost instead */
670 uinfo->value.integer.max = HR222_MICRO_CAPTURE_LEVEL_MAX; /* +7 dB */
671 return 0;
672}
673
674static int hr222_mic_vol_get(struct snd_kcontrol *kcontrol,
675 struct snd_ctl_elem_value *ucontrol)
676{
677 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
678 mutex_lock(&chip->mgr->mixer_mutex);
679 ucontrol->value.integer.value[0] = chip->mic_volume;
680 mutex_unlock(&chip->mgr->mixer_mutex);
681 return 0;
682}
683
684static int hr222_mic_vol_put(struct snd_kcontrol *kcontrol,
685 struct snd_ctl_elem_value *ucontrol)
686{
687 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
688 int changed = 0;
689 mutex_lock(&chip->mgr->mixer_mutex);
690 if (chip->mic_volume != ucontrol->value.integer.value[0]) {
691 changed = 1;
692 chip->mic_volume = ucontrol->value.integer.value[0];
693 hr222_update_analog_audio_level(chip, 1, 0);
694 }
695 mutex_unlock(&chip->mgr->mixer_mutex);
696 return changed;
697}
698
699static struct snd_kcontrol_new hr222_control_mic_level = {
700 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
701 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
702 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
703 .name = "Mic Capture Volume",
704 .info = hr222_mic_vol_info,
705 .get = hr222_mic_vol_get,
706 .put = hr222_mic_vol_put,
707 .tlv = { .p = db_scale_mic_hr222 },
708};
709
710
711/* mic boost level */
712static const DECLARE_TLV_DB_SCALE(db_scale_micboost_hr222, 0, 1800, 5400);
713
714static int hr222_mic_boost_info(struct snd_kcontrol *kcontrol,
715 struct snd_ctl_elem_info *uinfo)
716{
717 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
718 uinfo->count = 1;
719 uinfo->value.integer.min = 0; /* 0 dB */
720 uinfo->value.integer.max = 3; /* 54 dB */
721 return 0;
722}
723
724static int hr222_mic_boost_get(struct snd_kcontrol *kcontrol,
725 struct snd_ctl_elem_value *ucontrol)
726{
727 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
728 mutex_lock(&chip->mgr->mixer_mutex);
729 ucontrol->value.integer.value[0] = chip->mic_boost;
730 mutex_unlock(&chip->mgr->mixer_mutex);
731 return 0;
732}
733
734static int hr222_mic_boost_put(struct snd_kcontrol *kcontrol,
735 struct snd_ctl_elem_value *ucontrol)
736{
737 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
738 int changed = 0;
739 mutex_lock(&chip->mgr->mixer_mutex);
740 if (chip->mic_boost != ucontrol->value.integer.value[0]) {
741 changed = 1;
742 chip->mic_boost = ucontrol->value.integer.value[0];
743 hr222_micro_boost(chip->mgr, chip->mic_boost);
744 }
745 mutex_unlock(&chip->mgr->mixer_mutex);
746 return changed;
747}
748
749static struct snd_kcontrol_new hr222_control_mic_boost = {
750 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
751 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
752 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
753 .name = "MicBoost Capture Volume",
754 .info = hr222_mic_boost_info,
755 .get = hr222_mic_boost_get,
756 .put = hr222_mic_boost_put,
757 .tlv = { .p = db_scale_micboost_hr222 },
758};
759
760
761/******************* Phantom power switch *******************/
762#define hr222_phantom_power_info snd_ctl_boolean_mono_info
763
764static int hr222_phantom_power_get(struct snd_kcontrol *kcontrol,
765 struct snd_ctl_elem_value *ucontrol)
766{
767 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
768 mutex_lock(&chip->mgr->mixer_mutex);
769 ucontrol->value.integer.value[0] = chip->phantom_power;
770 mutex_unlock(&chip->mgr->mixer_mutex);
771 return 0;
772}
773
774static int hr222_phantom_power_put(struct snd_kcontrol *kcontrol,
775 struct snd_ctl_elem_value *ucontrol)
776{
777 struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol);
778 int power, changed = 0;
779
780 mutex_lock(&chip->mgr->mixer_mutex);
781 power = !!ucontrol->value.integer.value[0];
782 if (chip->phantom_power != power) {
783 hr222_phantom_power(chip->mgr, power);
784 chip->phantom_power = power;
785 changed = 1;
786 }
787 mutex_unlock(&chip->mgr->mixer_mutex);
788 return changed;
789}
790
791static struct snd_kcontrol_new hr222_phantom_power_switch = {
792 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
793 .name = "Phantom Power Switch",
794 .info = hr222_phantom_power_info,
795 .get = hr222_phantom_power_get,
796 .put = hr222_phantom_power_put,
797};
798
799
800int hr222_add_mic_controls(struct snd_pcxhr *chip)
801{
802 int err;
803 if (!chip->mgr->board_has_mic)
804 return 0;
805
806 /* controls */
807 err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_level,
808 chip));
809 if (err < 0)
810 return err;
811
812 err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_boost,
813 chip));
814 if (err < 0)
815 return err;
816
817 err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_phantom_power_switch,
818 chip));
819 return err;
820}
Linux 6.x block layer and io_uring tree(s)