ALSA: oxygen: allow to dump codec registers
[linux-2.6-block.git] / sound / pci / oxygen / oxygen.c
CommitLineData
d0ce9946 1/*
873591db 2 * C-Media CMI8788 driver for C-Media's reference design and similar models
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3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
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21 * CMI8788:
22 *
d0ce9946 23 * SPI 0 -> 1st AK4396 (front)
7113e958 24 * SPI 1 -> 2nd AK4396 (surround)
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25 * SPI 2 -> 3rd AK4396 (center/LFE)
26 * SPI 3 -> WM8785
7113e958 27 * SPI 4 -> 4th AK4396 (back)
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28 *
29 * GPIO 0 -> DFS0 of AK5385
30 * GPIO 1 -> DFS1 of AK5385
873591db 31 * GPIO 8 -> enable headphone amplifier on HT-Omega models
dc0adf48
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32 *
33 * CM9780:
34 *
35 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
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36 */
37
df91bc23 38#include <linux/delay.h>
902b05c1 39#include <linux/mutex.h>
d0ce9946 40#include <linux/pci.h>
902b05c1 41#include <sound/ac97_codec.h>
ccc80fb4 42#include <sound/control.h>
d0ce9946 43#include <sound/core.h>
9719fcaa 44#include <sound/info.h>
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45#include <sound/initval.h>
46#include <sound/pcm.h>
47#include <sound/pcm_params.h>
48#include <sound/tlv.h>
49#include "oxygen.h"
c626026d 50#include "ak4396.h"
f5b2368b 51#include "wm8785.h"
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52
53MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
54MODULE_DESCRIPTION("C-Media CMI8788 driver");
d023dc0a 55MODULE_LICENSE("GPL v2");
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56MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
57
58static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
59static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
60static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
61
62module_param_array(index, int, NULL, 0444);
63MODULE_PARM_DESC(index, "card index");
64module_param_array(id, charp, NULL, 0444);
65MODULE_PARM_DESC(id, "ID string");
66module_param_array(enable, bool, NULL, 0444);
67MODULE_PARM_DESC(enable, "enable card");
68
2f1b0ec7 69enum {
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70 MODEL_CMEDIA_REF,
71 MODEL_MERIDIAN,
72 MODEL_CLARO,
73 MODEL_CLARO_HALO,
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74 MODEL_FANTASIA,
75 MODEL_2CH_OUTPUT,
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76};
77
cebe41d4 78static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
18f24839 79 /* C-Media's reference design */
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80 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
81 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
82 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
83 { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
84 { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
85 { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
86 { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
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87 { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
88 /* Kuroutoshikou CMI8787-HG2PCI */
2146dcfd 89 { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_2CH_OUTPUT },
18f24839 90 /* TempoTec HiFier Fantasia */
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91 { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
92 /* TempoTec HiFier Serenade */
93 { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_2CH_OUTPUT },
18f24839 94 /* AuzenTech X-Meridian */
2f1b0ec7 95 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
18f24839 96 /* HT-Omega Claro */
873591db 97 { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
18f24839 98 /* HT-Omega Claro halo */
873591db 99 { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
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100 { }
101};
102MODULE_DEVICE_TABLE(pci, oxygen_ids);
103
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104
105#define GPIO_AK5385_DFS_MASK 0x0003
106#define GPIO_AK5385_DFS_NORMAL 0x0000
107#define GPIO_AK5385_DFS_DOUBLE 0x0001
108#define GPIO_AK5385_DFS_QUAD 0x0002
109
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110#define GPIO_CLARO_HP 0x0100
111
7ef37cd9 112struct generic_data {
45c1de8e 113 unsigned int dacs;
6f0de3ce 114 u8 ak4396_regs[4][5];
1ff04886 115 u16 wm8785_regs[3];
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116};
117
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118static void ak4396_write(struct oxygen *chip, unsigned int codec,
119 u8 reg, u8 value)
120{
121 /* maps ALSA channel pair number to SPI output */
122 static const u8 codec_spi_map[4] = {
7113e958 123 0, 1, 2, 4
d0ce9946 124 };
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125 struct generic_data *data = chip->model_data;
126
c2353a08 127 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
d0ce9946 128 OXYGEN_SPI_DATA_LENGTH_2 |
2ea85986 129 OXYGEN_SPI_CLOCK_160 |
d0ce9946 130 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
c2353a08 131 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
d0ce9946 132 AK4396_WRITE | (reg << 8) | value);
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133 data->ak4396_regs[codec][reg] = value;
134}
135
136static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
137 u8 reg, u8 value)
138{
139 struct generic_data *data = chip->model_data;
140
141 if (value != data->ak4396_regs[codec][reg])
142 ak4396_write(chip, codec, reg, value);
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143}
144
145static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
146{
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147 struct generic_data *data = chip->model_data;
148
c2353a08 149 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
d0ce9946 150 OXYGEN_SPI_DATA_LENGTH_2 |
2ea85986 151 OXYGEN_SPI_CLOCK_160 |
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152 (3 << OXYGEN_SPI_CODEC_SHIFT) |
153 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
d0ce9946 154 (reg << 9) | value);
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155 if (reg < ARRAY_SIZE(data->wm8785_regs))
156 data->wm8785_regs[reg] = value;
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157}
158
75146fc0 159static void ak4396_registers_init(struct oxygen *chip)
d0ce9946 160{
7ef37cd9 161 struct generic_data *data = chip->model_data;
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162 unsigned int i;
163
45c1de8e 164 for (i = 0; i < data->dacs; ++i) {
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165 ak4396_write(chip, i, AK4396_CONTROL_1,
166 AK4396_DIF_24_MSB | AK4396_RSTN);
167 ak4396_write(chip, i, AK4396_CONTROL_2,
168 data->ak4396_regs[0][AK4396_CONTROL_2]);
169 ak4396_write(chip, i, AK4396_CONTROL_3,
170 AK4396_PCM);
171 ak4396_write(chip, i, AK4396_LCH_ATT,
172 chip->dac_volume[i * 2]);
173 ak4396_write(chip, i, AK4396_RCH_ATT,
174 chip->dac_volume[i * 2 + 1]);
d0ce9946 175 }
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176}
177
178static void ak4396_init(struct oxygen *chip)
179{
180 struct generic_data *data = chip->model_data;
181
45c1de8e 182 data->dacs = chip->model.dac_channels / 2;
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183 data->ak4396_regs[0][AK4396_CONTROL_2] =
184 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
75146fc0 185 ak4396_registers_init(chip);
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186 snd_component_add(chip->card, "AK4396");
187}
188
189static void ak5385_init(struct oxygen *chip)
190{
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191 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
192 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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193 snd_component_add(chip->card, "AK5385");
194}
195
75146fc0 196static void wm8785_registers_init(struct oxygen *chip)
d0ce9946 197{
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198 struct generic_data *data = chip->model_data;
199
878ac3ee 200 wm8785_write(chip, WM8785_R7, 0);
6f0de3ce 201 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
1ff04886 202 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
75146fc0 203}
e58aee95 204
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205static void wm8785_init(struct oxygen *chip)
206{
207 struct generic_data *data = chip->model_data;
208
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209 data->wm8785_regs[0] =
210 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
1ff04886 211 data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
75146fc0 212 wm8785_registers_init(chip);
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213 snd_component_add(chip->card, "WM8785");
214}
215
216static void generic_init(struct oxygen *chip)
217{
218 ak4396_init(chip);
219 wm8785_init(chip);
220}
221
222static void meridian_init(struct oxygen *chip)
223{
224 ak4396_init(chip);
225 ak5385_init(chip);
226}
227
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228static void claro_enable_hp(struct oxygen *chip)
229{
230 msleep(300);
231 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
232 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
233}
234
235static void claro_init(struct oxygen *chip)
236{
237 ak4396_init(chip);
238 wm8785_init(chip);
239 claro_enable_hp(chip);
240}
241
242static void claro_halo_init(struct oxygen *chip)
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243{
244 ak4396_init(chip);
245 ak5385_init(chip);
873591db 246 claro_enable_hp(chip);
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247}
248
2146dcfd 249static void fantasia_init(struct oxygen *chip)
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250{
251 ak4396_init(chip);
252 snd_component_add(chip->card, "CS5340");
253}
254
2146dcfd 255static void stereo_output_init(struct oxygen *chip)
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256{
257 ak4396_init(chip);
258}
259
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260static void generic_cleanup(struct oxygen *chip)
261{
262}
263
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264static void claro_disable_hp(struct oxygen *chip)
265{
266 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
267}
268
269static void claro_cleanup(struct oxygen *chip)
270{
271 claro_disable_hp(chip);
272}
273
274static void claro_suspend(struct oxygen *chip)
275{
276 claro_disable_hp(chip);
277}
278
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279static void generic_resume(struct oxygen *chip)
280{
281 ak4396_registers_init(chip);
282 wm8785_registers_init(chip);
283}
284
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285static void meridian_resume(struct oxygen *chip)
286{
287 ak4396_registers_init(chip);
288}
289
873591db 290static void claro_resume(struct oxygen *chip)
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291{
292 ak4396_registers_init(chip);
873591db 293 claro_enable_hp(chip);
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294}
295
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296static void stereo_resume(struct oxygen *chip)
297{
298 ak4396_registers_init(chip);
299}
300
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301static void set_ak4396_params(struct oxygen *chip,
302 struct snd_pcm_hw_params *params)
303{
7ef37cd9 304 struct generic_data *data = chip->model_data;
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305 unsigned int i;
306 u8 value;
307
6f0de3ce 308 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
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309 if (params_rate(params) <= 54000)
310 value |= AK4396_DFS_NORMAL;
236c4920 311 else if (params_rate(params) <= 108000)
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312 value |= AK4396_DFS_DOUBLE;
313 else
314 value |= AK4396_DFS_QUAD;
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315
316 msleep(1); /* wait for the new MCLK to become stable */
317
6f0de3ce 318 if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
45c1de8e 319 for (i = 0; i < data->dacs; ++i) {
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320 ak4396_write(chip, i, AK4396_CONTROL_1,
321 AK4396_DIF_24_MSB);
322 ak4396_write(chip, i, AK4396_CONTROL_2, value);
323 ak4396_write(chip, i, AK4396_CONTROL_1,
324 AK4396_DIF_24_MSB | AK4396_RSTN);
325 }
326 }
327}
328
329static void update_ak4396_volume(struct oxygen *chip)
330{
45c1de8e 331 struct generic_data *data = chip->model_data;
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332 unsigned int i;
333
45c1de8e 334 for (i = 0; i < data->dacs; ++i) {
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335 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
336 chip->dac_volume[i * 2]);
337 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
338 chip->dac_volume[i * 2 + 1]);
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339 }
340}
341
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342static void update_ak4396_mute(struct oxygen *chip)
343{
7ef37cd9 344 struct generic_data *data = chip->model_data;
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345 unsigned int i;
346 u8 value;
347
6f0de3ce 348 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
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349 if (chip->dac_mute)
350 value |= AK4396_SMUTE;
45c1de8e 351 for (i = 0; i < data->dacs; ++i)
6f0de3ce 352 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
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353}
354
355static void set_wm8785_params(struct oxygen *chip,
356 struct snd_pcm_hw_params *params)
357{
6f0de3ce 358 struct generic_data *data = chip->model_data;
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359 unsigned int value;
360
878ac3ee 361 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
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362 if (params_rate(params) <= 48000)
363 value |= WM8785_OSR_SINGLE;
364 else if (params_rate(params) <= 96000)
d0ce9946 365 value |= WM8785_OSR_DOUBLE;
d0ce9946 366 else
71e22a4b 367 value |= WM8785_OSR_QUAD;
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368 if (value != data->wm8785_regs[0]) {
369 wm8785_write(chip, WM8785_R7, 0);
370 wm8785_write(chip, WM8785_R0, value);
1ff04886 371 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
6f0de3ce 372 }
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373}
374
375static void set_ak5385_params(struct oxygen *chip,
376 struct snd_pcm_hw_params *params)
377{
378 unsigned int value;
379
380 if (params_rate(params) <= 54000)
878ac3ee 381 value = GPIO_AK5385_DFS_NORMAL;
d0ce9946 382 else if (params_rate(params) <= 108000)
878ac3ee 383 value = GPIO_AK5385_DFS_DOUBLE;
d0ce9946 384 else
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385 value = GPIO_AK5385_DFS_QUAD;
386 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
387 value, GPIO_AK5385_DFS_MASK);
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388}
389
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390static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
391{
392}
393
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394static int rolloff_info(struct snd_kcontrol *ctl,
395 struct snd_ctl_elem_info *info)
396{
397 static const char *const names[2] = {
398 "Sharp Roll-off", "Slow Roll-off"
399 };
400
401 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
402 info->count = 1;
403 info->value.enumerated.items = 2;
404 if (info->value.enumerated.item >= 2)
405 info->value.enumerated.item = 1;
406 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
407 return 0;
408}
409
410static int rolloff_get(struct snd_kcontrol *ctl,
411 struct snd_ctl_elem_value *value)
412{
413 struct oxygen *chip = ctl->private_data;
414 struct generic_data *data = chip->model_data;
415
416 value->value.enumerated.item[0] =
417 (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
418 return 0;
419}
420
421static int rolloff_put(struct snd_kcontrol *ctl,
422 struct snd_ctl_elem_value *value)
423{
424 struct oxygen *chip = ctl->private_data;
425 struct generic_data *data = chip->model_data;
426 unsigned int i;
427 int changed;
428 u8 reg;
429
430 mutex_lock(&chip->mutex);
431 reg = data->ak4396_regs[0][AK4396_CONTROL_2];
432 if (value->value.enumerated.item[0])
433 reg |= AK4396_SLOW;
434 else
435 reg &= ~AK4396_SLOW;
436 changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
437 if (changed) {
45c1de8e 438 for (i = 0; i < data->dacs; ++i)
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439 ak4396_write(chip, i, AK4396_CONTROL_2, reg);
440 }
441 mutex_unlock(&chip->mutex);
442 return changed;
443}
444
445static const struct snd_kcontrol_new rolloff_control = {
446 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
447 .name = "DAC Filter Playback Enum",
448 .info = rolloff_info,
449 .get = rolloff_get,
450 .put = rolloff_put,
451};
452
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453static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
454{
455 static const char *const names[2] = {
456 "None", "High-pass Filter"
457 };
458
459 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
460 info->count = 1;
461 info->value.enumerated.items = 2;
462 if (info->value.enumerated.item >= 2)
463 info->value.enumerated.item = 1;
464 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
465 return 0;
466}
467
468static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
469{
470 struct oxygen *chip = ctl->private_data;
471 struct generic_data *data = chip->model_data;
472
473 value->value.enumerated.item[0] =
474 (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
475 return 0;
476}
477
478static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
479{
480 struct oxygen *chip = ctl->private_data;
481 struct generic_data *data = chip->model_data;
482 unsigned int reg;
483 int changed;
484
485 mutex_lock(&chip->mutex);
486 reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
487 if (value->value.enumerated.item[0])
488 reg |= WM8785_HPFR | WM8785_HPFL;
489 changed = reg != data->wm8785_regs[WM8785_R2];
490 if (changed)
491 wm8785_write(chip, WM8785_R2, reg);
492 mutex_unlock(&chip->mutex);
493 return changed;
494}
495
496static const struct snd_kcontrol_new hpf_control = {
497 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
498 .name = "ADC Filter Capture Enum",
499 .info = hpf_info,
500 .get = hpf_get,
501 .put = hpf_put,
502};
503
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504static int generic_mixer_init(struct oxygen *chip)
505{
506 return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
507}
508
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509static int generic_wm8785_mixer_init(struct oxygen *chip)
510{
511 int err;
512
513 err = generic_mixer_init(chip);
514 if (err < 0)
515 return err;
516 err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
517 if (err < 0)
518 return err;
519 return 0;
520}
521
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522static void dump_ak4396_registers(struct oxygen *chip,
523 struct snd_info_buffer *buffer)
524{
525 struct generic_data *data = chip->model_data;
526 unsigned int dac, i;
527
528 for (dac = 0; dac < data->dacs; ++dac) {
529 snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
530 for (i = 0; i < 5; ++i)
531 snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
532 }
533 snd_iprintf(buffer, "\n");
534}
535
536static void dump_wm8785_registers(struct oxygen *chip,
537 struct snd_info_buffer *buffer)
538{
539 struct generic_data *data = chip->model_data;
540 unsigned int i;
541
542 snd_iprintf(buffer, "\nWM8785:");
543 for (i = 0; i < 3; ++i)
544 snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
545 snd_iprintf(buffer, "\n");
546}
547
548static void dump_oxygen_registers(struct oxygen *chip,
549 struct snd_info_buffer *buffer)
550{
551 dump_ak4396_registers(chip, buffer);
552 dump_wm8785_registers(chip, buffer);
553}
554
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555static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
556
557static const struct oxygen_model model_generic = {
558 .shortname = "C-Media CMI8788",
559 .longname = "C-Media Oxygen HD Audio",
560 .chip = "CMI8788",
d0ce9946 561 .init = generic_init,
1ff04886 562 .mixer_init = generic_wm8785_mixer_init,
d0ce9946 563 .cleanup = generic_cleanup,
4a4bc53b 564 .resume = generic_resume,
76ffe1e3 565 .get_i2s_mclk = oxygen_default_i2s_mclk,
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566 .set_dac_params = set_ak4396_params,
567 .set_adc_params = set_wm8785_params,
568 .update_dac_volume = update_ak4396_volume,
569 .update_dac_mute = update_ak4396_mute,
9719fcaa 570 .dump_registers = dump_oxygen_registers,
4972a177 571 .dac_tlv = ak4396_db_scale,
7ef37cd9 572 .model_data_size = sizeof(struct generic_data),
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573 .device_config = PLAYBACK_0_TO_I2S |
574 PLAYBACK_1_TO_SPDIF |
575 PLAYBACK_2_TO_AC97_1 |
576 CAPTURE_0_FROM_I2S_1 |
577 CAPTURE_1_FROM_SPDIF |
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578 CAPTURE_2_FROM_AC97_1 |
579 AC97_CD_INPUT,
976cd627 580 .dac_channels = 8,
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581 .dac_volume_min = 0,
582 .dac_volume_max = 255,
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583 .function_flags = OXYGEN_FUNCTION_SPI |
584 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
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585 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
586 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
d0ce9946 587};
d0ce9946 588
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589static int __devinit get_oxygen_model(struct oxygen *chip,
590 const struct pci_device_id *id)
591{
592 chip->model = model_generic;
593 switch (id->driver_data) {
594 case MODEL_MERIDIAN:
595 chip->model.init = meridian_init;
1ff04886 596 chip->model.mixer_init = generic_mixer_init;
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597 chip->model.resume = meridian_resume;
598 chip->model.set_adc_params = set_ak5385_params;
9719fcaa 599 chip->model.dump_registers = dump_ak4396_registers;
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600 chip->model.device_config = PLAYBACK_0_TO_I2S |
601 PLAYBACK_1_TO_SPDIF |
602 CAPTURE_0_FROM_I2S_2 |
603 CAPTURE_1_FROM_SPDIF;
604 break;
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605 case MODEL_CLARO:
606 chip->model.init = claro_init;
607 chip->model.cleanup = claro_cleanup;
608 chip->model.suspend = claro_suspend;
609 chip->model.resume = claro_resume;
610 break;
611 case MODEL_CLARO_HALO:
612 chip->model.init = claro_halo_init;
1ff04886 613 chip->model.mixer_init = generic_mixer_init;
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614 chip->model.cleanup = claro_cleanup;
615 chip->model.suspend = claro_suspend;
616 chip->model.resume = claro_resume;
d91b424d 617 chip->model.set_adc_params = set_ak5385_params;
9719fcaa 618 chip->model.dump_registers = dump_ak4396_registers;
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619 chip->model.device_config = PLAYBACK_0_TO_I2S |
620 PLAYBACK_1_TO_SPDIF |
621 CAPTURE_0_FROM_I2S_2 |
622 CAPTURE_1_FROM_SPDIF;
d91b424d 623 break;
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624 case MODEL_FANTASIA:
625 case MODEL_2CH_OUTPUT:
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626 chip->model.shortname = "C-Media CMI8787";
627 chip->model.chip = "CMI8787";
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628 if (id->driver_data == MODEL_FANTASIA)
629 chip->model.init = fantasia_init;
31f86bac 630 else
2146dcfd 631 chip->model.init = stereo_output_init;
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632 chip->model.resume = stereo_resume;
633 chip->model.mixer_init = generic_mixer_init;
634 chip->model.set_adc_params = set_no_params;
9719fcaa 635 chip->model.dump_registers = dump_ak4396_registers;
45c1de8e 636 chip->model.device_config = PLAYBACK_0_TO_I2S |
31f86bac 637 PLAYBACK_1_TO_SPDIF;
2146dcfd 638 if (id->driver_data == MODEL_FANTASIA)
31f86bac 639 chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
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640 chip->model.dac_channels = 2;
641 break;
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642 }
643 if (id->driver_data == MODEL_MERIDIAN ||
873591db 644 id->driver_data == MODEL_CLARO_HALO) {
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645 chip->model.misc_flags = OXYGEN_MISC_MIDI;
646 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
647 }
648 return 0;
649}
650
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651static int __devinit generic_oxygen_probe(struct pci_dev *pci,
652 const struct pci_device_id *pci_id)
653{
654 static int dev;
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655 int err;
656
657 if (dev >= SNDRV_CARDS)
658 return -ENODEV;
659 if (!enable[dev]) {
660 ++dev;
661 return -ENOENT;
662 }
bb718588 663 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
30459d7b 664 oxygen_ids, get_oxygen_model);
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665 if (err >= 0)
666 ++dev;
667 return err;
668}
669
670static struct pci_driver oxygen_driver = {
671 .name = "CMI8788",
672 .id_table = oxygen_ids,
673 .probe = generic_oxygen_probe,
674 .remove = __devexit_p(oxygen_pci_remove),
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675#ifdef CONFIG_PM
676 .suspend = oxygen_pci_suspend,
677 .resume = oxygen_pci_resume,
678#endif
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679};
680
681static int __init alsa_card_oxygen_init(void)
682{
683 return pci_register_driver(&oxygen_driver);
684}
685
686static void __exit alsa_card_oxygen_exit(void)
687{
688 pci_unregister_driver(&oxygen_driver);
689}
690
691module_init(alsa_card_oxygen_init)
692module_exit(alsa_card_oxygen_exit)